src/main/target/NUCLEOH723ZG/target.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #pragma once
  22
  23 #define TARGET_BOARD_IDENTIFIER "H723"
  24 #define USBD_PRODUCT_STRING "Nucleo-H723"
  25
  26 #define USE_TARGET_CONFIG
  27
  28 #define LED0_PIN                PB0
  29 #define LED1_PIN                PB7 // PE1 on NUCLEO-H743ZI2 (may collide with UART8_TX)
  30 //#define LED2_PIN                PB14 // SDMMC2_D0
  31
  32 // Nucleo-H7A3 has one button (The blue USER button).
  33 // Force two buttons to look at the single button so config reset on button works
  34 #define USE_BUTTONS
  35 #define BUTTON_A_PIN            PC13
  36 #define BUTTON_A_PIN_INVERTED // Active high
  37 #define BUTTON_B_PIN            PC13
  38 #define BUTTON_B_PIN_INVERTED // Active high
  39
  40 #define USE_BEEPER
  41 #define BEEPER_PIN              PE3
  42 #define BEEPER_INVERTED
  43
  44 #define USE_UART
  45
  46 #define USE_UART1
  47 #define UART1_RX_PIN            PA10
  48 #define UART1_TX_PIN            PA9
  49
  50 #define USE_UART2
  51 #define UART2_RX_PIN            NONE // PD6, collide with SDMMC2_CK
  52 #define UART2_TX_PIN            PD5
  53
  54 #define USE_UART3
  55 #define UART3_RX_PIN            PD9 // Virtual COM port on NUCLEO-H7A3ZI-Q
  56 #define UART3_TX_PIN            PD8 // Virtual COM port on NUCLEO-H7A3ZI-Q
  57
  58 #define USE_UART4
  59 #define UART4_RX_PIN            PC11
  60 #define UART4_TX_PIN            PC10
  61
  62 #define USE_UART5
  63 #define UART5_RX_PIN            PD2
  64 #define UART5_TX_PIN            PC12
  65
  66 #define USE_UART6
  67 #define UART6_RX_PIN            PC7
  68 #define UART6_TX_PIN            PC6
  69
  70 #define USE_UART7
  71 #define UART7_RX_PIN            PE7
  72 #define UART7_TX_PIN            PE8
  73
  74 #define USE_UART8
  75 #define UART8_RX_PIN            PE0
  76 #define UART8_TX_PIN            PE1
  77
  78 #define USE_LPUART1
  79 #define LPUART1_RX_PIN          PB7 // PA10 (Shared with UART1)
  80 #define LPUART1_TX_PIN          PB6 // PA9 (Shared with UART1)
  81
  82 #define USE_VCP
  83
  84 #define USE_SOFTSERIAL1
  85 #define USE_SOFTSERIAL2
  86
  87 #define SERIAL_PORT_COUNT       12
  88
  89 #define USE_SPI
  90
  91 #define USE_SPI_DEVICE_1
  92 #define SPI1_SCK_PIN            PB3
  93 #define SPI1_MISO_PIN           PB4
  94 #define SPI1_MOSI_PIN           PB5
  95
  96 #define USE_SPI_DEVICE_2
  97 #define SPI2_SCK_PIN            NONE
  98 #define SPI2_MISO_PIN           NONE
  99 #define SPI2_MOSI_PIN           NONE
 100
 101 #define USE_SPI_DEVICE_3
 102 #define SPI3_SCK_PIN            PC10 // PC10
 103 #define SPI3_MISO_PIN           PC11 // PC11
 104 #define SPI3_MOSI_PIN           PC12 // PC12
 105
 106 #define USE_SPI_DEVICE_4
 107 #define SPI4_SCK_PIN            NONE
 108 #define SPI4_MISO_PIN           NONE
 109 #define SPI4_MOSI_PIN           NONE
 110
 111 #define USE_SPI_DEVICE_5
 112 #define SPI5_SCK_PIN            NONE
 113 #define SPI5_MISO_PIN           NONE
 114 #define SPI5_MOSI_PIN           NONE
 115
 116 #define USE_SPI_DEVICE_6
 117 #define SPI6_SCK_PIN            NONE
 118 #define SPI6_MISO_PIN           NONE
 119 #define SPI6_MOSI_PIN           NONE
 120
 121 // #define USE_QUADSPI
 122 //#define USE_QUADSPI_DEVICE_1
 123
 124 #define QUADSPI1_SCK_PIN        NONE // PB2
 125
 126 #define QUADSPI1_BK1_IO0_PIN    NONE // PD11
 127 #define QUADSPI1_BK1_IO1_PIN    NONE // PD12
 128 #define QUADSPI1_BK1_IO2_PIN    NONE // PE2
 129 #define QUADSPI1_BK1_IO3_PIN    NONE // PD13
 130 #define QUADSPI1_BK1_CS_PIN     NONE // PB10
 131
 132 #define QUADSPI1_BK2_IO0_PIN    NONE // PE7
 133 #define QUADSPI1_BK2_IO1_PIN    NONE // PE8
 134 #define QUADSPI1_BK2_IO2_PIN    NONE // PE9
 135 #define QUADSPI1_BK2_IO3_PIN    NONE // PE10
 136 #define QUADSPI1_BK2_CS_PIN     NONE // NONE
 137
 138 #define QUADSPI1_MODE QUADSPI_MODE_BK1_ONLY
 139 #define QUADSPI1_CS_FLAGS (QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED)
 140
 141 #if !defined(NUCLEOH7A3_RAMBASED)
 142
 143 #define USE_SDCARD
 144 #define USE_SDCARD_SDIO
 145 #define SDCARD_DETECT_PIN       NONE
 146
 147 // SDMMC1
 148 // CK  PC12
 149 // CMD PD2
 150 // D0  PC8
 151 // D1  PC9
 152 // D2  PC10
 153 // D3  PC11
 154
 155 // SDIO configuration for SDMMC1, 1-bit width
 156 #define SDIO_DEVICE             SDIODEV_2 // SDIODEV_1 (for SDMMC1) or SDIODEV_2 (for SDMMC2) (or SDIOINVALID)
 157 #define SDIO_USE_4BIT           false
 158 #define SDIO_CK_PIN             PD6       // SDMMC1: PC12  SDMMC2: PC1 or PD6
 159 #define SDIO_CMD_PIN            PD7       // SDMMC1: PD2   SDMMC2: PA0 or PD7
 160 #define SDIO_D0_PIN             PB14      // SDMMC1: PC8   SDMMC2: PB14
 161 #define SDIO_D1_PIN             NONE      // SDMMC1: PC9   SDMMC2: PB15
 162 #define SDIO_D2_PIN             NONE      // SDMMC1: PC10  SDMMC2: PB3
 163 #define SDIO_D3_PIN             NONE      // SDMMC2: PC11  SDMMC2: PB4
 164
 165 #define USE_BLACKBOX
 166 #define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
 167 #endif
 168
 169 #define USE_I2C
 170 #define USE_I2C_DEVICE_1
 171 #define I2C1_SCL                PB8
 172 #define I2C1_SDA                PB9
 173 #define I2C_DEVICE (I2CDEV_1)
 174
 175 #define USE_MAG
 176 #define USE_MAG_HMC5883
 177 #define USE_MAG_SPI_HMC5883
 178 #define HMC5883_SPI_INSTANCE    NULL
 179 #define HMC5883_CS_PIN          NONE
 180
 181 #define USE_BARO
 182 #define USE_BARO_LPS
 183 #define USE_BARO_BMP085
 184 #define USE_BARO_BMP280
 185 #define USE_BARO_BMP388
 186 #define USE_BARO_MS5611
 187 #define USE_BARO_SPI_BMP280
 188 #define BMP280_SPI_INSTANCE     NULL
 189 #define BMP280_CS_PIN           NONE
 190
 191 #define USE_GYRO
 192 #define USE_MULTI_GYRO
 193 #define USE_ACC
 194
 195 #define USE_FAKE_GYRO
 196 #define USE_FAKE_ACC
 197 #define USE_GYRO_SPI_MPU6000
 198 #define USE_ACC_SPI_MPU6000
 199 #define USE_GYRO_SPI_MPU6500
 200 #define USE_ACC_SPI_MPU6500
 201 #define USE_GYRO_SPI_MPU9250
 202 #define USE_ACC_SPI_MPU9250
 203 #define USE_GYRO_SPI_ICM42605
 204 #define USE_ACC_SPI_ICM42605
 205 #define USE_GYRO_SPI_ICM42688P
 206 #define USE_ACC_SPI_ICM42688P
 207
 208 #define GYRO_1_CS_PIN           PD15
 209 #define GYRO_1_SPI_INSTANCE     SPI1
 210
 211 // I2C acc/gyro test, may require to activate
 212 // set gyro_x_bustype = I2C
 213 // set gyro_x_i2cBus = <Bus ordinal of I2C_DEVICE>
 214 //#define USE_GYRO_MPU6050
 215 //#define USE_ACC_MPU6050
 216
 217 #define USE_FLASH_CHIP
 218 #define USE_FLASH_M25P16
 219 #define USE_FLASH_W25M
 220 #define FLASH_SPI_INSTANCE      NULL
 221 #define FLASH_CS_PIN            NONE
 222 #define USE_FLASHFS
 223
 224 #define USE_BRUSHED_ESC_AUTODETECT  // Detect if brushed motors are connected and set defaults appropriately to avoid motors spinning on boot
 225 #define USE_GYRO_REGISTER_DUMP  // Adds gyroregisters command to cli to dump configured register values
 226 #define USE_TIMER
 227 #define USE_PWM_OUTPUT
 228 #define USE_MOTOR
 229 #define USE_EXTI
 230
 231 #define USE_RANGEFINDER
 232 #define USE_RANGEFINDER_HCSR04
 233 #define USE_RANGEFINDER_TF
 234
 235 #define USE_TRANSPONDER
 236
 237 #define USE_MAX7456
 238 #define MAX7456_SPI_INSTANCE    NULL // SPI3
 239 #define MAX7456_SPI_CS_PIN      NONE // PC9
 240
 241 #define USE_I2C_OLED_DISPLAY
 242
 243 #define USE_ADC
 244
 245 // DMA stream assignmnets
 246 #define VBAT_ADC_PIN            PB1  // ADC1
 247 #define CURRENT_METER_ADC_PIN   PC0  // ADC1
 248 #define RSSI_ADC_PIN            PF14 // ADC2
 249 #define EXTERNAL1_ADC_PIN       PC3  // ADC3
 250
 251 #define DEFAULT_VOLTAGE_METER_SOURCE VOLTAGE_METER_ADC
 252 #define DEFAULT_CURRENT_METER_SOURCE CURRENT_METER_ADC
 253
 254 #define USE_DSHOT
 255 #define USE_DSHOT_DMAR
 256
 257 #define USE_DMA
 258
 259 // Thanks to DMAMUX, H7 does not have limitations on DMA stream assignments to devices (except for collisions among them).
 260 //#define UART1_TX_DMA_OPT        0
 261 //#define UART2_TX_DMA_OPT        1
 262 //#define UART3_TX_DMA_OPT        2
 263 //#define UART4_TX_DMA_OPT        3
 264 //#define UART5_TX_DMA_OPT        4
 265 //#define UART6_TX_DMA_OPT        5
 266 //#define UART7_TX_DMA_OPT        6
 267 //#define UART8_TX_DMA_OPT        7
 268 #define ADC1_DMA_OPT 8
 269 #define ADC2_DMA_OPT 9
 270 #define ADC3_DMA_OPT 10
 271
 272 #define DEFAULT_FEATURE (FEATURE_OSD)
 273
 274 #define TARGET_IO_PORTA 0xffff
 275 #define TARGET_IO_PORTB 0xffff
 276 #define TARGET_IO_PORTC 0xffff
 277 #define TARGET_IO_PORTD 0xffff
 278 #define TARGET_IO_PORTE 0xffff
 279 #define TARGET_IO_PORTF 0xffff
 280 #define TARGET_IO_PORTG 0xffff
 281
 282 #define USABLE_TIMER_CHANNEL_COUNT 14
 283
 284 #define USED_TIMERS  ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(8) | TIM_N(12) )