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[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_hal_dac.c
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 @verbatim
15 ==============================================================================
16 ##### DAC Peripheral features #####
17 ==============================================================================
18 [..]
19 *** DAC Channels ***
20 ====================
21 [..]
22 STM32H7 devices integrate two 12-bit Digital Analog Converters
23
24 The 2 converters (i.e. channel1 & channel2)
25 can be used independently or simultaneously (dual mode):
26 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
27 peripherals (ex. OPAMPs, comparators).
28 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
29 peripherals (ex. OPAMPs, comparators).
30
31 *** DAC Triggers ***
32 ====================
33 [..]
34 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
35 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
36 [..]
37 Digital to Analog conversion can be triggered by:
38 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
39 The used pin (GPIOx_PIN_9) must be configured in input mode.
40
41 (#) Timers TRGO: TIM1, TIM2, TIM4, TIM5, TIM6, TIM7, TIM8, TIM15, TIM23 and TIM24
42 (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...)
43
44 (#) Low Power Timers TRGO: LPTIM1, LPTIM2 and LPTIM3
45 (DAC_TRIGGER_LPTIM1_OUT, DAC_TRIGGER_LPTIM2_OUT)
46
47 (#) High Resolution Timer TRGO: HRTIM1
48 (DAC_TRIGGER_HR1_TRGO1, DAC_TRIGGER_HR1_TRGO2)
49
50 (#) Software using DAC_TRIGGER_SOFTWARE
51 *** DAC Buffer mode feature ***
52 ===============================
53 [..]
54 Each DAC channel integrates an output buffer that can be used to
55 reduce the output impedance, and to drive external loads directly
56 without having to add an external operational amplifier.
57 To enable, the output buffer use
58 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
59 [..]
60 (@) Refer to the device datasheet for more details about output
61 impedance value with and without output buffer.
62
63 *** DAC connect feature ***
64 ===============================
65 [..]
66 Each DAC channel can be connected internally.
67 To connect, use
68 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
69 or
70 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_BOTH;
71
72 *** GPIO configurations guidelines ***
73 =====================
74 [..]
75 When a DAC channel is used (ex channel1 on PA4) and the other is not
76 (ex channel2 on PA5 is configured in Analog and disabled).
77 Channel1 may disturb channel2 as coupling effect.
78 Note that there is no coupling on channel2 as soon as channel2 is turned on.
79 Coupling on adjacent channel could be avoided as follows:
80 when unused PA5 is configured as INPUT PULL-UP or DOWN.
81 PA5 is configured in ANALOG just before it is turned on.
82
83 *** DAC Sample and Hold feature ***
84 ========================
85 [..]
86 For each converter, 2 modes are supported: normal mode and
87 "sample and hold" mode (i.e. low power mode).
88 In the sample and hold mode, the DAC core converts data, then holds the
89 converted voltage on a capacitor. When not converting, the DAC cores and
90 buffer are completely turned off between samples and the DAC output is
91 tri-stated, therefore reducing the overall power consumption. A new
92 stabilization period is needed before each new conversion.
93
94 The sample and hold allow setting internal or external voltage @
95 low power consumption cost (output value can be at any given rate either
96 by CPU or DMA).
97
98 The Sample and hold block and registers uses either LSI & run in
99 several power modes: run mode, sleep mode, low power run, low power sleep
100 mode & stop1 mode.
101
102 Low power stop1 mode allows only static conversion.
103
104 To enable Sample and Hold mode
105 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
106 RCC_LSI_ON parameters.
107
108 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
109 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
110 DAC_HoldTime & DAC_RefreshTime;
111
112 *** DAC calibration feature ***
113 ===================================
114 [..]
115 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
116 (++) Calibration aims at correcting some offset of output buffer.
117 (++) The DAC uses either factory calibration settings OR user defined
118 calibration (trimming) settings (i.e. trimming mode).
119 (++) The user defined settings can be figured out using self calibration
120 handled by HAL_DACEx_SelfCalibrate.
121 (++) HAL_DACEx_SelfCalibrate:
122 (+++) Runs automatically the calibration.
123 (+++) Enables the user trimming mode
124 (+++) Updates a structure with trimming values with fresh calibration
125 results.
126 The user may store the calibration results for larger
127 (ex monitoring the trimming as a function of temperature
128 for instance)
129
130 *** DAC wave generation feature ***
131 ===================================
132 [..]
133 Both DAC channels can be used to generate
134 (#) Noise wave
135 (#) Triangle wave
136
137 *** DAC data format ***
138 =======================
139 [..]
140 The DAC data format can be:
141 (#) 8-bit right alignment using DAC_ALIGN_8B_R
142 (#) 12-bit left alignment using DAC_ALIGN_12B_L
143 (#) 12-bit right alignment using DAC_ALIGN_12B_R
144
145 *** DAC data value to voltage correspondence ***
146 ================================================
147 [..]
148 The analog output voltage on each DAC channel pin is determined
149 by the following equation:
150 [..]
151 DAC_OUTx = VREF+ * DOR / 4095
152 (+) with DOR is the Data Output Register
153 [..]
154 VREF+ is the input voltage reference (refer to the device datasheet)
155 [..]
156 e.g. To set DAC_OUT1 to 0.7V, use
157 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
158
159 *** DMA requests ***
160 =====================
161 [..]
162 A DMA request can be generated when an external trigger (but not a software trigger)
163 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
164 DMA requests are mapped as following:
165 (#) DAC channel1: mapped on DMA_REQUEST_DAC1_CH1
166 (#) DAC channel2: mapped on DMA_REQUEST_DAC1_CH2
167
168 [..]
169 (@) For Dual mode and specific signal (Triangle and noise) generation please
170 refer to Extended Features Driver description
171
172 ##### How to use this driver #####
173 ==============================================================================
174 [..]
175 (+) DAC APB clock must be enabled to get write access to DAC
176 registers using HAL_DAC_Init()
177 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
178 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
179 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
180
181 *** Calibration mode IO operation ***
182 ======================================
183 [..]
184 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
185 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
186 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
187
188 *** Polling mode IO operation ***
189 =================================
190 [..]
191 (+) Start the DAC peripheral using HAL_DAC_Start()
192 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
193 (+) Stop the DAC peripheral using HAL_DAC_Stop()
194
195 *** DMA mode IO operation ***
196 ==============================
197 [..]
198 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
199 of data to be transferred at each end of conversion
200 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
201 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
202 function is executed and user can add his own code by customization of function pointer
203 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
204 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
205 function is executed and user can add his own code by customization of function pointer
206 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
207 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
208 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
209 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
210 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
211 function is executed and user can add his own code by customization of function pointer
212 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
213 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
214 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
215
216 *** Callback registration ***
217 =============================================
218 [..]
219 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
220 allows the user to configure dynamically the driver callbacks.
221
222 Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
223 it allows to register following callbacks:
224 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
225 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
226 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
227 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
228 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
229 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
230 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
231 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
232 (+) MspInitCallback : DAC MspInit.
233 (+) MspDeInitCallback : DAC MspdeInit.
234 This function takes as parameters the HAL peripheral handle, the Callback ID
235 and a pointer to the user callback function.
236
237 Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
238 weak (surcharged) function. It allows to reset following callbacks:
239 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
240 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
241 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
242 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
243 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
244 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
245 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
246 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
247 (+) MspInitCallback : DAC MspInit.
248 (+) MspDeInitCallback : DAC MspdeInit.
249 (+) All Callbacks
250 This function) takes as parameters the HAL peripheral handle and the Callback ID.
251
252 By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
253 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
254 Exception done for MspInit and MspDeInit callbacks that are respectively
255 reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
256 and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
257 If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
258 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
259
260 Callbacks can be registered/unregistered in READY state only.
261 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
262 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
263 during the Init/DeInit.
264 In that case first register the MspInit/MspDeInit user callbacks
265 using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
266 or @ref HAL_DAC_Init function.
267
268 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
269 not defined, the callback registering feature is not available
270 and weak (surcharged) callbacks are used.
271
272 *** DAC HAL driver macros list ***
273 =============================================
274 [..]
275 Below the list of most used macros in DAC HAL driver.
276
277 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
278 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
279 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
280 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
281
282 [..]
283 (@) You can refer to the DAC HAL driver header file for more useful macros
284
285 @endverbatim
286 ******************************************************************************
287 * @attention
288 *
289 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
290 * All rights reserved.</center></h2>
291 *
292 * This software component is licensed by ST under BSD 3-Clause license,
293 * the "License"; You may not use this file except in compliance with the
294 * License. You may obtain a copy of the License at:
295 * opensource.org/licenses/BSD-3-Clause
296 *
297 ******************************************************************************
298 */
299
300 /* Includes ------------------------------------------------------------------*/
301 #include "stm32h7xx_hal.h"
302
303 /** @addtogroup STM32H7xx_HAL_Driver
304 * @{
305 */
306
307 #ifdef HAL_DAC_MODULE_ENABLED
308 #if defined(DAC1) || defined(DAC2)
309
310 /** @defgroup DAC DAC
311 * @brief DAC driver modules
312 * @{
313 */
314
315 /* Private typedef -----------------------------------------------------------*/
316 /* Private define ------------------------------------------------------------*/
317 /* Private constants ---------------------------------------------------------*/
318 /** @addtogroup DAC_Private_Constants DAC Private Constants
319 * @{
320 */
321 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
322
323 /**
324 * @}
325 */
326
327 /* Private macro -------------------------------------------------------------*/
328 /* Private variables ---------------------------------------------------------*/
329 /* Private function prototypes -----------------------------------------------*/
330 /* Exported functions -------------------------------------------------------*/
331
332 /** @defgroup DAC_Exported_Functions DAC Exported Functions
333 * @{
334 */
335
336 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
337 * @brief Initialization and Configuration functions
338 *
339 @verbatim
340 ==============================================================================
341 ##### Initialization and de-initialization functions #####
342 ==============================================================================
343 [..] This section provides functions allowing to:
344 (+) Initialize and configure the DAC.
345 (+) De-initialize the DAC.
346
347 @endverbatim
348 * @{
349 */
350
351 /**
352 * @brief Initialize the DAC peripheral according to the specified parameters
353 * in the DAC_InitStruct and initialize the associated handle.
354 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
355 * the configuration information for the specified DAC.
356 * @retval HAL status
357 */
358 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
359 {
360 /* Check DAC handle */
361 if (hdac == NULL)
362 {
363 return HAL_ERROR;
364 }
365 /* Check the parameters */
366 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
367
368 if (hdac->State == HAL_DAC_STATE_RESET)
369 {
370 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
371 /* Init the DAC Callback settings */
372 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
373 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
374 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
375 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
376
377 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
378 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
379 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
380 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
381
382 if (hdac->MspInitCallback == NULL)
383 {
384 hdac->MspInitCallback = HAL_DAC_MspInit;
385 }
386 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
387
388 /* Allocate lock resource and initialize it */
389 hdac->Lock = HAL_UNLOCKED;
390
391 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
392 /* Init the low level hardware */
393 hdac->MspInitCallback(hdac);
394 #else
395 /* Init the low level hardware */
396 HAL_DAC_MspInit(hdac);
397 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
398 }
399
400 /* Initialize the DAC state*/
401 hdac->State = HAL_DAC_STATE_BUSY;
402
403 /* Set DAC error code to none */
404 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
405
406 /* Initialize the DAC state*/
407 hdac->State = HAL_DAC_STATE_READY;
408
409 /* Return function status */
410 return HAL_OK;
411 }
412
413 /**
414 * @brief Deinitialize the DAC peripheral registers to their default reset values.
415 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
416 * the configuration information for the specified DAC.
417 * @retval HAL status
418 */
419 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
420 {
421 /* Check DAC handle */
422 if (hdac == NULL)
423 {
424 return HAL_ERROR;
425 }
426
427 /* Check the parameters */
428 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
429
430 /* Change DAC state */
431 hdac->State = HAL_DAC_STATE_BUSY;
432
433 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
434 if (hdac->MspDeInitCallback == NULL)
435 {
436 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
437 }
438 /* DeInit the low level hardware */
439 hdac->MspDeInitCallback(hdac);
440 #else
441 /* DeInit the low level hardware */
442 HAL_DAC_MspDeInit(hdac);
443 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
444
445 /* Set DAC error code to none */
446 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
447
448 /* Change DAC state */
449 hdac->State = HAL_DAC_STATE_RESET;
450
451 /* Release Lock */
452 __HAL_UNLOCK(hdac);
453
454 /* Return function status */
455 return HAL_OK;
456 }
457
458 /**
459 * @brief Initialize the DAC MSP.
460 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
461 * the configuration information for the specified DAC.
462 * @retval None
463 */
464 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
465 {
466 /* Prevent unused argument(s) compilation warning */
467 UNUSED(hdac);
468
469 /* NOTE : This function should not be modified, when the callback is needed,
470 the HAL_DAC_MspInit could be implemented in the user file
471 */
472 }
473
474 /**
475 * @brief DeInitialize the DAC MSP.
476 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
477 * the configuration information for the specified DAC.
478 * @retval None
479 */
480 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
481 {
482 /* Prevent unused argument(s) compilation warning */
483 UNUSED(hdac);
484
485 /* NOTE : This function should not be modified, when the callback is needed,
486 the HAL_DAC_MspDeInit could be implemented in the user file
487 */
488 }
489
490 /**
491 * @}
492 */
493
494 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
495 * @brief IO operation functions
496 *
497 @verbatim
498 ==============================================================================
499 ##### IO operation functions #####
500 ==============================================================================
501 [..] This section provides functions allowing to:
502 (+) Start conversion.
503 (+) Stop conversion.
504 (+) Start conversion and enable DMA transfer.
505 (+) Stop conversion and disable DMA transfer.
506 (+) Get result of conversion.
507
508 @endverbatim
509 * @{
510 */
511
512 /**
513 * @brief Enables DAC and starts conversion of channel.
514 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
515 * the configuration information for the specified DAC.
516 * @param Channel The selected DAC channel.
517 * This parameter can be one of the following values:
518 * @arg DAC_CHANNEL_1: DAC Channel1 selected
519 * @arg DAC_CHANNEL_2: DAC Channel2 selected
520 * @retval HAL status
521 */
522 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
523 {
524 /* Check the parameters */
525 assert_param(IS_DAC_CHANNEL(Channel));
526
527 /* Process locked */
528 __HAL_LOCK(hdac);
529
530 /* Change DAC state */
531 hdac->State = HAL_DAC_STATE_BUSY;
532
533 /* Enable the Peripheral */
534 __HAL_DAC_ENABLE(hdac, Channel);
535
536 if (Channel == DAC_CHANNEL_1)
537 {
538 /* Check if software trigger enabled */
539 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
540 {
541 /* Enable the selected DAC software conversion */
542 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
543 }
544 }
545 else
546 {
547 /* Check if software trigger enabled */
548 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
549 {
550 /* Enable the selected DAC software conversion*/
551 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
552 }
553 }
554
555 /* Change DAC state */
556 hdac->State = HAL_DAC_STATE_READY;
557
558 /* Process unlocked */
559 __HAL_UNLOCK(hdac);
560
561 /* Return function status */
562 return HAL_OK;
563 }
564
565 /**
566 * @brief Disables DAC and stop conversion of channel.
567 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
568 * the configuration information for the specified DAC.
569 * @param Channel The selected DAC channel.
570 * This parameter can be one of the following values:
571 * @arg DAC_CHANNEL_1: DAC Channel1 selected
572 * @arg DAC_CHANNEL_2: DAC Channel2 selected
573 * @retval HAL status
574 */
575 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
576 {
577 /* Check the parameters */
578 assert_param(IS_DAC_CHANNEL(Channel));
579
580 /* Disable the Peripheral */
581 __HAL_DAC_DISABLE(hdac, Channel);
582
583 /* Change DAC state */
584 hdac->State = HAL_DAC_STATE_READY;
585
586 /* Return function status */
587 return HAL_OK;
588 }
589
590 /**
591 * @brief Enables DAC and starts conversion of channel.
592 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
593 * the configuration information for the specified DAC.
594 * @param Channel The selected DAC channel.
595 * This parameter can be one of the following values:
596 * @arg DAC_CHANNEL_1: DAC Channel1 selected
597 * @arg DAC_CHANNEL_2: DAC Channel2 selected
598 * @param pData The destination peripheral Buffer address.
599 * @param Length The length of data to be transferred from memory to DAC peripheral
600 * @param Alignment Specifies the data alignment for DAC channel.
601 * This parameter can be one of the following values:
602 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
603 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
604 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
605 * @retval HAL status
606 */
607 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
608 uint32_t Alignment)
609 {
610 HAL_StatusTypeDef status;
611 uint32_t tmpreg = 0U;
612
613 /* Check the parameters */
614 assert_param(IS_DAC_CHANNEL(Channel));
615 assert_param(IS_DAC_ALIGN(Alignment));
616
617 /* Process locked */
618 __HAL_LOCK(hdac);
619
620 /* Change DAC state */
621 hdac->State = HAL_DAC_STATE_BUSY;
622
623 if (Channel == DAC_CHANNEL_1)
624 {
625 /* Set the DMA transfer complete callback for channel1 */
626 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
627
628 /* Set the DMA half transfer complete callback for channel1 */
629 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
630
631 /* Set the DMA error callback for channel1 */
632 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
633
634 /* Enable the selected DAC channel1 DMA request */
635 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
636
637 /* Case of use of channel 1 */
638 switch (Alignment)
639 {
640 case DAC_ALIGN_12B_R:
641 /* Get DHR12R1 address */
642 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
643 break;
644 case DAC_ALIGN_12B_L:
645 /* Get DHR12L1 address */
646 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
647 break;
648 case DAC_ALIGN_8B_R:
649 /* Get DHR8R1 address */
650 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
651 break;
652 default:
653 break;
654 }
655 }
656 else
657 {
658 /* Set the DMA transfer complete callback for channel2 */
659 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
660
661 /* Set the DMA half transfer complete callback for channel2 */
662 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
663
664 /* Set the DMA error callback for channel2 */
665 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
666
667 /* Enable the selected DAC channel2 DMA request */
668 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
669
670 /* Case of use of channel 2 */
671 switch (Alignment)
672 {
673 case DAC_ALIGN_12B_R:
674 /* Get DHR12R2 address */
675 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
676 break;
677 case DAC_ALIGN_12B_L:
678 /* Get DHR12L2 address */
679 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
680 break;
681 case DAC_ALIGN_8B_R:
682 /* Get DHR8R2 address */
683 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
684 break;
685 default:
686 break;
687 }
688 }
689
690 /* Enable the DMA Stream */
691 if (Channel == DAC_CHANNEL_1)
692 {
693 /* Enable the DAC DMA underrun interrupt */
694 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
695
696 /* Enable the DMA Stream */
697 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
698 }
699 else
700 {
701 /* Enable the DAC DMA underrun interrupt */
702 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
703
704 /* Enable the DMA Stream */
705 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
706 }
707
708 /* Process Unlocked */
709 __HAL_UNLOCK(hdac);
710
711 if (status == HAL_OK)
712 {
713 /* Enable the Peripheral */
714 __HAL_DAC_ENABLE(hdac, Channel);
715 }
716 else
717 {
718 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
719 }
720
721 /* Return function status */
722 return status;
723 }
724
725 /**
726 * @brief Disables DAC and stop conversion of channel.
727 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
728 * the configuration information for the specified DAC.
729 * @param Channel The selected DAC channel.
730 * This parameter can be one of the following values:
731 * @arg DAC_CHANNEL_1: DAC Channel1 selected
732 * @arg DAC_CHANNEL_2: DAC Channel2 selected
733 * @retval HAL status
734 */
735 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
736 {
737 HAL_StatusTypeDef status;
738
739 /* Check the parameters */
740 assert_param(IS_DAC_CHANNEL(Channel));
741
742 /* Disable the selected DAC channel DMA request */
743 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
744
745 /* Disable the Peripheral */
746 __HAL_DAC_DISABLE(hdac, Channel);
747
748 /* Disable the DMA Stream */
749
750 /* Channel1 is used */
751 if (Channel == DAC_CHANNEL_1)
752 {
753 /* Disable the DMA Stream */
754 status = HAL_DMA_Abort(hdac->DMA_Handle1);
755
756 /* Disable the DAC DMA underrun interrupt */
757 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
758 }
759 else /* Channel2 is used for */
760 {
761 /* Disable the DMA Stream */
762 status = HAL_DMA_Abort(hdac->DMA_Handle2);
763
764 /* Disable the DAC DMA underrun interrupt */
765 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
766 }
767
768 /* Check if DMA Stream effectively disabled */
769 if (status != HAL_OK)
770 {
771 /* Update DAC state machine to error */
772 hdac->State = HAL_DAC_STATE_ERROR;
773 }
774 else
775 {
776 /* Change DAC state */
777 hdac->State = HAL_DAC_STATE_READY;
778 }
779
780 /* Return function status */
781 return status;
782 }
783
784 /**
785 * @brief Handles DAC interrupt request
786 * This function uses the interruption of DMA
787 * underrun.
788 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
789 * the configuration information for the specified DAC.
790 * @retval None
791 */
792 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
793 {
794 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
795 {
796 /* Check underrun flag of DAC channel 1 */
797 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
798 {
799 /* Change DAC state to error state */
800 hdac->State = HAL_DAC_STATE_ERROR;
801
802 /* Set DAC error code to chanel1 DMA underrun error */
803 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
804
805 /* Clear the underrun flag */
806 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
807
808 /* Disable the selected DAC channel1 DMA request */
809 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
810
811 /* Error callback */
812 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
813 hdac->DMAUnderrunCallbackCh1(hdac);
814 #else
815 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
816 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
817 }
818 }
819
820 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
821 {
822 /* Check underrun flag of DAC channel 2 */
823 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
824 {
825 /* Change DAC state to error state */
826 hdac->State = HAL_DAC_STATE_ERROR;
827
828 /* Set DAC error code to channel2 DMA underrun error */
829 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
830
831 /* Clear the underrun flag */
832 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
833
834 /* Disable the selected DAC channel2 DMA request */
835 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
836
837 /* Error callback */
838 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
839 hdac->DMAUnderrunCallbackCh2(hdac);
840 #else
841 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
842 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
843 }
844 }
845 }
846
847 /**
848 * @brief Set the specified data holding register value for DAC channel.
849 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
850 * the configuration information for the specified DAC.
851 * @param Channel The selected DAC channel.
852 * This parameter can be one of the following values:
853 * @arg DAC_CHANNEL_1: DAC Channel1 selected
854 * @arg DAC_CHANNEL_2: DAC Channel2 selected
855 * @param Alignment Specifies the data alignment.
856 * This parameter can be one of the following values:
857 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
858 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
859 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
860 * @param Data Data to be loaded in the selected data holding register.
861 * @retval HAL status
862 */
863 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
864 {
865 __IO uint32_t tmp = 0;
866
867 /* Check the parameters */
868 assert_param(IS_DAC_CHANNEL(Channel));
869 assert_param(IS_DAC_ALIGN(Alignment));
870 assert_param(IS_DAC_DATA(Data));
871
872 tmp = (uint32_t)hdac->Instance;
873 if (Channel == DAC_CHANNEL_1)
874 {
875 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
876 }
877 else
878 {
879 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
880 }
881
882 /* Set the DAC channel selected data holding register */
883 *(__IO uint32_t *) tmp = Data;
884
885 /* Return function status */
886 return HAL_OK;
887 }
888
889 /**
890 * @brief Conversion complete callback in non-blocking mode for Channel1
891 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
892 * the configuration information for the specified DAC.
893 * @retval None
894 */
895 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
896 {
897 /* Prevent unused argument(s) compilation warning */
898 UNUSED(hdac);
899
900 /* NOTE : This function should not be modified, when the callback is needed,
901 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
902 */
903 }
904
905 /**
906 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
907 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
908 * the configuration information for the specified DAC.
909 * @retval None
910 */
911 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
912 {
913 /* Prevent unused argument(s) compilation warning */
914 UNUSED(hdac);
915
916 /* NOTE : This function should not be modified, when the callback is needed,
917 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
918 */
919 }
920
921 /**
922 * @brief Error DAC callback for Channel1.
923 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
924 * the configuration information for the specified DAC.
925 * @retval None
926 */
927 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
928 {
929 /* Prevent unused argument(s) compilation warning */
930 UNUSED(hdac);
931
932 /* NOTE : This function should not be modified, when the callback is needed,
933 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
934 */
935 }
936
937 /**
938 * @brief DMA underrun DAC callback for channel1.
939 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
940 * the configuration information for the specified DAC.
941 * @retval None
942 */
943 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
944 {
945 /* Prevent unused argument(s) compilation warning */
946 UNUSED(hdac);
947
948 /* NOTE : This function should not be modified, when the callback is needed,
949 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
950 */
951 }
952
953 /**
954 * @}
955 */
956
957 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
958 * @brief Peripheral Control functions
959 *
960 @verbatim
961 ==============================================================================
962 ##### Peripheral Control functions #####
963 ==============================================================================
964 [..] This section provides functions allowing to:
965 (+) Configure channels.
966 (+) Set the specified data holding register value for DAC channel.
967
968 @endverbatim
969 * @{
970 */
971
972 /**
973 * @brief Returns the last data output value of the selected DAC channel.
974 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
975 * the configuration information for the specified DAC.
976 * @param Channel The selected DAC channel.
977 * This parameter can be one of the following values:
978 * @arg DAC_CHANNEL_1: DAC Channel1 selected
979 * @arg DAC_CHANNEL_2: DAC Channel2 selected
980 * @retval The selected DAC channel data output value.
981 */
982 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
983 {
984 /* Check the parameters */
985 assert_param(IS_DAC_CHANNEL(Channel));
986
987 /* Returns the DAC channel data output register value */
988 if (Channel == DAC_CHANNEL_1)
989 {
990 return hdac->Instance->DOR1;
991 }
992 else
993 {
994 return hdac->Instance->DOR2;
995 }
996 }
997
998 /**
999 * @brief Configures the selected DAC channel.
1000 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1001 * the configuration information for the specified DAC.
1002 * @param sConfig DAC configuration structure.
1003 * @param Channel The selected DAC channel.
1004 * This parameter can be one of the following values:
1005 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1006 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1007 * @retval HAL status
1008 */
1009 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1010 {
1011 uint32_t tmpreg1;
1012 uint32_t tmpreg2;
1013 uint32_t tickstart;
1014 uint32_t connectOnChip;
1015
1016 /* Check the DAC parameters */
1017 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1018 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1019 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1020 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1021 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1022 {
1023 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1024 }
1025 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1026 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1027 {
1028 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1029 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1030 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1031 }
1032 assert_param(IS_DAC_CHANNEL(Channel));
1033
1034 /* Process locked */
1035 __HAL_LOCK(hdac);
1036
1037 /* Change DAC state */
1038 hdac->State = HAL_DAC_STATE_BUSY;
1039
1040 /* Sample and hold configuration */
1041 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1042 {
1043 /* Get timeout */
1044 tickstart = HAL_GetTick();
1045
1046 if (Channel == DAC_CHANNEL_1)
1047 {
1048 /* SHSR1 can be written when BWST1 is cleared */
1049 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1050 {
1051 /* Check for the Timeout */
1052 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1053 {
1054 /* Update error code */
1055 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1056
1057 /* Change the DMA state */
1058 hdac->State = HAL_DAC_STATE_TIMEOUT;
1059
1060 return HAL_TIMEOUT;
1061 }
1062 }
1063 HAL_Delay(1);
1064 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1065 }
1066 else /* Channel 2 */
1067 {
1068 /* SHSR2 can be written when BWST2 is cleared */
1069 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1070 {
1071 /* Check for the Timeout */
1072 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1073 {
1074 /* Update error code */
1075 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1076
1077 /* Change the DMA state */
1078 hdac->State = HAL_DAC_STATE_TIMEOUT;
1079
1080 return HAL_TIMEOUT;
1081 }
1082 }
1083 HAL_Delay(1U);
1084 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1085 }
1086
1087 /* HoldTime */
1088 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1089 /* RefreshTime */
1090 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1091 }
1092
1093 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1094 /* USER TRIMMING */
1095 {
1096 /* Get the DAC CCR value */
1097 tmpreg1 = hdac->Instance->CCR;
1098 /* Clear trimming value */
1099 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1100 /* Configure for the selected trimming offset */
1101 tmpreg2 = sConfig->DAC_TrimmingValue;
1102 /* Calculate CCR register value depending on DAC_Channel */
1103 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1104 /* Write to DAC CCR */
1105 hdac->Instance->CCR = tmpreg1;
1106 }
1107 /* else factory trimming is used (factory setting are available at reset)*/
1108 /* SW Nothing has nothing to do */
1109
1110 /* Get the DAC MCR value */
1111 tmpreg1 = hdac->Instance->MCR;
1112 /* Clear DAC_MCR_MODEx bits */
1113 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1114 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1115 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
1116 {
1117 connectOnChip = 0x00000000UL;
1118 }
1119 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
1120 {
1121 connectOnChip = DAC_MCR_MODE1_0;
1122 }
1123 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
1124 {
1125 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1126 {
1127 connectOnChip = DAC_MCR_MODE1_0;
1128 }
1129 else
1130 {
1131 connectOnChip = 0x00000000UL;
1132 }
1133 }
1134 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1135 /* Calculate MCR register value depending on DAC_Channel */
1136 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1137 /* Write to DAC MCR */
1138 hdac->Instance->MCR = tmpreg1;
1139
1140 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1141 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1142
1143 /* Get the DAC CR value */
1144 tmpreg1 = hdac->Instance->CR;
1145 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1146 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1147 /* Configure for the selected DAC channel: trigger */
1148 /* Set TSELx and TENx bits according to DAC_Trigger value */
1149 tmpreg2 = sConfig->DAC_Trigger;
1150 /* Calculate CR register value depending on DAC_Channel */
1151 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1152 /* Write to DAC CR */
1153 hdac->Instance->CR = tmpreg1;
1154 /* Disable wave generation */
1155 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL));
1156
1157 /* Change DAC state */
1158 hdac->State = HAL_DAC_STATE_READY;
1159
1160 /* Process unlocked */
1161 __HAL_UNLOCK(hdac);
1162
1163 /* Return function status */
1164 return HAL_OK;
1165 }
1166
1167 /**
1168 * @}
1169 */
1170
1171 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1172 * @brief Peripheral State and Errors functions
1173 *
1174 @verbatim
1175 ==============================================================================
1176 ##### Peripheral State and Errors functions #####
1177 ==============================================================================
1178 [..]
1179 This subsection provides functions allowing to
1180 (+) Check the DAC state.
1181 (+) Check the DAC Errors.
1182
1183 @endverbatim
1184 * @{
1185 */
1186
1187 /**
1188 * @brief return the DAC handle state
1189 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1190 * the configuration information for the specified DAC.
1191 * @retval HAL state
1192 */
1193 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1194 {
1195 /* Return DAC handle state */
1196 return hdac->State;
1197 }
1198
1199
1200 /**
1201 * @brief Return the DAC error code
1202 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1203 * the configuration information for the specified DAC.
1204 * @retval DAC Error Code
1205 */
1206 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1207 {
1208 return hdac->ErrorCode;
1209 }
1210
1211 /**
1212 * @}
1213 */
1214
1215 /**
1216 * @}
1217 */
1218
1219 /** @addtogroup DAC_Exported_Functions
1220 * @{
1221 */
1222
1223 /** @addtogroup DAC_Exported_Functions_Group1
1224 * @{
1225 */
1226 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1227 /**
1228 * @brief Register a User DAC Callback
1229 * To be used instead of the weak (surcharged) predefined callback
1230 * @param hdac DAC handle
1231 * @param CallbackID ID of the callback to be registered
1232 * This parameter can be one of the following values:
1233 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1234 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1235 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1236 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1237 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1238 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1239 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1240 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1241 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1242 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1243 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1244 *
1245 * @param pCallback pointer to the Callback function
1246 * @retval status
1247 */
1248 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1249 pDAC_CallbackTypeDef pCallback)
1250 {
1251 HAL_StatusTypeDef status = HAL_OK;
1252
1253 if (pCallback == NULL)
1254 {
1255 /* Update the error code */
1256 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1257 return HAL_ERROR;
1258 }
1259
1260 /* Process locked */
1261 __HAL_LOCK(hdac);
1262
1263 if (hdac->State == HAL_DAC_STATE_READY)
1264 {
1265 switch (CallbackID)
1266 {
1267 case HAL_DAC_CH1_COMPLETE_CB_ID :
1268 hdac->ConvCpltCallbackCh1 = pCallback;
1269 break;
1270 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1271 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1272 break;
1273 case HAL_DAC_CH1_ERROR_ID :
1274 hdac->ErrorCallbackCh1 = pCallback;
1275 break;
1276 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1277 hdac->DMAUnderrunCallbackCh1 = pCallback;
1278 break;
1279 case HAL_DAC_CH2_COMPLETE_CB_ID :
1280 hdac->ConvCpltCallbackCh2 = pCallback;
1281 break;
1282 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1283 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1284 break;
1285 case HAL_DAC_CH2_ERROR_ID :
1286 hdac->ErrorCallbackCh2 = pCallback;
1287 break;
1288 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1289 hdac->DMAUnderrunCallbackCh2 = pCallback;
1290 break;
1291 case HAL_DAC_MSPINIT_CB_ID :
1292 hdac->MspInitCallback = pCallback;
1293 break;
1294 case HAL_DAC_MSPDEINIT_CB_ID :
1295 hdac->MspDeInitCallback = pCallback;
1296 break;
1297 default :
1298 /* Update the error code */
1299 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1300 /* update return status */
1301 status = HAL_ERROR;
1302 break;
1303 }
1304 }
1305 else if (hdac->State == HAL_DAC_STATE_RESET)
1306 {
1307 switch (CallbackID)
1308 {
1309 case HAL_DAC_MSPINIT_CB_ID :
1310 hdac->MspInitCallback = pCallback;
1311 break;
1312 case HAL_DAC_MSPDEINIT_CB_ID :
1313 hdac->MspDeInitCallback = pCallback;
1314 break;
1315 default :
1316 /* Update the error code */
1317 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1318 /* update return status */
1319 status = HAL_ERROR;
1320 break;
1321 }
1322 }
1323 else
1324 {
1325 /* Update the error code */
1326 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1327 /* update return status */
1328 status = HAL_ERROR;
1329 }
1330
1331 /* Release Lock */
1332 __HAL_UNLOCK(hdac);
1333 return status;
1334 }
1335
1336 /**
1337 * @brief Unregister a User DAC Callback
1338 * DAC Callback is redirected to the weak (surcharged) predefined callback
1339 * @param hdac DAC handle
1340 * @param CallbackID ID of the callback to be unregistered
1341 * This parameter can be one of the following values:
1342 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 tranfer Complete Callback ID
1343 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1344 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1345 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1346 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1347 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1348 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1349 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1350 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1351 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1352 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1353 * @retval status
1354 */
1355 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1356 {
1357 HAL_StatusTypeDef status = HAL_OK;
1358
1359 /* Process locked */
1360 __HAL_LOCK(hdac);
1361
1362 if (hdac->State == HAL_DAC_STATE_READY)
1363 {
1364 switch (CallbackID)
1365 {
1366 case HAL_DAC_CH1_COMPLETE_CB_ID :
1367 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1368 break;
1369 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1370 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1371 break;
1372 case HAL_DAC_CH1_ERROR_ID :
1373 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1374 break;
1375 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1376 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1377 break;
1378 case HAL_DAC_CH2_COMPLETE_CB_ID :
1379 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1380 break;
1381 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1382 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1383 break;
1384 case HAL_DAC_CH2_ERROR_ID :
1385 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1386 break;
1387 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1388 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1389 break;
1390 case HAL_DAC_MSPINIT_CB_ID :
1391 hdac->MspInitCallback = HAL_DAC_MspInit;
1392 break;
1393 case HAL_DAC_MSPDEINIT_CB_ID :
1394 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1395 break;
1396 case HAL_DAC_ALL_CB_ID :
1397 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1398 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1399 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1400 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1401 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1402 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1403 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1404 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1405 hdac->MspInitCallback = HAL_DAC_MspInit;
1406 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1407 break;
1408 default :
1409 /* Update the error code */
1410 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1411 /* update return status */
1412 status = HAL_ERROR;
1413 break;
1414 }
1415 }
1416 else if (hdac->State == HAL_DAC_STATE_RESET)
1417 {
1418 switch (CallbackID)
1419 {
1420 case HAL_DAC_MSPINIT_CB_ID :
1421 hdac->MspInitCallback = HAL_DAC_MspInit;
1422 break;
1423 case HAL_DAC_MSPDEINIT_CB_ID :
1424 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1425 break;
1426 default :
1427 /* Update the error code */
1428 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1429 /* update return status */
1430 status = HAL_ERROR;
1431 break;
1432 }
1433 }
1434 else
1435 {
1436 /* Update the error code */
1437 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1438 /* update return status */
1439 status = HAL_ERROR;
1440 }
1441
1442 /* Release Lock */
1443 __HAL_UNLOCK(hdac);
1444 return status;
1445 }
1446 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1447
1448 /**
1449 * @}
1450 */
1451
1452 /**
1453 * @}
1454 */
1455
1456 /** @addtogroup DAC_Private_Functions
1457 * @{
1458 */
1459
1460 /**
1461 * @brief DMA conversion complete callback.
1462 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1463 * the configuration information for the specified DMA module.
1464 * @retval None
1465 */
1466 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1467 {
1468 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1469
1470 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1471 hdac->ConvCpltCallbackCh1(hdac);
1472 #else
1473 HAL_DAC_ConvCpltCallbackCh1(hdac);
1474 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1475
1476 hdac->State = HAL_DAC_STATE_READY;
1477 }
1478
1479 /**
1480 * @brief DMA half transfer complete callback.
1481 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1482 * the configuration information for the specified DMA module.
1483 * @retval None
1484 */
1485 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1486 {
1487 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1488 /* Conversion complete callback */
1489 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1490 hdac->ConvHalfCpltCallbackCh1(hdac);
1491 #else
1492 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1493 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1494 }
1495
1496 /**
1497 * @brief DMA error callback
1498 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1499 * the configuration information for the specified DMA module.
1500 * @retval None
1501 */
1502 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1503 {
1504 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1505
1506 /* Set DAC error code to DMA error */
1507 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1508
1509 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1510 hdac->ErrorCallbackCh1(hdac);
1511 #else
1512 HAL_DAC_ErrorCallbackCh1(hdac);
1513 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1514
1515 hdac->State = HAL_DAC_STATE_READY;
1516 }
1517
1518 /**
1519 * @}
1520 */
1521
1522 /**
1523 * @}
1524 */
1525
1526 #endif /* DAC1 || DAC2 */
1527
1528 #endif /* HAL_DAC_MODULE_ENABLED */
1529
1530 /**
1531 * @}
1532 */
1533
1534 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/