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[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_hal_lptim.c
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1 or LPTIM2.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE, LSI or MSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95 [..]
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98 [..]
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102 [..]
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107 [..]
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119
120 [..]
121 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
122 all interrupt callbacks are set to the corresponding weak functions:
123 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
124
125 [..]
126 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
127 functionalities in the Init/DeInit only when these callbacks are null
128 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
129 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
130
131 [..]
132 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
133 Exception done MspInit/MspDeInit that can be registered/unregistered
134 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
135 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
136 In that case first register the MspInit/MspDeInit user callbacks
137 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
138
139 [..]
140 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
141 not defined, the callback registration feature is not available and all callbacks
142 are set to the corresponding weak functions.
143
144 @endverbatim
145 ******************************************************************************
146 * @attention
147 *
148 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
149 * All rights reserved.</center></h2>
150 *
151 * This software component is licensed by ST under BSD 3-Clause license,
152 * the "License"; You may not use this file except in compliance with the
153 * License. You may obtain a copy of the License at:
154 * opensource.org/licenses/BSD-3-Clause
155 *
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32h7xx_hal.h"
161
162 /** @addtogroup STM32H7xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
189 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
191 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
192
193 /* Exported functions --------------------------------------------------------*/
194
195 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
196 * @{
197 */
198
199 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
200 * @brief Initialization and Configuration functions.
201 *
202 @verbatim
203 ==============================================================================
204 ##### Initialization and de-initialization functions #####
205 ==============================================================================
206 [..] This section provides functions allowing to:
207 (+) Initialize the LPTIM according to the specified parameters in the
208 LPTIM_InitTypeDef and initialize the associated handle.
209 (+) DeInitialize the LPTIM peripheral.
210 (+) Initialize the LPTIM MSP.
211 (+) DeInitialize the LPTIM MSP.
212
213 @endverbatim
214 * @{
215 */
216
217 /**
218 * @brief Initialize the LPTIM according to the specified parameters in the
219 * LPTIM_InitTypeDef and initialize the associated handle.
220 * @param hlptim LPTIM handle
221 * @retval HAL status
222 */
223 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
224 {
225 uint32_t tmpcfgr;
226
227 /* Check the LPTIM handle allocation */
228 if (hlptim == NULL)
229 {
230 return HAL_ERROR;
231 }
232
233 /* Check the parameters */
234 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
235
236 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
237 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
238 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
239 {
240 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
241 }
242 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
243 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
244 {
245 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
246 }
247 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
248 {
249 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
250 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
251 }
252 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
253 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
254 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
255
256 if (hlptim->State == HAL_LPTIM_STATE_RESET)
257 {
258 /* Allocate lock resource and initialize it */
259 hlptim->Lock = HAL_UNLOCKED;
260
261 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
262 /* Reset interrupt callbacks to legacy weak callbacks */
263 LPTIM_ResetCallback(hlptim);
264
265 if (hlptim->MspInitCallback == NULL)
266 {
267 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
268 }
269
270 /* Init the low level hardware : GPIO, CLOCK, NVIC */
271 hlptim->MspInitCallback(hlptim);
272 #else
273 /* Init the low level hardware : GPIO, CLOCK, NVIC */
274 HAL_LPTIM_MspInit(hlptim);
275 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
276 }
277
278 /* Change the LPTIM state */
279 hlptim->State = HAL_LPTIM_STATE_BUSY;
280
281 /* Get the LPTIMx CFGR value */
282 tmpcfgr = hlptim->Instance->CFGR;
283
284 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
285 {
286 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL));
287 }
288 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
289 {
290 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRIGSEL));
291 }
292 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
293 {
294 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_CKFLT));
295 }
296
297 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
298 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
299 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
300
301 /* Set initialization parameters */
302 tmpcfgr |= (hlptim->Init.Clock.Source |
303 hlptim->Init.Clock.Prescaler |
304 hlptim->Init.OutputPolarity |
305 hlptim->Init.UpdateMode |
306 hlptim->Init.CounterSource);
307
308 /* Glitch filters for internal triggers and external inputs are configured
309 * only if an internal clock source is provided to the LPTIM
310 */
311 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
312 {
313 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
314 hlptim->Init.UltraLowPowerClock.SampleTime);
315 }
316
317 /* Configure the active edge or edges used by the counter only if LPTIM is
318 * clocked by an external clock source
319 */
320 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
321 {
322 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity);
323 }
324
325 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
326 {
327 /* Enable External trigger and set the trigger source */
328 tmpcfgr |= (hlptim->Init.Trigger.Source |
329 hlptim->Init.Trigger.ActiveEdge);
330 }
331
332 /* Write to LPTIMx CFGR */
333 hlptim->Instance->CFGR = tmpcfgr;
334
335 /* Configure LPTIM input sources */
336 if ((hlptim->Instance == LPTIM1) || (hlptim->Instance == LPTIM2))
337 {
338 /* Check LPTIM Input1 and Input2 sources */
339 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
340 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
341
342 /* Configure LPTIM Input1 and Input2 sources */
343 hlptim->Instance->CFGR2 = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
344 }
345 else
346 {
347 if (hlptim->Instance == LPTIM3)
348 {
349 /* Check LPTIM3 Input1 source */
350 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
351
352 /* Configure LPTIM3 Input1 source */
353 hlptim->Instance->CFGR2 = hlptim->Init.Input1Source;
354 }
355 }
356
357 /* Change the LPTIM state */
358 hlptim->State = HAL_LPTIM_STATE_READY;
359
360 /* Return function status */
361 return HAL_OK;
362 }
363
364 /**
365 * @brief DeInitialize the LPTIM peripheral.
366 * @param hlptim LPTIM handle
367 * @retval HAL status
368 */
369 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
370 {
371 /* Check the LPTIM handle allocation */
372 if (hlptim == NULL)
373 {
374 return HAL_ERROR;
375 }
376
377 /* Change the LPTIM state */
378 hlptim->State = HAL_LPTIM_STATE_BUSY;
379
380 /* Disable the LPTIM Peripheral Clock */
381 __HAL_LPTIM_DISABLE(hlptim);
382
383 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
384 {
385 return HAL_TIMEOUT;
386 }
387
388 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
389 if (hlptim->MspDeInitCallback == NULL)
390 {
391 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
392 }
393
394 /* DeInit the low level hardware: CLOCK, NVIC.*/
395 hlptim->MspDeInitCallback(hlptim);
396 #else
397 /* DeInit the low level hardware: CLOCK, NVIC.*/
398 HAL_LPTIM_MspDeInit(hlptim);
399 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
400
401 /* Change the LPTIM state */
402 hlptim->State = HAL_LPTIM_STATE_RESET;
403
404 /* Release Lock */
405 __HAL_UNLOCK(hlptim);
406
407 /* Return function status */
408 return HAL_OK;
409 }
410
411 /**
412 * @brief Initialize the LPTIM MSP.
413 * @param hlptim LPTIM handle
414 * @retval None
415 */
416 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
417 {
418 /* Prevent unused argument(s) compilation warning */
419 UNUSED(hlptim);
420
421 /* NOTE : This function should not be modified, when the callback is needed,
422 the HAL_LPTIM_MspInit could be implemented in the user file
423 */
424 }
425
426 /**
427 * @brief DeInitialize LPTIM MSP.
428 * @param hlptim LPTIM handle
429 * @retval None
430 */
431 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
432 {
433 /* Prevent unused argument(s) compilation warning */
434 UNUSED(hlptim);
435
436 /* NOTE : This function should not be modified, when the callback is needed,
437 the HAL_LPTIM_MspDeInit could be implemented in the user file
438 */
439 }
440
441 /**
442 * @}
443 */
444
445 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
446 * @brief Start-Stop operation functions.
447 *
448 @verbatim
449 ==============================================================================
450 ##### LPTIM Start Stop operation functions #####
451 ==============================================================================
452 [..] This section provides functions allowing to:
453 (+) Start the PWM mode.
454 (+) Stop the PWM mode.
455 (+) Start the One pulse mode.
456 (+) Stop the One pulse mode.
457 (+) Start the Set once mode.
458 (+) Stop the Set once mode.
459 (+) Start the Encoder mode.
460 (+) Stop the Encoder mode.
461 (+) Start the Timeout mode.
462 (+) Stop the Timeout mode.
463 (+) Start the Counter mode.
464 (+) Stop the Counter mode.
465
466
467 @endverbatim
468 * @{
469 */
470
471 /**
472 * @brief Start the LPTIM PWM generation.
473 * @param hlptim LPTIM handle
474 * @param Period Specifies the Autoreload value.
475 * This parameter must be a value between 0x0000 and 0xFFFF.
476 * @param Pulse Specifies the compare value.
477 * This parameter must be a value between 0x0000 and 0xFFFF.
478 * @retval HAL status
479 */
480 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
481 {
482 /* Check the parameters */
483 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
484 assert_param(IS_LPTIM_PERIOD(Period));
485 assert_param(IS_LPTIM_PULSE(Pulse));
486
487 /* Set the LPTIM state */
488 hlptim->State = HAL_LPTIM_STATE_BUSY;
489
490 /* Reset WAVE bit to set PWM mode */
491 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
492
493 /* Enable the Peripheral */
494 __HAL_LPTIM_ENABLE(hlptim);
495
496 /* Clear flag */
497 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
498
499 /* Load the period value in the autoreload register */
500 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
501
502 /* Wait for the completion of the write operation to the LPTIM_ARR register */
503 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
504 {
505 return HAL_TIMEOUT;
506 }
507
508 /* Clear flag */
509 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
510
511 /* Load the pulse value in the compare register */
512 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
513
514 /* Wait for the completion of the write operation to the LPTIM_CMP register */
515 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
516 {
517 return HAL_TIMEOUT;
518 }
519
520 /* Start timer in continuous mode */
521 __HAL_LPTIM_START_CONTINUOUS(hlptim);
522
523 /* Change the TIM state*/
524 hlptim->State = HAL_LPTIM_STATE_READY;
525
526 /* Return function status */
527 return HAL_OK;
528 }
529
530 /**
531 * @brief Stop the LPTIM PWM generation.
532 * @param hlptim LPTIM handle
533 * @retval HAL status
534 */
535 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
536 {
537 /* Check the parameters */
538 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
539
540 /* Set the LPTIM state */
541 hlptim->State = HAL_LPTIM_STATE_BUSY;
542
543 /* Disable the Peripheral */
544 __HAL_LPTIM_DISABLE(hlptim);
545
546 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
547 {
548 return HAL_TIMEOUT;
549 }
550
551 /* Change the TIM state*/
552 hlptim->State = HAL_LPTIM_STATE_READY;
553
554 /* Return function status */
555 return HAL_OK;
556 }
557
558 /**
559 * @brief Start the LPTIM PWM generation in interrupt mode.
560 * @param hlptim LPTIM handle
561 * @param Period Specifies the Autoreload value.
562 * This parameter must be a value between 0x0000 and 0xFFFF
563 * @param Pulse Specifies the compare value.
564 * This parameter must be a value between 0x0000 and 0xFFFF
565 * @retval HAL status
566 */
567 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
568 {
569 /* Check the parameters */
570 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
571 assert_param(IS_LPTIM_PERIOD(Period));
572 assert_param(IS_LPTIM_PULSE(Pulse));
573
574 /* Set the LPTIM state */
575 hlptim->State = HAL_LPTIM_STATE_BUSY;
576
577 /* Reset WAVE bit to set PWM mode */
578 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
579
580 /* Enable the Peripheral */
581 __HAL_LPTIM_ENABLE(hlptim);
582
583 /* Clear flag */
584 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
585
586 /* Load the period value in the autoreload register */
587 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
588
589 /* Wait for the completion of the write operation to the LPTIM_ARR register */
590 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
591 {
592 return HAL_TIMEOUT;
593 }
594
595 /* Clear flag */
596 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
597
598 /* Load the pulse value in the compare register */
599 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
600
601 /* Wait for the completion of the write operation to the LPTIM_CMP register */
602 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
603 {
604 return HAL_TIMEOUT;
605 }
606
607 /* Disable the Peripheral */
608 __HAL_LPTIM_DISABLE(hlptim);
609
610 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
611 {
612 return HAL_TIMEOUT;
613 }
614
615 /* Enable Autoreload write complete interrupt */
616 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
617
618 /* Enable Compare write complete interrupt */
619 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
620
621 /* Enable Autoreload match interrupt */
622 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
623
624 /* Enable Compare match interrupt */
625 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
626
627 /* If external trigger source is used, then enable external trigger interrupt */
628 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
629 {
630 /* Enable external trigger interrupt */
631 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
632 }
633
634 /* Enable the Peripheral */
635 __HAL_LPTIM_ENABLE(hlptim);
636
637 /* Start timer in continuous mode */
638 __HAL_LPTIM_START_CONTINUOUS(hlptim);
639
640 /* Change the TIM state*/
641 hlptim->State = HAL_LPTIM_STATE_READY;
642
643 /* Return function status */
644 return HAL_OK;
645 }
646
647 /**
648 * @brief Stop the LPTIM PWM generation in interrupt mode.
649 * @param hlptim LPTIM handle
650 * @retval HAL status
651 */
652 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
653 {
654 /* Check the parameters */
655 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
656
657 /* Set the LPTIM state */
658 hlptim->State = HAL_LPTIM_STATE_BUSY;
659
660 /* Disable the Peripheral */
661 __HAL_LPTIM_DISABLE(hlptim);
662
663 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
664 {
665 return HAL_TIMEOUT;
666 }
667
668 /* Disable Autoreload write complete interrupt */
669 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
670
671 /* Disable Compare write complete interrupt */
672 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
673
674 /* Disable Autoreload match interrupt */
675 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
676
677 /* Disable Compare match interrupt */
678 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
679
680 /* If external trigger source is used, then disable external trigger interrupt */
681 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
682 {
683 /* Disable external trigger interrupt */
684 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
685 }
686
687 /* Change the TIM state*/
688 hlptim->State = HAL_LPTIM_STATE_READY;
689
690 /* Return function status */
691 return HAL_OK;
692 }
693
694 /**
695 * @brief Start the LPTIM One pulse generation.
696 * @param hlptim LPTIM handle
697 * @param Period Specifies the Autoreload value.
698 * This parameter must be a value between 0x0000 and 0xFFFF.
699 * @param Pulse Specifies the compare value.
700 * This parameter must be a value between 0x0000 and 0xFFFF.
701 * @retval HAL status
702 */
703 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
704 {
705 /* Check the parameters */
706 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
707 assert_param(IS_LPTIM_PERIOD(Period));
708 assert_param(IS_LPTIM_PULSE(Pulse));
709
710 /* Set the LPTIM state */
711 hlptim->State = HAL_LPTIM_STATE_BUSY;
712
713 /* Reset WAVE bit to set one pulse mode */
714 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
715
716 /* Enable the Peripheral */
717 __HAL_LPTIM_ENABLE(hlptim);
718
719 /* Clear flag */
720 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
721
722 /* Load the period value in the autoreload register */
723 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
724
725 /* Wait for the completion of the write operation to the LPTIM_ARR register */
726 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
727 {
728 return HAL_TIMEOUT;
729 }
730
731 /* Clear flag */
732 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
733
734 /* Load the pulse value in the compare register */
735 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
736
737 /* Wait for the completion of the write operation to the LPTIM_CMP register */
738 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
739 {
740 return HAL_TIMEOUT;
741 }
742
743 /* Start timer in single (one shot) mode */
744 __HAL_LPTIM_START_SINGLE(hlptim);
745
746 /* Change the TIM state*/
747 hlptim->State = HAL_LPTIM_STATE_READY;
748
749 /* Return function status */
750 return HAL_OK;
751 }
752
753 /**
754 * @brief Stop the LPTIM One pulse generation.
755 * @param hlptim LPTIM handle
756 * @retval HAL status
757 */
758 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
759 {
760 /* Check the parameters */
761 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
762
763 /* Set the LPTIM state */
764 hlptim->State = HAL_LPTIM_STATE_BUSY;
765
766 /* Disable the Peripheral */
767 __HAL_LPTIM_DISABLE(hlptim);
768
769 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
770 {
771 return HAL_TIMEOUT;
772 }
773
774 /* Change the TIM state*/
775 hlptim->State = HAL_LPTIM_STATE_READY;
776
777 /* Return function status */
778 return HAL_OK;
779 }
780
781 /**
782 * @brief Start the LPTIM One pulse generation in interrupt mode.
783 * @param hlptim LPTIM handle
784 * @param Period Specifies the Autoreload value.
785 * This parameter must be a value between 0x0000 and 0xFFFF.
786 * @param Pulse Specifies the compare value.
787 * This parameter must be a value between 0x0000 and 0xFFFF.
788 * @retval HAL status
789 */
790 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
791 {
792 /* Check the parameters */
793 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
794 assert_param(IS_LPTIM_PERIOD(Period));
795 assert_param(IS_LPTIM_PULSE(Pulse));
796
797 /* Set the LPTIM state */
798 hlptim->State = HAL_LPTIM_STATE_BUSY;
799
800 /* Reset WAVE bit to set one pulse mode */
801 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
802
803 /* Enable the Peripheral */
804 __HAL_LPTIM_ENABLE(hlptim);
805
806 /* Clear flag */
807 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
808
809 /* Load the period value in the autoreload register */
810 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
811
812 /* Wait for the completion of the write operation to the LPTIM_ARR register */
813 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
814 {
815 return HAL_TIMEOUT;
816 }
817
818 /* Clear flag */
819 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
820
821 /* Load the pulse value in the compare register */
822 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
823
824 /* Wait for the completion of the write operation to the LPTIM_CMP register */
825 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
826 {
827 return HAL_TIMEOUT;
828 }
829
830 /* Disable the Peripheral */
831 __HAL_LPTIM_DISABLE(hlptim);
832
833 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
834 {
835 return HAL_TIMEOUT;
836 }
837
838 /* Enable Autoreload write complete interrupt */
839 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
840
841 /* Enable Compare write complete interrupt */
842 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
843
844 /* Enable Autoreload match interrupt */
845 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
846
847 /* Enable Compare match interrupt */
848 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
849
850 /* If external trigger source is used, then enable external trigger interrupt */
851 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
852 {
853 /* Enable external trigger interrupt */
854 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
855 }
856
857 /* Enable the Peripheral */
858 __HAL_LPTIM_ENABLE(hlptim);
859
860 /* Start timer in single (one shot) mode */
861 __HAL_LPTIM_START_SINGLE(hlptim);
862
863 /* Change the TIM state*/
864 hlptim->State = HAL_LPTIM_STATE_READY;
865
866 /* Return function status */
867 return HAL_OK;
868 }
869
870 /**
871 * @brief Stop the LPTIM One pulse generation in interrupt mode.
872 * @param hlptim LPTIM handle
873 * @retval HAL status
874 */
875 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
876 {
877 /* Check the parameters */
878 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
879
880 /* Set the LPTIM state */
881 hlptim->State = HAL_LPTIM_STATE_BUSY;
882
883 /* Disable the Peripheral */
884 __HAL_LPTIM_DISABLE(hlptim);
885
886 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
887 {
888 return HAL_TIMEOUT;
889 }
890
891 /* Disable Autoreload write complete interrupt */
892 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
893
894 /* Disable Compare write complete interrupt */
895 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
896
897 /* Disable Autoreload match interrupt */
898 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
899
900 /* Disable Compare match interrupt */
901 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
902
903 /* If external trigger source is used, then disable external trigger interrupt */
904 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
905 {
906 /* Disable external trigger interrupt */
907 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
908 }
909
910 /* Change the TIM state*/
911 hlptim->State = HAL_LPTIM_STATE_READY;
912
913 /* Return function status */
914 return HAL_OK;
915 }
916
917 /**
918 * @brief Start the LPTIM in Set once mode.
919 * @param hlptim LPTIM handle
920 * @param Period Specifies the Autoreload value.
921 * This parameter must be a value between 0x0000 and 0xFFFF.
922 * @param Pulse Specifies the compare value.
923 * This parameter must be a value between 0x0000 and 0xFFFF.
924 * @retval HAL status
925 */
926 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
927 {
928 /* Check the parameters */
929 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
930 assert_param(IS_LPTIM_PERIOD(Period));
931 assert_param(IS_LPTIM_PULSE(Pulse));
932
933 /* Set the LPTIM state */
934 hlptim->State = HAL_LPTIM_STATE_BUSY;
935
936 /* Set WAVE bit to enable the set once mode */
937 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
938
939 /* Enable the Peripheral */
940 __HAL_LPTIM_ENABLE(hlptim);
941
942 /* Clear flag */
943 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
944
945 /* Load the period value in the autoreload register */
946 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
947
948 /* Wait for the completion of the write operation to the LPTIM_ARR register */
949 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
950 {
951 return HAL_TIMEOUT;
952 }
953
954 /* Clear flag */
955 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
956
957 /* Load the pulse value in the compare register */
958 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
959
960 /* Wait for the completion of the write operation to the LPTIM_CMP register */
961 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
962 {
963 return HAL_TIMEOUT;
964 }
965
966 /* Start timer in single (one shot) mode */
967 __HAL_LPTIM_START_SINGLE(hlptim);
968
969 /* Change the TIM state*/
970 hlptim->State = HAL_LPTIM_STATE_READY;
971
972 /* Return function status */
973 return HAL_OK;
974 }
975
976 /**
977 * @brief Stop the LPTIM Set once mode.
978 * @param hlptim LPTIM handle
979 * @retval HAL status
980 */
981 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
982 {
983 /* Check the parameters */
984 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
985
986 /* Set the LPTIM state */
987 hlptim->State = HAL_LPTIM_STATE_BUSY;
988
989 /* Disable the Peripheral */
990 __HAL_LPTIM_DISABLE(hlptim);
991
992 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
993 {
994 return HAL_TIMEOUT;
995 }
996
997 /* Change the TIM state*/
998 hlptim->State = HAL_LPTIM_STATE_READY;
999
1000 /* Return function status */
1001 return HAL_OK;
1002 }
1003
1004 /**
1005 * @brief Start the LPTIM Set once mode in interrupt mode.
1006 * @param hlptim LPTIM handle
1007 * @param Period Specifies the Autoreload value.
1008 * This parameter must be a value between 0x0000 and 0xFFFF.
1009 * @param Pulse Specifies the compare value.
1010 * This parameter must be a value between 0x0000 and 0xFFFF.
1011 * @retval HAL status
1012 */
1013 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1014 {
1015 /* Check the parameters */
1016 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1017 assert_param(IS_LPTIM_PERIOD(Period));
1018 assert_param(IS_LPTIM_PULSE(Pulse));
1019
1020 /* Set the LPTIM state */
1021 hlptim->State = HAL_LPTIM_STATE_BUSY;
1022
1023 /* Set WAVE bit to enable the set once mode */
1024 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1025
1026 /* Enable the Peripheral */
1027 __HAL_LPTIM_ENABLE(hlptim);
1028
1029 /* Clear flag */
1030 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1031
1032 /* Load the period value in the autoreload register */
1033 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1034
1035 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1036 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1037 {
1038 return HAL_TIMEOUT;
1039 }
1040
1041 /* Clear flag */
1042 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1043
1044 /* Load the pulse value in the compare register */
1045 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1046
1047 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1048 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1049 {
1050 return HAL_TIMEOUT;
1051 }
1052
1053 /* Disable the Peripheral */
1054 __HAL_LPTIM_DISABLE(hlptim);
1055
1056 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1057 {
1058 return HAL_TIMEOUT;
1059 }
1060
1061 /* Enable Autoreload write complete interrupt */
1062 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1063
1064 /* Enable Compare write complete interrupt */
1065 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1066
1067 /* Enable Autoreload match interrupt */
1068 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1069
1070 /* Enable Compare match interrupt */
1071 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1072
1073 /* If external trigger source is used, then enable external trigger interrupt */
1074 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1075 {
1076 /* Enable external trigger interrupt */
1077 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1078 }
1079
1080 /* Enable the Peripheral */
1081 __HAL_LPTIM_ENABLE(hlptim);
1082
1083 /* Start timer in single (one shot) mode */
1084 __HAL_LPTIM_START_SINGLE(hlptim);
1085
1086 /* Change the TIM state*/
1087 hlptim->State = HAL_LPTIM_STATE_READY;
1088
1089 /* Return function status */
1090 return HAL_OK;
1091 }
1092
1093 /**
1094 * @brief Stop the LPTIM Set once mode in interrupt mode.
1095 * @param hlptim LPTIM handle
1096 * @retval HAL status
1097 */
1098 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1099 {
1100 /* Check the parameters */
1101 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1102
1103 /* Set the LPTIM state */
1104 hlptim->State = HAL_LPTIM_STATE_BUSY;
1105
1106 /* Disable the Peripheral */
1107 __HAL_LPTIM_DISABLE(hlptim);
1108
1109 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1110 {
1111 return HAL_TIMEOUT;
1112 }
1113
1114 /* Disable Autoreload write complete interrupt */
1115 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1116
1117 /* Disable Compare write complete interrupt */
1118 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1119
1120 /* Disable Autoreload match interrupt */
1121 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1122
1123 /* Disable Compare match interrupt */
1124 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1125
1126 /* If external trigger source is used, then disable external trigger interrupt */
1127 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1128 {
1129 /* Disable external trigger interrupt */
1130 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1131 }
1132
1133 /* Change the TIM state*/
1134 hlptim->State = HAL_LPTIM_STATE_READY;
1135
1136 /* Return function status */
1137 return HAL_OK;
1138 }
1139
1140 /**
1141 * @brief Start the Encoder interface.
1142 * @param hlptim LPTIM handle
1143 * @param Period Specifies the Autoreload value.
1144 * This parameter must be a value between 0x0000 and 0xFFFF.
1145 * @retval HAL status
1146 */
1147 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1148 {
1149 uint32_t tmpcfgr;
1150
1151 /* Check the parameters */
1152 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1153 assert_param(IS_LPTIM_PERIOD(Period));
1154 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1155 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1156 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1157
1158 /* Set the LPTIM state */
1159 hlptim->State = HAL_LPTIM_STATE_BUSY;
1160
1161 /* Get the LPTIMx CFGR value */
1162 tmpcfgr = hlptim->Instance->CFGR;
1163
1164 /* Clear CKPOL bits */
1165 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1166
1167 /* Set Input polarity */
1168 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1169
1170 /* Write to LPTIMx CFGR */
1171 hlptim->Instance->CFGR = tmpcfgr;
1172
1173 /* Set ENC bit to enable the encoder interface */
1174 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1175
1176 /* Enable the Peripheral */
1177 __HAL_LPTIM_ENABLE(hlptim);
1178
1179 /* Clear flag */
1180 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1181
1182 /* Load the period value in the autoreload register */
1183 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1184
1185 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1186 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1187 {
1188 return HAL_TIMEOUT;
1189 }
1190
1191 /* Start timer in continuous mode */
1192 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1193
1194 /* Change the TIM state*/
1195 hlptim->State = HAL_LPTIM_STATE_READY;
1196
1197 /* Return function status */
1198 return HAL_OK;
1199 }
1200
1201 /**
1202 * @brief Stop the Encoder interface.
1203 * @param hlptim LPTIM handle
1204 * @retval HAL status
1205 */
1206 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1207 {
1208 /* Check the parameters */
1209 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1210
1211 /* Set the LPTIM state */
1212 hlptim->State = HAL_LPTIM_STATE_BUSY;
1213
1214 /* Disable the Peripheral */
1215 __HAL_LPTIM_DISABLE(hlptim);
1216
1217 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1218 {
1219 return HAL_TIMEOUT;
1220 }
1221
1222 /* Reset ENC bit to disable the encoder interface */
1223 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1224
1225 /* Change the TIM state*/
1226 hlptim->State = HAL_LPTIM_STATE_READY;
1227
1228 /* Return function status */
1229 return HAL_OK;
1230 }
1231
1232 /**
1233 * @brief Start the Encoder interface in interrupt mode.
1234 * @param hlptim LPTIM handle
1235 * @param Period Specifies the Autoreload value.
1236 * This parameter must be a value between 0x0000 and 0xFFFF.
1237 * @retval HAL status
1238 */
1239 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1240 {
1241 uint32_t tmpcfgr;
1242
1243 /* Check the parameters */
1244 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1245 assert_param(IS_LPTIM_PERIOD(Period));
1246 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1247 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1248 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1249
1250 /* Set the LPTIM state */
1251 hlptim->State = HAL_LPTIM_STATE_BUSY;
1252
1253 /* Configure edge sensitivity for encoder mode */
1254 /* Get the LPTIMx CFGR value */
1255 tmpcfgr = hlptim->Instance->CFGR;
1256
1257 /* Clear CKPOL bits */
1258 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1259
1260 /* Set Input polarity */
1261 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1262
1263 /* Write to LPTIMx CFGR */
1264 hlptim->Instance->CFGR = tmpcfgr;
1265
1266 /* Set ENC bit to enable the encoder interface */
1267 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1268
1269 /* Enable the Peripheral */
1270 __HAL_LPTIM_ENABLE(hlptim);
1271
1272 /* Clear flag */
1273 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1274
1275 /* Load the period value in the autoreload register */
1276 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1277
1278 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1279 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1280 {
1281 return HAL_TIMEOUT;
1282 }
1283
1284 /* Disable the Peripheral */
1285 __HAL_LPTIM_DISABLE(hlptim);
1286
1287 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1288 {
1289 return HAL_TIMEOUT;
1290 }
1291
1292 /* Enable "switch to down direction" interrupt */
1293 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1294
1295 /* Enable "switch to up direction" interrupt */
1296 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1297
1298 /* Enable the Peripheral */
1299 __HAL_LPTIM_ENABLE(hlptim);
1300
1301 /* Start timer in continuous mode */
1302 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1303
1304 /* Change the TIM state*/
1305 hlptim->State = HAL_LPTIM_STATE_READY;
1306
1307 /* Return function status */
1308 return HAL_OK;
1309 }
1310
1311 /**
1312 * @brief Stop the Encoder interface in interrupt mode.
1313 * @param hlptim LPTIM handle
1314 * @retval HAL status
1315 */
1316 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1317 {
1318 /* Check the parameters */
1319 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1320
1321 /* Set the LPTIM state */
1322 hlptim->State = HAL_LPTIM_STATE_BUSY;
1323
1324 /* Disable the Peripheral */
1325 __HAL_LPTIM_DISABLE(hlptim);
1326
1327 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1328 {
1329 return HAL_TIMEOUT;
1330 }
1331
1332 /* Reset ENC bit to disable the encoder interface */
1333 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1334
1335 /* Disable "switch to down direction" interrupt */
1336 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1337
1338 /* Disable "switch to up direction" interrupt */
1339 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1340
1341 /* Change the TIM state*/
1342 hlptim->State = HAL_LPTIM_STATE_READY;
1343
1344 /* Return function status */
1345 return HAL_OK;
1346 }
1347
1348 /**
1349 * @brief Start the Timeout function.
1350 * @note The first trigger event will start the timer, any successive
1351 * trigger event will reset the counter and the timer restarts.
1352 * @param hlptim LPTIM handle
1353 * @param Period Specifies the Autoreload value.
1354 * This parameter must be a value between 0x0000 and 0xFFFF.
1355 * @param Timeout Specifies the TimeOut value to reset the counter.
1356 * This parameter must be a value between 0x0000 and 0xFFFF.
1357 * @retval HAL status
1358 */
1359 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1360 {
1361 /* Check the parameters */
1362 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1363 assert_param(IS_LPTIM_PERIOD(Period));
1364 assert_param(IS_LPTIM_PULSE(Timeout));
1365
1366 /* Set the LPTIM state */
1367 hlptim->State = HAL_LPTIM_STATE_BUSY;
1368
1369 /* Set TIMOUT bit to enable the timeout function */
1370 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1371
1372 /* Enable the Peripheral */
1373 __HAL_LPTIM_ENABLE(hlptim);
1374
1375 /* Clear flag */
1376 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1377
1378 /* Load the period value in the autoreload register */
1379 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1380
1381 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1382 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1383 {
1384 return HAL_TIMEOUT;
1385 }
1386
1387 /* Clear flag */
1388 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1389
1390 /* Load the Timeout value in the compare register */
1391 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1392
1393 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1394 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1395 {
1396 return HAL_TIMEOUT;
1397 }
1398
1399 /* Start timer in continuous mode */
1400 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1401
1402 /* Change the TIM state*/
1403 hlptim->State = HAL_LPTIM_STATE_READY;
1404
1405 /* Return function status */
1406 return HAL_OK;
1407 }
1408
1409 /**
1410 * @brief Stop the Timeout function.
1411 * @param hlptim LPTIM handle
1412 * @retval HAL status
1413 */
1414 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1415 {
1416 /* Check the parameters */
1417 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1418
1419 /* Set the LPTIM state */
1420 hlptim->State = HAL_LPTIM_STATE_BUSY;
1421
1422 /* Disable the Peripheral */
1423 __HAL_LPTIM_DISABLE(hlptim);
1424
1425 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1426 {
1427 return HAL_TIMEOUT;
1428 }
1429
1430 /* Reset TIMOUT bit to enable the timeout function */
1431 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1432
1433 /* Change the TIM state*/
1434 hlptim->State = HAL_LPTIM_STATE_READY;
1435
1436 /* Return function status */
1437 return HAL_OK;
1438 }
1439
1440 /**
1441 * @brief Start the Timeout function in interrupt mode.
1442 * @note The first trigger event will start the timer, any successive
1443 * trigger event will reset the counter and the timer restarts.
1444 * @param hlptim LPTIM handle
1445 * @param Period Specifies the Autoreload value.
1446 * This parameter must be a value between 0x0000 and 0xFFFF.
1447 * @param Timeout Specifies the TimeOut value to reset the counter.
1448 * This parameter must be a value between 0x0000 and 0xFFFF.
1449 * @retval HAL status
1450 */
1451 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1452 {
1453 /* Check the parameters */
1454 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1455 assert_param(IS_LPTIM_PERIOD(Period));
1456 assert_param(IS_LPTIM_PULSE(Timeout));
1457
1458 /* Set the LPTIM state */
1459 hlptim->State = HAL_LPTIM_STATE_BUSY;
1460
1461 /* Set TIMOUT bit to enable the timeout function */
1462 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1463
1464 /* Enable the Peripheral */
1465 __HAL_LPTIM_ENABLE(hlptim);
1466
1467 /* Clear flag */
1468 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1469
1470 /* Load the period value in the autoreload register */
1471 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1472
1473 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1474 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1475 {
1476 return HAL_TIMEOUT;
1477 }
1478
1479 /* Clear flag */
1480 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1481
1482 /* Load the Timeout value in the compare register */
1483 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1484
1485 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1486 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1487 {
1488 return HAL_TIMEOUT;
1489 }
1490
1491 /* Disable the Peripheral */
1492 __HAL_LPTIM_DISABLE(hlptim);
1493
1494 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1495 {
1496 return HAL_TIMEOUT;
1497 }
1498
1499 /* Enable Compare match interrupt */
1500 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1501
1502 /* Enable the Peripheral */
1503 __HAL_LPTIM_ENABLE(hlptim);
1504
1505 /* Start timer in continuous mode */
1506 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1507
1508 /* Change the TIM state*/
1509 hlptim->State = HAL_LPTIM_STATE_READY;
1510
1511 /* Return function status */
1512 return HAL_OK;
1513 }
1514
1515 /**
1516 * @brief Stop the Timeout function in interrupt mode.
1517 * @param hlptim LPTIM handle
1518 * @retval HAL status
1519 */
1520 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1521 {
1522 /* Check the parameters */
1523 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1524
1525 /* Set the LPTIM state */
1526 hlptim->State = HAL_LPTIM_STATE_BUSY;
1527
1528 /* Disable the Peripheral */
1529 __HAL_LPTIM_DISABLE(hlptim);
1530
1531 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1532 {
1533 return HAL_TIMEOUT;
1534 }
1535
1536 /* Reset TIMOUT bit to enable the timeout function */
1537 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1538
1539 /* Disable Compare match interrupt */
1540 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1541
1542 /* Change the TIM state*/
1543 hlptim->State = HAL_LPTIM_STATE_READY;
1544
1545 /* Return function status */
1546 return HAL_OK;
1547 }
1548
1549 /**
1550 * @brief Start the Counter mode.
1551 * @param hlptim LPTIM handle
1552 * @param Period Specifies the Autoreload value.
1553 * This parameter must be a value between 0x0000 and 0xFFFF.
1554 * @retval HAL status
1555 */
1556 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1557 {
1558 /* Check the parameters */
1559 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1560 assert_param(IS_LPTIM_PERIOD(Period));
1561
1562 /* Set the LPTIM state */
1563 hlptim->State = HAL_LPTIM_STATE_BUSY;
1564
1565 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1566 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1567 {
1568 /* Check if clock is prescaled */
1569 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1570 /* Set clock prescaler to 0 */
1571 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1572 }
1573
1574 /* Enable the Peripheral */
1575 __HAL_LPTIM_ENABLE(hlptim);
1576
1577 /* Clear flag */
1578 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1579
1580 /* Load the period value in the autoreload register */
1581 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1582
1583 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1584 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1585 {
1586 return HAL_TIMEOUT;
1587 }
1588
1589 /* Start timer in continuous mode */
1590 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1591
1592 /* Change the TIM state*/
1593 hlptim->State = HAL_LPTIM_STATE_READY;
1594
1595 /* Return function status */
1596 return HAL_OK;
1597 }
1598
1599 /**
1600 * @brief Stop the Counter mode.
1601 * @param hlptim LPTIM handle
1602 * @retval HAL status
1603 */
1604 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1605 {
1606 /* Check the parameters */
1607 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1608
1609 /* Set the LPTIM state */
1610 hlptim->State = HAL_LPTIM_STATE_BUSY;
1611
1612 /* Disable the Peripheral */
1613 __HAL_LPTIM_DISABLE(hlptim);
1614
1615 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1616 {
1617 return HAL_TIMEOUT;
1618 }
1619
1620 /* Change the TIM state*/
1621 hlptim->State = HAL_LPTIM_STATE_READY;
1622
1623 /* Return function status */
1624 return HAL_OK;
1625 }
1626
1627 /**
1628 * @brief Start the Counter mode in interrupt mode.
1629 * @param hlptim LPTIM handle
1630 * @param Period Specifies the Autoreload value.
1631 * This parameter must be a value between 0x0000 and 0xFFFF.
1632 * @retval HAL status
1633 */
1634 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1635 {
1636 /* Check the parameters */
1637 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1638 assert_param(IS_LPTIM_PERIOD(Period));
1639
1640 /* Set the LPTIM state */
1641 hlptim->State = HAL_LPTIM_STATE_BUSY;
1642
1643 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1644 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1645 {
1646 /* Check if clock is prescaled */
1647 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1648 /* Set clock prescaler to 0 */
1649 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1650 }
1651
1652 /* Enable the Peripheral */
1653 __HAL_LPTIM_ENABLE(hlptim);
1654
1655 /* Clear flag */
1656 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1657
1658 /* Load the period value in the autoreload register */
1659 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1660
1661 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1662 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1663 {
1664 return HAL_TIMEOUT;
1665 }
1666
1667 /* Disable the Peripheral */
1668 __HAL_LPTIM_DISABLE(hlptim);
1669
1670 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1671 {
1672 return HAL_TIMEOUT;
1673 }
1674
1675 /* Enable Autoreload write complete interrupt */
1676 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1677
1678 /* Enable Autoreload match interrupt */
1679 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1680
1681 /* Enable the Peripheral */
1682 __HAL_LPTIM_ENABLE(hlptim);
1683
1684 /* Start timer in continuous mode */
1685 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1686
1687 /* Change the TIM state*/
1688 hlptim->State = HAL_LPTIM_STATE_READY;
1689
1690 /* Return function status */
1691 return HAL_OK;
1692 }
1693
1694 /**
1695 * @brief Stop the Counter mode in interrupt mode.
1696 * @param hlptim LPTIM handle
1697 * @retval HAL status
1698 */
1699 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1700 {
1701 /* Check the parameters */
1702 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1703
1704 /* Set the LPTIM state */
1705 hlptim->State = HAL_LPTIM_STATE_BUSY;
1706
1707 /* Disable the Peripheral */
1708 __HAL_LPTIM_DISABLE(hlptim);
1709
1710 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1711 {
1712 return HAL_TIMEOUT;
1713 }
1714
1715 /* Disable Autoreload write complete interrupt */
1716 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1717
1718 /* Disable Autoreload match interrupt */
1719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1720 /* Change the TIM state*/
1721 hlptim->State = HAL_LPTIM_STATE_READY;
1722
1723 /* Return function status */
1724 return HAL_OK;
1725 }
1726
1727 /**
1728 * @}
1729 */
1730
1731 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1732 * @brief Read operation functions.
1733 *
1734 @verbatim
1735 ==============================================================================
1736 ##### LPTIM Read operation functions #####
1737 ==============================================================================
1738 [..] This section provides LPTIM Reading functions.
1739 (+) Read the counter value.
1740 (+) Read the period (Auto-reload) value.
1741 (+) Read the pulse (Compare)value.
1742 @endverbatim
1743 * @{
1744 */
1745
1746 /**
1747 * @brief Return the current counter value.
1748 * @param hlptim LPTIM handle
1749 * @retval Counter value.
1750 */
1751 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1752 {
1753 /* Check the parameters */
1754 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1755
1756 return (hlptim->Instance->CNT);
1757 }
1758
1759 /**
1760 * @brief Return the current Autoreload (Period) value.
1761 * @param hlptim LPTIM handle
1762 * @retval Autoreload value.
1763 */
1764 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1765 {
1766 /* Check the parameters */
1767 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1768
1769 return (hlptim->Instance->ARR);
1770 }
1771
1772 /**
1773 * @brief Return the current Compare (Pulse) value.
1774 * @param hlptim LPTIM handle
1775 * @retval Compare value.
1776 */
1777 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1778 {
1779 /* Check the parameters */
1780 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1781
1782 return (hlptim->Instance->CMP);
1783 }
1784
1785 /**
1786 * @}
1787 */
1788
1789 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1790 * @brief LPTIM IRQ handler.
1791 *
1792 @verbatim
1793 ==============================================================================
1794 ##### LPTIM IRQ handler and callbacks #####
1795 ==============================================================================
1796 [..] This section provides LPTIM IRQ handler and callback functions called within
1797 the IRQ handler:
1798 (+) LPTIM interrupt request handler
1799 (+) Compare match Callback
1800 (+) Auto-reload match Callback
1801 (+) External trigger event detection Callback
1802 (+) Compare register write complete Callback
1803 (+) Auto-reload register write complete Callback
1804 (+) Up-counting direction change Callback
1805 (+) Down-counting direction change Callback
1806
1807 @endverbatim
1808 * @{
1809 */
1810
1811 /**
1812 * @brief Handle LPTIM interrupt request.
1813 * @param hlptim LPTIM handle
1814 * @retval None
1815 */
1816 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1817 {
1818 /* Compare match interrupt */
1819 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1820 {
1821 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1822 {
1823 /* Clear Compare match flag */
1824 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1825
1826 /* Compare match Callback */
1827 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1828 hlptim->CompareMatchCallback(hlptim);
1829 #else
1830 HAL_LPTIM_CompareMatchCallback(hlptim);
1831 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1832 }
1833 }
1834
1835 /* Autoreload match interrupt */
1836 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1837 {
1838 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1839 {
1840 /* Clear Autoreload match flag */
1841 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1842
1843 /* Autoreload match Callback */
1844 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1845 hlptim->AutoReloadMatchCallback(hlptim);
1846 #else
1847 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1848 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1849 }
1850 }
1851
1852 /* Trigger detected interrupt */
1853 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1854 {
1855 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1856 {
1857 /* Clear Trigger detected flag */
1858 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1859
1860 /* Trigger detected callback */
1861 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1862 hlptim->TriggerCallback(hlptim);
1863 #else
1864 HAL_LPTIM_TriggerCallback(hlptim);
1865 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1866 }
1867 }
1868
1869 /* Compare write interrupt */
1870 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1871 {
1872 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1873 {
1874 /* Clear Compare write flag */
1875 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1876
1877 /* Compare write Callback */
1878 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1879 hlptim->CompareWriteCallback(hlptim);
1880 #else
1881 HAL_LPTIM_CompareWriteCallback(hlptim);
1882 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1883 }
1884 }
1885
1886 /* Autoreload write interrupt */
1887 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1888 {
1889 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1890 {
1891 /* Clear Autoreload write flag */
1892 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1893
1894 /* Autoreload write Callback */
1895 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1896 hlptim->AutoReloadWriteCallback(hlptim);
1897 #else
1898 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1899 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1900 }
1901 }
1902
1903 /* Direction counter changed from Down to Up interrupt */
1904 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1905 {
1906 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1907 {
1908 /* Clear Direction counter changed from Down to Up flag */
1909 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1910
1911 /* Direction counter changed from Down to Up Callback */
1912 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1913 hlptim->DirectionUpCallback(hlptim);
1914 #else
1915 HAL_LPTIM_DirectionUpCallback(hlptim);
1916 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1917 }
1918 }
1919
1920 /* Direction counter changed from Up to Down interrupt */
1921 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1922 {
1923 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1924 {
1925 /* Clear Direction counter changed from Up to Down flag */
1926 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1927
1928 /* Direction counter changed from Up to Down Callback */
1929 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1930 hlptim->DirectionDownCallback(hlptim);
1931 #else
1932 HAL_LPTIM_DirectionDownCallback(hlptim);
1933 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1934 }
1935 }
1936 }
1937
1938 /**
1939 * @brief Compare match callback in non-blocking mode.
1940 * @param hlptim LPTIM handle
1941 * @retval None
1942 */
1943 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1944 {
1945 /* Prevent unused argument(s) compilation warning */
1946 UNUSED(hlptim);
1947
1948 /* NOTE : This function should not be modified, when the callback is needed,
1949 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1950 */
1951 }
1952
1953 /**
1954 * @brief Autoreload match callback in non-blocking mode.
1955 * @param hlptim LPTIM handle
1956 * @retval None
1957 */
1958 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1959 {
1960 /* Prevent unused argument(s) compilation warning */
1961 UNUSED(hlptim);
1962
1963 /* NOTE : This function should not be modified, when the callback is needed,
1964 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1965 */
1966 }
1967
1968 /**
1969 * @brief Trigger detected callback in non-blocking mode.
1970 * @param hlptim LPTIM handle
1971 * @retval None
1972 */
1973 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1974 {
1975 /* Prevent unused argument(s) compilation warning */
1976 UNUSED(hlptim);
1977
1978 /* NOTE : This function should not be modified, when the callback is needed,
1979 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1980 */
1981 }
1982
1983 /**
1984 * @brief Compare write callback in non-blocking mode.
1985 * @param hlptim LPTIM handle
1986 * @retval None
1987 */
1988 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1989 {
1990 /* Prevent unused argument(s) compilation warning */
1991 UNUSED(hlptim);
1992
1993 /* NOTE : This function should not be modified, when the callback is needed,
1994 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1995 */
1996 }
1997
1998 /**
1999 * @brief Autoreload write callback in non-blocking mode.
2000 * @param hlptim LPTIM handle
2001 * @retval None
2002 */
2003 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2004 {
2005 /* Prevent unused argument(s) compilation warning */
2006 UNUSED(hlptim);
2007
2008 /* NOTE : This function should not be modified, when the callback is needed,
2009 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2010 */
2011 }
2012
2013 /**
2014 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2015 * @param hlptim LPTIM handle
2016 * @retval None
2017 */
2018 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2019 {
2020 /* Prevent unused argument(s) compilation warning */
2021 UNUSED(hlptim);
2022
2023 /* NOTE : This function should not be modified, when the callback is needed,
2024 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2025 */
2026 }
2027
2028 /**
2029 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2030 * @param hlptim LPTIM handle
2031 * @retval None
2032 */
2033 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2034 {
2035 /* Prevent unused argument(s) compilation warning */
2036 UNUSED(hlptim);
2037
2038 /* NOTE : This function should not be modified, when the callback is needed,
2039 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2040 */
2041 }
2042
2043 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2044 /**
2045 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2046 * @param hlptim LPTIM handle
2047 * @param CallbackID ID of the callback to be registered
2048 * This parameter can be one of the following values:
2049 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2050 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2051 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2052 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2053 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2054 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2055 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2056 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2057 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2058 * @param pCallback pointer to the callback function
2059 * @retval status
2060 */
2061 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2062 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2063 pLPTIM_CallbackTypeDef pCallback)
2064 {
2065 HAL_StatusTypeDef status = HAL_OK;
2066
2067 if (pCallback == NULL)
2068 {
2069 return HAL_ERROR;
2070 }
2071
2072 /* Process locked */
2073 __HAL_LOCK(hlptim);
2074
2075 if (hlptim->State == HAL_LPTIM_STATE_READY)
2076 {
2077 switch (CallbackID)
2078 {
2079 case HAL_LPTIM_MSPINIT_CB_ID :
2080 hlptim->MspInitCallback = pCallback;
2081 break;
2082
2083 case HAL_LPTIM_MSPDEINIT_CB_ID :
2084 hlptim->MspDeInitCallback = pCallback;
2085 break;
2086
2087 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2088 hlptim->CompareMatchCallback = pCallback;
2089 break;
2090
2091 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2092 hlptim->AutoReloadMatchCallback = pCallback;
2093 break;
2094
2095 case HAL_LPTIM_TRIGGER_CB_ID :
2096 hlptim->TriggerCallback = pCallback;
2097 break;
2098
2099 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2100 hlptim->CompareWriteCallback = pCallback;
2101 break;
2102
2103 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2104 hlptim->AutoReloadWriteCallback = pCallback;
2105 break;
2106
2107 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2108 hlptim->DirectionUpCallback = pCallback;
2109 break;
2110
2111 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2112 hlptim->DirectionDownCallback = pCallback;
2113 break;
2114
2115 default :
2116 /* Return error status */
2117 status = HAL_ERROR;
2118 break;
2119 }
2120 }
2121 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2122 {
2123 switch (CallbackID)
2124 {
2125 case HAL_LPTIM_MSPINIT_CB_ID :
2126 hlptim->MspInitCallback = pCallback;
2127 break;
2128
2129 case HAL_LPTIM_MSPDEINIT_CB_ID :
2130 hlptim->MspDeInitCallback = pCallback;
2131 break;
2132
2133 default :
2134 /* Return error status */
2135 status = HAL_ERROR;
2136 break;
2137 }
2138 }
2139 else
2140 {
2141 /* Return error status */
2142 status = HAL_ERROR;
2143 }
2144
2145 /* Release Lock */
2146 __HAL_UNLOCK(hlptim);
2147
2148 return status;
2149 }
2150
2151 /**
2152 * @brief Unregister a LPTIM callback
2153 * LLPTIM callback is redirected to the weak predefined callback
2154 * @param hlptim LPTIM handle
2155 * @param CallbackID ID of the callback to be unregistered
2156 * This parameter can be one of the following values:
2157 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2158 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2159 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2160 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2161 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2162 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2163 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2164 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2165 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2166 * @retval status
2167 */
2168 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2169 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2170 {
2171 HAL_StatusTypeDef status = HAL_OK;
2172
2173 /* Process locked */
2174 __HAL_LOCK(hlptim);
2175
2176 if (hlptim->State == HAL_LPTIM_STATE_READY)
2177 {
2178 switch (CallbackID)
2179 {
2180 case HAL_LPTIM_MSPINIT_CB_ID :
2181 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2182 break;
2183
2184 case HAL_LPTIM_MSPDEINIT_CB_ID :
2185 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2186 break;
2187
2188 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2189 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2190 break;
2191
2192 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2193 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2194 break;
2195
2196 case HAL_LPTIM_TRIGGER_CB_ID :
2197 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2198 break;
2199
2200 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2201 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2202 break;
2203
2204 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2205 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2206 break;
2207
2208 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2209 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2210 break;
2211
2212 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2213 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2214 break;
2215
2216 default :
2217 /* Return error status */
2218 status = HAL_ERROR;
2219 break;
2220 }
2221 }
2222 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2223 {
2224 switch (CallbackID)
2225 {
2226 case HAL_LPTIM_MSPINIT_CB_ID :
2227 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2228 break;
2229
2230 case HAL_LPTIM_MSPDEINIT_CB_ID :
2231 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2232 break;
2233
2234 default :
2235 /* Return error status */
2236 status = HAL_ERROR;
2237 break;
2238 }
2239 }
2240 else
2241 {
2242 /* Return error status */
2243 status = HAL_ERROR;
2244 }
2245
2246 /* Release Lock */
2247 __HAL_UNLOCK(hlptim);
2248
2249 return status;
2250 }
2251 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2252
2253 /**
2254 * @}
2255 */
2256
2257 /** @defgroup LPTIM_Group5 Peripheral State functions
2258 * @brief Peripheral State functions.
2259 *
2260 @verbatim
2261 ==============================================================================
2262 ##### Peripheral State functions #####
2263 ==============================================================================
2264 [..]
2265 This subsection permits to get in run-time the status of the peripheral.
2266
2267 @endverbatim
2268 * @{
2269 */
2270
2271 /**
2272 * @brief Return the LPTIM handle state.
2273 * @param hlptim LPTIM handle
2274 * @retval HAL state
2275 */
2276 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2277 {
2278 /* Return LPTIM handle state */
2279 return hlptim->State;
2280 }
2281
2282 /**
2283 * @}
2284 */
2285
2286
2287 /**
2288 * @}
2289 */
2290
2291 /* Private functions ---------------------------------------------------------*/
2292
2293 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2294 * @{
2295 */
2296 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2297 /**
2298 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2299 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2300 * the configuration information for LPTIM module.
2301 * @retval None
2302 */
2303 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2304 {
2305 /* Reset the LPTIM callback to the legacy weak callbacks */
2306 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2307 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2308 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2309 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2310 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2311 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2312 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2313 }
2314 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2315
2316 /**
2317 * @brief LPTimer Wait for flag set
2318 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2319 * the configuration information for LPTIM module.
2320 * @param flag The lptim flag
2321 * @retval HAL status
2322 */
2323 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2324 {
2325 HAL_StatusTypeDef result = HAL_OK;
2326 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2327 do
2328 {
2329 count--;
2330 if (count == 0UL)
2331 {
2332 result = HAL_TIMEOUT;
2333 }
2334 }
2335 while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2336
2337 return result;
2338 }
2339
2340 /**
2341 * @brief Disable LPTIM HW instance.
2342 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2343 * the configuration information for LPTIM module.
2344 * @note The following sequence is required to solve LPTIM disable HW limitation.
2345 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2346 * stuck in LPTIM interrupt when entering Stop mode" section.
2347 * @retval None
2348 */
2349 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2350 {
2351 uint32_t tmpclksource = 0;
2352 uint32_t tmpIER;
2353 uint32_t tmpCFGR;
2354 uint32_t tmpCMP;
2355 uint32_t tmpARR;
2356 uint32_t tmpCFGR2;
2357
2358 __disable_irq();
2359
2360 /*********** Save LPTIM Config ***********/
2361 /* Save LPTIM source clock */
2362 switch ((uint32_t)hlptim->Instance)
2363 {
2364 case LPTIM1_BASE:
2365 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2366 break;
2367 case LPTIM2_BASE:
2368 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2369 break;
2370 #if defined(LPTIM3)
2371 case LPTIM3_BASE:
2372 tmpclksource = __HAL_RCC_GET_LPTIM3_SOURCE();
2373 break;
2374 #endif /* LPTIM3 */
2375 #if defined(LPTIM4)
2376 case LPTIM4_BASE:
2377 tmpclksource = __HAL_RCC_GET_LPTIM4_SOURCE();
2378 break;
2379 #endif /* LPTIM4 */
2380 #if defined(LPTIM5)
2381 case LPTIM5_BASE:
2382 tmpclksource = __HAL_RCC_GET_LPTIM5_SOURCE();
2383 break;
2384 #endif /* LPTIM5 */
2385 default:
2386 break;
2387 }
2388
2389 /* Save LPTIM configuration registers */
2390 tmpIER = hlptim->Instance->IER;
2391 tmpCFGR = hlptim->Instance->CFGR;
2392 tmpCMP = hlptim->Instance->CMP;
2393 tmpARR = hlptim->Instance->ARR;
2394 tmpCFGR2 = hlptim->Instance->CFGR2;
2395
2396 /*********** Reset LPTIM ***********/
2397 switch ((uint32_t)hlptim->Instance)
2398 {
2399 case LPTIM1_BASE:
2400 __HAL_RCC_LPTIM1_FORCE_RESET();
2401 __HAL_RCC_LPTIM1_RELEASE_RESET();
2402 break;
2403 case LPTIM2_BASE:
2404 __HAL_RCC_LPTIM2_FORCE_RESET();
2405 __HAL_RCC_LPTIM2_RELEASE_RESET();
2406 break;
2407 #if defined(LPTIM3)
2408 case LPTIM3_BASE:
2409 __HAL_RCC_LPTIM3_FORCE_RESET();
2410 __HAL_RCC_LPTIM3_RELEASE_RESET();
2411 break;
2412 #endif /* LPTIM3 */
2413 #if defined(LPTIM4)
2414 case LPTIM4_BASE:
2415 __HAL_RCC_LPTIM4_FORCE_RESET();
2416 __HAL_RCC_LPTIM4_RELEASE_RESET();
2417 break;
2418 #endif /* LPTIM4 */
2419 #if defined(LPTIM5)
2420 case LPTIM5_BASE:
2421 __HAL_RCC_LPTIM5_FORCE_RESET();
2422 __HAL_RCC_LPTIM5_RELEASE_RESET();
2423 break;
2424 #endif /* LPTIM5 */
2425 default:
2426 break;
2427 }
2428
2429 /*********** Restore LPTIM Config ***********/
2430 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2431 {
2432 /* Force LPTIM source kernel clock from APB */
2433 switch ((uint32_t)hlptim->Instance)
2434 {
2435 case LPTIM1_BASE:
2436 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_D2PCLK1);
2437 break;
2438 case LPTIM2_BASE:
2439 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_D3PCLK1);
2440 break;
2441 #if defined(LPTIM3)
2442 case LPTIM3_BASE:
2443 __HAL_RCC_LPTIM3_CONFIG(RCC_LPTIM3CLKSOURCE_D3PCLK1);
2444 break;
2445 #endif /* LPTIM3 */
2446 #if defined(LPTIM4)
2447 case LPTIM4_BASE:
2448 __HAL_RCC_LPTIM4_CONFIG(RCC_LPTIM4CLKSOURCE_D3PCLK1);
2449 break;
2450 #endif /* LPTIM4 */
2451 #if defined(LPTIM5)
2452 case LPTIM5_BASE:
2453 __HAL_RCC_LPTIM5_CONFIG(RCC_LPTIM5CLKSOURCE_D3PCLK1);
2454 break;
2455 #endif /* LPTIM5 */
2456 default:
2457 break;
2458 }
2459
2460 if (tmpCMP != 0UL)
2461 {
2462 /* Restore CMP register (LPTIM should be enabled first) */
2463 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2464 hlptim->Instance->CMP = tmpCMP;
2465
2466 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2467 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2468 {
2469 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2470 }
2471 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2472 }
2473
2474 if (tmpARR != 0UL)
2475 {
2476 /* Restore ARR register (LPTIM should be enabled first) */
2477 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2478 hlptim->Instance->ARR = tmpARR;
2479
2480 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2481 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2482 {
2483 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2484 }
2485
2486 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2487 }
2488
2489 /* Restore LPTIM source kernel clock */
2490 switch ((uint32_t)hlptim->Instance)
2491 {
2492 case LPTIM1_BASE:
2493 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2494 break;
2495 case LPTIM2_BASE:
2496 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2497 break;
2498 #if defined(LPTIM3)
2499 case LPTIM3_BASE:
2500 __HAL_RCC_LPTIM3_CONFIG(tmpclksource);
2501 break;
2502 #endif /* LPTIM3 */
2503 #if defined(LPTIM4)
2504 case LPTIM4_BASE:
2505 __HAL_RCC_LPTIM4_CONFIG(tmpclksource);
2506 break;
2507 #endif /* LPTIM4 */
2508 #if defined(LPTIM5)
2509 case LPTIM5_BASE:
2510 __HAL_RCC_LPTIM5_CONFIG(tmpclksource);
2511 break;
2512 #endif /* LPTIM5 */
2513 default:
2514 break;
2515 }
2516 }
2517
2518 /* Restore configuration registers (LPTIM should be disabled first) */
2519 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2520 hlptim->Instance->IER = tmpIER;
2521 hlptim->Instance->CFGR = tmpCFGR;
2522 hlptim->Instance->CFGR2 = tmpCFGR2;
2523
2524 __enable_irq();
2525 }
2526 /**
2527 * @}
2528 */
2529 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */
2530
2531 #endif /* HAL_LPTIM_MODULE_ENABLED */
2532 /**
2533 * @}
2534 */
2535
2536 /**
2537 * @}
2538 */
2539
2540 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/