lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_bdma.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_ll_bdma.c
   4   * @author  MCD Application Team
   5   * @brief   BDMA LL module driver.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 #if defined(USE_FULL_LL_DRIVER)
  21
  22 /* Includes ------------------------------------------------------------------*/
  23 #include "stm32h7xx_ll_bdma.h"
  24 #include "stm32h7xx_ll_bus.h"
  25 #ifdef  USE_FULL_ASSERT
  26 #include "stm32_assert.h"
  27 #else
  28 #define assert_param(expr) ((void)0U)
  29 #endif
  30
  31 /** @addtogroup STM32H7xx_LL_Driver
  32   * @{
  33   */
  34
  35 #if defined (BDMA) || defined (BDMA1) || defined (BDMA2)
  36
  37 /** @addtogroup BDMA_LL
  38   * @{
  39   */
  40
  41 /* Private types -------------------------------------------------------------*/
  42 /* Private variables ---------------------------------------------------------*/
  43 /* Private constants ---------------------------------------------------------*/
  44 /* Private macros ------------------------------------------------------------*/
  45 /** @addtogroup BDMA_LL_Private_Macros
  46   * @{
  47   */
  48 #define IS_LL_BDMA_DIRECTION(__VALUE__)          (((__VALUE__) == LL_BDMA_DIRECTION_PERIPH_TO_MEMORY) || \
  49                                                   ((__VALUE__) == LL_BDMA_DIRECTION_MEMORY_TO_PERIPH) || \
  50                                                   ((__VALUE__) == LL_BDMA_DIRECTION_MEMORY_TO_MEMORY))
  51
  52 #define IS_LL_BDMA_MODE(__VALUE__)               (((__VALUE__) == LL_BDMA_MODE_NORMAL) || \
  53                                                   ((__VALUE__) == LL_BDMA_MODE_CIRCULAR))
  54
  55 #define IS_LL_BDMA_PERIPHINCMODE(__VALUE__)      (((__VALUE__) == LL_BDMA_PERIPH_INCREMENT) || \
  56                                                   ((__VALUE__) == LL_BDMA_PERIPH_NOINCREMENT))
  57
  58 #define IS_LL_BDMA_MEMORYINCMODE(__VALUE__)      (((__VALUE__) == LL_BDMA_MEMORY_INCREMENT) || \
  59                                                   ((__VALUE__) == LL_BDMA_MEMORY_NOINCREMENT))
  60
  61 #define IS_LL_BDMA_PERIPHDATASIZE(__VALUE__)     (((__VALUE__) == LL_BDMA_PDATAALIGN_BYTE)      || \
  62                                                   ((__VALUE__) == LL_BDMA_PDATAALIGN_HALFWORD)  || \
  63                                                   ((__VALUE__) == LL_BDMA_PDATAALIGN_WORD))
  64
  65 #define IS_LL_BDMA_MEMORYDATASIZE(__VALUE__)     (((__VALUE__) == LL_BDMA_MDATAALIGN_BYTE)      || \
  66                                                   ((__VALUE__) == LL_BDMA_MDATAALIGN_HALFWORD)  || \
  67                                                   ((__VALUE__) == LL_BDMA_MDATAALIGN_WORD))
  68
  69 #define IS_LL_BDMA_NBDATA(__VALUE__)             ((__VALUE__)  <= 0x0000FFFFU)
  70
  71 #if defined(ADC3)
  72 #define IS_LL_BDMA_PERIPHREQUEST(__VALUE__)      ((__VALUE__) <= LL_DMAMUX2_REQ_ADC3)
  73 #else
  74 #define IS_LL_BDMA_PERIPHREQUEST(__VALUE__)      ((__VALUE__) <= LL_DMAMUX2_REQ_DFSDM2_FLT0)
  75 #endif /* ADC3 */
  76
  77 #define IS_LL_BDMA_PRIORITY(__VALUE__)           (((__VALUE__) == LL_BDMA_PRIORITY_LOW)    || \
  78                                                   ((__VALUE__) == LL_BDMA_PRIORITY_MEDIUM) || \
  79                                                   ((__VALUE__) == LL_BDMA_PRIORITY_HIGH)   || \
  80                                                   ((__VALUE__) == LL_BDMA_PRIORITY_VERYHIGH))
  81
  82 #define IS_LL_BDMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == BDMA) && \
  83                                                              (((CHANNEL) == LL_BDMA_CHANNEL_0) || \
  84                                                               ((CHANNEL) == LL_BDMA_CHANNEL_1) || \
  85                                                               ((CHANNEL) == LL_BDMA_CHANNEL_2) || \
  86                                                               ((CHANNEL) == LL_BDMA_CHANNEL_3) || \
  87                                                               ((CHANNEL) == LL_BDMA_CHANNEL_4) || \
  88                                                               ((CHANNEL) == LL_BDMA_CHANNEL_5) || \
  89                                                               ((CHANNEL) == LL_BDMA_CHANNEL_6) || \
  90                                                               ((CHANNEL) == LL_BDMA_CHANNEL_7))))
  91
  92 /**
  93   * @}
  94   */
  95
  96 /* Private function prototypes -----------------------------------------------*/
  97
  98 /* Exported functions --------------------------------------------------------*/
  99 /** @addtogroup BDMA_LL_Exported_Functions
 100   * @{
 101   */
 102
 103 /** @addtogroup BDMA_LL_EF_Init
 104   * @{
 105   */
 106
 107 /**
 108   * @brief  De-initialize the DMA registers to their default reset values.
 109   * @param  BDMAx BDMAx Instance
 110   * @param  Channel This parameter can be one of the following values:
 111   *         @arg @ref LL_BDMA_CHANNEL_0
 112   *         @arg @ref LL_BDMA_CHANNEL_1
 113   *         @arg @ref LL_BDMA_CHANNEL_2
 114   *         @arg @ref LL_BDMA_CHANNEL_3
 115   *         @arg @ref LL_BDMA_CHANNEL_4
 116   *         @arg @ref LL_BDMA_CHANNEL_5
 117   *         @arg @ref LL_BDMA_CHANNEL_6
 118   *         @arg @ref LL_BDMA_CHANNEL_7
 119   *         @arg @ref LL_BDMA_CHANNEL_ALL
 120   * @retval An ErrorStatus enumeration value:
 121   *          - SUCCESS: DMA registers are de-initialized
 122   *          - ERROR: DMA registers are not de-initialized
 123   */
 124 uint32_t LL_BDMA_DeInit(BDMA_TypeDef *BDMAx, uint32_t Channel)
 125 {
 126   BDMA_Channel_TypeDef *tmp ;
 127   ErrorStatus status = SUCCESS;
 128
 129   /* Check the DMA Instance DMAx and Channel parameters */
 130   assert_param(IS_LL_BDMA_ALL_CHANNEL_INSTANCE(BDMAx, Channel) || (Channel == LL_BDMA_CHANNEL_ALL));
 131
 132   if (Channel == LL_BDMA_CHANNEL_ALL)
 133   {
 134     if (BDMAx == BDMA)
 135     {
 136       /* Force reset of BDMA clock */
 137       LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1);
 138
 139       /* Release reset of BDMA clock */
 140       LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1);
 141     }
 142     else
 143     {
 144       status = ERROR;
 145     }
 146   }
 147   else
 148   {
 149     tmp = (BDMA_Channel_TypeDef *)(__LL_BDMA_GET_CHANNEL_INSTANCE(BDMAx, Channel));
 150
 151     /* Disable the selected DMAx_Channely */
 152     CLEAR_BIT(tmp->CCR, BDMA_CCR_EN);
 153
 154     /* Reset DMAx_Channely control register */
 155     LL_BDMA_WriteReg(tmp, CCR, 0U);
 156
 157     /* Reset DMAx_Channely remaining bytes register */
 158     LL_BDMA_WriteReg(tmp, CNDTR, 0U);
 159
 160     /* Reset DMAx_Channely peripheral address register */
 161     LL_BDMA_WriteReg(tmp, CPAR, 0U);
 162
 163     /* Reset DMAx_Channely memory 0 address register */
 164     LL_BDMA_WriteReg(tmp, CM0AR, 0U);
 165
 166     /* Reset DMAx_Channely memory 1 address register */
 167     LL_BDMA_WriteReg(tmp, CM1AR, 0U);
 168
 169     /* Reset Request register field for BDMAx Channel */
 170     LL_BDMA_SetPeriphRequest(BDMAx, Channel, LL_DMAMUX2_REQ_MEM2MEM);
 171
 172     if (Channel == LL_BDMA_CHANNEL_0)
 173     {
 174       /* Reset interrupt pending bits for DMAx Channel0 */
 175       LL_BDMA_ClearFlag_GI0(BDMAx);
 176     }
 177     else if (Channel == LL_BDMA_CHANNEL_1)
 178     {
 179       /* Reset interrupt pending bits for DMAx Channel1 */
 180       LL_BDMA_ClearFlag_GI1(BDMAx);
 181     }
 182     else if (Channel == LL_BDMA_CHANNEL_2)
 183     {
 184       /* Reset interrupt pending bits for DMAx Channel2 */
 185       LL_BDMA_ClearFlag_GI2(BDMAx);
 186     }
 187     else if (Channel == LL_BDMA_CHANNEL_3)
 188     {
 189       /* Reset interrupt pending bits for DMAx Channel3 */
 190       LL_BDMA_ClearFlag_GI3(BDMAx);
 191     }
 192     else if (Channel == LL_BDMA_CHANNEL_4)
 193     {
 194       /* Reset interrupt pending bits for DMAx Channel4 */
 195       LL_BDMA_ClearFlag_GI4(BDMAx);
 196     }
 197     else if (Channel == LL_BDMA_CHANNEL_5)
 198     {
 199       /* Reset interrupt pending bits for DMAx Channel5 */
 200       LL_BDMA_ClearFlag_GI5(BDMAx);
 201     }
 202
 203     else if (Channel == LL_BDMA_CHANNEL_6)
 204     {
 205       /* Reset interrupt pending bits for DMAx Channel6 */
 206       LL_BDMA_ClearFlag_GI6(BDMAx);
 207     }
 208     else if (Channel == LL_BDMA_CHANNEL_7)
 209     {
 210       /* Reset interrupt pending bits for DMAx Channel7 */
 211       LL_BDMA_ClearFlag_GI7(BDMAx);
 212     }
 213     else
 214     {
 215       status = ERROR;
 216     }
 217   }
 218
 219   return (uint32_t)status;
 220 }
 221
 222 /**
 223   * @brief  Initialize the BDMA registers according to the specified parameters in BDMA_InitStruct.
 224   * @note   To convert BDMAx_Channely Instance to BDMAx Instance and Channely, use helper macros :
 225   *         @arg @ref __LL_BDMA_GET_INSTANCE
 226   *         @arg @ref __LL_BDMA_GET_CHANNEL
 227   * @param  BDMAx BDMAx Instance
 228   * @param  Channel This parameter can be one of the following values:
 229   *         @arg @ref LL_BDMA_CHANNEL_0
 230   *         @arg @ref LL_BDMA_CHANNEL_1
 231   *         @arg @ref LL_BDMA_CHANNEL_2
 232   *         @arg @ref LL_BDMA_CHANNEL_3
 233   *         @arg @ref LL_BDMA_CHANNEL_4
 234   *         @arg @ref LL_BDMA_CHANNEL_5
 235   *         @arg @ref LL_BDMA_CHANNEL_6
 236   *         @arg @ref LL_BDMA_CHANNEL_7
 237   * @param  BDMA_InitStruct pointer to a @ref LL_BDMA_InitTypeDef structure.
 238   * @retval An ErrorStatus enumeration value:
 239   *          - SUCCESS: DMA registers are initialized
 240   *          - ERROR: Not applicable
 241   */
 242 uint32_t LL_BDMA_Init(BDMA_TypeDef *BDMAx, uint32_t Channel, LL_BDMA_InitTypeDef *BDMA_InitStruct)
 243 {
 244   /* Check the DMA Instance DMAx and Channel parameters */
 245   assert_param(IS_LL_BDMA_ALL_CHANNEL_INSTANCE(BDMAx, Channel));
 246
 247   /* Check the DMA parameters from BDMA_InitStruct */
 248   assert_param(IS_LL_BDMA_DIRECTION(BDMA_InitStruct->Direction));
 249   assert_param(IS_LL_BDMA_MODE(BDMA_InitStruct->Mode));
 250   assert_param(IS_LL_BDMA_PERIPHINCMODE(BDMA_InitStruct->PeriphOrM2MSrcIncMode));
 251   assert_param(IS_LL_BDMA_MEMORYINCMODE(BDMA_InitStruct->MemoryOrM2MDstIncMode));
 252   assert_param(IS_LL_BDMA_PERIPHDATASIZE(BDMA_InitStruct->PeriphOrM2MSrcDataSize));
 253   assert_param(IS_LL_BDMA_MEMORYDATASIZE(BDMA_InitStruct->MemoryOrM2MDstDataSize));
 254   assert_param(IS_LL_BDMA_NBDATA(BDMA_InitStruct->NbData));
 255   assert_param(IS_LL_BDMA_PERIPHREQUEST(BDMA_InitStruct->PeriphRequest));
 256   assert_param(IS_LL_BDMA_PRIORITY(BDMA_InitStruct->Priority));
 257
 258   /*---------------------------- DMAx CCR Configuration ------------------------
 259    * Configure DMAx_Channely: data transfer direction, data transfer mode,
 260    *                          peripheral and memory increment mode,
 261    *                          data size alignment and  priority level with parameters :
 262    * - Direction:      BDMA_CCR_DIR and BDMA_CCR_MEM2MEM bits
 263    * - Mode:           BDMA_CCR_CIRC bit
 264    * - PeriphOrM2MSrcIncMode:  BDMA_CCR_PINC bit
 265    * - MemoryOrM2MDstIncMode:  BDMA_CCR_MINC bit
 266    * - PeriphOrM2MSrcDataSize: BDMA_CCR_PSIZE[1:0] bits
 267    * - MemoryOrM2MDstDataSize: BDMA_CCR_MSIZE[1:0] bits
 268    * - Priority:               BDMA_CCR_PL[1:0] bits
 269    */
 270   LL_BDMA_ConfigTransfer(BDMAx, Channel, BDMA_InitStruct->Direction              | \
 271                          BDMA_InitStruct->Mode                   | \
 272                          BDMA_InitStruct->PeriphOrM2MSrcIncMode  | \
 273                          BDMA_InitStruct->MemoryOrM2MDstIncMode  | \
 274                          BDMA_InitStruct->PeriphOrM2MSrcDataSize | \
 275                          BDMA_InitStruct->MemoryOrM2MDstDataSize | \
 276                          BDMA_InitStruct->Priority);
 277
 278   /*-------------------------- DMAx CMAR Configuration -------------------------
 279    * Configure the memory or destination base address with parameter :
 280    * - MemoryOrM2MDstAddress: BDMA_CMAR_MA[31:0] bits
 281    */
 282   LL_BDMA_SetMemoryAddress(BDMAx, Channel, BDMA_InitStruct->MemoryOrM2MDstAddress);
 283
 284   /*-------------------------- DMAx CPAR Configuration -------------------------
 285    * Configure the peripheral or source base address with parameter :
 286    * - PeriphOrM2MSrcAddress: BDMA_CPAR_PA[31:0] bits
 287    */
 288   LL_BDMA_SetPeriphAddress(BDMAx, Channel, BDMA_InitStruct->PeriphOrM2MSrcAddress);
 289
 290   /*--------------------------- DMAx CNDTR Configuration -----------------------
 291    * Configure the peripheral base address with parameter :
 292    * - NbData: BDMA_CNDTR_NDT[15:0] bits
 293    */
 294   LL_BDMA_SetDataLength(BDMAx, Channel, BDMA_InitStruct->NbData);
 295
 296   /*--------------------------- DMAMUXx CCR Configuration ----------------------
 297    * Configure the DMA request for DMA Channels on DMAMUX Channel x with parameter :
 298    * - PeriphRequest: BDMA_CxCR[7:0] bits
 299    */
 300   LL_BDMA_SetPeriphRequest(BDMAx, Channel, BDMA_InitStruct->PeriphRequest);
 301
 302   return (uint32_t)SUCCESS;
 303 }
 304
 305 /**
 306   * @brief  Set each @ref LL_BDMA_InitTypeDef field to default value.
 307   * @param  BDMA_InitStruct Pointer to a @ref LL_BDMA_InitTypeDef structure.
 308   * @retval None
 309   */
 310 void LL_BDMA_StructInit(LL_BDMA_InitTypeDef *BDMA_InitStruct)
 311 {
 312   /* Set BDMA_InitStruct fields to default values */
 313   BDMA_InitStruct->PeriphOrM2MSrcAddress  = 0x00000000U;
 314   BDMA_InitStruct->MemoryOrM2MDstAddress  = 0x00000000U;
 315   BDMA_InitStruct->Direction              = LL_BDMA_DIRECTION_PERIPH_TO_MEMORY;
 316   BDMA_InitStruct->Mode                   = LL_BDMA_MODE_NORMAL;
 317   BDMA_InitStruct->PeriphOrM2MSrcIncMode  = LL_BDMA_PERIPH_NOINCREMENT;
 318   BDMA_InitStruct->MemoryOrM2MDstIncMode  = LL_BDMA_MEMORY_NOINCREMENT;
 319   BDMA_InitStruct->PeriphOrM2MSrcDataSize = LL_BDMA_PDATAALIGN_BYTE;
 320   BDMA_InitStruct->MemoryOrM2MDstDataSize = LL_BDMA_MDATAALIGN_BYTE;
 321   BDMA_InitStruct->NbData                 = 0x00000000U;
 322   BDMA_InitStruct->PeriphRequest          = LL_DMAMUX2_REQ_MEM2MEM;
 323   BDMA_InitStruct->Priority               = LL_BDMA_PRIORITY_LOW;
 324 }
 325
 326 /**
 327   * @}
 328   */
 329
 330 /**
 331   * @}
 332   */
 333
 334 /**
 335   * @}
 336   */
 337
 338 #endif /* BDMA || BDMA1 || BDMA2 */
 339
 340 /**
 341   * @}
 342   */
 343
 344 #endif /* USE_FULL_LL_DRIVER */
 345
 346 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/