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[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_ll_exti.c
blob3d1d792425deb0963498780aa9fe303bd0c682b5
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_exti.c
4 * @author MCD Application Team
5 * @brief EXTI LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 #if defined(USE_FULL_LL_DRIVER)
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32h7xx_ll_exti.h"
23 #ifdef USE_FULL_ASSERT
24 #include "stm32_assert.h"
25 #else
26 #define assert_param(expr) ((void)0U)
27 #endif
28
29 /** @addtogroup STM32H7xx_LL_Driver
30 * @{
31 */
32
33 #if defined (EXTI)
34
35 /** @defgroup EXTI_LL EXTI
36 * @{
37 */
38
39 /* Private types -------------------------------------------------------------*/
40 /* Private variables ---------------------------------------------------------*/
41 /* Private constants ---------------------------------------------------------*/
42 /* Private macros ------------------------------------------------------------*/
43 /** @addtogroup EXTI_LL_Private_Macros
44 * @{
45 */
46
47 #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U)
48 #define IS_LL_EXTI_LINE_32_63(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U)
49 #define IS_LL_EXTI_LINE_64_95(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_64_95) == 0x00000000U)
50
51 #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \
52 || ((__VALUE__) == LL_EXTI_MODE_EVENT) \
53 || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
54
55
56 #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \
57 || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \
58 || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \
59 || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
60
61 /**
62 * @}
63 */
64
65 /* Private function prototypes -----------------------------------------------*/
66
67 /* Exported functions --------------------------------------------------------*/
68 /** @addtogroup EXTI_LL_Exported_Functions
69 * @{
70 */
71
72 /** @addtogroup EXTI_LL_EF_Init
73 * @{
74 */
75
76 /**
77 * @brief De-initialize the EXTI registers to their default reset values.
78 * @retval An ErrorStatus enumeration value:
79 * - SUCCESS: EXTI registers are de-initialized
80 * - ERROR: not applicable
81 */
82 ErrorStatus LL_EXTI_DeInit(void)
83 {
84 /* Rising Trigger selection register set to default reset values */
85 LL_EXTI_WriteReg(RTSR1, 0x00000000U);
86 LL_EXTI_WriteReg(RTSR2, 0x00000000U);
87 LL_EXTI_WriteReg(RTSR3, 0x00000000U);
88
89 /* Falling Trigger selection register set to default reset values */
90 LL_EXTI_WriteReg(FTSR1, 0x00000000U);
91 LL_EXTI_WriteReg(FTSR2, 0x00000000U);
92 LL_EXTI_WriteReg(FTSR3, 0x00000000U);
93
94 /* Software interrupt event register set to default reset values */
95 LL_EXTI_WriteReg(SWIER1, 0x00000000U);
96 LL_EXTI_WriteReg(SWIER2, 0x00000000U);
97 LL_EXTI_WriteReg(SWIER3, 0x00000000U);
98
99 /* D3 Pending register set to default reset values */
100 LL_EXTI_WriteReg(D3PMR1, 0x00000000U);
101 LL_EXTI_WriteReg(D3PMR2, 0x00000000U);
102 LL_EXTI_WriteReg(D3PMR3, 0x00000000U);
103
104 /* D3 Pending clear selection register low to default reset values */
105 LL_EXTI_WriteReg(D3PCR1L, 0x00000000U);
106 LL_EXTI_WriteReg(D3PCR2L, 0x00000000U);
107 LL_EXTI_WriteReg(D3PCR3L, 0x00000000U);
108
109 /* D3 Pending clear selection register high to default reset values */
110 LL_EXTI_WriteReg(D3PCR1H, 0x00000000U);
111 LL_EXTI_WriteReg(D3PCR2H, 0x00000000U);
112 LL_EXTI_WriteReg(D3PCR3H, 0x00000000U);
113
114 /* Interrupt mask register set to default reset values */
115 LL_EXTI_WriteReg(IMR1, 0x00000000U);
116 LL_EXTI_WriteReg(IMR2, 0x00000000U);
117 LL_EXTI_WriteReg(IMR3, 0x00000000U);
118
119 /* Event mask register set to default reset values */
120 LL_EXTI_WriteReg(EMR1, 0x00000000U);
121 LL_EXTI_WriteReg(EMR2, 0x00000000U);
122 LL_EXTI_WriteReg(EMR3, 0x00000000U);
123
124 /* Clear Pending requests */
125 LL_EXTI_WriteReg(PR1, EXTI_PR1_PR_Msk);
126 LL_EXTI_WriteReg(PR2, EXTI_PR2_PR_Msk);
127 LL_EXTI_WriteReg(PR3, EXTI_PR3_PR_Msk);
128
129 #if defined(DUAL_CORE)
130 /* Interrupt mask register set to default reset values for Core 2 (Coretx-M4)*/
131 LL_EXTI_WriteReg(C2IMR1, 0x00000000U);
132 LL_EXTI_WriteReg(C2IMR2, 0x00000000U);
133 LL_EXTI_WriteReg(C2IMR3, 0x00000000U);
134
135 /* Event mask register set to default reset values */
136 LL_EXTI_WriteReg(C2EMR1, 0x00000000U);
137 LL_EXTI_WriteReg(C2EMR2, 0x00000000U);
138 LL_EXTI_WriteReg(C2EMR3, 0x00000000U);
139
140 /* Clear Pending requests */
141 LL_EXTI_WriteReg(C2PR1, EXTI_PR1_PR_Msk);
142 LL_EXTI_WriteReg(C2PR2, EXTI_PR2_PR_Msk);
143 LL_EXTI_WriteReg(C2PR3, EXTI_PR3_PR_Msk);
144
145 #endif /* DUAL_CORE*/
146 return SUCCESS;
147 }
148
149 /**
150 * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
151 * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
152 * @retval An ErrorStatus enumeration value:
153 * - SUCCESS: EXTI registers are initialized
154 * - ERROR: not applicable
155 */
156 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
157 {
158 ErrorStatus status = SUCCESS;
159 /* Check the parameters */
160 assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
161 assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63));
162 assert_param(IS_LL_EXTI_LINE_64_95(EXTI_InitStruct->Line_64_95));
163 assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
164 assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
165
166 /* ENABLE LineCommand */
167 if (EXTI_InitStruct->LineCommand != DISABLE)
168 {
169 assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
170
171 /* Configure EXTI Lines in range from 0 to 31 */
172 if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
173 {
174 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
175 {
176 /* Enable IT on provided Lines for Cortex-M7*/
177 LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
178 }
179 else
180 {
181 /* Disable IT on provided Lines for Cortex-M7*/
182 LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
183 }
184
185 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
186 {
187 /* Enable event on provided Lines for Cortex-M7 */
188 LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
189 }
190 else
191 {
192 /* Disable event on provided Lines for Cortex-M7 */
193 LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
194 }
195 #if defined(DUAL_CORE)
196 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
197 {
198 /* Enable IT on provided Lines for Cortex-M4 */
199 LL_C2_EXTI_EnableIT_0_31 (EXTI_InitStruct->Line_0_31);
200 }
201 else
202 {
203 /* Disable IT on provided Lines for Cortex-M4*/
204 LL_C2_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
205 }
206
207 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
208 {
209 /* Enable event on provided Lines for Cortex-M4 */
210 LL_C2_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
211 }
212 else
213 {
214 /* Disable event on provided Lines for Cortex-M4*/
215 LL_C2_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
216 }
217 #endif /* DUAL_CORE */
218
219 if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
220 {
221 switch (EXTI_InitStruct->Trigger)
222 {
223 case LL_EXTI_TRIGGER_RISING:
224 /* First Disable Falling Trigger on provided Lines */
225 LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
226 /* Then Enable Rising Trigger on provided Lines */
227 LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
228 break;
229 case LL_EXTI_TRIGGER_FALLING:
230 /* First Disable Rising Trigger on provided Lines */
231 LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
232 /* Then Enable Falling Trigger on provided Lines */
233 LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
234 break;
235 case LL_EXTI_TRIGGER_RISING_FALLING:
236 LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
237 LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
238 break;
239 default:
240 status = ERROR;
241 break;
242 }
243 }
244 }
245 /* Configure EXTI Lines in range from 32 to 63 */
246 if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE)
247 {
248 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
249 {
250 /* Enable IT on provided Lines for Cortex-M7*/
251 LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
252 }
253 else
254 {
255 /* Disable IT on provided Lines for Cortex-M7*/
256 LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
257 }
258
259 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
260 {
261 /* Enable event on provided Lines for Cortex-M7 */
262 LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
263 }
264 else
265 {
266 /* Disable event on provided Lines for Cortex-M7 */
267 LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
268 }
269 #if defined(DUAL_CORE)
270 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
271 {
272 /* Enable IT on provided Lines for Cortex-M4 */
273 LL_C2_EXTI_EnableIT_32_63 (EXTI_InitStruct->Line_32_63);
274 }
275 else
276 {
277 /* Disable IT on provided Lines for Cortex-M4 */
278 LL_C2_EXTI_DisableIT_32_63 (EXTI_InitStruct->Line_32_63);
279 }
280
281 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
282 {
283 /* Enable event on provided Lines for Cortex-M4 */
284 LL_C2_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
285 }
286 else
287 {
288 /* Disable event on provided Lines for Cortex-M4 */
289 LL_C2_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
290 }
291 #endif /* DUAL_CORE */
292
293 if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
294 {
295 switch (EXTI_InitStruct->Trigger)
296 {
297 case LL_EXTI_TRIGGER_RISING:
298 /* First Disable Falling Trigger on provided Lines */
299 LL_EXTI_DisableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
300 /* Then Enable IT on provided Lines */
301 LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
302 break;
303 case LL_EXTI_TRIGGER_FALLING:
304 /* First Disable Rising Trigger on provided Lines */
305 LL_EXTI_DisableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
306 /* Then Enable Falling Trigger on provided Lines */
307 LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
308 break;
309 case LL_EXTI_TRIGGER_RISING_FALLING:
310 LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
311 LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
312 break;
313 default:
314 status = ERROR;
315 break;
316 }
317 }
318 }
319 /* Configure EXTI Lines in range from 64 to 95 */
320 if (EXTI_InitStruct->Line_64_95 != LL_EXTI_LINE_NONE)
321 {
322 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
323 {
324 /* Enable IT on provided Lines for Cortex-M7*/
325 LL_EXTI_EnableIT_64_95(EXTI_InitStruct->Line_64_95);
326 }
327 else
328 {
329 /* Disable IT on provided Lines for Cortex-M7*/
330 LL_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
331 }
332
333 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
334 {
335 /* Enable event on provided Lines for Cortex-M7 */
336 LL_EXTI_EnableEvent_64_95(EXTI_InitStruct->Line_64_95);
337 }
338 else
339 {
340 /* Disable event on provided Lines for Cortex-M7 */
341 LL_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
342 }
343
344 #if defined(DUAL_CORE)
345 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
346 {
347 /* Enable IT on provided Lines for Cortex-M4 */
348 LL_C2_EXTI_EnableIT_64_95 (EXTI_InitStruct->Line_64_95);
349 }
350 else
351 {
352 /* Disable IT on provided Lines for Cortex-M4 */
353 LL_C2_EXTI_DisableIT_64_95 (EXTI_InitStruct->Line_64_95);
354 }
355
356 if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
357 {
358 /* Enable event on provided Lines for Cortex-M4 */
359 LL_C2_EXTI_EnableEvent_64_95(EXTI_InitStruct->Line_64_95);
360 }
361 else
362 {
363 /* Disable event on provided Lines for Cortex-M4 */
364 LL_C2_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
365 }
366 #endif /* DUAL_CORE */
367
368 if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
369 {
370 switch (EXTI_InitStruct->Trigger)
371 {
372 case LL_EXTI_TRIGGER_RISING:
373 /* First Disable Falling Trigger on provided Lines */
374 LL_EXTI_DisableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
375 /* Then Enable IT on provided Lines */
376 LL_EXTI_EnableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
377 break;
378 case LL_EXTI_TRIGGER_FALLING:
379 /* First Disable Rising Trigger on provided Lines */
380 LL_EXTI_DisableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
381 /* Then Enable Falling Trigger on provided Lines */
382 LL_EXTI_EnableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
383 break;
384 case LL_EXTI_TRIGGER_RISING_FALLING:
385 LL_EXTI_EnableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
386 LL_EXTI_EnableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
387 break;
388 default:
389 status = ERROR;
390 break;
391 }
392 }
393 }
394 }
395 else /* DISABLE LineCommand */
396 {
397 /* Disable IT on provided Lines for Cortex-M7*/
398 LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
399 LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
400 LL_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
401
402 /* Disable event on provided Lines for Cortex-M7 */
403 LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
404 LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
405 LL_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
406
407 #if defined(DUAL_CORE)
408 /* Disable IT on provided Lines for Cortex-M4*/
409 LL_C2_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
410 LL_C2_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
411 LL_C2_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
412
413 /* Disable event on provided Lines for Cortex-M4 */
414 LL_C2_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
415 LL_C2_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
416 LL_C2_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
417 #endif /* DUAL_CORE */
418 }
419
420 return status;
421 }
422
423 /**
424 * @brief Set each @ref LL_EXTI_InitTypeDef field to default value.
425 * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
426 * @retval None
427 */
428 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
429 {
430 EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE;
431 EXTI_InitStruct->Line_32_63 = LL_EXTI_LINE_NONE;
432 EXTI_InitStruct->Line_64_95 = LL_EXTI_LINE_NONE;
433 EXTI_InitStruct->LineCommand = DISABLE;
434 EXTI_InitStruct->Mode = LL_EXTI_MODE_IT;
435 EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING;
436 }
437
438 /**
439 * @}
440 */
441
442 /**
443 * @}
444 */
445
446 /**
447 * @}
448 */
449
450 #endif /* defined (EXTI) */
451
452 /**
453 * @}
454 */
455
456 #endif /* USE_FULL_LL_DRIVER */
457
458 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/