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[betaflight.git] / src / main / target / NUCLEOF446RE / target.h
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1 /*
2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
8 * any later version.
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
21 #pragma once
23 #define USE_TARGET_CONFIG
25 #define TARGET_BOARD_IDENTIFIER "N446" // STM32 Nucleo F446RE
26 #define USBD_PRODUCT_STRING "NucleoF446RE"
28 #define LED0_PIN PA5 // Onboard LED
30 //#define USE_BEEPER
31 //#define BEEPER_PIN PD12
33 #define USE_EXTI
35 #define USE_SPI
36 //#define USE_SPI_DEVICE_1
37 #define USE_SPI_DEVICE_2
39 #define SPI2_NSS_PIN PB12
40 #define SPI2_SCK_PIN PB13
41 #define SPI2_MISO_PIN PB14
42 #define SPI2_MOSI_PIN PB15
44 #define USE_GYRO
45 #define USE_FAKE_GYRO
46 #define USE_GYRO_SPI_MPU6500
47 #define USE_GYRO_SPI_MPU9250
49 #define USE_ACC
50 #define USE_FAKE_ACC
51 #define USE_ACC_SPI_MPU6500
52 #define USE_ACC_SPI_MPU9250
54 #define GYRO_1_SPI_INSTANCE SPI2
55 #define GYRO_1_CS_PIN PB12
57 #define USE_EXTI
59 //#define USE_GYRO_EXTI
60 //#define GYRO_1_EXTI_PIN PC13
61 //#define USE_MPU_DATA_READY_SIGNAL
62 //#define ENSURE_MPU_DATA_READY_IS_LOW
64 #define USE_BARO
65 #define USE_FAKE_BARO
66 //#define USE_BARO_BMP085
67 //#define USE_BARO_BMP280
68 //#define USE_BARO_MS5611
70 //#define USE_MAX7456
71 //#define MAX7456_SPI_INSTANCE SPI2
72 //#define MAX7456_SPI_CS_PIN SPI2_NSS_PIN
74 #define USE_CMS
76 //#define USE_SDCARD
77 //#define SDCARD_SPI_INSTANCE SPI2
78 //#define SDCARD_SPI_CS_PIN PB12
79 //// Note, this is the same DMA channel as UART1_RX. Luckily we don't use DMA for USART Rx.
80 //#define SDCARD_DMA_CHANNEL_TX DMA1_Channel5
81 // Performance logging for SD card operations:
82 // #define AFATFS_USE_INTROSPECTIVE_LOGGING
84 #define USE_MAG
85 #define USE_FAKE_MAG
86 //#define USE_MAG_AK8963
87 //#define USE_MAG_AK8975
88 //#define USE_MAG_HMC5883
90 #define USE_RX_SPI
91 #define RX_SPI_INSTANCE SPI1
92 // Nordic Semiconductor uses 'CSN', STM uses 'NSS'
93 #define RX_CE_PIN PC7 // D9
94 #define RX_NSS_PIN PB6 // D10
95 // NUCLEO has NSS on PB6, rather than the standard PA4
97 #define SPI1_NSS_PIN RX_NSS_PIN
98 #define SPI1_SCK_PIN PA5 // D13
99 #define SPI1_MISO_PIN PA6 // D12
100 #define SPI1_MOSI_PIN PA7 // D11
102 #define USE_RX_NRF24
103 #define USE_RX_CX10
104 #define USE_RX_H8_3D
105 #define USE_RX_INAV
106 #define USE_RX_SYMA
107 #define USE_RX_V202
108 #define RX_SPI_DEFAULT_PROTOCOL RX_SPI_NRF24_H8_3D
110 #define USE_VCP
112 #define USE_UART1
113 #define UART1_TX_PIN PA9
114 #define UART1_RX_PIN PA10
116 #define USE_UART2
117 #define UART2_TX_PIN PA2
118 #define UART2_RX_PIN PA3
120 #define USE_UART3
121 #define UART3_TX_PIN PB10
122 #define UART3_RX_PIN PB11
124 //#define USE_UART4
125 //#define USE_UART5
127 #define USE_SOFTSERIAL1
128 #define USE_SOFTSERIAL2
130 #define SERIAL_PORT_COUNT 6
132 #define USE_ESCSERIAL
133 #define ESCSERIAL_TIMER_TX_PIN PB8 // (HARDARE=0,PPM)
135 #define USE_I2C
137 #define USE_I2C_DEVICE_2
138 #define I2C2_SCL NONE // PB10, shared with UART3TX
139 #define I2C2_SDA NONE // PB11, shared with UART3RX
141 #define USE_I2C_DEVICE_3
142 #define I2C3_SCL NONE // PA8
143 #define I2C3_SDA NONE // PC9
144 #define I2C_DEVICE (I2CDEV_2)
146 #define USE_ADC
147 #define ADC_INSTANCE ADC1
148 #define ADC1_DMA_OPT 1 // DMA 2 Stream 4 Channel 0 (compat default)
149 //#define ADC_INSTANCE ADC2
150 //#define ADC2_DMA_OPT 1 // DMA 2 Stream 3 Channel 1 (compat default)
151 #define VBAT_ADC_PIN PC0
152 #define CURRENT_METER_ADC_PIN PC1
153 #define RSSI_ADC_PIN PC2
154 #define EXTERNAL1_ADC_PIN PC3
156 #define USE_SONAR
157 #define SONAR_TRIGGER_PIN PB0
158 #define SONAR_ECHO_PIN PB1
160 #define MAX_SUPPORTED_MOTORS 12
162 #define TARGET_IO_PORTA (0xffff & ~(BIT(14)|BIT(13)))
163 #define TARGET_IO_PORTB (0xffff & ~(BIT(2)))
164 #define TARGET_IO_PORTC (0xffff & ~(BIT(15)|BIT(14)|BIT(13)))
165 #define TARGET_IO_PORTD BIT(2)
167 #define USABLE_TIMER_CHANNEL_COUNT 8
168 #define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(8))