src/platform/AT32/startup/system_at32f435_437.c

   1 /**
   2   **************************************************************************
   3   * @file     system_at32f435_437.c
   4   * @version  v2.0.4
   5   * @date     2021-12-31
   6   * @brief    contains all the functions for cmsis cortex-m4 system source file
   7   **************************************************************************
   8   *                       Copyright notice & Disclaimer
   9   *
  10   * The software Board Support Package (BSP) that is made available to
  11   * download from Artery official website is the copyrighted work of Artery.
  12   * Artery authorizes customers to use, copy, and distribute the BSP
  13   * software and its related documentation for the purpose of design and
  14   * development in conjunction with Artery microcontrollers. Use of the
  15   * software is governed by this copyright notice and the following disclaimer.
  16   *
  17   * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  18   * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  19   * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  20   * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  21   * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  22   * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  23   *
  24   **************************************************************************
  25   */
  26
  27 /** @addtogroup CMSIS
  28   * @{
  29   */
  30
  31 /** @addtogroup AT32F435_437_system
  32   * @{
  33   */
  34
  35 #include "at32f435_437.h"
  36 #include "platform.h"
  37
  38 /** @addtogroup AT32F435_437_system_private_defines
  39   * @{
  40   */
  41 #define VECT_TAB_OFFSET                  0x0 /*!< vector table base offset field. this value must be a multiple of 0x200. */
  42 /**
  43   * @}
  44   */
  45
  46 /** @addtogroup AT32F435_437_system_private_variables
  47   * @{
  48   */
  49 unsigned int system_core_clock           = HICK_VALUE; /*!< system clock frequency (core clock) */
  50 /**
  51   * @}
  52   */
  53
  54 /** @addtogroup AT32F435_437_system_private_functions
  55   * @{
  56   */
  57
  58 /**
  59   * @brief  setup the microcontroller system
  60   *         initialize the flash interface.
  61   * @note   this function should be used only after reset.
  62   * @param  none
  63   * @retval none
  64   */
  65 void SystemInit (void)
  66 {
  67 #if defined(__FPU_USED) && (__FPU_USED == 1U)
  68   SCB->CPACR |= ((3U << 10U * 2U) |         /* set cp10 full access */
  69                  (3U << 11U * 2U)  );       /* set cp11 full access */
  70 #endif
  71
  72   /* reset the crm clock configuration to the default reset state(for debug purpose) */
  73   /* set hicken bit */
  74   CRM->ctrl_bit.hicken = TRUE;
  75
  76   /* wait hick stable */
  77   while(CRM->ctrl_bit.hickstbl != SET);
  78
  79   /* hick used as system clock */
  80   CRM->cfg_bit.sclksel = CRM_SCLK_HICK;
  81
  82   /* wait sclk switch status */
  83   while(CRM->cfg_bit.sclksts != CRM_SCLK_HICK);
  84
  85   /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */
  86   CRM->cfg = 0;
  87
  88   /* reset hexten, hextbyps, cfden and pllen bits */
  89   CRM->ctrl &= ~(0x010D0000U);
  90
  91   /* reset pllms pllns pllfr pllrcs bits */
  92   CRM->pllcfg = 0x00033002U;
  93
  94   /* reset clkout[3], usbbufs, hickdiv, clkoutdiv */
  95   CRM->misc1 = 0;
  96
  97   /* disable all interrupts enable and clear pending bits  */
  98   CRM->clkint = 0x009F0000U;
  99
 100 #ifdef VECT_TAB_SRAM
 101   SCB->VTOR = SRAM_BASE  | VECT_TAB_OFFSET;  /* vector table relocation in internal sram. */
 102 #else
 103   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;  /* vector table relocation in internal flash. */
 104 #endif
 105 }
 106
 107 /**
 108   * @brief  update system_core_clock variable according to clock register values.
 109   *         the system_core_clock variable contains the core clock (hclk), it can
 110   *         be used by the user application to setup the systick timer or configure
 111   *         other parameters.
 112   * @param  none
 113   * @retval none
 114   */
 115 void system_core_clock_update(void)
 116 {
 117   uint32_t pll_ns = 0, pll_ms = 0, pll_fr = 0, pll_clock_source = 0, pllrcsfreq = 0;
 118   uint32_t temp = 0, div_value = 0;
 119   crm_sclk_type sclk_source;
 120
 121   static const uint8_t sys_ahb_div_table[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 122   static const uint8_t pll_fr_table[6] = {1, 2, 4, 8, 16, 32};
 123
 124   /* get sclk source */
 125   sclk_source = crm_sysclk_switch_status_get();
 126
 127   switch(sclk_source)
 128   {
 129     case CRM_SCLK_HICK:
 130       if(((CRM->misc1_bit.hick_to_sclk) != RESET) && ((CRM->misc1_bit.hickdiv) != RESET))
 131         system_core_clock = HICK_VALUE * 6;
 132       else
 133         system_core_clock = HICK_VALUE;
 134       break;
 135     case CRM_SCLK_HEXT:
 136       system_core_clock = HEXT_VALUE;
 137       break;
 138     case CRM_SCLK_PLL:
 139       /* get pll clock source */
 140       pll_clock_source = CRM->pllcfg_bit.pllrcs;
 141
 142       /* get multiplication factor */
 143       pll_ns = CRM->pllcfg_bit.pllns;
 144       pll_ms = CRM->pllcfg_bit.pllms;
 145       pll_fr = pll_fr_table[CRM->pllcfg_bit.pllfr];
 146
 147       if (pll_clock_source == CRM_PLL_SOURCE_HICK)
 148       {
 149         /* hick selected as pll clock entry */
 150         pllrcsfreq = HICK_VALUE;
 151       }
 152       else
 153       {
 154         /* hext selected as pll clock entry */
 155         pllrcsfreq = HEXT_VALUE;
 156       }
 157
 158       system_core_clock = (pllrcsfreq * pll_ns) / (pll_ms * pll_fr);
 159       break;
 160     default:
 161       system_core_clock = HICK_VALUE;
 162       break;
 163   }
 164
 165   /* compute sclk, ahbclk frequency */
 166   /* get ahb division */
 167   temp = CRM->cfg_bit.ahbdiv;
 168   div_value = sys_ahb_div_table[temp];
 169   /* ahbclk frequency */
 170   system_core_clock = system_core_clock >> div_value;
 171 }
 172
 173 extern void _init(void) {;}
 174
 175 /**
 176   * @}
 177   */
 178
 179 /**
 180   * @}
 181   */
 182
 183 /**
 184   * @}
 185   */
 186