src/main/startup/apm32/startup_apm32f405xx.S

   1 /**
   2  * @file        startup_apm32f405xx.S
   3  *
   4  * @brief       APM32F405xx Devices vector table for GCC based toolchains.
   5  *              This module performs:
   6  *                  - Set the initial SP
   7  *                  - Set the initial PC == Reset_Handler,
   8  *                  - Set the vector table entries with the exceptions ISR address
   9  *                  - Branches to main in the C library (which eventually
  10  *                  calls main()).
  11  *              After Reset the Cortex-M4 processor is in Thread mode,
  12  *              priority is Privileged, and the Stack is set to Main.
  13  *
  14  * @version     V1.0.0
  15  *
  16  * @date        2023-07-31
  17  *
  18  * @attention
  19  *
  20  *  Copyright (C) 2023 Geehy Semiconductor
  21  *
  22  *  You may not use this file except in compliance with the
  23  *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
  24  *
  25  *  The program is only for reference, which is distributed in the hope
  26  *  that it will be useful and instructional for customers to develop
  27  *  their software. Unless required by applicable law or agreed to in
  28  *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
  29  *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
  30  *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
  31  *  and limitations under the License.
  32  */
  33
  34   .syntax unified
  35   .cpu cortex-m4
  36   .fpu softvfp
  37   .thumb
  38
  39 .global  g_apm32_Vectors
  40 .global  Default_Handler
  41
  42 /* start address for the initialization values of the .data section.
  43 defined in linker script */
  44 .word  _sidata
  45 /* start address for the .data section. defined in linker script */
  46 .word  _sdata
  47 /* end address for the .data section. defined in linker script */
  48 .word  _edata
  49 /* start address for the .bss section. defined in linker script */
  50 .word  _sbss
  51 /* end address for the .bss section. defined in linker script */
  52 .word  _ebss
  53 /* start address for the .fastram_bss section. defined in linker script */
  54 .word  __fastram_bss_start__
  55 /* end address for the .fastram_bss section. defined in linker script */
  56 .word  __fastram_bss_end__
  57 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  58
  59 /**
  60  * @brief  This is the code that gets called when the processor first
  61  *          starts execution following a reset event. Only the absolutely
  62  *          necessary set is performed, after which the application
  63  *          supplied main() routine is called.
  64  * @param  None
  65  * @retval : None
  66 */
  67
  68   .section  .text.Reset_Handler
  69   .weak  Reset_Handler
  70   .type  Reset_Handler, %function
  71 Reset_Handler:
  72   // Enable CCM
  73   // RCC->AHB1ENR |= RCC_AHB1ENR_CCMDATARAMEN;
  74   ldr     r0, =0x40023800       // RCC_BASE
  75   ldr     r1, [r0, #0x30]       // AHB1ENR
  76   orr     r1, r1, 0x00100000    // RCC_AHB1ENR_CCMDATARAMEN
  77   str     r1, [r0, #0x30]
  78   dsb
  79
  80   // Defined in C code
  81   bl persistentObjectInit
  82   bl checkForBootLoaderRequest
  83
  84 /* Copy the data segment initializers from flash to SRAM */
  85   movs  r1, #0
  86   b  LoopCopyDataInit
  87
  88 CopyDataInit:
  89   ldr  r3, =_sidata
  90   ldr  r3, [r3, r1]
  91   str  r3, [r0, r1]
  92   adds  r1, r1, #4
  93
  94 LoopCopyDataInit:
  95   ldr  r0, =_sdata
  96   ldr  r3, =_edata
  97   adds  r2, r0, r1
  98   cmp  r2, r3
  99   bcc  CopyDataInit
 100
 101   ldr  r2, =_sbss
 102   b  LoopFillZerobss
 103 /* Zero fill the bss segment. */
 104 FillZerobss:
 105   movs  r3, #0
 106   str  r3, [r2], #4
 107
 108 LoopFillZerobss:
 109   ldr  r3, = _ebss
 110   cmp  r2, r3
 111   bcc  FillZerobss
 112
 113   ldr  r2, =__fastram_bss_start__
 114   b  LoopFillZerofastram_bss
 115 /* Zero fill the fastram_bss segment. */
 116 FillZerofastram_bss:
 117   movs  r3, #0
 118   str  r3, [r2], #4
 119
 120 LoopFillZerofastram_bss:
 121   ldr  r3, = __fastram_bss_end__
 122   cmp  r2, r3
 123   bcc  FillZerofastram_bss
 124
 125 /* Mark the heap and stack */
 126   ldr   r2, =_heap_stack_begin
 127   b     LoopMarkHeapStack
 128
 129 MarkHeapStack:
 130   movs  r3, 0xa5a5a5a5
 131   str   r3, [r2], #4
 132
 133 LoopMarkHeapStack:
 134   ldr   r3, = _heap_stack_end
 135   cmp   r2, r3
 136   bcc   MarkHeapStack
 137
 138 /*FPU settings*/
 139  ldr     r0, =0xE000ED88           /* Enable CP10,CP11 */
 140  ldr     r1,[r0]
 141  orr     r1,r1,#(0xF << 20)
 142  str     r1,[r0]
 143
 144 /* Call the clock system intitialization function.*/
 145 /* Done in system_stm32f4xx.c */
 146  bl  SystemInit
 147
 148 /* Call the application's entry point.*/
 149   bl  main
 150   bx  lr
 151
 152 LoopForever:
 153   b LoopForever
 154
 155 .size  Reset_Handler, .-Reset_Handler
 156
 157 // This is the code that gets called when the processor receives an unexpected interrupt.
 158     .section  .text.Default_Handler,"ax",%progbits
 159 Default_Handler:
 160 Infinite_Loop:
 161   b  Infinite_Loop
 162   .size  Default_Handler, .-Default_Handler
 163 // The minimal vector table for a Cortex M4.
 164    .section  .isr_vector,"a",%progbits
 165   .type  g_apm32_Vectors, %object
 166   .size  g_apm32_Vectors, .-g_apm32_Vectors
 167
 168 // Vector Table Mapped to Address 0 at Reset
 169 g_apm32_Vectors:
 170   .word  _estack                            // Top of Stack
 171   .word  Reset_Handler                      // Reset Handler
 172   .word  NMI_Handler                        // NMI Handler
 173   .word  HardFault_Handler                  // Hard Fault Handler
 174   .word  MemManage_Handler                  // MPU Fault Handler
 175   .word  BusFault_Handler                   // Bus Fault Handler
 176   .word  UsageFault_Handler                 // Usage Fault Handler
 177   .word  0                                  // Reserved
 178   .word  0                                  // Reserved
 179   .word  0                                  // Reserved
 180   .word  0                                  // Reserved
 181   .word  SVC_Handler                        // SVCall Handler
 182   .word  DebugMon_Handler                   // Debug Monitor Handler
 183   .word  0                                  // Reserved
 184   .word  PendSV_Handler                     // PendSV Handler
 185   .word  SysTick_Handler                    // SysTick Handler
 186
 187   /* External Interrupts */
 188   .word     WWDT_IRQHandler                 // Window WatchDog
 189   .word     PVD_IRQHandler                  // PVD through EINT Line detection
 190   .word     TAMP_STAMP_IRQHandler           // Tamper and TimeStamps through the EINT line
 191   .word     RTC_WKUP_IRQHandler             // RTC Wakeup through the EINT line
 192   .word     FLASH_IRQHandler                // FLASH
 193   .word     RCM_IRQHandler                  // RCM
 194   .word     EINT0_IRQHandler                // EINT Line0
 195   .word     EINT1_IRQHandler                // EINT Line1
 196   .word     EINT2_IRQHandler                // EINT Line2
 197   .word     EINT3_IRQHandler                // EINT Line3
 198   .word     EINT4_IRQHandler                // EINT Line4
 199   .word     DMA1_STR0_IRQHandler            // DMA1 Stream 0
 200   .word     DMA1_STR1_IRQHandler            // DMA1 Stream 1
 201   .word     DMA1_STR2_IRQHandler            // DMA1 Stream 2
 202   .word     DMA1_STR3_IRQHandler            // DMA1 Stream 3
 203   .word     DMA1_STR4_IRQHandler            // DMA1 Stream 4
 204   .word     DMA1_STR5_IRQHandler            // DMA1 Stream 5
 205   .word     DMA1_STR6_IRQHandler            // DMA1 Stream 6
 206   .word     ADC_IRQHandler                  // ADC1, ADC2 and ADC3s
 207   .word     CAN1_TX_IRQHandler              // CAN1 TX
 208   .word     CAN1_RX0_IRQHandler             // CAN1 RX0
 209   .word     CAN1_RX1_IRQHandler             // CAN1 RX1
 210   .word     CAN1_SCE_IRQHandler             // CAN1 SCE
 211   .word     EINT9_5_IRQHandler              // External Line[9:5]s
 212   .word     TMR1_BRK_TMR9_IRQHandler        // TMR1 Break and TMR9
 213   .word     TMR1_UP_TMR10_IRQHandler        // TMR1 Update and TMR10
 214   .word     TMR1_TRG_COM_TMR11_IRQHandler   // TMR1 Trigger and Commutation and TMR11
 215   .word     TMR1_CC_IRQHandler              // TMR1 Capture Compare
 216   .word     TMR2_IRQHandler                 // TMR2
 217   .word     TMR3_IRQHandler                 // TMR3
 218   .word     TMR4_IRQHandler                 // TMR4
 219   .word     I2C1_EV_IRQHandler              // I2C1 Event
 220   .word     I2C1_ER_IRQHandler              // I2C1 Error
 221   .word     I2C2_EV_IRQHandler              // I2C2 Event
 222   .word     I2C2_ER_IRQHandler              // I2C2 Error
 223   .word     SPI1_IRQHandler                 // SPI1
 224   .word     SPI2_IRQHandler                 // SPI2
 225   .word     USART1_IRQHandler               // USART1
 226   .word     USART2_IRQHandler               // USART2
 227   .word     USART3_IRQHandler               // USART3
 228   .word     EINT15_10_IRQHandler            // External Line[15:10]s
 229   .word     RTC_Alarm_IRQHandler            // RTC Alarm (A and B) through EINT Line
 230   .word     OTG_FS_WKUP_IRQHandler          // USB OTG FS Wakeup through EINT line
 231   .word     TMR8_BRK_TMR12_IRQHandler       // TMR8 Break and TMR12
 232   .word     TMR8_UP_TMR13_IRQHandler        // TMR8 Update and TMR13
 233   .word     TMR8_TRG_COM_TMR14_IRQHandler   // TMR8 Trigger and Commutation and TMR14
 234   .word     TMR8_CC_IRQHandler              // TMR8 Capture Compare
 235   .word     DMA1_STR7_IRQHandler            // DMA1 Stream7
 236   .word     EMMC_IRQHandler                 // EMMC
 237   .word     SDIO_IRQHandler                 // SDIO
 238   .word     TMR5_IRQHandler                 // TMR5
 239   .word     SPI3_IRQHandler                 // SPI3
 240   .word     UART4_IRQHandler                // UART4
 241   .word     UART5_IRQHandler                // UART5
 242   .word     TMR6_DAC_IRQHandler             // TMR6 and DAC1&2 underrun errors
 243   .word     TMR7_IRQHandler                 // TMR7
 244   .word     DMA2_STR0_IRQHandler            // DMA2 Stream 0
 245   .word     DMA2_STR1_IRQHandler            // DMA2 Stream 1
 246   .word     DMA2_STR2_IRQHandler            // DMA2 Stream 2
 247   .word     DMA2_STR3_IRQHandler            // DMA2 Stream 3
 248   .word     DMA2_STR4_IRQHandler            // DMA2 Stream 4
 249   .word     0                               // Reserved
 250   .word     0                               // Reserved
 251   .word     CAN2_TX_IRQHandler              // CAN2 TX
 252   .word     CAN2_RX0_IRQHandler             // CAN2 RX0
 253   .word     CAN2_RX1_IRQHandler             // CAN2 RX1
 254   .word     CAN2_SCE_IRQHandler             // CAN2 SCE
 255   .word     OTG_FS_IRQHandler               // USB OTG FS
 256   .word     DMA2_STR5_IRQHandler            // DMA2 Stream 5
 257   .word     DMA2_STR6_IRQHandler            // DMA2 Stream 6
 258   .word     DMA2_STR7_IRQHandler            // DMA2 Stream 7
 259   .word     USART6_IRQHandler               // USART6
 260   .word     I2C3_EV_IRQHandler              // I2C3 event
 261   .word     I2C3_ER_IRQHandler              // I2C3 error
 262   .word     OTG_HS1_EP1_OUT_IRQHandler      // USB OTG HS End Point 1 Out
 263   .word     OTG_HS1_EP1_IN_IRQHandler       // USB OTG HS End Point 1 In
 264   .word     OTG_HS1_WKUP_IRQHandler         // USB OTG HS Wakeup through EINT
 265   .word     OTG_HS1_IRQHandler              // USB OTG HS
 266   .word     0                               // Reserved
 267   .word     0                               // Reserved
 268   .word     HASH_RNG_IRQHandler             // Hash and Rng
 269   .word     FPU_IRQHandler                  // FPU
 270   .word     SM3_IRQHandler                  // SM3
 271   .word     SM4_IRQHandler                  // SM4
 272   .word     BN_IRQHandler                   // BN
 273
 274 // Default exception/interrupt handler
 275
 276    .weak      NMI_Handler
 277    .thumb_set NMI_Handler,Default_Handler
 278
 279    .weak      HardFault_Handler
 280    .thumb_set HardFault_Handler,Default_Handler
 281
 282    .weak      MemManage_Handler
 283    .thumb_set MemManage_Handler,Default_Handler
 284
 285    .weak      BusFault_Handler
 286    .thumb_set BusFault_Handler,Default_Handler
 287
 288    .weak      UsageFault_Handler
 289    .thumb_set UsageFault_Handler,Default_Handler
 290
 291    .weak      SVC_Handler
 292    .thumb_set SVC_Handler,Default_Handler
 293
 294    .weak      DebugMon_Handler
 295    .thumb_set DebugMon_Handler,Default_Handler
 296
 297    .weak      PendSV_Handler
 298    .thumb_set PendSV_Handler,Default_Handler
 299
 300    .weak      SysTick_Handler
 301    .thumb_set SysTick_Handler,Default_Handler
 302
 303    .weak      WWDT_IRQHandler
 304    .thumb_set WWDT_IRQHandler,Default_Handler
 305
 306    .weak      PVD_IRQHandler
 307    .thumb_set PVD_IRQHandler,Default_Handler
 308
 309    .weak      TAMP_STAMP_IRQHandler
 310    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 311
 312    .weak      RTC_WKUP_IRQHandler
 313    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
 314
 315    .weak      FLASH_IRQHandler
 316    .thumb_set FLASH_IRQHandler,Default_Handler
 317
 318    .weak      RCM_IRQHandler
 319    .thumb_set RCM_IRQHandler,Default_Handler
 320
 321    .weak      EINT0_IRQHandler
 322    .thumb_set EINT0_IRQHandler,Default_Handler
 323
 324    .weak      EINT1_IRQHandler
 325    .thumb_set EINT1_IRQHandler,Default_Handler
 326
 327    .weak      EINT2_IRQHandler
 328    .thumb_set EINT2_IRQHandler,Default_Handler
 329
 330    .weak      EINT3_IRQHandler
 331    .thumb_set EINT3_IRQHandler,Default_Handler
 332
 333    .weak      EINT4_IRQHandler
 334    .thumb_set EINT4_IRQHandler,Default_Handler
 335
 336    .weak      DMA1_STR0_IRQHandler
 337    .thumb_set DMA1_STR0_IRQHandler,Default_Handler
 338
 339    .weak      DMA1_STR1_IRQHandler
 340    .thumb_set DMA1_STR1_IRQHandler,Default_Handler
 341
 342    .weak      DMA1_STR2_IRQHandler
 343    .thumb_set DMA1_STR2_IRQHandler,Default_Handler
 344
 345    .weak      DMA1_STR3_IRQHandler
 346    .thumb_set DMA1_STR3_IRQHandler,Default_Handler
 347
 348    .weak      DMA1_STR4_IRQHandler
 349    .thumb_set DMA1_STR4_IRQHandler,Default_Handler
 350
 351    .weak      DMA1_STR5_IRQHandler
 352    .thumb_set DMA1_STR5_IRQHandler,Default_Handler
 353
 354    .weak      DMA1_STR6_IRQHandler
 355    .thumb_set DMA1_STR6_IRQHandler,Default_Handler
 356
 357    .weak      ADC_IRQHandler
 358    .thumb_set ADC_IRQHandler,Default_Handler
 359
 360    .weak      CAN1_TX_IRQHandler
 361    .thumb_set CAN1_TX_IRQHandler,Default_Handler
 362
 363    .weak      CAN1_RX0_IRQHandler
 364    .thumb_set CAN1_RX0_IRQHandler,Default_Handler
 365
 366    .weak      CAN1_RX1_IRQHandler
 367    .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 368
 369    .weak      CAN1_SCE_IRQHandler
 370    .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 371
 372    .weak      EINT9_5_IRQHandler
 373    .thumb_set EINT9_5_IRQHandler,Default_Handler
 374
 375    .weak      TMR1_BRK_TMR9_IRQHandler
 376    .thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
 377
 378    .weak      TMR1_UP_TMR10_IRQHandler
 379    .thumb_set TMR1_UP_TMR10_IRQHandler,Default_Handler
 380
 381    .weak      TMR1_TRG_COM_TMR11_IRQHandler
 382    .thumb_set TMR1_TRG_COM_TMR11_IRQHandler,Default_Handler
 383
 384    .weak      TMR1_CC_IRQHandler
 385    .thumb_set TMR1_CC_IRQHandler,Default_Handler
 386
 387    .weak      TMR2_IRQHandler
 388    .thumb_set TMR2_IRQHandler,Default_Handler
 389
 390    .weak      TMR3_IRQHandler
 391    .thumb_set TMR3_IRQHandler,Default_Handler
 392
 393    .weak      TMR4_IRQHandler
 394    .thumb_set TMR4_IRQHandler,Default_Handler
 395
 396    .weak      I2C1_EV_IRQHandler
 397    .thumb_set I2C1_EV_IRQHandler,Default_Handler
 398
 399    .weak      I2C1_ER_IRQHandler
 400    .thumb_set I2C1_ER_IRQHandler,Default_Handler
 401
 402    .weak      I2C2_EV_IRQHandler
 403    .thumb_set I2C2_EV_IRQHandler,Default_Handler
 404
 405    .weak      I2C2_ER_IRQHandler
 406    .thumb_set I2C2_ER_IRQHandler,Default_Handler
 407
 408    .weak      SPI1_IRQHandler
 409    .thumb_set SPI1_IRQHandler,Default_Handler
 410
 411    .weak      SPI2_IRQHandler
 412    .thumb_set SPI2_IRQHandler,Default_Handler
 413
 414    .weak      USART1_IRQHandler
 415    .thumb_set USART1_IRQHandler,Default_Handler
 416
 417    .weak      USART2_IRQHandler
 418    .thumb_set USART2_IRQHandler,Default_Handler
 419
 420    .weak      USART3_IRQHandler
 421    .thumb_set USART3_IRQHandler,Default_Handler
 422
 423    .weak      EINT15_10_IRQHandler
 424    .thumb_set EINT15_10_IRQHandler,Default_Handler
 425
 426    .weak      RTC_Alarm_IRQHandler
 427    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 428
 429    .weak      OTG_FS_WKUP_IRQHandler
 430    .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 431
 432    .weak      TMR8_BRK_TMR12_IRQHandler
 433    .thumb_set TMR8_BRK_TMR12_IRQHandler,Default_Handler
 434
 435    .weak      TMR8_UP_TMR13_IRQHandler
 436    .thumb_set TMR8_UP_TMR13_IRQHandler,Default_Handler
 437
 438    .weak      TMR8_TRG_COM_TMR14_IRQHandler
 439    .thumb_set TMR8_TRG_COM_TMR14_IRQHandler,Default_Handler
 440
 441    .weak      TMR8_CC_IRQHandler
 442    .thumb_set TMR8_CC_IRQHandler,Default_Handler
 443
 444    .weak      DMA1_STR7_IRQHandler
 445    .thumb_set DMA1_STR7_IRQHandler,Default_Handler
 446
 447    .weak      EMMC_IRQHandler
 448    .thumb_set EMMC_IRQHandler,Default_Handler
 449
 450    .weak      SDIO_IRQHandler
 451    .thumb_set SDIO_IRQHandler,Default_Handler
 452
 453    .weak      TMR5_IRQHandler
 454    .thumb_set TMR5_IRQHandler,Default_Handler
 455
 456    .weak      SPI3_IRQHandler
 457    .thumb_set SPI3_IRQHandler,Default_Handler
 458
 459    .weak      UART4_IRQHandler
 460    .thumb_set UART4_IRQHandler,Default_Handler
 461
 462    .weak      UART5_IRQHandler
 463    .thumb_set UART5_IRQHandler,Default_Handler
 464
 465    .weak      TMR6_DAC_IRQHandler
 466    .thumb_set TMR6_DAC_IRQHandler,Default_Handler
 467
 468    .weak      TMR7_IRQHandler
 469    .thumb_set TMR7_IRQHandler,Default_Handler
 470
 471    .weak      DMA2_STR0_IRQHandler
 472    .thumb_set DMA2_STR0_IRQHandler,Default_Handler
 473
 474    .weak      DMA2_STR1_IRQHandler
 475    .thumb_set DMA2_STR1_IRQHandler,Default_Handler
 476
 477    .weak      DMA2_STR2_IRQHandler
 478    .thumb_set DMA2_STR2_IRQHandler,Default_Handler
 479
 480    .weak      DMA2_STR3_IRQHandler
 481    .thumb_set DMA2_STR3_IRQHandler,Default_Handler
 482
 483    .weak      DMA2_STR4_IRQHandler
 484    .thumb_set DMA2_STR4_IRQHandler,Default_Handler
 485
 486    .weak      CAN2_TX_IRQHandler
 487    .thumb_set CAN2_TX_IRQHandler,Default_Handler
 488
 489    .weak      CAN2_RX0_IRQHandler
 490    .thumb_set CAN2_RX0_IRQHandler,Default_Handler
 491
 492    .weak      CAN2_RX1_IRQHandler
 493    .thumb_set CAN2_RX1_IRQHandler,Default_Handler
 494
 495    .weak      CAN2_SCE_IRQHandler
 496    .thumb_set CAN2_SCE_IRQHandler,Default_Handler
 497
 498    .weak      OTG_FS_IRQHandler
 499    .thumb_set OTG_FS_IRQHandler,Default_Handler
 500
 501    .weak      DMA2_STR5_IRQHandler
 502    .thumb_set DMA2_STR5_IRQHandler,Default_Handler
 503
 504    .weak      DMA2_STR6_IRQHandler
 505    .thumb_set DMA2_STR6_IRQHandler,Default_Handler
 506
 507    .weak      DMA2_STR7_IRQHandler
 508    .thumb_set DMA2_STR7_IRQHandler,Default_Handler
 509
 510    .weak      USART6_IRQHandler
 511    .thumb_set USART6_IRQHandler,Default_Handler
 512
 513    .weak      I2C3_EV_IRQHandler
 514    .thumb_set I2C3_EV_IRQHandler,Default_Handler
 515
 516    .weak      I2C3_ER_IRQHandler
 517    .thumb_set I2C3_ER_IRQHandler,Default_Handler
 518
 519    .weak      OTG_HS1_EP1_OUT_IRQHandler
 520    .thumb_set OTG_HS1_EP1_OUT_IRQHandler,Default_Handler
 521
 522    .weak      OTG_HS1_EP1_IN_IRQHandler
 523    .thumb_set OTG_HS1_EP1_IN_IRQHandler,Default_Handler
 524
 525    .weak      OTG_HS1_WKUP_IRQHandler
 526    .thumb_set OTG_HS1_WKUP_IRQHandler,Default_Handler
 527
 528    .weak      OTG_HS1_IRQHandler
 529    .thumb_set OTG_HS1_IRQHandler,Default_Handler
 530
 531    .weak      HASH_RNG_IRQHandler
 532    .thumb_set HASH_RNG_IRQHandler,Default_Handler
 533
 534    .weak      FPU_IRQHandler
 535    .thumb_set FPU_IRQHandler,Default_Handler
 536
 537    .weak      SM3_IRQHandler
 538    .thumb_set SM3_IRQHandler,Default_Handler
 539
 540    .weak      SM4_IRQHandler
 541    .thumb_set SM4_IRQHandler,Default_Handler
 542
 543    .weak      BN_IRQHandler
 544    .thumb_set BN_IRQHandler,Default_Handler