lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_ll_utils.h
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   Header file of UTILS LL module.
   8   @verbatim
   9   ==============================================================================
  10                      ##### How to use this driver #####
  11   ==============================================================================
  12     [..]
  13     The LL UTILS driver contains a set of generic APIs that can be
  14     used by user:
  15       (+) Device electronic signature
  16       (+) Timing functions
  17       (+) PLL configuration functions
  18
  19   @endverbatim
  20   ******************************************************************************
  21   * @attention
  22   *
  23   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  24   *
  25   * Redistribution and use in source and binary forms, with or without modification,
  26   * are permitted provided that the following conditions are met:
  27   *   1. Redistributions of source code must retain the above copyright notice,
  28   *      this list of conditions and the following disclaimer.
  29   *   2. Redistributions in binary form must reproduce the above copyright notice,
  30   *      this list of conditions and the following disclaimer in the documentation
  31   *      and/or other materials provided with the distribution.
  32   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  33   *      may be used to endorse or promote products derived from this software
  34   *      without specific prior written permission.
  35   *
  36   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  37   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  38   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  39   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  40   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  41   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  42   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  43   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  44   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  45   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46   *
  47   ******************************************************************************
  48   */
  49
  50 /* Define to prevent recursive inclusion -------------------------------------*/
  51 #ifndef __STM32F1xx_LL_UTILS_H
  52 #define __STM32F1xx_LL_UTILS_H
  53
  54 #ifdef __cplusplus
  55 extern "C" {
  56 #endif
  57
  58 /* Includes ------------------------------------------------------------------*/
  59 #include "stm32f1xx.h"
  60
  61 /** @addtogroup STM32F1xx_LL_Driver
  62   * @{
  63   */
  64
  65 /** @defgroup UTILS_LL UTILS
  66   * @{
  67   */
  68
  69 /* Private types -------------------------------------------------------------*/
  70 /* Private variables ---------------------------------------------------------*/
  71
  72 /* Private constants ---------------------------------------------------------*/
  73 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
  74   * @{
  75   */
  76
  77 /* Max delay can be used in LL_mDelay */
  78 #define LL_MAX_DELAY                  0xFFFFFFFFU
  79
  80 /**
  81  * @brief Unique device ID register base address
  82  */
  83 #define UID_BASE_ADDRESS              UID_BASE
  84
  85 /**
  86  * @brief Flash size data register base address
  87  */
  88 #define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
  89
  90 /**
  91   * @}
  92   */
  93
  94 /* Private macros ------------------------------------------------------------*/
  95 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
  96   * @{
  97   */
  98 /**
  99   * @}
 100   */
 101 /* Exported types ------------------------------------------------------------*/
 102 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
 103   * @{
 104   */
 105 /**
 106   * @brief  UTILS PLL structure definition
 107   */
 108 typedef struct
 109 {
 110   uint32_t PLLMul;   /*!< Multiplication factor for PLL VCO input clock.
 111                           This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
 112
 113                           This feature can be modified afterwards using unitary function
 114                           @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 115
 116   uint32_t Prediv;   /*!< Division factor for HSE used as PLL clock source.
 117                           This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
 118
 119                           This feature can be modified afterwards using unitary function
 120                           @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 121 } LL_UTILS_PLLInitTypeDef;
 122
 123 /**
 124   * @brief  UTILS System, AHB and APB buses clock configuration structure definition
 125   */
 126 typedef struct
 127 {
 128   uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
 129                                        This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
 130
 131                                        This feature can be modified afterwards using unitary function
 132                                        @ref LL_RCC_SetAHBPrescaler(). */
 133
 134   uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
 135                                        This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
 136
 137                                        This feature can be modified afterwards using unitary function
 138                                        @ref LL_RCC_SetAPB1Prescaler(). */
 139
 140   uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
 141                                        This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
 142
 143                                        This feature can be modified afterwards using unitary function
 144                                        @ref LL_RCC_SetAPB2Prescaler(). */
 145
 146 } LL_UTILS_ClkInitTypeDef;
 147
 148 /**
 149   * @}
 150   */
 151
 152 /* Exported constants --------------------------------------------------------*/
 153 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
 154   * @{
 155   */
 156
 157 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
 158   * @{
 159   */
 160 #define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
 161 #define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
 162 /**
 163   * @}
 164   */
 165
 166 /**
 167   * @}
 168   */
 169
 170 /* Exported macro ------------------------------------------------------------*/
 171
 172 /* Exported functions --------------------------------------------------------*/
 173 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
 174   * @{
 175   */
 176
 177 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
 178   * @{
 179   */
 180
 181 /**
 182   * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
 183   * @retval UID[31:0]
 184   */
 185 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
 186 {
 187   return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
 188 }
 189
 190 /**
 191   * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
 192   * @retval UID[63:32]
 193   */
 194 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
 195 {
 196   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
 197 }
 198
 199 /**
 200   * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
 201   * @retval UID[95:64]
 202   */
 203 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
 204 {
 205   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
 206 }
 207
 208 /**
 209   * @brief  Get Flash memory size
 210   * @note   This bitfield indicates the size of the device Flash memory expressed in
 211   *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
 212   * @retval FLASH_SIZE[15:0]: Flash memory size
 213   */
 214 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
 215 {
 216   return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
 217 }
 218
 219
 220 /**
 221   * @}
 222   */
 223
 224 /** @defgroup UTILS_LL_EF_DELAY DELAY
 225   * @{
 226   */
 227
 228 /**
 229   * @brief  This function configures the Cortex-M SysTick source of the time base.
 230   * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
 231   * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
 232   *         configuration by calling this function, for a delay use rather osDelay RTOS service.
 233   * @param  Ticks Number of ticks
 234   * @retval None
 235   */
 236 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 237 {
 238   /* Configure the SysTick to have interrupt in 1ms time base */
 239   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
 240   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
 241   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 242                    SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
 243 }
 244
 245 void        LL_Init1msTick(uint32_t HCLKFrequency);
 246 void        LL_mDelay(uint32_t Delay);
 247
 248 /**
 249   * @}
 250   */
 251
 252 /** @defgroup UTILS_EF_SYSTEM SYSTEM
 253   * @{
 254   */
 255
 256 void        LL_SetSystemCoreClock(uint32_t HCLKFrequency);
 257 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 258                                          LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 259 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
 260                                          LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 261
 262 /**
 263   * @}
 264   */
 265
 266 /**
 267   * @}
 268   */
 269
 270 /**
 271   * @}
 272   */
 273
 274 /**
 275   * @}
 276   */
 277
 278 #ifdef __cplusplus
 279 }
 280 #endif
 281
 282 #endif /* __STM32F1xx_LL_UTILS_H */
 283
 284 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/