lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_wwdg.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_ll_wwdg.h
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   Header file of WWDG LL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_LL_WWDG_H
  40 #define __STM32F1xx_LL_WWDG_H
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f1xx.h"
  48
  49 /** @addtogroup STM32F1xx_LL_Driver
  50   * @{
  51   */
  52
  53 #if defined (WWDG)
  54
  55 /** @defgroup WWDG_LL WWDG
  56   * @{
  57   */
  58
  59 /* Private types -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61
  62 /* Private constants ---------------------------------------------------------*/
  63
  64 /* Private macros ------------------------------------------------------------*/
  65
  66 /* Exported types ------------------------------------------------------------*/
  67 /* Exported constants --------------------------------------------------------*/
  68 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
  69   * @{
  70   */
  71
  72
  73 /** @defgroup WWDG_LL_EC_IT IT Defines
  74   * @brief    IT defines which can be used with LL_WWDG_ReadReg and  LL_WWDG_WriteReg functions
  75   * @{
  76   */
  77 #define LL_WWDG_CFR_EWI                    WWDG_CFR_EWI
  78 /**
  79   * @}
  80   */
  81
  82 /** @defgroup WWDG_LL_EC_PRESCALER  PRESCALER
  83 * @{
  84 */
  85 #define LL_WWDG_PRESCALER_1                0x00000000U                                             /*!< WWDG counter clock = (PCLK1/4096)/1 */
  86 #define LL_WWDG_PRESCALER_2                WWDG_CFR_WDGTB_0                                        /*!< WWDG counter clock = (PCLK1/4096)/2 */
  87 #define LL_WWDG_PRESCALER_4                WWDG_CFR_WDGTB_1                                        /*!< WWDG counter clock = (PCLK1/4096)/4 */
  88 #define LL_WWDG_PRESCALER_8                (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1)                   /*!< WWDG counter clock = (PCLK1/4096)/8 */
  89 /**
  90   * @}
  91   */
  92
  93 /**
  94   * @}
  95   */
  96
  97 /* Exported macro ------------------------------------------------------------*/
  98 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
  99   * @{
 100   */
 101 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
 102   * @{
 103   */
 104 /**
 105   * @brief  Write a value in WWDG register
 106   * @param  __INSTANCE__ WWDG Instance
 107   * @param  __REG__ Register to be written
 108   * @param  __VALUE__ Value to be written in the register
 109   * @retval None
 110   */
 111 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
 112
 113 /**
 114   * @brief  Read a value in WWDG register
 115   * @param  __INSTANCE__ WWDG Instance
 116   * @param  __REG__ Register to be read
 117   * @retval Register value
 118   */
 119 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
 120 /**
 121   * @}
 122   */
 123
 124
 125 /**
 126   * @}
 127   */
 128
 129 /* Exported functions --------------------------------------------------------*/
 130 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
 131   * @{
 132   */
 133
 134 /** @defgroup WWDG_LL_EF_Configuration Configuration
 135   * @{
 136   */
 137 /**
 138   * @brief  Enable Window Watchdog. The watchdog is always disabled after a reset.
 139   * @note   It is enabled by setting the WDGA bit in the WWDG_CR register,
 140   *         then it cannot be disabled again except by a reset.
 141   *         This bit is set by software and only cleared by hardware after a reset.
 142   *         When WDGA = 1, the watchdog can generate a reset.
 143   * @rmtoll CR           WDGA          LL_WWDG_Enable
 144   * @param  WWDGx WWDG Instance
 145   * @retval None
 146   */
 147 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
 148 {
 149   SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
 150 }
 151
 152 /**
 153   * @brief  Checks if Window Watchdog is enabled
 154   * @rmtoll CR           WDGA          LL_WWDG_IsEnabled
 155   * @param  WWDGx WWDG Instance
 156   * @retval State of bit (1 or 0).
 157   */
 158 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
 159 {
 160   return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
 161 }
 162
 163 /**
 164   * @brief  Set the Watchdog counter value to provided value (7-bits T[6:0])
 165   * @note   When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
 166   *         This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
 167   *         A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
 168   *         Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
 169   * @rmtoll CR           T             LL_WWDG_SetCounter
 170   * @param  WWDGx WWDG Instance
 171   * @param  Counter 0..0x7F (7 bit counter value)
 172   * @retval None
 173   */
 174 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
 175 {
 176   MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
 177 }
 178
 179 /**
 180   * @brief  Return current Watchdog Counter Value (7 bits counter value)
 181   * @rmtoll CR           T             LL_WWDG_GetCounter
 182   * @param  WWDGx WWDG Instance
 183   * @retval 7 bit Watchdog Counter value
 184   */
 185 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
 186 {
 187   return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
 188 }
 189
 190 /**
 191   * @brief  Set the time base of the prescaler (WDGTB).
 192   * @note   Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
 193   *         is decremented every (4096 x 2expWDGTB) PCLK cycles
 194   * @rmtoll CFR          WDGTB         LL_WWDG_SetPrescaler
 195   * @param  WWDGx WWDG Instance
 196   * @param  Prescaler This parameter can be one of the following values:
 197   *         @arg @ref LL_WWDG_PRESCALER_1
 198   *         @arg @ref LL_WWDG_PRESCALER_2
 199   *         @arg @ref LL_WWDG_PRESCALER_4
 200   *         @arg @ref LL_WWDG_PRESCALER_8
 201   * @retval None
 202   */
 203 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
 204 {
 205   MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
 206 }
 207
 208 /**
 209   * @brief  Return current Watchdog Prescaler Value
 210   * @rmtoll CFR          WDGTB         LL_WWDG_GetPrescaler
 211   * @param  WWDGx WWDG Instance
 212   * @retval Returned value can be one of the following values:
 213   *         @arg @ref LL_WWDG_PRESCALER_1
 214   *         @arg @ref LL_WWDG_PRESCALER_2
 215   *         @arg @ref LL_WWDG_PRESCALER_4
 216   *         @arg @ref LL_WWDG_PRESCALER_8
 217   */
 218 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
 219 {
 220   return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
 221 }
 222
 223 /**
 224   * @brief  Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
 225   * @note   This window value defines when write in the WWDG_CR register
 226   *         to program Watchdog counter is allowed.
 227   *         Watchdog counter value update must occur only when the counter value
 228   *         is lower than the Watchdog window register value.
 229   *         Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
 230   *         (in the control register) is refreshed before the downcounter has reached
 231   *         the watchdog window register value.
 232   *         Physically is possible to set the Window lower then 0x40 but it is not recommended.
 233   *         To generate an immediate reset, it is possible to set the Counter lower than 0x40.
 234   * @rmtoll CFR          W             LL_WWDG_SetWindow
 235   * @param  WWDGx WWDG Instance
 236   * @param  Window 0x00..0x7F (7 bit Window value)
 237   * @retval None
 238   */
 239 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
 240 {
 241   MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
 242 }
 243
 244 /**
 245   * @brief  Return current Watchdog Window Value (7 bits value)
 246   * @rmtoll CFR          W             LL_WWDG_GetWindow
 247   * @param  WWDGx WWDG Instance
 248   * @retval 7 bit Watchdog Window value
 249   */
 250 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
 251 {
 252   return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
 253 }
 254
 255 /**
 256   * @}
 257   */
 258
 259 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
 260   * @{
 261   */
 262 /**
 263   * @brief  Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
 264   * @note   This bit is set by hardware when the counter has reached the value 0x40.
 265   *         It must be cleared by software by writing 0.
 266   *         A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
 267   * @rmtoll SR           EWIF          LL_WWDG_IsActiveFlag_EWKUP
 268   * @param  WWDGx WWDG Instance
 269   * @retval State of bit (1 or 0).
 270   */
 271 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
 272 {
 273   return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
 274 }
 275
 276 /**
 277   * @brief  Clear WWDG Early Wakeup Interrupt Flag (EWIF)
 278   * @rmtoll SR           EWIF          LL_WWDG_ClearFlag_EWKUP
 279   * @param  WWDGx WWDG Instance
 280   * @retval None
 281   */
 282 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
 283 {
 284   WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
 285 }
 286
 287 /**
 288   * @}
 289   */
 290
 291 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
 292   * @{
 293   */
 294 /**
 295   * @brief  Enable the Early Wakeup Interrupt.
 296   * @note   When set, an interrupt occurs whenever the counter reaches value 0x40.
 297   *         This interrupt is only cleared by hardware after a reset
 298   * @rmtoll CFR          EWI           LL_WWDG_EnableIT_EWKUP
 299   * @param  WWDGx WWDG Instance
 300   * @retval None
 301   */
 302 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
 303 {
 304   SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
 305 }
 306
 307 /**
 308   * @brief  Check if Early Wakeup Interrupt is enabled
 309   * @rmtoll CFR          EWI           LL_WWDG_IsEnabledIT_EWKUP
 310   * @param  WWDGx WWDG Instance
 311   * @retval State of bit (1 or 0).
 312   */
 313 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
 314 {
 315   return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
 316 }
 317
 318 /**
 319   * @}
 320   */
 321
 322 /**
 323   * @}
 324   */
 325
 326 /**
 327   * @}
 328   */
 329
 330 #endif /* WWDG */
 331
 332 /**
 333   * @}
 334   */
 335
 336 #ifdef __cplusplus
 337 }
 338 #endif
 339
 340 #endif /* __STM32F1xx_LL_WWDG_H */
 341
 342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/