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Increment eeprom version
[betaflight.git] / lib / main / STM32F1 / Drivers / STM32F1xx_HAL_Driver / Src / stm32f1xx_hal_dac.c
blobcfcce65df4f094b80af7fe31a113bc663760edf8
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_dac.c
4 * @author MCD Application Team
5 * @version V1.1.1
6 * @date 12-May-2017
7 * @brief DAC HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Digital to Analog Converter (DAC) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Errors functions
14 *
15 *
16 @verbatim
17 ==============================================================================
18 ##### DAC Peripheral features #####
19 ==============================================================================
20 [..]
21 *** DAC Channels ***
22 ====================
23 [..]
24 The device integrates two 12-bit Digital Analog Converters that can
25 be used independently or simultaneously (dual mode):
26 (#) DAC channel1 with DAC_OUT1 (PA4) as output
27 (#) DAC channel2 with DAC_OUT2 (PA5) as output
28
29 *** DAC Triggers ***
30 ====================
31 [..]
32 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
33 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
34 [..]
35 Digital to Analog conversion can be triggered by:
36 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
37 The used pin (GPIOx_PIN_9) must be configured in input mode.
38
39 (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7
40 For STM32F10x connectivity line devices and STM32F100x devices: TIM3
41 For STM32F10x high-density and XL-density devices: TIM8
42 For STM32F100x high-density value line devices: TIM15 as
43 replacement of TIM5.
44 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...)
45
46 (#) Software using DAC_TRIGGER_SOFTWARE
47
48 *** DAC Buffer mode feature ***
49 ===============================
50 [..]
51 Each DAC channel integrates an output buffer that can be used to
52 reduce the output impedance, and to drive external loads directly
53 without having to add an external operational amplifier.
54 To enable, the output buffer use
55 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
56 [..]
57 (@) Refer to the device datasheet for more details about output
58 impedance value with and without output buffer.
59
60 *** DAC connect feature ***
61 ===============================
62 [..]
63 Each DAC channel can be connected internally.
64 To connect, use
65 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
66
67 *** GPIO configurations guidelines ***
68 =====================
69 [..]
70 When a DAC channel is used (ex channel1 on PA4) and the other is not
71 (ex channel1 on PA5 is configured in Analog and disabled).
72 Channel1 may disturb channel2 as coupling effect.
73 Note that there is no coupling on channel2 as soon as channel2 is turned on.
74 Coupling on adjacent channel could be avoided as follows:
75 when unused PA5 is configured as INPUT PULL-UP or DOWN.
76 PA5 is configured in ANALOG just before it is turned on.
77
78 *** DAC wave generation feature ***
79 ===================================
80 [..]
81 Both DAC channels can be used to generate
82 (#) Noise wave using HAL_DACEx_NoiseWaveGenerate()
83 (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate()
84
85 *** DAC data format ***
86 =======================
87 [..]
88 The DAC data format can be:
89 (#) 8-bit right alignment using DAC_ALIGN_8B_R
90 (#) 12-bit left alignment using DAC_ALIGN_12B_L
91 (#) 12-bit right alignment using DAC_ALIGN_12B_R
92
93 *** DAC data value to voltage correspondance ***
94 ================================================
95 [..]
96 The analog output voltage on each DAC channel pin is determined
97 by the following equation:
98 [..]
99 DAC_OUTx = VREF+ * DOR / 4095
100 (+) with DOR is the Data Output Register
101 [..]
102 VEF+ is the input voltage reference (refer to the device datasheet)
103 [..]
104 e.g. To set DAC_OUT1 to 0.7V, use
105 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
106
107 *** DMA requests ***
108 =====================
109 [..]
110 A DMA1 request can be generated when an external trigger (but not
111 a software trigger) occurs if DMA1 requests are enabled using
112 HAL_DAC_Start_DMA()
113 [..]
114 DMA requests are mapped as following:
115 (#) DAC channel1 :
116 For STM32F100x low-density, medium-density, high-density with DAC
117 DMA remap:
118 mapped on DMA1 channel3 which must be
119 already configured
120 For STM32F100x high-density without DAC DMA remap and other
121 STM32F1 devices:
122 mapped on DMA2 channel3 which must be
123 already configured
124 (#) DAC channel2 :
125 For STM32F100x low-density, medium-density, high-density with DAC
126 DMA remap:
127 mapped on DMA1 channel4 which must be
128 already configured
129 For STM32F100x high-density without DAC DMA remap and other
130 STM32F1 devices:
131 mapped on DMA2 channel4 which must be
132 already configured
133
134 ##### How to use this driver #####
135 ==============================================================================
136 [..]
137 (+) DAC APB clock must be enabled to get write access to DAC
138 registers using HAL_DAC_Init()
139 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
140 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
141 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
142
143 *** Polling mode IO operation ***
144 =================================
145 [..]
146 (+) Start the DAC peripheral using HAL_DAC_Start()
147 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
148 (+) Stop the DAC peripheral using HAL_DAC_Stop()
149
150 *** DMA mode IO operation ***
151 ==============================
152 [..]
153 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
154 of data to be transferred at each end of conversion
155 (+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
156 function is executed and user can add his own code by customization of function pointer
157 HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2
158 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()
159 function is executed and user can add his own code by customization of function pointer
160 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
161 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can
162 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2
163 (+) For STM32F100x devices with specific feature: DMA underrun.
164 In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
165 HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
166 function is executed and user can add his own code by customization of function pointer
167 HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2
168 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
169 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
170
171 *** DAC HAL driver macros list ***
172 =============================================
173 [..]
174 Below the list of most used macros in DAC HAL driver.
175
176 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
177 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
178 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun)
179 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun)
180
181 [..]
182 (@) You can refer to the DAC HAL driver header file for more useful macros
183
184 @endverbatim
185 ******************************************************************************
186 * @attention
187 *
188 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
189 *
190 * Redistribution and use in source and binary forms, with or without modification,
191 * are permitted provided that the following conditions are met:
192 * 1. Redistributions of source code must retain the above copyright notice,
193 * this list of conditions and the following disclaimer.
194 * 2. Redistributions in binary form must reproduce the above copyright notice,
195 * this list of conditions and the following disclaimer in the documentation
196 * and/or other materials provided with the distribution.
197 * 3. Neither the name of STMicroelectronics nor the names of its contributors
198 * may be used to endorse or promote products derived from this software
199 * without specific prior written permission.
200 *
201 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
202 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
203 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
204 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
205 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
206 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
207 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
208 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
209 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
210 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
211 *
212 ******************************************************************************
213 */
214
215
216 /* Includes ------------------------------------------------------------------*/
217 #include "stm32f1xx_hal.h"
218
219 /** @addtogroup STM32F1xx_HAL_Driver
220 * @{
221 */
222
223 /** @defgroup DAC DAC
224 * @brief DAC driver modules
225 * @{
226 */
227
228 #ifdef HAL_DAC_MODULE_ENABLED
229 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
230
231 /* Private typedef -----------------------------------------------------------*/
232 /* Private define ------------------------------------------------------------*/
233 /* Private macro -------------------------------------------------------------*/
234 /* Private variables ---------------------------------------------------------*/
235 /* Private function prototypes -----------------------------------------------*/
236 /* Exported functions -------------------------------------------------------*/
237
238 /** @defgroup DAC_Exported_Functions DAC Exported Functions
239 * @{
240 */
241
242 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
243 * @brief Initialization and Configuration functions
244 *
245 @verbatim
246 ==============================================================================
247 ##### Initialization and de-initialization functions #####
248 ==============================================================================
249 [..] This section provides functions allowing to:
250 (+) Initialize and configure the DAC.
251 (+) De-initialize the DAC.
252
253 @endverbatim
254 * @{
255 */
256
257 /**
258 * @brief Initializes the DAC peripheral according to the specified parameters
259 * in the DAC_InitStruct.
260 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
261 * the configuration information for the specified DAC.
262 * @retval HAL status
263 */
264 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
265 {
266 /* Check DAC handle */
267 if(hdac == NULL)
268 {
269 return HAL_ERROR;
270 }
271 /* Check the parameters */
272 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
273
274 if(hdac->State == HAL_DAC_STATE_RESET)
275 {
276 /* Allocate lock resource and initialize it */
277 hdac->Lock = HAL_UNLOCKED;
278
279 /* Init the low level hardware */
280 HAL_DAC_MspInit(hdac);
281 }
282
283 /* Initialize the DAC state*/
284 hdac->State = HAL_DAC_STATE_BUSY;
285
286 /* Set DAC error code to none */
287 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
288
289 /* Initialize the DAC state*/
290 hdac->State = HAL_DAC_STATE_READY;
291
292 /* Return function status */
293 return HAL_OK;
294 }
295
296 /**
297 * @brief Deinitializes the DAC peripheral registers to their default reset values.
298 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
299 * the configuration information for the specified DAC.
300 * @retval HAL status
301 */
302 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
303 {
304 /* Check DAC handle */
305 if(hdac == NULL)
306 {
307 return HAL_ERROR;
308 }
309
310 /* Check the parameters */
311 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
312
313 /* Change DAC state */
314 hdac->State = HAL_DAC_STATE_BUSY;
315
316 /* DeInit the low level hardware */
317 HAL_DAC_MspDeInit(hdac);
318
319 /* Set DAC error code to none */
320 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
321
322 /* Change DAC state */
323 hdac->State = HAL_DAC_STATE_RESET;
324
325 /* Release Lock */
326 __HAL_UNLOCK(hdac);
327
328 /* Return function status */
329 return HAL_OK;
330 }
331
332 /**
333 * @brief Initializes the DAC MSP.
334 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
335 * the configuration information for the specified DAC.
336 * @retval None
337 */
338 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
339 {
340 /* Prevent unused argument(s) compilation warning */
341 UNUSED(hdac);
342 /* NOTE : This function Should not be modified, when the callback is needed,
343 the HAL_DAC_MspInit could be implemented in the user file
344 */
345 }
346
347 /**
348 * @brief DeInitializes the DAC MSP.
349 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
350 * the configuration information for the specified DAC.
351 * @retval None
352 */
353 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
354 {
355 /* Prevent unused argument(s) compilation warning */
356 UNUSED(hdac);
357 /* NOTE : This function Should not be modified, when the callback is needed,
358 the HAL_DAC_MspDeInit could be implemented in the user file
359 */
360 }
361
362 /**
363 * @}
364 */
365
366 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
367 * @brief IO operation functions
368 *
369 @verbatim
370 ==============================================================================
371 ##### IO operation functions #####
372 ==============================================================================
373 [..] This section provides functions allowing to:
374 (+) Start conversion.
375 (+) Stop conversion.
376 (+) Start conversion and enable DMA transfer.
377 (+) Stop conversion and disable DMA transfer.
378 (+) Get result of conversion.
379
380 @endverbatim
381 * @{
382 */
383
384 /**
385 * @brief Enables DAC and starts conversion of channel.
386 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
387 * the configuration information for the specified DAC.
388 * @param Channel: The selected DAC channel.
389 * This parameter can be one of the following values:
390 * @arg DAC_CHANNEL_1: DAC Channel1 selected
391 * @arg DAC_CHANNEL_2: DAC Channel2 selected
392 * @retval HAL status
393 */
394 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
395 {
396 /* Check the parameters */
397 assert_param(IS_DAC_CHANNEL(Channel));
398
399 /* Process locked */
400 __HAL_LOCK(hdac);
401
402 /* Change DAC state */
403 hdac->State = HAL_DAC_STATE_BUSY;
404
405 /* Enable the Peripharal */
406 __HAL_DAC_ENABLE(hdac, Channel);
407
408 if(Channel == DAC_CHANNEL_1)
409 {
410 /* Check if software trigger enabled */
411 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
412 {
413 /* Enable the selected DAC software conversion */
414 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
415 }
416 }
417 else
418 {
419 /* Check if software trigger enabled */
420 if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
421 {
422 /* Enable the selected DAC software conversion*/
423 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
424 }
425 }
426
427 /* Change DAC state */
428 hdac->State = HAL_DAC_STATE_READY;
429
430 /* Process unlocked */
431 __HAL_UNLOCK(hdac);
432
433 /* Return function status */
434 return HAL_OK;
435 }
436
437 /**
438 * @brief Disables DAC and stop conversion of channel.
439 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
440 * the configuration information for the specified DAC.
441 * @param Channel: The selected DAC channel.
442 * This parameter can be one of the following values:
443 * @arg DAC_CHANNEL_1: DAC Channel1 selected
444 * @arg DAC_CHANNEL_2: DAC Channel2 selected
445 * @retval HAL status
446 */
447 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
448 {
449 /* Check the parameters */
450 assert_param(IS_DAC_CHANNEL(Channel));
451
452 /* Disable the Peripheral */
453 __HAL_DAC_DISABLE(hdac, Channel);
454
455 /* Change DAC state */
456 hdac->State = HAL_DAC_STATE_READY;
457
458 /* Return function status */
459 return HAL_OK;
460 }
461
462 /**
463 * @brief Enables DAC and starts conversion of channel.
464 * Note: For STM32F100x devices with specific feature: DMA underrun.
465 * On these devices, this function enables the interruption of DMA
466 * underrun.
467 * (refer to redefinition of this function in DAC extended file)
468 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
469 * the configuration information for the specified DAC.
470 * @param Channel: The selected DAC channel.
471 * This parameter can be one of the following values:
472 * @arg DAC_CHANNEL_1: DAC Channel1 selected
473 * @arg DAC_CHANNEL_2: DAC Channel2 selected
474 * @param pData: The Source memory Buffer address.
475 * @param Length: The length of data to be transferred from memory to DAC peripheral
476 * @param Alignment: Specifies the data alignment for DAC channel.
477 * This parameter can be one of the following values:
478 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
479 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
480 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
481 * @retval HAL status
482 */
483 __weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
484 {
485 uint32_t tmpreg = 0U;
486
487 /* Check the parameters */
488 assert_param(IS_DAC_CHANNEL(Channel));
489 assert_param(IS_DAC_ALIGN(Alignment));
490
491 /* Process locked */
492 __HAL_LOCK(hdac);
493
494 /* Change DAC state */
495 hdac->State = HAL_DAC_STATE_BUSY;
496
497 if(Channel == DAC_CHANNEL_1)
498 {
499 /* Set the DMA transfer complete callback for channel1 */
500 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
501
502 /* Set the DMA half transfer complete callback for channel1 */
503 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
504
505 /* Set the DMA error callback for channel1 */
506 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
507
508 /* Enable the selected DAC channel1 DMA request */
509 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
510
511 /* Case of use of channel 1 */
512 switch(Alignment)
513 {
514 case DAC_ALIGN_12B_R:
515 /* Get DHR12R1 address */
516 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
517 break;
518 case DAC_ALIGN_12B_L:
519 /* Get DHR12L1 address */
520 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
521 break;
522 case DAC_ALIGN_8B_R:
523 /* Get DHR8R1 address */
524 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
525 break;
526 default:
527 break;
528 }
529 }
530 else
531 {
532 /* Set the DMA transfer complete callback for channel2 */
533 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
534
535 /* Set the DMA half transfer complete callback for channel2 */
536 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
537
538 /* Set the DMA error callback for channel2 */
539 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
540
541 /* Enable the selected DAC channel2 DMA request */
542 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
543
544 /* Case of use of channel 2 */
545 switch(Alignment)
546 {
547 case DAC_ALIGN_12B_R:
548 /* Get DHR12R2 address */
549 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
550 break;
551 case DAC_ALIGN_12B_L:
552 /* Get DHR12L2 address */
553 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
554 break;
555 case DAC_ALIGN_8B_R:
556 /* Get DHR8R2 address */
557 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
558 break;
559 default:
560 break;
561 }
562 }
563
564 /* Enable the DMA channel */
565 if(Channel == DAC_CHANNEL_1)
566 {
567 /* Enable the DMA channel */
568 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
569 }
570 else
571 {
572 /* Enable the DMA channel */
573 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
574 }
575
576 /* Process Unlocked */
577 __HAL_UNLOCK(hdac);
578
579 /* Enable the Peripharal */
580 __HAL_DAC_ENABLE(hdac, Channel);
581
582 /* Return function status */
583 return HAL_OK;
584 }
585
586 /**
587 * @brief Disables DAC and stop conversion of channel.
588 * Note: For STM32F100x devices with specific feature: DMA underrun.
589 * On these devices, this function disables the interruption of DMA
590 * underrun.
591 * (refer to redefinition of this function in DAC extended file)
592 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
593 * the configuration information for the specified DAC.
594 * @param Channel: The selected DAC channel.
595 * This parameter can be one of the following values:
596 * @arg DAC_CHANNEL_1: DAC Channel1 selected
597 * @arg DAC_CHANNEL_2: DAC Channel2 selected
598 * @retval HAL status
599 */
600 __weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
601 {
602 HAL_StatusTypeDef status = HAL_OK;
603
604 /* Check the parameters */
605 assert_param(IS_DAC_CHANNEL(Channel));
606
607 /* Disable the selected DAC channel DMA request */
608 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel);
609
610 /* Disable the Peripharal */
611 __HAL_DAC_DISABLE(hdac, Channel);
612
613 /* Disable the DMA Channel */
614 /* Channel1 is used */
615 if (Channel == DAC_CHANNEL_1)
616 {
617 status = HAL_DMA_Abort(hdac->DMA_Handle1);
618 }
619 else /* Channel2 is used for */
620 {
621 status = HAL_DMA_Abort(hdac->DMA_Handle2);
622 }
623
624 /* Check if DMA Channel effectively disabled */
625 if (status != HAL_OK)
626 {
627 /* Update ADC state machine to error */
628 hdac->State = HAL_DAC_STATE_ERROR;
629 }
630 else
631 {
632 /* Change DAC state */
633 hdac->State = HAL_DAC_STATE_READY;
634 }
635
636 /* Return function status */
637 return status;
638 }
639
640 /**
641 * @brief Returns the last data output value of the selected DAC channel.
642 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
643 * the configuration information for the specified DAC.
644 * @param Channel: The selected DAC channel.
645 * This parameter can be one of the following values:
646 * @arg DAC_CHANNEL_1: DAC Channel1 selected
647 * @arg DAC_CHANNEL_2: DAC Channel2 selected
648 * @retval The selected DAC channel data output value.
649 */
650 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
651 {
652 /* Check the parameters */
653 assert_param(IS_DAC_CHANNEL(Channel));
654
655 /* Returns the DAC channel data output register value */
656 if(Channel == DAC_CHANNEL_1)
657 {
658 return hdac->Instance->DOR1;
659 }
660 else
661 {
662 return hdac->Instance->DOR2;
663 }
664 }
665
666 /**
667 * @brief Conversion complete callback in non blocking mode for Channel1
668 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
669 * the configuration information for the specified DAC.
670 * @retval None
671 */
672 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
673 {
674 /* Prevent unused argument(s) compilation warning */
675 UNUSED(hdac);
676 /* NOTE : This function Should not be modified, when the callback is needed,
677 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
678 */
679 }
680
681 /**
682 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1
683 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
684 * the configuration information for the specified DAC.
685 * @retval None
686 */
687 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
688 {
689 /* Prevent unused argument(s) compilation warning */
690 UNUSED(hdac);
691 /* NOTE : This function Should not be modified, when the callback is needed,
692 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
693 */
694 }
695
696 /**
697 * @brief Error DAC callback for Channel1.
698 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
699 * the configuration information for the specified DAC.
700 * @retval None
701 */
702 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
703 {
704 /* Prevent unused argument(s) compilation warning */
705 UNUSED(hdac);
706 /* NOTE : This function Should not be modified, when the callback is needed,
707 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
708 */
709 }
710
711 /**
712 * @}
713 */
714
715 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
716 * @brief Peripheral Control functions
717 *
718 @verbatim
719 ==============================================================================
720 ##### Peripheral Control functions #####
721 ==============================================================================
722 [..] This section provides functions allowing to:
723 (+) Configure channels.
724 (+) Set the specified data holding register value for DAC channel.
725
726 @endverbatim
727 * @{
728 */
729
730 /**
731 * @brief Configures the selected DAC channel.
732 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
733 * the configuration information for the specified DAC.
734 * @param sConfig: DAC configuration structure.
735 * @param Channel: The selected DAC channel.
736 * This parameter can be one of the following values:
737 * @arg DAC_CHANNEL_1: DAC Channel1 selected
738 * @arg DAC_CHANNEL_2: DAC Channel2 selected
739 * @retval HAL status
740 */
741 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
742 {
743 uint32_t tmpreg1 = 0U;
744
745 /* Check the DAC parameters */
746 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
747 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
748 assert_param(IS_DAC_CHANNEL(Channel));
749
750 /* Process locked */
751 __HAL_LOCK(hdac);
752
753 /* Change DAC state */
754 hdac->State = HAL_DAC_STATE_BUSY;
755
756 /* Configure for the selected DAC channel: buffer output, trigger */
757 /* Set TSELx and TENx bits according to DAC_Trigger value */
758 /* Set BOFFx bit according to DAC_OutputBuffer value */
759 SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer));
760
761 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
762 /* Calculate CR register value depending on DAC_Channel */
763 MODIFY_REG(hdac->Instance->CR,
764 ((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel,
765 tmpreg1 << Channel);
766
767 /* Disable wave generation */
768 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
769
770 /* Change DAC state */
771 hdac->State = HAL_DAC_STATE_READY;
772
773 /* Process unlocked */
774 __HAL_UNLOCK(hdac);
775
776 /* Return function status */
777 return HAL_OK;
778 }
779
780 /**
781 * @brief Set the specified data holding register value for DAC channel.
782 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
783 * the configuration information for the specified DAC.
784 * @param Channel: The selected DAC channel.
785 * This parameter can be one of the following values:
786 * @arg DAC_CHANNEL_1: DAC Channel1 selected
787 * @arg DAC_CHANNEL_2: DAC Channel2 selected
788 * @param Alignment: Specifies the data alignment.
789 * This parameter can be one of the following values:
790 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
791 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
792 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
793 * @param Data: Data to be loaded in the selected data holding register.
794 * @retval HAL status
795 */
796 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
797 {
798 __IO uint32_t tmp = 0U;
799
800 /* Check the parameters */
801 assert_param(IS_DAC_CHANNEL(Channel));
802 assert_param(IS_DAC_ALIGN(Alignment));
803 assert_param(IS_DAC_DATA(Data));
804
805 tmp = (uint32_t)hdac->Instance;
806 if(Channel == DAC_CHANNEL_1)
807 {
808 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
809 }
810 else
811 {
812 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
813 }
814
815 /* Set the DAC channel selected data holding register */
816 *(__IO uint32_t *) tmp = Data;
817
818 /* Return function status */
819 return HAL_OK;
820 }
821
822 /**
823 * @}
824 */
825
826 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
827 * @brief Peripheral State and Errors functions
828 *
829 @verbatim
830 ==============================================================================
831 ##### Peripheral State and Errors functions #####
832 ==============================================================================
833 [..]
834 This subsection provides functions allowing to
835 (+) Check the DAC state.
836 (+) Check the DAC Errors.
837
838 @endverbatim
839 * @{
840 */
841
842 /**
843 * @brief return the DAC state
844 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
845 * the configuration information for the specified DAC.
846 * @retval HAL state
847 */
848 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
849 {
850 /* Return DAC state */
851 return hdac->State;
852 }
853
854
855 /**
856 * @brief Return the DAC error code
857 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
858 * the configuration information for the specified DAC.
859 * @retval DAC Error Code
860 */
861 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
862 {
863 return hdac->ErrorCode;
864 }
865
866 /**
867 * @}
868 */
869
870 /**
871 * @}
872 */
873
874 /** @addtogroup DAC_Private_Functions
875 * @{
876 */
877
878 /**
879 * @brief DMA conversion complete callback.
880 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
881 * the configuration information for the specified DMA module.
882 * @retval None
883 */
884 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
885 {
886 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
887
888 HAL_DAC_ConvCpltCallbackCh1(hdac);
889
890 hdac->State = HAL_DAC_STATE_READY;
891 }
892
893 /**
894 * @brief DMA half transfer complete callback.
895 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
896 * the configuration information for the specified DMA module.
897 * @retval None
898 */
899 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
900 {
901 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
902 /* Conversion complete callback */
903 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
904 }
905
906 /**
907 * @brief DMA error callback
908 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
909 * the configuration information for the specified DMA module.
910 * @retval None
911 */
912 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
913 {
914 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
915
916 /* Set DAC error code to DMA error */
917 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
918
919 HAL_DAC_ErrorCallbackCh1(hdac);
920
921 hdac->State = HAL_DAC_STATE_READY;
922 }
923
924 /**
925 * @}
926 */
927
928 #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
929 #endif /* HAL_DAC_MODULE_ENABLED */
930
931 /**
932 * @}
933 */
934
935 /**
936 * @}
937 */
938
939 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/