lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_dma.c
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   DMA HAL module driver.
   8   *         This file provides firmware functions to manage the following
   9   *         functionalities of the Direct Memory Access (DMA) peripheral:
  10   *           + Initialization and de-initialization functions
  11   *           + IO operation functions
  12   *           + Peripheral State and errors functions
  13   @verbatim
  14   ==============================================================================
  15                         ##### How to use this driver #####
  16   ==============================================================================
  17   [..]
  18    (#) Enable and configure the peripheral to be connected to the DMA Channel
  19        (except for internal SRAM / FLASH memories: no initialization is
  20        necessary). Please refer to the Reference manual for connection between peripherals
  21        and DMA requests.
  22
  23    (#) For a given Channel, program the required configuration through the following parameters:
  24        Channel request, Transfer Direction, Source and Destination data formats,
  25        Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
  26        using HAL_DMA_Init() function.
  27
  28    (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  29        detection.
  30
  31    (#) Use HAL_DMA_Abort() function to abort the current transfer
  32
  33      -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.
  34      *** Polling mode IO operation ***
  35      =================================
  36     [..]
  37           (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  38               address and destination address and the Length of data to be transferred
  39           (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  40               case a fixed Timeout can be configured by User depending from his application.
  41
  42      *** Interrupt mode IO operation ***
  43      ===================================
  44     [..]
  45           (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  46           (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  47           (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  48               Source address and destination address and the Length of data to be transferred.
  49               In this case the DMA interrupt is configured
  50           (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  51           (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  52               add his own function by customization of function pointer XferCpltCallback and
  53               XferErrorCallback (i.e. a member of DMA handle structure).
  54
  55      *** DMA HAL driver macros list ***
  56      =============================================
  57       [..]
  58        Below the list of most used macros in DMA HAL driver.
  59
  60        (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
  61        (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
  62        (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
  63        (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
  64        (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
  65        (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
  66        (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
  67
  68      [..]
  69       (@) You can refer to the DMA HAL driver header file for more useful macros
  70
  71   @endverbatim
  72   ******************************************************************************
  73   * @attention
  74   *
  75   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  76   *
  77   * Redistribution and use in source and binary forms, with or without modification,
  78   * are permitted provided that the following conditions are met:
  79   *   1. Redistributions of source code must retain the above copyright notice,
  80   *      this list of conditions and the following disclaimer.
  81   *   2. Redistributions in binary form must reproduce the above copyright notice,
  82   *      this list of conditions and the following disclaimer in the documentation
  83   *      and/or other materials provided with the distribution.
  84   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  85   *      may be used to endorse or promote products derived from this software
  86   *      without specific prior written permission.
  87   *
  88   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  89   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  90   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  91   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  92   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  93   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  94   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  95   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  96   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  97   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  98   *
  99   ******************************************************************************
 100   */
 101
 102 /* Includes ------------------------------------------------------------------*/
 103 #include "stm32f1xx_hal.h"
 104
 105 /** @addtogroup STM32F1xx_HAL_Driver
 106   * @{
 107   */
 108
 109 /** @defgroup DMA DMA
 110   * @brief DMA HAL module driver
 111   * @{
 112   */
 113
 114 #ifdef HAL_DMA_MODULE_ENABLED
 115
 116 /* Private typedef -----------------------------------------------------------*/
 117 /* Private define ------------------------------------------------------------*/
 118 /* Private macro -------------------------------------------------------------*/
 119 /* Private variables ---------------------------------------------------------*/
 120 /* Private function prototypes -----------------------------------------------*/
 121 /** @defgroup DMA_Private_Functions DMA Private Functions
 122   * @{
 123   */
 124 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
 125 /**
 126   * @}
 127   */
 128
 129 /* Exported functions ---------------------------------------------------------*/
 130
 131 /** @defgroup DMA_Exported_Functions DMA Exported Functions
 132   * @{
 133   */
 134
 135 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
 136   *  @brief   Initialization and de-initialization functions
 137   *
 138 @verbatim
 139  ===============================================================================
 140              ##### Initialization and de-initialization functions  #####
 141  ===============================================================================
 142     [..]
 143     This section provides functions allowing to initialize the DMA Channel source
 144     and destination addresses, incrementation and data sizes, transfer direction,
 145     circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
 146     [..]
 147     The HAL_DMA_Init() function follows the DMA configuration procedures as described in
 148     reference manual.
 149
 150 @endverbatim
 151   * @{
 152   */
 153
 154 /**
 155   * @brief  Initialize the DMA according to the specified
 156   *         parameters in the DMA_InitTypeDef and initialize the associated handle.
 157   * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
 158   *               the configuration information for the specified DMA Channel.
 159   * @retval HAL status
 160   */
 161 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
 162 {
 163   uint32_t tmp = 0U;
 164
 165   /* Check the DMA handle allocation */
 166   if(hdma == NULL)
 167   {
 168     return HAL_ERROR;
 169   }
 170
 171   /* Check the parameters */
 172   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
 173   assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
 174   assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
 175   assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
 176   assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
 177   assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
 178   assert_param(IS_DMA_MODE(hdma->Init.Mode));
 179   assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
 180
 181 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
 182   /* calculation of the channel index */
 183   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 184   {
 185     /* DMA1 */
 186     hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 187     hdma->DmaBaseAddress = DMA1;
 188   }
 189   else
 190   {
 191     /* DMA2 */
 192     hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 193     hdma->DmaBaseAddress = DMA2;
 194   }
 195 #else
 196   /* DMA1 */
 197   hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 198   hdma->DmaBaseAddress = DMA1;
 199 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F100xE || STM32F105xC || STM32F107xC */
 200
 201   /* Change DMA peripheral state */
 202   hdma->State = HAL_DMA_STATE_BUSY;
 203
 204   /* Get the CR register value */
 205   tmp = hdma->Instance->CCR;
 206
 207   /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
 208   tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 209                       DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
 210                       DMA_CCR_DIR));
 211
 212   /* Prepare the DMA Channel configuration */
 213   tmp |=  hdma->Init.Direction        |
 214           hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 215           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 216           hdma->Init.Mode                | hdma->Init.Priority;
 217
 218   /* Write to DMA Channel CR register */
 219   hdma->Instance->CCR = tmp;
 220
 221
 222   /* Clean callbacks */
 223   hdma->XferCpltCallback = NULL;
 224   hdma->XferHalfCpltCallback = NULL;
 225   hdma->XferErrorCallback = NULL;
 226   hdma->XferAbortCallback = NULL;
 227
 228   /* Initialise the error code */
 229   hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 230
 231   /* Initialize the DMA state*/
 232   hdma->State = HAL_DMA_STATE_READY;
 233   /* Allocate lock resource and initialize it */
 234   hdma->Lock = HAL_UNLOCKED;
 235
 236   return HAL_OK;
 237 }
 238
 239 /**
 240   * @brief  DeInitialize the DMA peripheral.
 241   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 242   *               the configuration information for the specified DMA Channel.
 243   * @retval HAL status
 244   */
 245 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
 246 {
 247   /* Check the DMA handle allocation */
 248   if(hdma == NULL)
 249   {
 250     return HAL_ERROR;
 251   }
 252
 253   /* Check the parameters */
 254   assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
 255
 256   /* Disable the selected DMA Channelx */
 257   __HAL_DMA_DISABLE(hdma);
 258
 259   /* Reset DMA Channel control register */
 260   hdma->Instance->CCR  = 0U;
 261
 262   /* Reset DMA Channel Number of Data to Transfer register */
 263   hdma->Instance->CNDTR = 0U;
 264
 265   /* Reset DMA Channel peripheral address register */
 266   hdma->Instance->CPAR  = 0U;
 267
 268   /* Reset DMA Channel memory address register */
 269   hdma->Instance->CMAR = 0U;
 270
 271 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
 272   /* calculation of the channel index */
 273   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 274   {
 275     /* DMA1 */
 276     hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 277     hdma->DmaBaseAddress = DMA1;
 278   }
 279   else
 280   {
 281     /* DMA2 */
 282     hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 283     hdma->DmaBaseAddress = DMA2;
 284   }
 285 #else
 286   /* DMA1 */
 287   hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 288   hdma->DmaBaseAddress = DMA1;
 289 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F100xE || STM32F105xC || STM32F107xC */
 290
 291   /* Clear all flags */
 292   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex));
 293
 294   /* Initialize the error code */
 295   hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 296
 297   /* Initialize the DMA state */
 298   hdma->State = HAL_DMA_STATE_RESET;
 299
 300   /* Release Lock */
 301   __HAL_UNLOCK(hdma);
 302
 303   return HAL_OK;
 304 }
 305
 306 /**
 307   * @}
 308   */
 309
 310 /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
 311   *  @brief   Input and Output operation functions
 312   *
 313 @verbatim
 314  ===============================================================================
 315                       #####  IO operation functions  #####
 316  ===============================================================================
 317     [..]  This section provides functions allowing to:
 318       (+) Configure the source, destination address and data length and Start DMA transfer
 319       (+) Configure the source, destination address and data length and
 320           Start DMA transfer with interrupt
 321       (+) Abort DMA transfer
 322       (+) Poll for transfer complete
 323       (+) Handle DMA interrupt request
 324
 325 @endverbatim
 326   * @{
 327   */
 328
 329 /**
 330   * @brief  Start the DMA Transfer.
 331   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 332   *               the configuration information for the specified DMA Channel.
 333   * @param  SrcAddress: The source memory Buffer address
 334   * @param  DstAddress: The destination memory Buffer address
 335   * @param  DataLength: The length of data to be transferred from source to destination
 336   * @retval HAL status
 337   */
 338 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 339 {
 340   HAL_StatusTypeDef status = HAL_OK;
 341
 342   /* Check the parameters */
 343   assert_param(IS_DMA_BUFFER_SIZE(DataLength));
 344
 345   /* Process locked */
 346   __HAL_LOCK(hdma);
 347
 348   if(HAL_DMA_STATE_READY == hdma->State)
 349   {
 350     /* Change DMA peripheral state */
 351     hdma->State = HAL_DMA_STATE_BUSY;
 352     hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 353
 354     /* Disable the peripheral */
 355     __HAL_DMA_DISABLE(hdma);
 356
 357     /* Configure the source, destination address and the data length & clear flags*/
 358     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
 359
 360     /* Enable the Peripheral */
 361     __HAL_DMA_ENABLE(hdma);
 362   }
 363   else
 364   {
 365    /* Process Unlocked */
 366    __HAL_UNLOCK(hdma);
 367    status = HAL_BUSY;
 368   }
 369   return status;
 370 }
 371
 372 /**
 373   * @brief  Start the DMA Transfer with interrupt enabled.
 374   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 375   *               the configuration information for the specified DMA Channel.
 376   * @param  SrcAddress: The source memory Buffer address
 377   * @param  DstAddress: The destination memory Buffer address
 378   * @param  DataLength: The length of data to be transferred from source to destination
 379   * @retval HAL status
 380   */
 381 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 382 {
 383   HAL_StatusTypeDef status = HAL_OK;
 384
 385   /* Check the parameters */
 386   assert_param(IS_DMA_BUFFER_SIZE(DataLength));
 387
 388   /* Process locked */
 389   __HAL_LOCK(hdma);
 390
 391   if(HAL_DMA_STATE_READY == hdma->State)
 392   {
 393     /* Change DMA peripheral state */
 394     hdma->State = HAL_DMA_STATE_BUSY;
 395     hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 396
 397     /* Disable the peripheral */
 398     __HAL_DMA_DISABLE(hdma);
 399
 400     /* Configure the source, destination address and the data length & clear flags*/
 401     DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
 402
 403     /* Enable the transfer complete interrupt */
 404     /* Enable the transfer Error interrupt */
 405     if(NULL != hdma->XferHalfCpltCallback)
 406     {
 407       /* Enable the Half transfer complete interrupt as well */
 408       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 409     }
 410     else
 411     {
 412       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 413       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 414     }
 415     /* Enable the Peripheral */
 416     __HAL_DMA_ENABLE(hdma);
 417   }
 418   else
 419   {
 420     /* Process Unlocked */
 421     __HAL_UNLOCK(hdma);
 422
 423     /* Remain BUSY */
 424     status = HAL_BUSY;
 425   }
 426   return status;
 427 }
 428
 429 /**
 430   * @brief  Abort the DMA Transfer.
 431   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 432   *               the configuration information for the specified DMA Channel.
 433   * @retval HAL status
 434   */
 435 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
 436 {
 437   HAL_StatusTypeDef status = HAL_OK;
 438
 439   /* Disable DMA IT */
 440   __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 441
 442   /* Disable the channel */
 443   __HAL_DMA_DISABLE(hdma);
 444
 445   /* Clear all flags */
 446   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 447
 448   /* Change the DMA state */
 449   hdma->State = HAL_DMA_STATE_READY;
 450
 451   /* Process Unlocked */
 452   __HAL_UNLOCK(hdma);
 453
 454   return status;
 455 }
 456
 457 /**
 458   * @brief  Aborts the DMA Transfer in Interrupt mode.
 459   * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
 460   *                 the configuration information for the specified DMA Channel.
 461   * @retval HAL status
 462   */
 463 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
 464 {
 465   HAL_StatusTypeDef status = HAL_OK;
 466
 467   if(HAL_DMA_STATE_BUSY != hdma->State)
 468   {
 469     /* no transfer ongoing */
 470     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 471
 472     status = HAL_ERROR;
 473   }
 474   else
 475   {
 476     /* Disable DMA IT */
 477     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 478
 479     /* Disable the channel */
 480     __HAL_DMA_DISABLE(hdma);
 481
 482     /* Clear all flags */
 483     __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 484
 485     /* Change the DMA state */
 486     hdma->State = HAL_DMA_STATE_READY;
 487
 488     /* Process Unlocked */
 489     __HAL_UNLOCK(hdma);
 490
 491     /* Call User Abort callback */
 492     if(hdma->XferAbortCallback != NULL)
 493     {
 494       hdma->XferAbortCallback(hdma);
 495     }
 496   }
 497   return status;
 498 }
 499
 500 /**
 501   * @brief  Polling for transfer complete.
 502   * @param  hdma:    pointer to a DMA_HandleTypeDef structure that contains
 503   *                  the configuration information for the specified DMA Channel.
 504   * @param  CompleteLevel: Specifies the DMA level complete.
 505   * @param  Timeout:       Timeout duration.
 506   * @retval HAL status
 507   */
 508 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
 509 {
 510   uint32_t temp;
 511   uint32_t tickstart = 0U;
 512
 513   if(HAL_DMA_STATE_BUSY != hdma->State)
 514   {
 515     /* no transfer ongoing */
 516     hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 517     __HAL_UNLOCK(hdma);
 518     return HAL_ERROR;
 519   }
 520
 521   /* Polling mode not supported in circular mode */
 522   if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
 523   {
 524     hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
 525     return HAL_ERROR;
 526   }
 527
 528   /* Get the level transfer complete flag */
 529   if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
 530   {
 531     /* Transfer Complete flag */
 532     temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
 533   }
 534   else
 535   {
 536     /* Half Transfer Complete flag */
 537     temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
 538   }
 539
 540   /* Get tick */
 541   tickstart = HAL_GetTick();
 542
 543   while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
 544   {
 545     if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
 546     {
 547       /* When a DMA transfer error occurs */
 548       /* A hardware clear of its EN bits is performed */
 549       /* Clear all flags */
 550       hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 551
 552       /* Update error code */
 553       SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
 554
 555       /* Change the DMA state */
 556       hdma->State= HAL_DMA_STATE_READY;
 557
 558       /* Process Unlocked */
 559       __HAL_UNLOCK(hdma);
 560
 561       return HAL_ERROR;
 562     }
 563     /* Check for the Timeout */
 564     if(Timeout != HAL_MAX_DELAY)
 565     {
 566       if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
 567       {
 568         /* Update error code */
 569         SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
 570
 571         /* Change the DMA state */
 572         hdma->State = HAL_DMA_STATE_READY;
 573
 574         /* Process Unlocked */
 575         __HAL_UNLOCK(hdma);
 576
 577         return HAL_ERROR;
 578       }
 579     }
 580   }
 581
 582   if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
 583   {
 584     /* Clear the transfer complete flag */
 585     __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 586
 587     /* The selected Channelx EN bit is cleared (DMA is disabled and
 588     all transfers are complete) */
 589     hdma->State = HAL_DMA_STATE_READY;
 590   }
 591   else
 592   {
 593     /* Clear the half transfer complete flag */
 594     __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 595   }
 596
 597   /* Process unlocked */
 598   __HAL_UNLOCK(hdma);
 599
 600   return HAL_OK;
 601 }
 602
 603 /**
 604   * @brief  Handles DMA interrupt request.
 605   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 606   *               the configuration information for the specified DMA Channel.
 607   * @retval None
 608   */
 609 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
 610 {
 611   uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 612   uint32_t source_it = hdma->Instance->CCR;
 613
 614   /* Half Transfer Complete Interrupt management ******************************/
 615   if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 616   {
 617     /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
 618     if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 619     {
 620       /* Disable the half transfer interrupt */
 621       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 622     }
 623     /* Clear the half transfer complete flag */
 624     __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 625
 626     /* DMA peripheral state is not updated in Half Transfer */
 627     /* but in Transfer Complete case */
 628
 629     if(hdma->XferHalfCpltCallback != NULL)
 630     {
 631       /* Half transfer callback */
 632       hdma->XferHalfCpltCallback(hdma);
 633     }
 634   }
 635
 636   /* Transfer Complete Interrupt management ***********************************/
 637   else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 638   {
 639     if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 640     {
 641       /* Disable the transfer complete and error interrupt */
 642       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 643
 644       /* Change the DMA state */
 645       hdma->State = HAL_DMA_STATE_READY;
 646     }
 647     /* Clear the transfer complete flag */
 648       __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 649
 650     /* Process Unlocked */
 651     __HAL_UNLOCK(hdma);
 652
 653     if(hdma->XferCpltCallback != NULL)
 654     {
 655       /* Transfer complete callback */
 656       hdma->XferCpltCallback(hdma);
 657     }
 658   }
 659
 660   /* Transfer Error Interrupt management **************************************/
 661   else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 662   {
 663     /* When a DMA transfer error occurs */
 664     /* A hardware clear of its EN bits is performed */
 665     /* Disable ALL DMA IT */
 666     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 667
 668     /* Clear all flags */
 669     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 670
 671     /* Update error code */
 672     hdma->ErrorCode = HAL_DMA_ERROR_TE;
 673
 674     /* Change the DMA state */
 675     hdma->State = HAL_DMA_STATE_READY;
 676
 677     /* Process Unlocked */
 678     __HAL_UNLOCK(hdma);
 679
 680     if (hdma->XferErrorCallback != NULL)
 681     {
 682       /* Transfer error callback */
 683       hdma->XferErrorCallback(hdma);
 684     }
 685   }
 686   return;
 687 }
 688
 689 /**
 690   * @brief Register callbacks
 691   * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
 692   *              the configuration information for the specified DMA Channel.
 693   * @param CallbackID: User Callback identifer
 694   *                    a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
 695   * @param pCallback: pointer to private callbacsk function which has pointer to
 696   *                   a DMA_HandleTypeDef structure as parameter.
 697   * @retval HAL status
 698   */
 699 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
 700 {
 701   HAL_StatusTypeDef status = HAL_OK;
 702
 703   /* Process locked */
 704   __HAL_LOCK(hdma);
 705
 706   if(HAL_DMA_STATE_READY == hdma->State)
 707   {
 708     switch (CallbackID)
 709     {
 710     case  HAL_DMA_XFER_CPLT_CB_ID:
 711       hdma->XferCpltCallback = pCallback;
 712       break;
 713
 714     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
 715       hdma->XferHalfCpltCallback = pCallback;
 716       break;
 717
 718     case  HAL_DMA_XFER_ERROR_CB_ID:
 719       hdma->XferErrorCallback = pCallback;
 720       break;
 721
 722     case  HAL_DMA_XFER_ABORT_CB_ID:
 723       hdma->XferAbortCallback = pCallback;
 724       break;
 725
 726     default:
 727       status = HAL_ERROR;
 728       break;
 729     }
 730   }
 731   else
 732   {
 733     status = HAL_ERROR;
 734   }
 735
 736   /* Release Lock */
 737   __HAL_UNLOCK(hdma);
 738
 739   return status;
 740 }
 741
 742 /**
 743   * @brief UnRegister callbacks
 744   * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
 745   *              the configuration information for the specified DMA Channel.
 746   * @param CallbackID: User Callback identifer
 747   *                    a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
 748   * @retval HAL status
 749   */
 750 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
 751 {
 752   HAL_StatusTypeDef status = HAL_OK;
 753
 754   /* Process locked */
 755   __HAL_LOCK(hdma);
 756
 757   if(HAL_DMA_STATE_READY == hdma->State)
 758   {
 759     switch (CallbackID)
 760     {
 761     case  HAL_DMA_XFER_CPLT_CB_ID:
 762       hdma->XferCpltCallback = NULL;
 763       break;
 764
 765     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
 766       hdma->XferHalfCpltCallback = NULL;
 767       break;
 768
 769     case  HAL_DMA_XFER_ERROR_CB_ID:
 770       hdma->XferErrorCallback = NULL;
 771       break;
 772
 773     case  HAL_DMA_XFER_ABORT_CB_ID:
 774       hdma->XferAbortCallback = NULL;
 775       break;
 776
 777     case   HAL_DMA_XFER_ALL_CB_ID:
 778       hdma->XferCpltCallback = NULL;
 779       hdma->XferHalfCpltCallback = NULL;
 780       hdma->XferErrorCallback = NULL;
 781       hdma->XferAbortCallback = NULL;
 782       break;
 783
 784     default:
 785       status = HAL_ERROR;
 786       break;
 787     }
 788   }
 789   else
 790   {
 791     status = HAL_ERROR;
 792   }
 793
 794   /* Release Lock */
 795   __HAL_UNLOCK(hdma);
 796
 797   return status;
 798 }
 799
 800 /**
 801   * @}
 802   */
 803
 804 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
 805   *  @brief    Peripheral State and Errors functions
 806   *
 807 @verbatim
 808  ===============================================================================
 809             ##### Peripheral State and Errors functions #####
 810  ===============================================================================
 811     [..]
 812     This subsection provides functions allowing to
 813       (+) Check the DMA state
 814       (+) Get error code
 815
 816 @endverbatim
 817   * @{
 818   */
 819
 820 /**
 821   * @brief  Return the DMA hande state.
 822   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 823   *               the configuration information for the specified DMA Channel.
 824   * @retval HAL state
 825   */
 826 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
 827 {
 828   /* Return DMA handle state */
 829   return hdma->State;
 830 }
 831
 832 /**
 833   * @brief  Return the DMA error code.
 834   * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
 835   *              the configuration information for the specified DMA Channel.
 836   * @retval DMA Error Code
 837   */
 838 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
 839 {
 840   return hdma->ErrorCode;
 841 }
 842
 843 /**
 844   * @}
 845   */
 846
 847 /**
 848   * @}
 849   */
 850
 851 /** @addtogroup DMA_Private_Functions
 852   * @{
 853   */
 854
 855 /**
 856   * @brief  Sets the DMA Transfer parameter.
 857   * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
 858   *                     the configuration information for the specified DMA Channel.
 859   * @param  SrcAddress: The source memory Buffer address
 860   * @param  DstAddress: The destination memory Buffer address
 861   * @param  DataLength: The length of data to be transferred from source to destination
 862   * @retval HAL status
 863   */
 864 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 865 {
 866   /* Clear all flags */
 867   hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 868
 869   /* Configure DMA Channel data length */
 870   hdma->Instance->CNDTR = DataLength;
 871
 872   /* Memory to Peripheral */
 873   if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 874   {
 875     /* Configure DMA Channel destination address */
 876     hdma->Instance->CPAR = DstAddress;
 877
 878     /* Configure DMA Channel source address */
 879     hdma->Instance->CMAR = SrcAddress;
 880   }
 881   /* Peripheral to Memory */
 882   else
 883   {
 884     /* Configure DMA Channel source address */
 885     hdma->Instance->CPAR = SrcAddress;
 886
 887     /* Configure DMA Channel destination address */
 888     hdma->Instance->CMAR = DstAddress;
 889   }
 890 }
 891
 892 /**
 893   * @}
 894   */
 895
 896 #endif /* HAL_DMA_MODULE_ENABLED */
 897 /**
 898   * @}
 899   */
 900
 901 /**
 902   * @}
 903   */
 904
 905 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/