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Increment eeprom version
[betaflight.git] / lib / main / STM32F1 / Drivers / STM32F1xx_HAL_Driver / Src / stm32f1xx_ll_usb.c
blobf1115970fd27a60061b0f4403489086046a8d0c2
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_ll_usb.c
4 * @author MCD Application Team
5 * @version V1.1.1
6 * @date 12-May-2017
7 * @brief USB Low Layer HAL module driver.
8 *
9 * This file provides firmware functions to manage the following
10 * functionalities of the USB Peripheral Controller:
11 * + Initialization/de-initialization functions
12 * + I/O operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
15 *
16 @verbatim
17 ==============================================================================
18 ##### How to use this driver #####
19 ==============================================================================
20 [..]
21 (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
22
23 (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
24
25 (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
26
27 @endverbatim
28 ******************************************************************************
29 * @attention
30 *
31 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
32 *
33 * Redistribution and use in source and binary forms, with or without modification,
34 * are permitted provided that the following conditions are met:
35 * 1. Redistributions of source code must retain the above copyright notice,
36 * this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright notice,
38 * this list of conditions and the following disclaimer in the documentation
39 * and/or other materials provided with the distribution.
40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
41 * may be used to endorse or promote products derived from this software
42 * without specific prior written permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 ******************************************************************************
56 */
57
58 /* Includes ------------------------------------------------------------------*/
59 #include "stm32f1xx_hal.h"
60
61 /** @addtogroup STM32F1xx_HAL_Driver
62 * @{
63 */
64
65 /** @defgroup USB_LL USB Low Layer
66 * @brief Low layer module for USB_FS and USB_OTG_FS drivers
67 * @{
68 */
69
70 #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
71
72 #if defined(STM32F102x6) || defined(STM32F102xB) || \
73 defined(STM32F103x6) || defined(STM32F103xB) || \
74 defined(STM32F103xE) || defined(STM32F103xG) || \
75 defined(STM32F105xC) || defined(STM32F107xC)
76
77 /* Private types -------------------------------------------------------------*/
78 /* Private variables ---------------------------------------------------------*/
79 /* Private constants ---------------------------------------------------------*/
80 /* Private macros ------------------------------------------------------------*/
81 /* Private functions ---------------------------------------------------------*/
82 #if defined (USB_OTG_FS)
83 /** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions
84 * @{
85 */
86 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
87 /**
88 * @}
89 */
90 #endif /* USB_OTG_FS */
91
92 /* Exported functions --------------------------------------------------------*/
93 /** @defgroup USB_LL_Exported_Functions USB Low Layer Exported Functions
94 * @{
95 */
96
97 /** @defgroup USB_LL_Exported_Functions_Group1 Peripheral Control functions
98 * @brief management functions
99 *
100 @verbatim
101 ===============================================================================
102 ##### Peripheral Control functions #####
103 ===============================================================================
104 [..]
105 This subsection provides a set of functions allowing to control the PCD data
106 transfers.
107
108 @endverbatim
109 * @{
110 */
111
112 /*==============================================================================
113 USB OTG FS peripheral available on STM32F105xx and STM32F107xx devices
114 ==============================================================================*/
115 #if defined (USB_OTG_FS)
116
117 /**
118 * @brief Initializes the USB Core
119 * @param USBx: USB Instance
120 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
121 * the configuration information for the specified USBx peripheral.
122 * @retval HAL status
123 */
124 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
125 {
126 /* Prevent unused argument(s) compilation warning */
127 UNUSED(cfg);
128
129 /* Select FS Embedded PHY */
130 USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
131
132 /* Reset after a PHY select and set Host mode */
133 USB_CoreReset(USBx);
134
135 /* Deactivate the power down*/
136 USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
137
138 return HAL_OK;
139 }
140
141 /**
142 * @brief USB_EnableGlobalInt
143 * Enables the controller's Global Int in the AHB Config reg
144 * @param USBx : Selected device
145 * @retval HAL status
146 */
147 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
148 {
149 USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
150 return HAL_OK;
151 }
152
153 /**
154 * @brief USB_DisableGlobalInt
155 * Disable the controller's Global Int in the AHB Config reg
156 * @param USBx : Selected device
157 * @retval HAL status
158 */
159 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
160 {
161 USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
162 return HAL_OK;
163 }
164
165 /**
166 * @brief USB_SetCurrentMode : Set functional mode
167 * @param USBx : Selected device
168 * @param mode : current core mode
169 * This parameter can be one of the these values:
170 * @arg USB_DEVICE_MODE: Peripheral mode mode
171 * @arg USB_HOST_MODE: Host mode
172 * @arg USB_DRD_MODE: Dual Role Device mode
173 * @retval HAL status
174 */
175 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode)
176 {
177 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
178
179 if ( mode == USB_HOST_MODE)
180 {
181 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
182 }
183 else if (mode == USB_DEVICE_MODE)
184 {
185 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
186 }
187 HAL_Delay(50);
188
189 return HAL_OK;
190 }
191
192 /**
193 * @brief USB_DevInit : Initializes the USB_OTG controller registers
194 * for device mode
195 * @param USBx : Selected device
196 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
197 * the configuration information for the specified USBx peripheral.
198 * @retval HAL status
199 */
200 HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
201 {
202 uint32_t index = 0;
203
204 for (index = 0; index < 15 ; index++)
205 {
206 USBx->DIEPTXF[index] = 0;
207 }
208
209 /*Activate VBUS Sensing B */
210 USBx->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
211
212 /* Restart the Phy Clock */
213 USBx_PCGCCTL = 0;
214
215 /* Device mode configuration */
216 USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
217
218 /* Set Full speed phy */
219 USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
220
221 /* Flush the FIFOs */
222 USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
223 USB_FlushRxFifo(USBx);
224
225 /* Clear all pending Device Interrupts */
226 USBx_DEVICE->DIEPMSK = 0;
227 USBx_DEVICE->DOEPMSK = 0;
228 USBx_DEVICE->DAINT = 0xFFFFFFFF;
229 USBx_DEVICE->DAINTMSK = 0;
230
231 for (index = 0; index < cfg.dev_endpoints; index++)
232 {
233 if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
234 {
235 USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
236 }
237 else
238 {
239 USBx_INEP(index)->DIEPCTL = 0;
240 }
241
242 USBx_INEP(index)->DIEPTSIZ = 0;
243 USBx_INEP(index)->DIEPINT = 0xFF;
244 }
245
246 for (index = 0; index < cfg.dev_endpoints; index++)
247 {
248 if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
249 {
250 USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
251 }
252 else
253 {
254 USBx_OUTEP(index)->DOEPCTL = 0;
255 }
256
257 USBx_OUTEP(index)->DOEPTSIZ = 0;
258 USBx_OUTEP(index)->DOEPINT = 0xFF;
259 }
260
261 USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
262
263 /* Disable all interrupts. */
264 USBx->GINTMSK = 0;
265
266 /* Clear any pending interrupts */
267 USBx->GINTSTS = 0xBFFFFFFF;
268
269 /* Enable the common interrupts */
270 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
271
272 /* Enable interrupts matching to the Device mode ONLY */
273 USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
274 USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
275 USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
276 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
277
278 if(cfg.Sof_enable)
279 {
280 USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
281 }
282
283 if (cfg.vbus_sensing_enable == ENABLE)
284 {
285 USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
286 }
287
288 return HAL_OK;
289 }
290
291 /**
292 * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
293 * @param USBx : Selected device
294 * @param num : FIFO number
295 * This parameter can be a value from 1 to 15
296 15 means Flush all Tx FIFOs
297 * @retval HAL status
298 */
299 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
300 {
301 uint32_t count = 0;
302
303 USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)(num << 6));
304
305 do
306 {
307 if (++count > 200000)
308 {
309 return HAL_TIMEOUT;
310 }
311 }
312 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
313
314 return HAL_OK;
315 }
316
317 /**
318 * @brief USB_FlushRxFifo : Flush Rx FIFO
319 * @param USBx : Selected device
320 * @retval HAL status
321 */
322 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
323 {
324 uint32_t count = 0;
325
326 USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
327
328 do
329 {
330 if (++count > 200000)
331 {
332 return HAL_TIMEOUT;
333 }
334 }
335 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
336
337 return HAL_OK;
338 }
339
340 /**
341 * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
342 * depending the PHY type and the enumeration speed of the device.
343 * @param USBx : Selected device
344 * @param speed : device speed
345 * This parameter can be one of the these values:
346 * @arg USB_OTG_SPEED_FULL: Full speed mode
347 * @arg USB_OTG_SPEED_LOW: Low speed mode
348 * @retval Hal status
349 */
350 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
351 {
352 /* Prevent unused argument(s) compilation warning */
353 UNUSED(USBx);
354
355 USBx_DEVICE->DCFG |= speed;
356 return HAL_OK;
357 }
358
359 /**
360 * @brief USB_GetDevSpeed :Return the Dev Speed
361 * @param USBx : Selected device
362 * @retval speed : device speed
363 * This parameter can be one of the these values:
364 * @arg USB_OTG_SPEED_FULL: Full speed mode
365 * @arg USB_OTG_SPEED_LOW: Low speed mode
366 */
367 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
368 {
369 uint8_t speed = 0;
370 /* Prevent unused argument(s) compilation warning */
371 UNUSED(USBx);
372
373 if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
374 ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
375 {
376 speed = USB_OTG_SPEED_FULL;
377 }
378 else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
379 {
380 speed = USB_OTG_SPEED_LOW;
381 }
382
383 return speed;
384 }
385
386 /**
387 * @brief Activate and configure an endpoint
388 * @param USBx : Selected device
389 * @param ep: pointer to endpoint structure
390 * @retval HAL status
391 */
392 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
393 {
394 /* Prevent unused argument(s) compilation warning */
395 UNUSED(USBx);
396
397 if (ep->is_in)
398 {
399 /* Assign a Tx FIFO */
400 ep->tx_fifo_num = ep->num;
401 }
402 /* Set initial data PID. */
403 if (ep->type == EP_TYPE_BULK )
404 {
405 ep->data_pid_start = 0;
406 }
407
408 if (ep->is_in == 1)
409 {
410 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
411
412 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
413 {
414 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
415 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
416 }
417 }
418 else
419 {
420 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
421
422 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
423 {
424 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
425 (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
426 }
427 }
428
429 return HAL_OK;
430 }
431
432 /**
433 * @brief De-activate and de-initialize an endpoint
434 * @param USBx : Selected device
435 * @param ep: pointer to endpoint structure
436 * @retval HAL status
437 */
438 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
439 {
440 /* Prevent unused argument(s) compilation warning */
441 UNUSED(USBx);
442
443 /* Read DEPCTLn register */
444 if (ep->is_in == 1)
445 {
446 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
447 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
448 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
449 }
450 else
451 {
452 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
453 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
454 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
455 }
456 return HAL_OK;
457 }
458
459 /**
460 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
461 * @param USBx : Selected device
462 * @param ep: pointer to endpoint structure
463 * @retval HAL status
464 */
465 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
466 {
467 uint16_t pktcnt = 0;
468 /* Prevent unused argument(s) compilation warning */
469 UNUSED(USBx);
470
471 /* IN endpoint */
472 if (ep->is_in == 1)
473 {
474 /* Zero Length Packet? */
475 if (ep->xfer_len == 0)
476 {
477 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
478 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
479 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
480 }
481 else
482 {
483 /* Program the transfer size and packet count
484 * as follows: xfersize = N * maxpacket +
485 * short_packet pktcnt = N + (short_packet
486 * exist ? 1 : 0)
487 */
488 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
489 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
490 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
491 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
492
493 if (ep->type == EP_TYPE_ISOC)
494 {
495 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
496 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
497 }
498 }
499
500 if (ep->type != EP_TYPE_ISOC)
501 {
502 /* Enable the Tx FIFO Empty Interrupt for this EP */
503 if (ep->xfer_len > 0)
504 {
505 USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num;
506 }
507 }
508
509 if (ep->type == EP_TYPE_ISOC)
510 {
511 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
512 {
513 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
514 }
515 else
516 {
517 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
518 }
519 }
520
521 /* EP enable, IN data in FIFO */
522 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
523
524 if (ep->type == EP_TYPE_ISOC)
525 {
526 USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len);
527 }
528 }
529 else /* OUT endpoint */
530 {
531 /* Program the transfer size and packet count as follows:
532 * pktcnt = N
533 * xfersize = N * maxpacket
534 */
535 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
536 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
537
538 if (ep->xfer_len == 0)
539 {
540 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
541 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
542 }
543 else
544 {
545 pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
546 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19));
547 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
548 }
549
550 if (ep->type == EP_TYPE_ISOC)
551 {
552 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
553 {
554 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
555 }
556 else
557 {
558 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
559 }
560 }
561 /* EP enable */
562 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
563 }
564
565 return HAL_OK;
566 }
567
568 /**
569 * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
570 * @param USBx : Selected device
571 * @param ep: pointer to endpoint structure
572 * @retval HAL status
573 */
574 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
575 {
576 /* Prevent unused argument(s) compilation warning */
577 UNUSED(USBx);
578
579 /* IN endpoint */
580 if (ep->is_in == 1)
581 {
582 /* Zero Length Packet? */
583 if (ep->xfer_len == 0)
584 {
585 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
586 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
587 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
588 }
589 else
590 {
591 /* Program the transfer size and packet count
592 * as follows: xfersize = N * maxpacket +
593 * short_packet pktcnt = N + (short_packet
594 * exist ? 1 : 0)
595 */
596 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
597 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
598
599 if(ep->xfer_len > ep->maxpacket)
600 {
601 ep->xfer_len = ep->maxpacket;
602 }
603 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
604 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
605 }
606
607 /* Enable the Tx FIFO Empty Interrupt for this EP */
608 if (ep->xfer_len > 0)
609 {
610 USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
611 }
612
613 /* EP enable, IN data in FIFO */
614 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
615 }
616 else /* OUT endpoint */
617 {
618 /* Program the transfer size and packet count as follows:
619 * pktcnt = N
620 * xfersize = N * maxpacket
621 */
622 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
623 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
624
625 if (ep->xfer_len > 0)
626 {
627 ep->xfer_len = ep->maxpacket;
628 }
629
630 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
631 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
632
633 /* EP enable */
634 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
635 }
636
637 return HAL_OK;
638 }
639
640 /**
641 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
642 * with the EP/channel
643 * @param USBx : Selected device
644 * @param src : pointer to source buffer
645 * @param ch_ep_num : endpoint or host channel number
646 * @param len : Number of bytes to write
647 * @retval HAL status
648 */
649 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
650 {
651 uint32_t count32b = 0 , index = 0;
652 /* Prevent unused argument(s) compilation warning */
653 UNUSED(USBx);
654
655 count32b = (len + 3) / 4;
656 for (index = 0; index < count32b; index++, src += 4)
657 {
658 USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
659 }
660 return HAL_OK;
661 }
662
663 /**
664 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
665 * with the EP/channel
666 * @param USBx : Selected device
667 * @param dest : destination pointer
668 * @param len : Number of bytes to read
669 * @retval pointer to destination buffer
670 */
671 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
672 {
673 uint32_t index = 0;
674 uint32_t count32b = (len + 3) / 4;
675 /* Prevent unused argument(s) compilation warning */
676 UNUSED(USBx);
677
678 for ( index = 0; index < count32b; index++, dest += 4 )
679 {
680 *(__packed uint32_t *)dest = USBx_DFIFO(0);
681
682 }
683 return ((void *)dest);
684 }
685
686 /**
687 * @brief USB_EPSetStall : set a stall condition over an EP
688 * @param USBx : Selected device
689 * @param ep: pointer to endpoint structure
690 * @retval HAL status
691 */
692 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
693 {
694 /* Prevent unused argument(s) compilation warning */
695 UNUSED(USBx);
696
697 if (ep->is_in == 1)
698 {
699 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
700 {
701 USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
702 }
703 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
704 }
705 else
706 {
707 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
708 {
709 USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
710 }
711 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
712 }
713 return HAL_OK;
714 }
715
716 /**
717 * @brief USB_EPClearStall : Clear a stall condition over an EP
718 * @param USBx : Selected device
719 * @param ep: pointer to endpoint structure
720 * @retval HAL status
721 */
722 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
723 {
724 /* Prevent unused argument(s) compilation warning */
725 UNUSED(USBx);
726
727 if (ep->is_in == 1)
728 {
729 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
730 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
731 {
732 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
733 }
734 }
735 else
736 {
737 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
738 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
739 {
740 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
741 }
742 }
743 return HAL_OK;
744 }
745
746 /**
747 * @brief USB_StopDevice : Stop the usb device mode
748 * @param USBx : Selected device
749 * @retval HAL status
750 */
751 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
752 {
753 uint32_t index = 0;
754
755 /* Clear Pending interrupt */
756 for (index = 0; index < 15 ; index++)
757 {
758 USBx_INEP(index)->DIEPINT = 0xFF;
759 USBx_OUTEP(index)->DOEPINT = 0xFF;
760 }
761 USBx_DEVICE->DAINT = 0xFFFFFFFF;
762
763 /* Clear interrupt masks */
764 USBx_DEVICE->DIEPMSK = 0;
765 USBx_DEVICE->DOEPMSK = 0;
766 USBx_DEVICE->DAINTMSK = 0;
767
768 /* Flush the FIFO */
769 USB_FlushRxFifo(USBx);
770 USB_FlushTxFifo(USBx , 0x10 );
771
772 return HAL_OK;
773 }
774
775 /**
776 * @brief USB_SetDevAddress : Stop the usb device mode
777 * @param USBx : Selected device
778 * @param address : new device address to be assigned
779 * This parameter can be a value from 0 to 255
780 * @retval HAL status
781 */
782 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
783 {
784 /* Prevent unused argument(s) compilation warning */
785 UNUSED(USBx);
786 UNUSED(address);
787 USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
788 USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD;
789
790 return HAL_OK;
791 }
792
793 /**
794 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
795 * @param USBx : Selected device
796 * @retval HAL status
797 */
798 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
799 {
800 /* Prevent unused argument(s) compilation warning */
801 UNUSED(USBx);
802
803 USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
804 HAL_Delay(3);
805
806 return HAL_OK;
807 }
808
809 /**
810 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
811 * @param USBx : Selected device
812 * @retval HAL status
813 */
814 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
815 {
816 /* Prevent unused argument(s) compilation warning */
817 UNUSED(USBx);
818
819 USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
820 HAL_Delay(3);
821
822 return HAL_OK;
823 }
824
825 /**
826 * @brief USB_ReadInterrupts: return the global USB interrupt status
827 * @param USBx : Selected device
828 * @retval HAL status
829 */
830 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
831 {
832 uint32_t tmpreg = 0;
833
834 tmpreg = USBx->GINTSTS;
835 tmpreg &= USBx->GINTMSK;
836 return tmpreg;
837 }
838
839 /**
840 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
841 * @param USBx : Selected device
842 * @retval HAL status
843 */
844 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
845 {
846 uint32_t tmpreg = 0;
847 /* Prevent unused argument(s) compilation warning */
848 UNUSED(USBx);
849
850 tmpreg = USBx_DEVICE->DAINT;
851 tmpreg &= USBx_DEVICE->DAINTMSK;
852 return ((tmpreg & 0xffff0000) >> 16);
853 }
854
855 /**
856 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
857 * @param USBx : Selected device
858 * @retval HAL status
859 */
860 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
861 {
862 uint32_t tmpreg = 0;
863 /* Prevent unused argument(s) compilation warning */
864 UNUSED(USBx);
865
866 tmpreg = USBx_DEVICE->DAINT;
867 tmpreg &= USBx_DEVICE->DAINTMSK;
868 return ((tmpreg & 0xFFFF));
869 }
870
871 /**
872 * @brief Returns Device OUT EP Interrupt register
873 * @param USBx : Selected device
874 * @param epnum : endpoint number
875 * This parameter can be a value from 0 to 15
876 * @retval Device OUT EP Interrupt register
877 */
878 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
879 {
880 /* Prevent unused argument(s) compilation warning */
881 UNUSED(USBx);
882
883 uint32_t tmpreg = 0;
884 tmpreg = USBx_OUTEP(epnum)->DOEPINT;
885 tmpreg &= USBx_DEVICE->DOEPMSK;
886 return tmpreg;
887 }
888
889 /**
890 * @brief Returns Device IN EP Interrupt register
891 * @param USBx : Selected device
892 * @param epnum : endpoint number
893 * This parameter can be a value from 0 to 15
894 * @retval Device IN EP Interrupt register
895 */
896 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
897 {
898 uint32_t tmpreg = 0, msk = 0, emp = 0;
899 /* Prevent unused argument(s) compilation warning */
900 UNUSED(USBx);
901
902 msk = USBx_DEVICE->DIEPMSK;
903 emp = USBx_DEVICE->DIEPEMPMSK;
904 msk |= ((emp >> epnum) & 0x1) << 7;
905 tmpreg = USBx_INEP(epnum)->DIEPINT & msk;
906 return tmpreg;
907 }
908
909 /**
910 * @brief USB_ClearInterrupts: clear a USB interrupt
911 * @param USBx : Selected device
912 * @param interrupt : interrupt flag
913 * @retval None
914 */
915 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
916 {
917 USBx->GINTSTS |= interrupt;
918 }
919
920 /**
921 * @brief Returns USB core mode
922 * @param USBx : Selected device
923 * @retval return core mode : Host or Device
924 * This parameter can be one of the these values:
925 * 0 : Host
926 * 1 : Device
927 */
928 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
929 {
930 /* Prevent unused argument(s) compilation warning */
931 UNUSED(USBx);
932
933 return ((USBx->GINTSTS ) & 0x1);
934 }
935
936 /**
937 * @brief Activate EP0 for Setup transactions
938 * @param USBx : Selected device
939 * @retval HAL status
940 */
941 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
942 {
943 /* Prevent unused argument(s) compilation warning */
944 UNUSED(USBx);
945 /* Set the MPS of the IN EP based on the enumeration speed */
946 USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
947
948 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
949 {
950 USBx_INEP(0)->DIEPCTL |= 3;
951 }
952 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
953
954 return HAL_OK;
955 }
956
957 /**
958 * @brief Prepare the EP0 to start the first control setup
959 * @param USBx : Selected device
960 * @param psetup : pointer to setup packet
961 * @retval HAL status
962 */
963 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup)
964 {
965 /* Prevent unused argument(s) compilation warning */
966 UNUSED(USBx);
967 UNUSED(psetup);
968 USBx_OUTEP(0)->DOEPTSIZ = 0;
969 USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
970 USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8);
971 USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
972
973 return HAL_OK;
974 }
975
976 /**
977 * @brief USB_HostInit : Initializes the USB OTG controller registers
978 * for Host mode
979 * @param USBx : Selected device
980 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
981 * the configuration information for the specified USBx peripheral.
982 * @retval HAL status
983 */
984 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
985 {
986 uint32_t index = 0;
987
988 /* Restart the Phy Clock */
989 USBx_PCGCCTL = 0;
990
991 /* no VBUS sensing*/
992 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSASEN);
993 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSBSEN);
994
995 /* Disable the FS/LS support mode only */
996 if((cfg.speed == USB_OTG_SPEED_FULL)&&
997 (USBx != USB_OTG_FS))
998 {
999 USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
1000 }
1001 else
1002 {
1003 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
1004 }
1005
1006 /* Make sure the FIFOs are flushed. */
1007 USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
1008 USB_FlushRxFifo(USBx);
1009
1010 /* Clear all pending HC Interrupts */
1011 for (index = 0; index < cfg.Host_channels; index++)
1012 {
1013 USBx_HC(index)->HCINT = 0xFFFFFFFF;
1014 USBx_HC(index)->HCINTMSK = 0;
1015 }
1016
1017 /* Enable VBUS driving */
1018 USB_DriveVbus(USBx, 1);
1019
1020 HAL_Delay(200);
1021
1022 /* Disable all interrupts. */
1023 USBx->GINTMSK = 0;
1024
1025 /* Clear any pending interrupts */
1026 USBx->GINTSTS = 0xFFFFFFFF;
1027
1028 if(USBx == USB_OTG_FS)
1029 {
1030 /* set Rx FIFO size */
1031 USBx->GRXFSIZ = (uint32_t )0x80;
1032 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
1033 USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
1034 }
1035
1036 /* Enable the common interrupts */
1037 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
1038
1039 /* Enable interrupts matching to the Host mode ONLY */
1040 USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
1041 USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
1042 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
1043
1044 return HAL_OK;
1045 }
1046
1047 /**
1048 * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
1049 * HCFG register on the PHY type and set the right frame interval
1050 * @param USBx : Selected device
1051 * @param freq : clock frequency
1052 * This parameter can be one of the these values:
1053 * HCFG_48_MHZ : Full Speed 48 MHz Clock
1054 * HCFG_6_MHZ : Low Speed 6 MHz Clock
1055 * @retval HAL status
1056 */
1057 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
1058 {
1059 /* Prevent unused argument(s) compilation warning */
1060 UNUSED(USBx);
1061
1062 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
1063 USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
1064
1065 if (freq == HCFG_48_MHZ)
1066 {
1067 USBx_HOST->HFIR = (uint32_t)48000;
1068 }
1069 else if (freq == HCFG_6_MHZ)
1070 {
1071 USBx_HOST->HFIR = (uint32_t)6000;
1072 }
1073 return HAL_OK;
1074 }
1075
1076 /**
1077 * @brief USB_OTG_ResetPort : Reset Host Port
1078 * @param USBx : Selected device
1079 * @retval HAL status
1080 * @note : (1)The application must wait at least 10 ms
1081 * before clearing the reset bit.
1082 */
1083 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
1084 {
1085 __IO uint32_t hprt0 = 0;
1086 /* Prevent unused argument(s) compilation warning */
1087 UNUSED(USBx);
1088
1089 hprt0 = USBx_HPRT0;
1090
1091 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
1092 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
1093
1094 USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
1095 HAL_Delay (10); /* See Note #1 */
1096 USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
1097 return HAL_OK;
1098 }
1099
1100 /**
1101 * @brief USB_DriveVbus : activate or de-activate vbus
1102 * @param state : VBUS state
1103 * This parameter can be one of the these values:
1104 * 0 : VBUS Active
1105 * 1 : VBUS Inactive
1106 * @retval HAL status
1107 */
1108 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
1109 {
1110 __IO uint32_t hprt0 = 0;
1111 /* Prevent unused argument(s) compilation warning */
1112 UNUSED(USBx);
1113
1114 hprt0 = USBx_HPRT0;
1115 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
1116 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
1117
1118 if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
1119 {
1120 USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
1121 }
1122 if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
1123 {
1124 USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
1125 }
1126 return HAL_OK;
1127 }
1128
1129 /**
1130 * @brief Return Host Core speed
1131 * @param USBx : Selected device
1132 * @retval speed : Host speed
1133 * This parameter can be one of the these values:
1134 * @arg USB_OTG_SPEED_FULL: Full speed mode
1135 * @arg USB_OTG_SPEED_LOW: Low speed mode
1136 */
1137 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
1138 {
1139 __IO uint32_t hprt0 = 0;
1140 /* Prevent unused argument(s) compilation warning */
1141 UNUSED(USBx);
1142
1143 hprt0 = USBx_HPRT0;
1144 return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
1145 }
1146
1147 /**
1148 * @brief Return Host Current Frame number
1149 * @param USBx : Selected device
1150 * @retval current frame number
1151 */
1152 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
1153 {
1154 /* Prevent unused argument(s) compilation warning */
1155 UNUSED(USBx);
1156
1157 return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
1158 }
1159
1160 /**
1161 * @brief Initialize a host channel
1162 * @param USBx : Selected device
1163 * @param ch_num : Channel number
1164 * This parameter can be a value from 1 to 15
1165 * @param epnum : Endpoint number
1166 * This parameter can be a value from 1 to 15
1167 * @param dev_address : Current device address
1168 * This parameter can be a value from 0 to 255
1169 * @param speed : Current device speed
1170 * This parameter can be one of the these values:
1171 * @arg USB_OTG_SPEED_FULL: Full speed mode
1172 * @arg USB_OTG_SPEED_LOW: Low speed mode
1173 * @param ep_type : Endpoint Type
1174 * This parameter can be one of the these values:
1175 * @arg EP_TYPE_CTRL: Control type
1176 * @arg EP_TYPE_ISOC: Isochronous type
1177 * @arg EP_TYPE_BULK: Bulk type
1178 * @arg EP_TYPE_INTR: Interrupt type
1179 * @param mps : Max Packet Size
1180 * This parameter can be a value from 0 to32K
1181 * @retval HAL state
1182 */
1183 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
1184 uint8_t ch_num,
1185 uint8_t epnum,
1186 uint8_t dev_address,
1187 uint8_t speed,
1188 uint8_t ep_type,
1189 uint16_t mps)
1190 {
1191 /* Clear old interrupt conditions for this host channel. */
1192 USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
1193
1194 /* Enable channel interrupts required for this transfer. */
1195 switch (ep_type)
1196 {
1197 case EP_TYPE_CTRL:
1198 case EP_TYPE_BULK:
1199 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1200 USB_OTG_HCINTMSK_STALLM |\
1201 USB_OTG_HCINTMSK_TXERRM |\
1202 USB_OTG_HCINTMSK_DTERRM |\
1203 USB_OTG_HCINTMSK_AHBERR |\
1204 USB_OTG_HCINTMSK_NAKM ;
1205
1206 if (epnum & 0x80)
1207 {
1208 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
1209 }
1210 break;
1211
1212 case EP_TYPE_INTR:
1213 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1214 USB_OTG_HCINTMSK_STALLM |\
1215 USB_OTG_HCINTMSK_TXERRM |\
1216 USB_OTG_HCINTMSK_DTERRM |\
1217 USB_OTG_HCINTMSK_NAKM |\
1218 USB_OTG_HCINTMSK_AHBERR |\
1219 USB_OTG_HCINTMSK_FRMORM ;
1220
1221 if (epnum & 0x80)
1222 {
1223 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
1224 }
1225
1226 break;
1227
1228 case EP_TYPE_ISOC:
1229 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1230 USB_OTG_HCINTMSK_ACKM |\
1231 USB_OTG_HCINTMSK_AHBERR |\
1232 USB_OTG_HCINTMSK_FRMORM ;
1233
1234 if (epnum & 0x80)
1235 {
1236 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
1237 }
1238 break;
1239 }
1240
1241 /* Enable the top level host channel interrupt. */
1242 USBx_HOST->HAINTMSK |= (1 << ch_num);
1243
1244 /* Make sure host channel interrupts are enabled. */
1245 USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
1246
1247 /* Program the HCCHAR register */
1248 USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\
1249 (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\
1250 ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\
1251 (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\
1252 ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\
1253 (mps & USB_OTG_HCCHAR_MPSIZ));
1254
1255 if (ep_type == EP_TYPE_INTR)
1256 {
1257 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
1258 }
1259
1260 return HAL_OK;
1261 }
1262
1263 /**
1264 * @brief Start a transfer over a host channel
1265 * @param USBx : Selected device
1266 * @param hc : pointer to host channel structure
1267 * @retval HAL state
1268 */
1269 #if defined (__CC_ARM) /*!< ARM Compiler */
1270 #pragma O0
1271 #elif defined (__GNUC__) /*!< GNU Compiler */
1272 #pragma GCC optimize ("O0")
1273 #endif /* __CC_ARM */
1274 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc)
1275 {
1276 uint8_t is_oddframe = 0;
1277 uint16_t len_words = 0;
1278 uint16_t num_packets = 0;
1279 uint16_t max_hc_pkt_count = 256;
1280 uint32_t tmpreg = 0;
1281
1282 /* Compute the expected number of packets associated to the transfer */
1283 if (hc->xfer_len > 0)
1284 {
1285 num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
1286
1287 if (num_packets > max_hc_pkt_count)
1288 {
1289 num_packets = max_hc_pkt_count;
1290 hc->xfer_len = num_packets * hc->max_packet;
1291 }
1292 }
1293 else
1294 {
1295 num_packets = 1;
1296 }
1297 if (hc->ep_is_in)
1298 {
1299 hc->xfer_len = num_packets * hc->max_packet;
1300 }
1301
1302 /* Initialize the HCTSIZn register */
1303 USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
1304 ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
1305 (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
1306
1307 is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
1308 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
1309 USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
1310
1311 /* Set host channel enable */
1312 tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
1313 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
1314 tmpreg |= USB_OTG_HCCHAR_CHENA;
1315 USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
1316
1317 if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
1318 {
1319 switch(hc->ep_type)
1320 {
1321 /* Non periodic transfer */
1322 case EP_TYPE_CTRL:
1323 case EP_TYPE_BULK:
1324 len_words = (hc->xfer_len + 3) / 4;
1325
1326 /* check if there is enough space in FIFO space */
1327 if(len_words > (USBx->HNPTXSTS & 0xFFFF))
1328 {
1329 /* need to process data in nptxfempty interrupt */
1330 USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
1331 }
1332 break;
1333
1334 /* Periodic transfer */
1335 case EP_TYPE_INTR:
1336 case EP_TYPE_ISOC:
1337 len_words = (hc->xfer_len + 3) / 4;
1338 /* check if there is enough space in FIFO space */
1339 if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
1340 {
1341 /* need to process data in ptxfempty interrupt */
1342 USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
1343 }
1344 break;
1345
1346 default:
1347 break;
1348 }
1349
1350 /* Write packet into the Tx FIFO. */
1351 USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len);
1352 }
1353
1354 return HAL_OK;
1355 }
1356
1357 /**
1358 * @brief Read all host channel interrupts status
1359 * @param USBx : Selected device
1360 * @retval HAL state
1361 */
1362 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
1363 {
1364 /* Prevent unused argument(s) compilation warning */
1365 UNUSED(USBx);
1366
1367 return ((USBx_HOST->HAINT) & 0xFFFF);
1368 }
1369
1370 /**
1371 * @brief Halt a host channel
1372 * @param USBx : Selected device
1373 * @param hc_num : Host Channel number
1374 * This parameter can be a value from 1 to 15
1375 * @retval HAL state
1376 */
1377 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
1378 {
1379 uint32_t count = 0;
1380 /* Prevent unused argument(s) compilation warning */
1381 UNUSED(USBx);
1382
1383 /* Check for space in the request queue to issue the halt. */
1384 if (((((USBx_HC(hc_num)->HCCHAR) & USB_OTG_HCCHAR_EPTYP) >> 18) == HCCHAR_CTRL) ||
1385 (((((USBx_HC(hc_num)->HCCHAR) & USB_OTG_HCCHAR_EPTYP) >> 18) == HCCHAR_BULK)))
1386 {
1387 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
1388
1389 if ((USBx->HNPTXSTS & 0xFFFF) == 0)
1390 {
1391 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
1392 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1393 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
1394 do
1395 {
1396 if (++count > 1000)
1397 {
1398 break;
1399 }
1400 }
1401 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1402 }
1403 else
1404 {
1405 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1406 }
1407 }
1408 else
1409 {
1410 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
1411
1412 if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
1413 {
1414 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
1415 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1416 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
1417 do
1418 {
1419 if (++count > 1000)
1420 {
1421 break;
1422 }
1423 }
1424 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1425 }
1426 else
1427 {
1428 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1429 }
1430 }
1431
1432 return HAL_OK;
1433 }
1434
1435 /**
1436 * @brief Initiate Do Ping protocol
1437 * @param USBx : Selected device
1438 * @param hc_num : Host Channel number
1439 * This parameter can be a value from 1 to 15
1440 * @retval HAL state
1441 */
1442 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
1443 {
1444 uint8_t num_packets = 1;
1445 uint32_t tmpreg = 0;
1446 /* Prevent unused argument(s) compilation warning */
1447 UNUSED(USBx);
1448
1449 USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
1450 USB_OTG_HCTSIZ_DOPING;
1451
1452 /* Set host channel enable */
1453 tmpreg = USBx_HC(ch_num)->HCCHAR;
1454 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
1455 tmpreg |= USB_OTG_HCCHAR_CHENA;
1456 USBx_HC(ch_num)->HCCHAR = tmpreg;
1457
1458 return HAL_OK;
1459 }
1460
1461 /**
1462 * @brief Stop Host Core
1463 * @param USBx : Selected device
1464 * @retval HAL state
1465 */
1466 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
1467 {
1468 uint8_t index;
1469 uint32_t count = 0;
1470 uint32_t value = 0;
1471
1472 USB_DisableGlobalInt(USBx);
1473
1474 /* Flush FIFO */
1475 USB_FlushTxFifo(USBx, 0x10);
1476 USB_FlushRxFifo(USBx);
1477
1478 /* Flush out any leftover queued requests. */
1479 for (index = 0; index <= 15; index++)
1480 {
1481 value = USBx_HC(index)->HCCHAR;
1482 value |= USB_OTG_HCCHAR_CHDIS;
1483 value &= ~USB_OTG_HCCHAR_CHENA;
1484 value &= ~USB_OTG_HCCHAR_EPDIR;
1485 USBx_HC(index)->HCCHAR = value;
1486 }
1487
1488 /* Halt all channels to put them into a known state. */
1489 for (index = 0; index <= 15; index++)
1490 {
1491 value = USBx_HC(index)->HCCHAR ;
1492 value |= USB_OTG_HCCHAR_CHDIS;
1493 value |= USB_OTG_HCCHAR_CHENA;
1494 value &= ~USB_OTG_HCCHAR_EPDIR;
1495 USBx_HC(index)->HCCHAR = value;
1496
1497 do
1498 {
1499 if (++count > 1000)
1500 {
1501 break;
1502 }
1503 }
1504 while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1505 }
1506
1507 /* Clear any pending Host interrupts */
1508 USBx_HOST->HAINT = 0xFFFFFFFF;
1509 USBx->GINTSTS = 0xFFFFFFFF;
1510 USB_EnableGlobalInt(USBx);
1511
1512 return HAL_OK;
1513 }
1514
1515 /**
1516 * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
1517 * @param USBx : Selected device
1518 * @retval HAL status
1519 */
1520 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
1521 {
1522 /* Prevent unused argument(s) compilation warning */
1523 UNUSED(USBx);
1524 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
1525 {
1526 /* active Remote wakeup signalling */
1527 USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG;
1528 }
1529 return HAL_OK;
1530 }
1531
1532 /**
1533 * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
1534 * @param USBx : Selected device
1535 * @retval HAL status
1536 */
1537 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
1538 {
1539 /* Prevent unused argument(s) compilation warning */
1540 UNUSED(USBx);
1541 /* active Remote wakeup signalling */
1542 USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG);
1543 return HAL_OK;
1544 }
1545
1546 #endif /* USB_OTG_FS */
1547
1548 /*==============================================================================
1549 USB Device FS peripheral available on STM32F102xx and STM32F103xx devices
1550 ==============================================================================*/
1551 #if defined (USB)
1552 /**
1553 * @brief Initializes the USB Core
1554 * @param USBx: USB Instance
1555 * @param cfg : pointer to a USB_CfgTypeDef structure that contains
1556 * the configuration information for the specified USBx peripheral.
1557 * @retval HAL status
1558 */
1559 HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
1560 {
1561 /* Prevent unused argument(s) compilation warning */
1562 UNUSED(USBx);
1563 UNUSED(cfg);
1564 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1565 only by USB OTG FS peripheral.
1566 - This function is added to ensure compatibility across platforms.
1567 */
1568 return HAL_OK;
1569 }
1570
1571 /**
1572 * @brief USB_EnableGlobalInt
1573 * Enables the controller's Global Int in the AHB Config reg
1574 * @param USBx : Selected device
1575 * @retval HAL status
1576 */
1577 HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
1578 {
1579 uint32_t winterruptmask = 0;
1580
1581 /* Set winterruptmask variable */
1582 winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
1583 | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM;
1584
1585 /* Set interrupt mask */
1586 USBx->CNTR |= winterruptmask;
1587
1588 return HAL_OK;
1589 }
1590
1591 /**
1592 * @brief USB_DisableGlobalInt
1593 * Disable the controller's Global Int in the AHB Config reg
1594 * @param USBx : Selected device
1595 * @retval HAL status
1596 */
1597 HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
1598 {
1599 uint32_t winterruptmask = 0;
1600
1601 /* Set winterruptmask variable */
1602 winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
1603 | USB_CNTR_ESOFM | USB_CNTR_RESETM;
1604
1605 /* Clear interrupt mask */
1606 USBx->CNTR &= ~winterruptmask;
1607
1608 return HAL_OK;
1609 }
1610
1611 /**
1612 * @brief USB_SetCurrentMode : Set functional mode
1613 * @param USBx : Selected device
1614 * @param mode : current core mode
1615 * This parameter can be one of the these values:
1616 * @arg USB_DEVICE_MODE: Peripheral mode mode
1617 * @retval HAL status
1618 */
1619 HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode)
1620 {
1621 /* Prevent unused argument(s) compilation warning */
1622 UNUSED(USBx);
1623 UNUSED(mode);
1624 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1625 only by USB OTG FS peripheral.
1626 - This function is added to ensure compatibility across platforms.
1627 */
1628 return HAL_OK;
1629 }
1630
1631 /**
1632 * @brief USB_DevInit : Initializes the USB controller registers
1633 * for device mode
1634 * @param USBx : Selected device
1635 * @param cfg : pointer to a USB_CfgTypeDef structure that contains
1636 * the configuration information for the specified USBx peripheral.
1637 * @retval HAL status
1638 */
1639 HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg)
1640 {
1641 /* Prevent unused argument(s) compilation warning */
1642 UNUSED(cfg);
1643
1644 /* Init Device */
1645 /*CNTR_FRES = 1*/
1646 USBx->CNTR = USB_CNTR_FRES;
1647
1648 /*CNTR_FRES = 0*/
1649 USBx->CNTR = 0;
1650
1651 /*Clear pending interrupts*/
1652 USBx->ISTR = 0;
1653
1654 /*Set Btable Address*/
1655 USBx->BTABLE = BTABLE_ADDRESS;
1656
1657 /* Enable USB Device Interrupt mask */
1658 USB_EnableGlobalInt(USBx);
1659
1660 return HAL_OK;
1661 }
1662
1663 /**
1664 * @brief USB_FlushTxFifo : Flush a Tx FIFO
1665 * @param USBx : Selected device
1666 * @param num : FIFO number
1667 * This parameter can be a value from 1 to 15
1668 15 means Flush all Tx FIFOs
1669 * @retval HAL status
1670 */
1671 HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num)
1672 {
1673 /* Prevent unused argument(s) compilation warning */
1674 UNUSED(USBx);
1675 UNUSED(num);
1676 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1677 only by USB OTG FS peripheral.
1678 - This function is added to ensure compatibility across platforms.
1679 */
1680 return HAL_OK;
1681 }
1682
1683 /**
1684 * @brief USB_FlushRxFifo : Flush Rx FIFO
1685 * @param USBx : Selected device
1686 * @retval HAL status
1687 */
1688 HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
1689 {
1690 /* Prevent unused argument(s) compilation warning */
1691 UNUSED(USBx);
1692 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1693 only by USB OTG FS peripheral.
1694 - This function is added to ensure compatibility across platforms.
1695 */
1696 return HAL_OK;
1697 }
1698
1699 /**
1700 * @brief Activate and configure an endpoint
1701 * @param USBx : Selected device
1702 * @param ep: pointer to endpoint structure
1703 * @retval HAL status
1704 */
1705 HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
1706 {
1707 /* initialize Endpoint */
1708 switch (ep->type)
1709 {
1710 case EP_TYPE_CTRL:
1711 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL);
1712 break;
1713 case EP_TYPE_BULK:
1714 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK);
1715 break;
1716 case EP_TYPE_INTR:
1717 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT);
1718 break;
1719 case EP_TYPE_ISOC:
1720 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS);
1721 break;
1722 default:
1723 break;
1724 }
1725
1726 PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
1727
1728 if (ep->doublebuffer == 0)
1729 {
1730 if (ep->is_in)
1731 {
1732 /*Set the endpoint Transmit buffer address */
1733 PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
1734 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1735 /* Configure NAK status for the Endpoint*/
1736 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
1737 }
1738 else
1739 {
1740 /*Set the endpoint Receive buffer address */
1741 PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
1742 /*Set the endpoint Receive buffer counter*/
1743 PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
1744 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1745 /* Configure VALID status for the Endpoint*/
1746 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1747 }
1748 }
1749 /*Double Buffer*/
1750 else
1751 {
1752 /*Set the endpoint as double buffered*/
1753 PCD_SET_EP_DBUF(USBx, ep->num);
1754 /*Set buffer address for double buffered mode*/
1755 PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1);
1756
1757 if (ep->is_in==0)
1758 {
1759 /* Clear the data toggle bits for the endpoint IN/OUT*/
1760 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1761 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1762
1763 /* Reset value of the data toggle bits for the endpoint out*/
1764 PCD_TX_DTOG(USBx, ep->num);
1765
1766 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1767 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1768 }
1769 else
1770 {
1771 /* Clear the data toggle bits for the endpoint IN/OUT*/
1772 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1773 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1774 PCD_RX_DTOG(USBx, ep->num);
1775 /* Configure DISABLE status for the Endpoint*/
1776 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1777 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1778 }
1779 }
1780
1781 return HAL_OK;
1782 }
1783
1784 /**
1785 * @brief De-activate and de-initialize an endpoint
1786 * @param USBx : Selected device
1787 * @param ep: pointer to endpoint structure
1788 * @retval HAL status
1789 */
1790 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
1791 {
1792 if (ep->doublebuffer == 0)
1793 {
1794 if (ep->is_in)
1795 {
1796 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1797 /* Configure DISABLE status for the Endpoint*/
1798 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1799 }
1800 else
1801 {
1802 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1803 /* Configure DISABLE status for the Endpoint*/
1804 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1805 }
1806 }
1807 /*Double Buffer*/
1808 else
1809 {
1810 if (ep->is_in==0)
1811 {
1812 /* Clear the data toggle bits for the endpoint IN/OUT*/
1813 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1814 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1815
1816 /* Reset value of the data toggle bits for the endpoint out*/
1817 PCD_TX_DTOG(USBx, ep->num);
1818
1819 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1820 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1821 }
1822 else
1823 {
1824 /* Clear the data toggle bits for the endpoint IN/OUT*/
1825 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1826 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1827 PCD_RX_DTOG(USBx, ep->num);
1828 /* Configure DISABLE status for the Endpoint*/
1829 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1830 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1831 }
1832 }
1833
1834 return HAL_OK;
1835 }
1836
1837 /**
1838 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
1839 * @param USBx : Selected device
1840 * @param ep: pointer to endpoint structure
1841 * @retval HAL status
1842 */
1843 HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep)
1844 {
1845 uint16_t pmabuffer = 0;
1846 uint32_t len = ep->xfer_len;
1847
1848 /* IN endpoint */
1849 if (ep->is_in == 1)
1850 {
1851 /*Multi packet transfer*/
1852 if (ep->xfer_len > ep->maxpacket)
1853 {
1854 len=ep->maxpacket;
1855 ep->xfer_len-=len;
1856 }
1857 else
1858 {
1859 len=ep->xfer_len;
1860 ep->xfer_len =0;
1861 }
1862
1863 /* configure and validate Tx endpoint */
1864 if (ep->doublebuffer == 0)
1865 {
1866 USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len);
1867 PCD_SET_EP_TX_CNT(USBx, ep->num, len);
1868 }
1869 else
1870 {
1871 /* Write the data to the USB endpoint */
1872 if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX)
1873 {
1874 /* Set the Double buffer counter for pmabuffer1 */
1875 PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
1876 pmabuffer = ep->pmaaddr1;
1877 }
1878 else
1879 {
1880 /* Set the Double buffer counter for pmabuffer0 */
1881 PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
1882 pmabuffer = ep->pmaaddr0;
1883 }
1884 USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len);
1885 PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
1886 }
1887
1888 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
1889 }
1890 else /* OUT endpoint */
1891 {
1892 /* Multi packet transfer*/
1893 if (ep->xfer_len > ep->maxpacket)
1894 {
1895 len=ep->maxpacket;
1896 ep->xfer_len-=len;
1897 }
1898 else
1899 {
1900 len=ep->xfer_len;
1901 ep->xfer_len =0;
1902 }
1903
1904 /* configure and validate Rx endpoint */
1905 if (ep->doublebuffer == 0)
1906 {
1907 /*Set RX buffer count*/
1908 PCD_SET_EP_RX_CNT(USBx, ep->num, len);
1909 }
1910 else
1911 {
1912 /*Set the Double buffer counter*/
1913 PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
1914 }
1915
1916 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1917 }
1918
1919 return HAL_OK;
1920 }
1921
1922 /**
1923 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
1924 * with the EP/channel
1925 * @param USBx : Selected device
1926 * @param src : pointer to source buffer
1927 * @param ch_ep_num : endpoint or host channel number
1928 * @param len : Number of bytes to write
1929 * @retval HAL status
1930 */
1931 HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
1932 {
1933 /* Prevent unused argument(s) compilation warning */
1934 UNUSED(USBx);
1935 UNUSED(src);
1936 UNUSED(ch_ep_num);
1937 UNUSED(len);
1938 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1939 only by USB OTG FS peripheral.
1940 - This function is added to ensure compatibility across platforms.
1941 */
1942 return HAL_OK;
1943 }
1944
1945 /**
1946 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
1947 * with the EP/channel
1948 * @param USBx : Selected device
1949 * @param dest : destination pointer
1950 * @param len : Number of bytes to read
1951 * @retval pointer to destination buffer
1952 */
1953 void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len)
1954 {
1955 /* Prevent unused argument(s) compilation warning */
1956 UNUSED(USBx);
1957 UNUSED(dest);
1958 UNUSED(len);
1959 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1960 only by USB OTG FS peripheral.
1961 - This function is added to ensure compatibility across platforms.
1962 */
1963 return ((void *)NULL);
1964 }
1965
1966 /**
1967 * @brief USB_EPSetStall : set a stall condition over an EP
1968 * @param USBx : Selected device
1969 * @param ep: pointer to endpoint structure
1970 * @retval HAL status
1971 */
1972 HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep)
1973 {
1974 if (ep->num == 0)
1975 {
1976 /* This macro sets STALL status for RX & TX*/
1977 PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL);
1978 }
1979 else
1980 {
1981 if (ep->is_in)
1982 {
1983 PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL);
1984 }
1985 else
1986 {
1987 PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL);
1988 }
1989 }
1990 return HAL_OK;
1991 }
1992
1993 /**
1994 * @brief USB_EPClearStall : Clear a stall condition over an EP
1995 * @param USBx : Selected device
1996 * @param ep: pointer to endpoint structure
1997 * @retval HAL status
1998 */
1999 HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
2000 {
2001 if (ep->is_in)
2002 {
2003 PCD_CLEAR_TX_DTOG(USBx, ep->num);
2004 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
2005 }
2006 else
2007 {
2008 PCD_CLEAR_RX_DTOG(USBx, ep->num);
2009 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
2010 }
2011 return HAL_OK;
2012 }
2013
2014 /**
2015 * @brief USB_StopDevice : Stop the usb device mode
2016 * @param USBx : Selected device
2017 * @retval HAL status
2018 */
2019 HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
2020 {
2021 /* disable all interrupts and force USB reset */
2022 USBx->CNTR = USB_CNTR_FRES;
2023
2024 /* clear interrupt status register */
2025 USBx->ISTR = 0;
2026
2027 /* switch-off device */
2028 USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
2029
2030 return HAL_OK;
2031 }
2032
2033 /**
2034 * @brief USB_SetDevAddress : Stop the usb device mode
2035 * @param USBx : Selected device
2036 * @param address : new device address to be assigned
2037 * This parameter can be a value from 0 to 255
2038 * @retval HAL status
2039 */
2040 HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address)
2041 {
2042 if(address == 0)
2043 {
2044 /* set device address and enable function */
2045 USBx->DADDR = USB_DADDR_EF;
2046 }
2047
2048 return HAL_OK;
2049 }
2050
2051 /**
2052 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
2053 * @param USBx : Selected device
2054 * @retval HAL status
2055 */
2056 HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx)
2057 {
2058 /* Prevent unused argument(s) compilation warning */
2059 UNUSED(USBx);
2060 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2061 only by USB OTG FS peripheral.
2062 - This function is added to ensure compatibility across platforms.
2063 */
2064 return HAL_OK;
2065 }
2066
2067 /**
2068 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
2069 * @param USBx : Selected device
2070 * @retval HAL status
2071 */
2072 HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx)
2073 {
2074 /* Prevent unused argument(s) compilation warning */
2075 UNUSED(USBx);
2076 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2077 only by USB OTG FS peripheral.
2078 - This function is added to ensure compatibility across platforms.
2079 */
2080 return HAL_OK;
2081 }
2082
2083 /**
2084 * @brief USB_ReadInterrupts: return the global USB interrupt status
2085 * @param USBx : Selected device
2086 * @retval HAL status
2087 */
2088 uint32_t USB_ReadInterrupts (USB_TypeDef *USBx)
2089 {
2090 uint32_t tmpreg = 0;
2091
2092 tmpreg = USBx->ISTR;
2093 return tmpreg;
2094 }
2095
2096 /**
2097 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
2098 * @param USBx : Selected device
2099 * @retval HAL status
2100 */
2101 uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx)
2102 {
2103 /* Prevent unused argument(s) compilation warning */
2104 UNUSED(USBx);
2105 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2106 only by USB OTG FS peripheral.
2107 - This function is added to ensure compatibility across platforms.
2108 */
2109 return (0);
2110 }
2111
2112 /**
2113 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
2114 * @param USBx : Selected device
2115 * @retval HAL status
2116 */
2117 uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx)
2118 {
2119 /* Prevent unused argument(s) compilation warning */
2120 UNUSED(USBx);
2121 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2122 only by USB OTG FS peripheral.
2123 - This function is added to ensure compatibility across platforms.
2124 */
2125 return (0);
2126 }
2127
2128 /**
2129 * @brief Returns Device OUT EP Interrupt register
2130 * @param USBx : Selected device
2131 * @param epnum : endpoint number
2132 * This parameter can be a value from 0 to 15
2133 * @retval Device OUT EP Interrupt register
2134 */
2135 uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
2136 {
2137 /* Prevent unused argument(s) compilation warning */
2138 UNUSED(USBx);
2139 UNUSED(epnum);
2140 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2141 only by USB OTG FS peripheral.
2142 - This function is added to ensure compatibility across platforms.
2143 */
2144 return (0);
2145 }
2146
2147 /**
2148 * @brief Returns Device IN EP Interrupt register
2149 * @param USBx : Selected device
2150 * @param epnum : endpoint number
2151 * This parameter can be a value from 0 to 15
2152 * @retval Device IN EP Interrupt register
2153 */
2154 uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
2155 {
2156 /* Prevent unused argument(s) compilation warning */
2157 UNUSED(USBx);
2158 UNUSED(epnum);
2159 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2160 only by USB OTG FS peripheral.
2161 - This function is added to ensure compatibility across platforms.
2162 */
2163 return (0);
2164 }
2165
2166 /**
2167 * @brief USB_ClearInterrupts: clear a USB interrupt
2168 * @param USBx : Selected device
2169 * @param interrupt : interrupt flag
2170 * @retval None
2171 */
2172 void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt)
2173 {
2174 /* Prevent unused argument(s) compilation warning */
2175 UNUSED(USBx);
2176 UNUSED(interrupt);
2177 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2178 only by USB OTG FS peripheral.
2179 - This function is added to ensure compatibility across platforms.
2180 */
2181 }
2182
2183 /**
2184 * @brief Prepare the EP0 to start the first control setup
2185 * @param USBx : Selected device
2186 * @param psetup : pointer to setup packet
2187 * @retval HAL status
2188 */
2189 HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
2190 {
2191 /* Prevent unused argument(s) compilation warning */
2192 UNUSED(USBx);
2193 UNUSED(psetup);
2194 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2195 only by USB OTG FS peripheral.
2196 - This function is added to ensure compatibility across platforms.
2197 */
2198 return HAL_OK;
2199 }
2200
2201 /**
2202 * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
2203 * @param USBx : Selected device
2204 * @retval HAL status
2205 */
2206 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
2207 {
2208 USBx->CNTR |= USB_CNTR_RESUME;
2209
2210 return HAL_OK;
2211 }
2212
2213 /**
2214 * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
2215 * @param USBx : Selected device
2216 * @retval HAL status
2217 */
2218 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
2219 {
2220 USBx->CNTR &= ~(USB_CNTR_RESUME);
2221 return HAL_OK;
2222 }
2223
2224 /**
2225 * @brief Copy a buffer from user memory area to packet memory area (PMA)
2226 * @param USBx : pointer to USB register.
2227 * @param pbUsrBuf : pointer to user memory area.
2228 * @param wPMABufAddr : address into PMA.
2229 * @param wNBytes : number of bytes to be copied.
2230 * @retval None
2231 */
2232 void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
2233 {
2234 uint32_t nbytes = (wNBytes + 1) >> 1; /* nbytes = (wNBytes + 1) / 2 */
2235 uint32_t index = 0, temp1 = 0, temp2 = 0;
2236 uint16_t *pdwVal = NULL;
2237
2238 pdwVal = (uint16_t *)(wPMABufAddr * 2 + (uint32_t)USBx + 0x400);
2239 for (index = nbytes; index != 0; index--)
2240 {
2241 temp1 = (uint16_t) * pbUsrBuf;
2242 pbUsrBuf++;
2243 temp2 = temp1 | (uint16_t) * pbUsrBuf << 8;
2244 *pdwVal++ = temp2;
2245 pdwVal++;
2246 pbUsrBuf++;
2247 }
2248 }
2249
2250 /**
2251 * @brief Copy a buffer from user memory area to packet memory area (PMA)
2252 * @param USBx : pointer to USB register.
2253 * @param pbUsrBuf : pointer to user memory area.
2254 * @param wPMABufAddr : address into PMA.
2255 * @param wNBytes : number of bytes to be copied.
2256 * @retval None
2257 */
2258 void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
2259 {
2260 uint32_t nbytes = (wNBytes + 1) >> 1;/* /2*/
2261 uint32_t index = 0;
2262 uint32_t *pdwVal = NULL;
2263
2264 pdwVal = (uint32_t *)(wPMABufAddr * 2 + (uint32_t)USBx + 0x400);
2265 for (index = nbytes; index != 0; index--)
2266 {
2267 *(uint16_t*)pbUsrBuf++ = *pdwVal++;
2268 pbUsrBuf++;
2269 }
2270 }
2271
2272 #endif /* USB */
2273
2274 /**
2275 * @}
2276 */
2277 /**
2278 * @}
2279 */
2280
2281 #if defined (USB_OTG_FS)
2282 /** @addtogroup USB_LL_Private_Functions
2283 * @{
2284 */
2285 /**
2286 * @brief Reset the USB Core (needed after USB clock settings change)
2287 * @param USBx : Selected device
2288 * @retval HAL status
2289 */
2290 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
2291 {
2292 uint32_t count = 0;
2293
2294 /* Wait for AHB master IDLE state. */
2295 do
2296 {
2297 if (++count > 200000)
2298 {
2299 return HAL_TIMEOUT;
2300 }
2301 }
2302 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
2303
2304 /* Core Soft Reset */
2305 count = 0;
2306 USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
2307
2308 do
2309 {
2310 if (++count > 200000)
2311 {
2312 return HAL_TIMEOUT;
2313 }
2314 }
2315 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
2316
2317 return HAL_OK;
2318 }
2319 /**
2320 * @}
2321 */
2322 #endif /* USB_OTG_FS */
2323
2324 #endif /* STM32F102x6 || STM32F102xB || */
2325 /* STM32F103x6 || STM32F103xB || */
2326 /* STM32F103xE || STM32F103xG || */
2327 /* STM32F105xC || STM32F107xC */
2328
2329 #endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
2330
2331 /**
2332 * @}
2333 */
2334
2335 /**
2336 * @}
2337 */
2338 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/