1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_dot_prod_q15.c
4 * Description: Q15 dot product
6 * $Date: 27. January 2017
9 * Target Processor: Cortex-M cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
20 * www.apache.org/licenses/LICENSE-2.0
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
36 * @addtogroup dot_prod
41 * @brief Dot product of Q15 vectors.
42 * @param[in] *pSrcA points to the first input vector
43 * @param[in] *pSrcB points to the second input vector
44 * @param[in] blockSize number of samples in each vector
45 * @param[out] *result output result returned here
48 * <b>Scaling and Overflow Behavior:</b>
50 * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
51 * results are added to a 64-bit accumulator in 34.30 format.
52 * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
53 * there is no risk of overflow.
54 * The return result is in 34.30 format.
57 void arm_dot_prod_q15(
63 q63_t sum
= 0; /* Temporary result storage */
64 uint32_t blkCnt
; /* loop counter */
66 #if defined (ARM_MATH_DSP)
68 /* Run the below code for Cortex-M4 and Cortex-M3 */
72 blkCnt
= blockSize
>> 2U;
74 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 ** a second loop below computes the remaining 1 to 3 samples. */
78 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
79 /* Calculate dot product and then store the result in a temporary buffer. */
80 sum
= __SMLALD(*__SIMD32(pSrcA
)++, *__SIMD32(pSrcB
)++, sum
);
81 sum
= __SMLALD(*__SIMD32(pSrcA
)++, *__SIMD32(pSrcB
)++, sum
);
83 /* Decrement the loop counter */
87 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 ** No loop unrolling is used. */
89 blkCnt
= blockSize
% 0x4U
;
93 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
94 /* Calculate dot product and then store the results in a temporary buffer. */
95 sum
= __SMLALD(*pSrcA
++, *pSrcB
++, sum
);
97 /* Decrement the loop counter */
104 /* Run the below code for Cortex-M0 */
106 /* Initialize blkCnt with number of samples */
111 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
112 /* Calculate dot product and then store the results in a temporary buffer. */
113 sum
+= (q63_t
) ((q31_t
) * pSrcA
++ * *pSrcB
++);
115 /* Decrement the loop counter */
119 #endif /* #if defined (ARM_MATH_DSP) */
121 /* Store the result in the destination buffer in 34.30 format */
127 * @} end of dot_prod group