Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / CMSIS / DSP / Source / StatisticsFunctions / arm_power_q7.c
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1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_power_q7.c
4 * Description: Sum of the squares of the elements of a Q7 vector
6 * $Date: 27. January 2017
7 * $Revision: V.1.5.1
9 * Target Processor: Cortex-M cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
20 * www.apache.org/licenses/LICENSE-2.0
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
29 #include "arm_math.h"
31 /**
32 * @ingroup groupStats
35 /**
36 * @addtogroup power
37 * @{
40 /**
41 * @brief Sum of the squares of the elements of a Q7 vector.
42 * @param[in] *pSrc points to the input vector
43 * @param[in] blockSize length of the input vector
44 * @param[out] *pResult sum of the squares value returned here
45 * @return none.
47 * @details
48 * <b>Scaling and Overflow Behavior:</b>
50 * \par
51 * The function is implemented using a 32-bit internal accumulator.
52 * The input is represented in 1.7 format.
53 * Intermediate multiplication yields a 2.14 format, and this
54 * result is added without saturation to an accumulator in 18.14 format.
55 * With 17 guard bits in the accumulator, there is no risk of overflow, and the
56 * full precision of the intermediate multiplication is preserved.
57 * Finally, the return result is in 18.14 format.
61 void arm_power_q7(
62 q7_t * pSrc,
63 uint32_t blockSize,
64 q31_t * pResult)
66 q31_t sum = 0; /* Temporary result storage */
67 q7_t in; /* Temporary variable to store input */
68 uint32_t blkCnt; /* loop counter */
70 #if defined (ARM_MATH_DSP)
71 /* Run the below code for Cortex-M4 and Cortex-M3 */
73 q31_t input1; /* Temporary variable to store packed input */
74 q31_t in1, in2; /* Temporary variables to store input */
76 /*loop Unrolling */
77 blkCnt = blockSize >> 2U;
79 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
80 ** a second loop below computes the remaining 1 to 3 samples. */
81 while (blkCnt > 0U)
83 /* Reading two inputs of pSrc vector and packing */
84 input1 = *__SIMD32(pSrc)++;
86 in1 = __SXTB16(__ROR(input1, 8));
87 in2 = __SXTB16(input1);
89 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
90 /* calculate power and accumulate to accumulator */
91 sum = __SMLAD(in1, in1, sum);
92 sum = __SMLAD(in2, in2, sum);
94 /* Decrement the loop counter */
95 blkCnt--;
98 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
99 ** No loop unrolling is used. */
100 blkCnt = blockSize % 0x4U;
102 #else
103 /* Run the below code for Cortex-M0 */
105 /* Loop over blockSize number of values */
106 blkCnt = blockSize;
108 #endif /* #if defined (ARM_MATH_DSP) */
110 while (blkCnt > 0U)
112 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
113 /* Compute Power and then store the result in a temporary variable, sum. */
114 in = *pSrc++;
115 sum += ((q15_t) in * in);
117 /* Decrement the loop counter */
118 blkCnt--;
121 /* Store the result in 18.14 format */
122 *pResult = sum;
126 * @} end of power group