Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32F1 / Drivers / STM32F1xx_HAL_Driver / Inc / stm32f1xx_hal_i2s.h
blob07988283da88ef8e391eb23ed588eb2790c5bb9b
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_i2s.h
4 * @author MCD Application Team
5 * @version V1.1.1
6 * @date 12-May-2017
7 * @brief Header file of I2S HAL module.
8 ******************************************************************************
9 * @attention
11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_HAL_I2S_H
40 #define __STM32F1xx_HAL_I2S_H
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
46 #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
48 /* Includes ------------------------------------------------------------------*/
49 #include "stm32f1xx_hal_def.h"
51 /** @addtogroup STM32F1xx_HAL_Driver
52 * @{
55 /** @addtogroup I2S
56 * @{
59 /* Exported types ------------------------------------------------------------*/
60 /** @defgroup I2S_Exported_Types I2S Exported Types
61 * @{
64 /**
65 * @brief I2S Init structure definition
67 typedef struct
69 uint32_t Mode; /*!< Specifies the I2S operating mode.
70 This parameter can be a value of @ref I2S_Mode */
72 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
73 This parameter can be a value of @ref I2S_Standard */
75 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
76 This parameter can be a value of @ref I2S_Data_Format */
78 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
79 This parameter can be a value of @ref I2S_MCLK_Output */
81 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
82 This parameter can be a value of @ref I2S_Audio_Frequency */
84 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
85 This parameter can be a value of @ref I2S_Clock_Polarity */
86 }I2S_InitTypeDef;
88 /**
89 * @brief HAL State structures definition
91 typedef enum
93 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
94 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
95 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
96 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
97 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
98 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
99 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
100 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
102 }HAL_I2S_StateTypeDef;
105 * @brief I2S handle Structure definition
107 typedef struct __I2S_HandleTypeDef
109 SPI_TypeDef *Instance; /*!< I2S registers base address */
111 I2S_InitTypeDef Init; /*!< I2S communication parameters */
113 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
115 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
117 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
119 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
121 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
123 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
124 (This field is initialized at the
125 same value as transfer size at the
126 beginning of the transfer and
127 decremented when a sample is received
128 NbSamplesReceived = RxBufferSize-RxBufferCount) */
130 void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
132 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
134 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
136 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
138 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
140 __IO uint32_t ErrorCode; /*!< I2S Error code
141 This parameter can be a value of @ref I2S_ErrorCode */
143 }I2S_HandleTypeDef;
145 * @}
148 /* Exported constants --------------------------------------------------------*/
149 /** @defgroup I2S_Exported_Constants I2S Exported Constants
150 * @{
153 * @defgroup I2S_ErrorCode I2S Error Code
154 * @{
156 #define HAL_I2S_ERROR_NONE 0x00000000U /*!< No error */
157 #define HAL_I2S_ERROR_TIMEOUT 0x00000001U /*!< Timeout error */
158 #define HAL_I2S_ERROR_OVR 0x00000002U /*!< OVR error */
159 #define HAL_I2S_ERROR_UDR 0x00000004U /*!< UDR error */
160 #define HAL_I2S_ERROR_DMA 0x00000008U /*!< DMA transfer error */
161 #define HAL_I2S_ERROR_PRESCALER 0x00000010U /*!< Prescaler Calculation error */
163 * @}
166 /** @defgroup I2S_Mode I2S Mode
167 * @{
169 #define I2S_MODE_SLAVE_TX 0x00000000U
170 #define I2S_MODE_SLAVE_RX ((uint32_t)SPI_I2SCFGR_I2SCFG_0)
171 #define I2S_MODE_MASTER_TX ((uint32_t)SPI_I2SCFGR_I2SCFG_1)
172 #define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
174 * @}
177 /** @defgroup I2S_Standard I2S Standard
178 * @{
180 #define I2S_STANDARD_PHILIPS 0x00000000U
181 #define I2S_STANDARD_MSB ((uint32_t)SPI_I2SCFGR_I2SSTD_0)
182 #define I2S_STANDARD_LSB ((uint32_t)SPI_I2SCFGR_I2SSTD_1)
183 #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
184 #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
186 * @}
189 /** @defgroup I2S_Data_Format I2S Data Format
190 * @{
192 #define I2S_DATAFORMAT_16B 0x00000000U
193 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)SPI_I2SCFGR_CHLEN)
194 #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
195 #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
197 * @}
200 /** @defgroup I2S_MCLK_Output I2S Mclk Output
201 * @{
203 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
204 #define I2S_MCLKOUTPUT_DISABLE 0x00000000U
206 * @}
209 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
210 * @{
212 #define I2S_AUDIOFREQ_192K 192000U
213 #define I2S_AUDIOFREQ_96K 96000U
214 #define I2S_AUDIOFREQ_48K 48000U
215 #define I2S_AUDIOFREQ_44K 44100U
216 #define I2S_AUDIOFREQ_32K 32000U
217 #define I2S_AUDIOFREQ_22K 22050U
218 #define I2S_AUDIOFREQ_16K 16000U
219 #define I2S_AUDIOFREQ_11K 11025U
220 #define I2S_AUDIOFREQ_8K 8000U
221 #define I2S_AUDIOFREQ_DEFAULT 2U
223 * @}
226 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
227 * @{
229 #define I2S_CPOL_LOW 0x00000000U
230 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
232 * @}
235 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
236 * @{
238 #define I2S_IT_TXE SPI_CR2_TXEIE
239 #define I2S_IT_RXNE SPI_CR2_RXNEIE
240 #define I2S_IT_ERR SPI_CR2_ERRIE
242 * @}
245 /** @defgroup I2S_Flags_Definition I2S Flags Definition
246 * @{
248 #define I2S_FLAG_TXE SPI_SR_TXE
249 #define I2S_FLAG_RXNE SPI_SR_RXNE
251 #define I2S_FLAG_UDR SPI_SR_UDR
252 #define I2S_FLAG_OVR SPI_SR_OVR
253 #define I2S_FLAG_FRE SPI_SR_FRE
255 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
256 #define I2S_FLAG_BSY SPI_SR_BSY
258 * @}
262 * @}
265 /* Exported macro ------------------------------------------------------------*/
266 /** @defgroup I2S_Exported_Macros I2S Exported Macros
267 * @{
270 /** @brief Reset I2S handle state
271 * @param __HANDLE__: specifies the I2S Handle.
272 * @retval None
274 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
276 /** @brief Enable the specified SPI peripheral (in I2S mode).
277 * @param __HANDLE__: specifies the I2S Handle.
278 * @retval None
280 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
282 /** @brief Disable the specified SPI peripheral (in I2S mode).
283 * @param __HANDLE__: specifies the I2S Handle.
284 * @retval None
286 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
288 /** @brief Enable the specified I2S interrupts.
289 * @param __HANDLE__: specifies the I2S Handle.
290 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
291 * This parameter can be one of the following values:
292 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
293 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
294 * @arg I2S_IT_ERR: Error interrupt enable
295 * @retval None
297 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
299 /** @brief Disable the specified I2S interrupts.
300 * @param __HANDLE__: specifies the I2S Handle.
301 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
302 * This parameter can be one of the following values:
303 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
304 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
305 * @arg I2S_IT_ERR: Error interrupt enable
306 * @retval None
308 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
310 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
311 * @param __HANDLE__: specifies the I2S Handle.
312 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
313 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
314 * This parameter can be one of the following values:
315 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
316 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
317 * @arg I2S_IT_ERR: Error interrupt enable
318 * @retval The new state of __IT__ (TRUE or FALSE).
320 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
322 /** @brief Checks whether the specified I2S flag is set or not.
323 * @param __HANDLE__: specifies the I2S Handle.
324 * @param __FLAG__: specifies the flag to check.
325 * This parameter can be one of the following values:
326 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
327 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
328 * @arg I2S_FLAG_UDR: Underrun flag
329 * @arg I2S_FLAG_OVR: Overrun flag
330 * @arg I2S_FLAG_FRE: Frame error flag
331 * @arg I2S_FLAG_CHSIDE: Channel Side flag
332 * @arg I2S_FLAG_BSY: Busy flag
333 * @retval The new state of __FLAG__ (TRUE or FALSE).
335 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
337 /** @brief Clears the I2S OVR pending flag.
338 * @param __HANDLE__: specifies the I2S Handle.
339 * @retval None
341 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
342 do{ \
343 __IO uint32_t tmpreg = 0x00U; \
344 tmpreg = (__HANDLE__)->Instance->DR; \
345 tmpreg = (__HANDLE__)->Instance->SR; \
346 UNUSED(tmpreg); \
347 } while(0U)
349 /** @brief Clears the I2S UDR pending flag.
350 * @param __HANDLE__: specifies the I2S Handle.
351 * @retval None
353 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
354 do{ \
355 __IO uint32_t tmpreg = 0x00U; \
356 tmpreg = (__HANDLE__)->Instance->SR; \
357 UNUSED(tmpreg); \
358 } while(0U)
360 * @}
363 /* Exported functions --------------------------------------------------------*/
364 /** @addtogroup I2S_Exported_Functions
365 * @{
368 /** @addtogroup I2S_Exported_Functions_Group1
369 * @{
371 /* Initialization/de-initialization functions ********************************/
372 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
373 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
374 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
375 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
377 * @}
380 /** @addtogroup I2S_Exported_Functions_Group2
381 * @{
383 /* I/O operation functions ***************************************************/
384 /* Blocking mode: Polling */
385 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
386 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
388 /* Non-Blocking mode: Interrupt */
389 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
390 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
391 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
393 /* Non-Blocking mode: DMA */
394 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
395 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
397 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
398 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
399 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
401 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
402 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
403 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
404 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
405 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
406 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
408 * @}
411 /** @addtogroup I2S_Exported_Functions_Group3
412 * @{
414 /* Peripheral Control and State functions ************************************/
415 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
416 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
418 * @}
422 * @}
425 /* Private types -------------------------------------------------------------*/
426 /* Private variables ---------------------------------------------------------*/
427 /* Private constants ---------------------------------------------------------*/
428 /** @defgroup I2S_Private_Constants I2S Private Constants
429 * @{
433 * @}
436 /* Private macros ------------------------------------------------------------*/
437 /** @defgroup I2S_Private_Macros I2S Private Macros
438 * @{
440 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
441 ((MODE) == I2S_MODE_SLAVE_RX) || \
442 ((MODE) == I2S_MODE_MASTER_TX) || \
443 ((MODE) == I2S_MODE_MASTER_RX))
445 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
446 ((STANDARD) == I2S_STANDARD_MSB) || \
447 ((STANDARD) == I2S_STANDARD_LSB) || \
448 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
449 ((STANDARD) == I2S_STANDARD_PCM_LONG))
451 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
452 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
453 ((FORMAT) == I2S_DATAFORMAT_24B) || \
454 ((FORMAT) == I2S_DATAFORMAT_32B))
456 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
457 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
459 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
460 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
461 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
463 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
464 ((CPOL) == I2S_CPOL_HIGH))
466 * @}
469 /* Private Fonctions ---------------------------------------------------------*/
470 /** @defgroup I2S_Private_Functions I2S Private Functions
471 * @{
473 /* Private functions are defined in stm32f1xx_hal_i2s.c file */
475 * @}
479 * @}
483 * @}
485 #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
487 #ifdef __cplusplus
489 #endif
491 #endif /* __STM32F1xx_HAL_I2S_H */
493 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/