lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_spi.h
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   Header file of SPI HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_HAL_SPI_H
  40 #define __STM32F1xx_HAL_SPI_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f1xx_hal_def.h"
  48
  49 /** @addtogroup STM32F1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup SPI
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup SPI_Exported_Types SPI Exported Types
  59   * @{
  60   */
  61
  62 /**
  63   * @brief  SPI Configuration Structure definition
  64   */
  65 typedef struct
  66 {
  67   uint32_t Mode;               /*!< Specifies the SPI operating mode.
  68                                     This parameter can be a value of @ref SPI_Mode */
  69
  70   uint32_t Direction;          /*!< Specifies the SPI Directional mode state.
  71                                     This parameter can be a value of @ref SPI_Direction */
  72
  73   uint32_t DataSize;           /*!< Specifies the SPI data size.
  74                                     This parameter can be a value of @ref SPI_Data_Size */
  75
  76   uint32_t CLKPolarity;        /*!< Specifies the serial clock steady state.
  77                                     This parameter can be a value of @ref SPI_Clock_Polarity */
  78
  79   uint32_t CLKPhase;           /*!< Specifies the clock active edge for the bit capture.
  80                                     This parameter can be a value of @ref SPI_Clock_Phase */
  81
  82   uint32_t NSS;                /*!< Specifies whether the NSS signal is managed by
  83                                     hardware (NSS pin) or by software using the SSI bit.
  84                                     This parameter can be a value of @ref SPI_Slave_Select_management */
  85
  86   uint32_t BaudRatePrescaler;  /*!< Specifies the Baud Rate prescaler value which will be
  87                                     used to configure the transmit and receive SCK clock.
  88                                     This parameter can be a value of @ref SPI_BaudRate_Prescaler
  89                                     @note The communication clock is derived from the master
  90                                      clock. The slave clock does not need to be set. */
  91
  92   uint32_t FirstBit;           /*!< Specifies whether data transfers start from MSB or LSB bit.
  93                                     This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  94
  95   uint32_t TIMode;             /*!< Specifies if the TI mode is enabled or not.
  96                                     This parameter can be a value of @ref SPI_TI_mode */
  97
  98   uint32_t CRCCalculation;     /*!< Specifies if the CRC calculation is enabled or not.
  99                                     This parameter can be a value of @ref SPI_CRC_Calculation */
 100
 101   uint32_t CRCPolynomial;      /*!< Specifies the polynomial used for the CRC calculation.
 102                                     This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
 103 }SPI_InitTypeDef;
 104
 105 /**
 106   * @brief  HAL SPI State structure definition
 107   */
 108 typedef enum
 109 {
 110   HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
 111   HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
 112   HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
 113   HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
 114   HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
 115   HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing */
 116   HAL_SPI_STATE_ERROR      = 0x06U     /*!< SPI error state                                    */
 117 }HAL_SPI_StateTypeDef;
 118
 119 /**
 120   * @brief  SPI handle Structure definition
 121   */
 122 typedef struct __SPI_HandleTypeDef
 123 {
 124   SPI_TypeDef                *Instance;    /*!< SPI registers base address */
 125
 126   SPI_InitTypeDef            Init;         /*!< SPI communication parameters */
 127
 128   uint8_t                    *pTxBuffPtr;  /*!< Pointer to SPI Tx transfer Buffer */
 129
 130   uint16_t                   TxXferSize;   /*!< SPI Tx Transfer size */
 131
 132   __IO uint16_t              TxXferCount;  /*!< SPI Tx Transfer Counter */
 133
 134   uint8_t                    *pRxBuffPtr;  /*!< Pointer to SPI Rx transfer Buffer */
 135
 136   uint16_t                   RxXferSize;   /*!< SPI Rx Transfer size */
 137
 138   __IO uint16_t              RxXferCount;  /*!< SPI Rx Transfer Counter */
 139
 140   void                       (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
 141
 142   void                       (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
 143
 144   DMA_HandleTypeDef          *hdmatx;      /*!< SPI Tx DMA Handle parameters   */
 145
 146   DMA_HandleTypeDef          *hdmarx;      /*!< SPI Rx DMA Handle parameters   */
 147
 148   HAL_LockTypeDef            Lock;         /*!< Locking object                 */
 149
 150   __IO HAL_SPI_StateTypeDef  State;        /*!< SPI communication state */
 151
 152   __IO uint32_t              ErrorCode;    /*!< SPI Error code */
 153
 154 }SPI_HandleTypeDef;
 155
 156 /**
 157   * @}
 158   */
 159
 160 /* Exported constants --------------------------------------------------------*/
 161 /** @defgroup SPI_Exported_Constants SPI Exported Constants
 162   * @{
 163   */
 164
 165 /** @defgroup SPI_Error_Code SPI Error Code
 166   * @{
 167   */
 168 #define HAL_SPI_ERROR_NONE              0x00000000U   /*!< No error             */
 169 #define HAL_SPI_ERROR_MODF              0x00000001U   /*!< MODF error           */
 170 #define HAL_SPI_ERROR_CRC               0x00000002U   /*!< CRC error            */
 171 #define HAL_SPI_ERROR_OVR               0x00000004U   /*!< OVR error            */
 172 #define HAL_SPI_ERROR_FRE               0x00000008U   /*!< FRE error            */
 173 #define HAL_SPI_ERROR_DMA               0x00000010U   /*!< DMA transfer error   */
 174 #define HAL_SPI_ERROR_FLAG              0x00000020U   /*!< Flag: RXNE,TXE, BSY  */
 175 /**
 176   * @}
 177   */
 178
 179 /** @defgroup SPI_Mode SPI Mode
 180   * @{
 181   */
 182 #define SPI_MODE_SLAVE                  0x00000000U
 183 #define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
 184 /**
 185   * @}
 186   */
 187
 188 /** @defgroup SPI_Direction SPI Direction Mode
 189   * @{
 190   */
 191 #define SPI_DIRECTION_2LINES            0x00000000U
 192 #define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
 193 #define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
 194 /**
 195   * @}
 196   */
 197
 198 /** @defgroup SPI_Data_Size SPI Data Size
 199   * @{
 200   */
 201 #define SPI_DATASIZE_8BIT               0x00000000U
 202 #define SPI_DATASIZE_16BIT              SPI_CR1_DFF
 203 /**
 204   * @}
 205   */
 206
 207 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
 208   * @{
 209   */
 210 #define SPI_POLARITY_LOW                0x00000000U
 211 #define SPI_POLARITY_HIGH               SPI_CR1_CPOL
 212 /**
 213   * @}
 214   */
 215
 216 /** @defgroup SPI_Clock_Phase SPI Clock Phase
 217   * @{
 218   */
 219 #define SPI_PHASE_1EDGE                 0x00000000U
 220 #define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
 221 /**
 222   * @}
 223   */
 224
 225 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
 226   * @{
 227   */
 228 #define SPI_NSS_SOFT                    SPI_CR1_SSM
 229 #define SPI_NSS_HARD_INPUT              0x00000000U
 230 #define SPI_NSS_HARD_OUTPUT             ((uint32_t)(SPI_CR2_SSOE << 16))
 231 /**
 232   * @}
 233   */
 234
 235 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
 236   * @{
 237   */
 238 #define SPI_BAUDRATEPRESCALER_2         0x00000000U
 239 #define SPI_BAUDRATEPRESCALER_4         SPI_CR1_BR_0
 240 #define SPI_BAUDRATEPRESCALER_8         SPI_CR1_BR_1
 241 #define SPI_BAUDRATEPRESCALER_16        (uint32_t)(SPI_CR1_BR_1 | SPI_CR1_BR_0)
 242 #define SPI_BAUDRATEPRESCALER_32        SPI_CR1_BR_2
 243 #define SPI_BAUDRATEPRESCALER_64        (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_0)
 244 #define SPI_BAUDRATEPRESCALER_128       (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1)
 245 #define SPI_BAUDRATEPRESCALER_256       (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
 246
 247 /**
 248   * @}
 249   */
 250
 251 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
 252   * @{
 253   */
 254 #define SPI_FIRSTBIT_MSB                0x00000000U
 255 #define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
 256 /**
 257   * @}
 258   */
 259
 260 /** @defgroup SPI_TI_mode SPI TI Mode
 261   * @{
 262   */
 263 #define SPI_TIMODE_DISABLE             0x00000000U
 264 /**
 265   * @}
 266   */
 267
 268 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
 269   * @{
 270   */
 271 #define SPI_CRCCALCULATION_DISABLE     0x00000000U
 272 #define SPI_CRCCALCULATION_ENABLE      SPI_CR1_CRCEN
 273 /**
 274   * @}
 275   */
 276
 277 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
 278   * @{
 279   */
 280 #define SPI_IT_TXE                      SPI_CR2_TXEIE
 281 #define SPI_IT_RXNE                     SPI_CR2_RXNEIE
 282 #define SPI_IT_ERR                      SPI_CR2_ERRIE
 283 /**
 284   * @}
 285   */
 286
 287 /** @defgroup SPI_Flags_definition SPI Flags Definition
 288   * @{
 289   */
 290 #define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag */
 291 #define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag */
 292 #define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag */
 293 #define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
 294 #define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag */
 295 #define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag */
 296 /**
 297   * @}
 298   */
 299
 300 /**
 301   * @}
 302   */
 303
 304 /* Exported macro ------------------------------------------------------------*/
 305 /** @defgroup SPI_Exported_Macros SPI Exported Macros
 306   * @{
 307   */
 308
 309 /** @brief  Reset SPI handle state.
 310   * @param  __HANDLE__: specifies the SPI Handle.
 311   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 312   * @retval None
 313   */
 314 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
 315
 316 /** @brief  Enable the specified SPI interrupts.
 317   * @param  __HANDLE__: specifies the SPI handle.
 318   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 319   * @param  __INTERRUPT__: specifies the interrupt source to enable.
 320   *         This parameter can be one of the following values:
 321   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 322   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 323   *            @arg SPI_IT_ERR: Error interrupt enable
 324   * @retval None
 325   */
 326 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
 327
 328 /** @brief  Disable the specified SPI interrupts.
 329   * @param  __HANDLE__: specifies the SPI handle.
 330   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 331   * @param  __INTERRUPT__: specifies the interrupt source to disable.
 332   *         This parameter can be one of the following values:
 333   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 334   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 335   *            @arg SPI_IT_ERR: Error interrupt enable
 336   * @retval None
 337   */
 338 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
 339
 340 /** @brief  Check whether the specified SPI interrupt source is enabled or not.
 341   * @param  __HANDLE__: specifies the SPI Handle.
 342   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 343   * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
 344   *          This parameter can be one of the following values:
 345   *             @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 346   *             @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 347   *             @arg SPI_IT_ERR: Error interrupt enable
 348   * @retval The new state of __IT__ (TRUE or FALSE).
 349   */
 350 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 351
 352 /** @brief  Check whether the specified SPI flag is set or not.
 353   * @param  __HANDLE__: specifies the SPI Handle.
 354   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 355   * @param  __FLAG__: specifies the flag to check.
 356   *         This parameter can be one of the following values:
 357   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
 358   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
 359   *            @arg SPI_FLAG_CRCERR: CRC error flag
 360   *            @arg SPI_FLAG_MODF: Mode fault flag
 361   *            @arg SPI_FLAG_OVR: Overrun flag
 362   *            @arg SPI_FLAG_BSY: Busy flag
 363   * @retval The new state of __FLAG__ (TRUE or FALSE).
 364   */
 365 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 366
 367 /** @brief  Clear the SPI CRCERR pending flag.
 368   * @param  __HANDLE__: specifies the SPI Handle.
 369   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 370   * @retval None
 371   */
 372 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
 373
 374 /** @brief  Clear the SPI MODF pending flag.
 375   * @param  __HANDLE__: specifies the SPI Handle.
 376   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 377   * @retval None
 378   */
 379 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)       \
 380 do{                                                \
 381     __IO uint32_t tmpreg_modf = 0x00U;             \
 382     tmpreg_modf = (__HANDLE__)->Instance->SR;      \
 383     (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
 384     UNUSED(tmpreg_modf);                           \
 385   } while(0U)
 386
 387 /** @brief  Clear the SPI OVR pending flag.
 388   * @param  __HANDLE__: specifies the SPI Handle.
 389   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 390   * @retval None
 391   */
 392 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)        \
 393 do{                                                \
 394     __IO uint32_t tmpreg_ovr = 0x00U;              \
 395     tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
 396     tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
 397     UNUSED(tmpreg_ovr);                            \
 398   } while(0U)
 399
 400
 401 /** @brief  Enable the SPI peripheral.
 402   * @param  __HANDLE__: specifies the SPI Handle.
 403   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 404   * @retval None
 405   */
 406 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |=  SPI_CR1_SPE)
 407
 408 /** @brief  Disable the SPI peripheral.
 409   * @param  __HANDLE__: specifies the SPI Handle.
 410   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 411   * @retval None
 412   */
 413 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
 414 /**
 415   * @}
 416   */
 417
 418 /* Exported functions --------------------------------------------------------*/
 419 /** @addtogroup SPI_Exported_Functions
 420   * @{
 421   */
 422
 423 /** @addtogroup SPI_Exported_Functions_Group1
 424   * @{
 425   */
 426 /* Initialization/de-initialization functions  **********************************/
 427 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
 428 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
 429 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
 430 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
 431 /**
 432   * @}
 433   */
 434
 435 /** @addtogroup SPI_Exported_Functions_Group2
 436   * @{
 437   */
 438 /* I/O operation functions  *****************************************************/
 439 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 440 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 441 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
 442 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 443 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 444 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
 445 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 446 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 447 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
 448 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
 449 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
 450 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
 451 /* Transfer Abort functions */
 452 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
 453 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
 454
 455 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
 456 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
 457 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
 458 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
 459 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 460 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 461 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 462 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
 463 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
 464 /**
 465   * @}
 466   */
 467
 468 /** @addtogroup SPI_Exported_Functions_Group3
 469   * @{
 470   */
 471 /* Peripheral State and Error functions ***************************************/
 472 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
 473 uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
 474 /**
 475   * @}
 476   */
 477
 478 /**
 479   * @}
 480   */
 481
 482 /* Private types -------------------------------------------------------------*/
 483 /* Private variables ---------------------------------------------------------*/
 484 /* Private constants ---------------------------------------------------------*/
 485 /** @defgroup SPI_Private_Constants SPI Private Constants
 486   * @{
 487   */
 488 #define SPI_INVALID_CRC_ERROR     0U          /* CRC error wrongly detected */
 489 #define SPI_VALID_CRC_ERROR       1U          /* CRC error is true */
 490 /**
 491   * @}
 492   */
 493 /* Private macros ------------------------------------------------------------*/
 494 /** @defgroup SPI_Private_Macros SPI Private Macros
 495   * @{
 496   */
 497
 498 /** @brief  Set the SPI transmit-only mode.
 499   * @param  __HANDLE__: specifies the SPI Handle.
 500   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 501   * @retval None
 502   */
 503 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
 504
 505 /** @brief  Set the SPI receive-only mode.
 506   * @param  __HANDLE__: specifies the SPI Handle.
 507   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 508   * @retval None
 509   */
 510 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
 511
 512 /** @brief  Reset the CRC calculation of the SPI.
 513   * @param  __HANDLE__: specifies the SPI Handle.
 514   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 515   * @retval None
 516   */
 517 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
 518                                      (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0U)
 519
 520 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
 521                            ((MODE) == SPI_MODE_MASTER))
 522
 523 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES)        || \
 524                                 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
 525                                 ((MODE) == SPI_DIRECTION_1LINE))
 526
 527 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
 528
 529 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)  || \
 530                                                 ((MODE) == SPI_DIRECTION_1LINE))
 531
 532 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
 533                                    ((DATASIZE) == SPI_DATASIZE_8BIT))
 534
 535 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
 536                            ((CPOL) == SPI_POLARITY_HIGH))
 537
 538 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
 539                            ((CPHA) == SPI_PHASE_2EDGE))
 540
 541 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT)       || \
 542                          ((NSS) == SPI_NSS_HARD_INPUT) || \
 543                          ((NSS) == SPI_NSS_HARD_OUTPUT))
 544
 545 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2)   || \
 546                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_4)   || \
 547                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_8)   || \
 548                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_16)  || \
 549                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_32)  || \
 550                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_64)  || \
 551                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
 552                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
 553
 554 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
 555                                ((BIT) == SPI_FIRSTBIT_LSB))
 556
 557 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
 558                                              ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
 559
 560 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU))
 561
 562 /**
 563   * @}
 564   */
 565
 566 /* Private functions ---------------------------------------------------------*/
 567 /** @defgroup SPI_Private_Functions SPI Private Functions
 568   * @{
 569   */
 570 uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
 571 /**
 572   * @}
 573   */
 574
 575 /**
 576   * @}
 577   */
 578
 579 /**
 580   * @}
 581   */
 582
 583 #ifdef __cplusplus
 584 }
 585 #endif
 586
 587 #endif /* __STM32F1xx_HAL_SPI_H */
 588
 589 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/