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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32F1 / Drivers / STM32F1xx_HAL_Driver / Inc / stm32f1xx_ll_pwr.h
blob45d5f0cc1b8177d5d3cae01b3928b7e75ae8270b
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_ll_pwr.h
4 * @author MCD Application Team
5 * @version V1.1.1
6 * @date 12-May-2017
7 * @brief Header file of PWR LL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_LL_PWR_H
40 #define __STM32F1xx_LL_PWR_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f1xx.h"
48
49 /** @addtogroup STM32F1xx_LL_Driver
50 * @{
51 */
52
53 #if defined(PWR)
54
55 /** @defgroup PWR_LL PWR
56 * @{
57 */
58
59 /* Private types -------------------------------------------------------------*/
60 /* Private variables ---------------------------------------------------------*/
61 /* Private constants ---------------------------------------------------------*/
62 /* Private macros ------------------------------------------------------------*/
63 /* Exported types ------------------------------------------------------------*/
64 /* Exported constants --------------------------------------------------------*/
65 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
66 * @{
67 */
68
69 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
70 * @brief Flags defines which can be used with LL_PWR_WriteReg function
71 * @{
72 */
73 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
74 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
75 /**
76 * @}
77 */
78
79 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
80 * @brief Flags defines which can be used with LL_PWR_ReadReg function
81 * @{
82 */
83 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
84 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
85 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
86 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
87 /**
88 * @}
89 */
90
91
92 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
93 * @{
94 */
95 #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
96 #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
97 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
98 /**
99 * @}
100 */
101
102 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
103 * @{
104 */
105 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
106 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
107 /**
108 * @}
109 */
110
111 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
112 * @{
113 */
114 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
115 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
116 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
117 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
118 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
119 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
120 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
121 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
122 /**
123 * @}
124 */
125 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
126 * @{
127 */
128 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
129 /**
130 * @}
131 */
132
133 /**
134 * @}
135 */
136
137
138 /* Exported macro ------------------------------------------------------------*/
139 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
140 * @{
141 */
142
143 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
144 * @{
145 */
146
147 /**
148 * @brief Write a value in PWR register
149 * @param __REG__ Register to be written
150 * @param __VALUE__ Value to be written in the register
151 * @retval None
152 */
153 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
154
155 /**
156 * @brief Read a value in PWR register
157 * @param __REG__ Register to be read
158 * @retval Register value
159 */
160 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
161 /**
162 * @}
163 */
164
165 /**
166 * @}
167 */
168
169 /* Exported functions --------------------------------------------------------*/
170 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
171 * @{
172 */
173
174 /** @defgroup PWR_LL_EF_Configuration Configuration
175 * @{
176 */
177
178 /**
179 * @brief Enable access to the backup domain
180 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
181 * @retval None
182 */
183 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
184 {
185 SET_BIT(PWR->CR, PWR_CR_DBP);
186 }
187
188 /**
189 * @brief Disable access to the backup domain
190 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
191 * @retval None
192 */
193 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
194 {
195 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
196 }
197
198 /**
199 * @brief Check if the backup domain is enabled
200 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
201 * @retval State of bit (1 or 0).
202 */
203 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
204 {
205 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
206 }
207
208 /**
209 * @brief Set voltage Regulator mode during deep sleep mode
210 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
211 * @param RegulMode This parameter can be one of the following values:
212 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
213 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
214 * @retval None
215 */
216 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
217 {
218 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
219 }
220
221 /**
222 * @brief Get voltage Regulator mode during deep sleep mode
223 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
224 * @retval Returned value can be one of the following values:
225 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
226 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
227 */
228 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
229 {
230 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
231 }
232
233 /**
234 * @brief Set Power Down mode when CPU enters deepsleep
235 * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
236 * @rmtoll CR LPDS LL_PWR_SetPowerMode
237 * @param PDMode This parameter can be one of the following values:
238 * @arg @ref LL_PWR_MODE_STOP_MAINREGU
239 * @arg @ref LL_PWR_MODE_STOP_LPREGU
240 * @arg @ref LL_PWR_MODE_STANDBY
241 * @retval None
242 */
243 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
244 {
245 MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
246 }
247
248 /**
249 * @brief Get Power Down mode when CPU enters deepsleep
250 * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
251 * @rmtoll CR LPDS LL_PWR_GetPowerMode
252 * @retval Returned value can be one of the following values:
253 * @arg @ref LL_PWR_MODE_STOP_MAINREGU
254 * @arg @ref LL_PWR_MODE_STOP_LPREGU
255 * @arg @ref LL_PWR_MODE_STANDBY
256 */
257 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
258 {
259 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
260 }
261
262 /**
263 * @brief Configure the voltage threshold detected by the Power Voltage Detector
264 * @rmtoll CR PLS LL_PWR_SetPVDLevel
265 * @param PVDLevel This parameter can be one of the following values:
266 * @arg @ref LL_PWR_PVDLEVEL_0
267 * @arg @ref LL_PWR_PVDLEVEL_1
268 * @arg @ref LL_PWR_PVDLEVEL_2
269 * @arg @ref LL_PWR_PVDLEVEL_3
270 * @arg @ref LL_PWR_PVDLEVEL_4
271 * @arg @ref LL_PWR_PVDLEVEL_5
272 * @arg @ref LL_PWR_PVDLEVEL_6
273 * @arg @ref LL_PWR_PVDLEVEL_7
274 * @retval None
275 */
276 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
277 {
278 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
279 }
280
281 /**
282 * @brief Get the voltage threshold detection
283 * @rmtoll CR PLS LL_PWR_GetPVDLevel
284 * @retval Returned value can be one of the following values:
285 * @arg @ref LL_PWR_PVDLEVEL_0
286 * @arg @ref LL_PWR_PVDLEVEL_1
287 * @arg @ref LL_PWR_PVDLEVEL_2
288 * @arg @ref LL_PWR_PVDLEVEL_3
289 * @arg @ref LL_PWR_PVDLEVEL_4
290 * @arg @ref LL_PWR_PVDLEVEL_5
291 * @arg @ref LL_PWR_PVDLEVEL_6
292 * @arg @ref LL_PWR_PVDLEVEL_7
293 */
294 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
295 {
296 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
297 }
298
299 /**
300 * @brief Enable Power Voltage Detector
301 * @rmtoll CR PVDE LL_PWR_EnablePVD
302 * @retval None
303 */
304 __STATIC_INLINE void LL_PWR_EnablePVD(void)
305 {
306 SET_BIT(PWR->CR, PWR_CR_PVDE);
307 }
308
309 /**
310 * @brief Disable Power Voltage Detector
311 * @rmtoll CR PVDE LL_PWR_DisablePVD
312 * @retval None
313 */
314 __STATIC_INLINE void LL_PWR_DisablePVD(void)
315 {
316 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
317 }
318
319 /**
320 * @brief Check if Power Voltage Detector is enabled
321 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
322 * @retval State of bit (1 or 0).
323 */
324 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
325 {
326 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
327 }
328
329 /**
330 * @brief Enable the WakeUp PINx functionality
331 * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
332 * @param WakeUpPin This parameter can be one of the following values:
333 * @arg @ref LL_PWR_WAKEUP_PIN1
334 * @retval None
335 */
336 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
337 {
338 SET_BIT(PWR->CSR, WakeUpPin);
339 }
340
341 /**
342 * @brief Disable the WakeUp PINx functionality
343 * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
344 * @param WakeUpPin This parameter can be one of the following values:
345 * @arg @ref LL_PWR_WAKEUP_PIN1
346 * @retval None
347 */
348 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
349 {
350 CLEAR_BIT(PWR->CSR, WakeUpPin);
351 }
352
353 /**
354 * @brief Check if the WakeUp PINx functionality is enabled
355 * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
356 * @param WakeUpPin This parameter can be one of the following values:
357 * @arg @ref LL_PWR_WAKEUP_PIN1
358 * @retval State of bit (1 or 0).
359 */
360 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
361 {
362 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
363 }
364
365
366 /**
367 * @}
368 */
369
370 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
371 * @{
372 */
373
374 /**
375 * @brief Get Wake-up Flag
376 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
377 * @retval State of bit (1 or 0).
378 */
379 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
380 {
381 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
382 }
383
384 /**
385 * @brief Get Standby Flag
386 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
387 * @retval State of bit (1 or 0).
388 */
389 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
390 {
391 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
392 }
393
394 /**
395 * @brief Indicate whether VDD voltage is below the selected PVD threshold
396 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
397 * @retval State of bit (1 or 0).
398 */
399 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
400 {
401 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
402 }
403
404 /**
405 * @brief Clear Standby Flag
406 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
407 * @retval None
408 */
409 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
410 {
411 SET_BIT(PWR->CR, PWR_CR_CSBF);
412 }
413
414 /**
415 * @brief Clear Wake-up Flags
416 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
417 * @retval None
418 */
419 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
420 {
421 SET_BIT(PWR->CR, PWR_CR_CWUF);
422 }
423
424 /**
425 * @}
426 */
427
428 #if defined(USE_FULL_LL_DRIVER)
429 /** @defgroup PWR_LL_EF_Init De-initialization function
430 * @{
431 */
432 ErrorStatus LL_PWR_DeInit(void);
433 /**
434 * @}
435 */
436 #endif /* USE_FULL_LL_DRIVER */
437
438 /**
439 * @}
440 */
441
442 /**
443 * @}
444 */
445
446 #endif /* defined(PWR) */
447
448 /**
449 * @}
450 */
451
452 #ifdef __cplusplus
453 }
454 #endif
455
456 #endif /* __STM32F1xx_LL_PWR_H */
457
458 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/