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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_HAL_Driver / Src / stm32f4xx_hal_i2c.c
blob10aed0b080661508453db98f37e1d6216e528285
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2c.c
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 14-April-2017
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral State, Mode and Error functions
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The I2C HAL driver can be used as follows:
20
21 (#) Declare a I2C_HandleTypeDef handle structure, for example:
22 I2C_HandleTypeDef hi2c;
23
24 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
25 (##) Enable the I2Cx interface clock
26 (##) I2C pins configuration
27 (+++) Enable the clock for the I2C GPIOs
28 (+++) Configure I2C pins as alternate function open-drain
29 (##) NVIC configuration if you need to use interrupt process
30 (+++) Configure the I2Cx interrupt priority
31 (+++) Enable the NVIC I2C IRQ Channel
32 (##) DMA Configuration if you need to use DMA process
33 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
34 (+++) Enable the DMAx interface clock using
35 (+++) Configure the DMA handle parameters
36 (+++) Configure the DMA Tx or Rx Stream
37 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
38 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
39 the DMA Tx or Rx Stream
40
41 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
42 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
43
44 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
45 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
46
47 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
48
49 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
50
51 *** Polling mode IO operation ***
52 =================================
53 [..]
54 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
55 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
56 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
57 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
58
59 *** Polling mode IO MEM operation ***
60 =====================================
61 [..]
62 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
63 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
64
65
66 *** Interrupt mode IO operation ***
67 ===================================
68 [..]
69 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
70 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
71 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
72 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
73 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
74 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
75 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
76 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
77 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
78 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
79 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
80 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
81 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
82 add his own code by customization of function pointer HAL_I2C_ErrorCallback
83 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
84 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
85 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
86
87 *** Interrupt mode IO sequential operation ***
88 ==============================================
89 [..]
90 (@) These interfaces allow to manage a sequential transfer with a repeated start condition
91 when a direction change during transfer
92 [..]
93 (+) A specific option field manage the different steps of a sequential transfer
94 (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
95 (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
96 (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
97 and data to transfer without a final stop condition
98 (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
99 and with new data to transfer if the direction change or manage only the new data to transfer
100 if no direction change and without a final stop condition in both cases
101 (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
102 and with new data to transfer if the direction change or manage only the new data to transfer
103 if no direction change and with a final stop condition in both cases
104
105 (+) Differents sequential I2C interfaces are listed below:
106 (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
107 (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
108 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
109 (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
110 (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
111 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
112 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
113 (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
114 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
115 (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
116 (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
117 add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
118 (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
119 add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
120 (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
121 (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
122 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
123 (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
124 (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
125 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
126 (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
127 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
128 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
129 (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
130 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
131
132 *** Interrupt mode IO MEM operation ***
133 =======================================
134 [..]
135 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
136 HAL_I2C_Mem_Write_IT()
137 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
138 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
139 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
140 HAL_I2C_Mem_Read_IT()
141 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
142 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
143 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
144 add his own code by customization of function pointer HAL_I2C_ErrorCallback
145
146 *** DMA mode IO operation ***
147 ==============================
148 [..]
149 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
150 HAL_I2C_Master_Transmit_DMA()
151 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
152 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
153 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
154 HAL_I2C_Master_Receive_DMA()
155 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
156 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
157 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
158 HAL_I2C_Slave_Transmit_DMA()
159 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
160 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
161 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
162 HAL_I2C_Slave_Receive_DMA()
163 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
164 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
165 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
166 add his own code by customization of function pointer HAL_I2C_ErrorCallback
167 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
168 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
169 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
170
171 *** DMA mode IO MEM operation ***
172 =================================
173 [..]
174 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
175 HAL_I2C_Mem_Write_DMA()
176 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
177 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
178 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
179 HAL_I2C_Mem_Read_DMA()
180 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
181 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
182 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
183 add his own code by customization of function pointer HAL_I2C_ErrorCallback
184
185
186 *** I2C HAL driver macros list ***
187 ==================================
188 [..]
189 Below the list of most used macros in I2C HAL driver.
190
191 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
192 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
193 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
194 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
195 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
196 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
197
198 [..]
199 (@) You can refer to the I2C HAL driver header file for more useful macros
200
201
202 @endverbatim
203 ******************************************************************************
204 * @attention
205 *
206 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
207 *
208 * Redistribution and use in source and binary forms, with or without modification,
209 * are permitted provided that the following conditions are met:
210 * 1. Redistributions of source code must retain the above copyright notice,
211 * this list of conditions and the following disclaimer.
212 * 2. Redistributions in binary form must reproduce the above copyright notice,
213 * this list of conditions and the following disclaimer in the documentation
214 * and/or other materials provided with the distribution.
215 * 3. Neither the name of STMicroelectronics nor the names of its contributors
216 * may be used to endorse or promote products derived from this software
217 * without specific prior written permission.
218 *
219 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
220 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
221 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
222 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
223 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
224 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
225 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
226 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
227 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
228 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
229 *
230 ******************************************************************************
231 */
232
233 /* Includes ------------------------------------------------------------------*/
234 #include "stm32f4xx_hal.h"
235
236 /** @addtogroup STM32F4xx_HAL_Driver
237 * @{
238 */
239
240 /** @defgroup I2C I2C
241 * @brief I2C HAL module driver
242 * @{
243 */
244
245 #ifdef HAL_I2C_MODULE_ENABLED
246
247 /* Private typedef -----------------------------------------------------------*/
248 /* Private define ------------------------------------------------------------*/
249 /** @addtogroup I2C_Private_Define
250 * @{
251 */
252 #define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
253 #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
254 #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
255
256 /* Private define for @ref PreviousState usage */
257 #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
258 #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
259 #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
260 #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
261 #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
262 #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
263
264 /**
265 * @}
266 */
267
268 /* Private macro -------------------------------------------------------------*/
269 /* Private variables ---------------------------------------------------------*/
270 /* Private function prototypes -----------------------------------------------*/
271 /** @addtogroup I2C_Private_Functions
272 * @{
273 */
274 /* Private functions to handle DMA transfer */
275 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
276 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
277 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
278
279 static void I2C_ITError(I2C_HandleTypeDef *hi2c);
280
281 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
282 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
283 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
284 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
285 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
286 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
287 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
288 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
289 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
290 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
291 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
292
293 /* Private functions for I2C transfer IRQ handler */
294 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
295 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
296 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
297 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
298 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
299 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
300 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
301
302 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
303 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
304 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
305 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
306 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
307 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
308 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
309 /**
310 * @}
311 */
312
313 /* Exported functions --------------------------------------------------------*/
314 /** @defgroup I2C_Exported_Functions I2C Exported Functions
315 * @{
316 */
317
318 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
319 * @brief Initialization and Configuration functions
320 *
321 @verbatim
322 ===============================================================================
323 ##### Initialization and de-initialization functions #####
324 ===============================================================================
325 [..] This subsection provides a set of functions allowing to initialize and
326 de-initialize the I2Cx peripheral:
327
328 (+) User must Implement HAL_I2C_MspInit() function in which he configures
329 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
330
331 (+) Call the function HAL_I2C_Init() to configure the selected device with
332 the selected configuration:
333 (++) Communication Speed
334 (++) Duty cycle
335 (++) Addressing mode
336 (++) Own Address 1
337 (++) Dual Addressing mode
338 (++) Own Address 2
339 (++) General call mode
340 (++) Nostretch mode
341
342 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
343 of the selected I2Cx peripheral.
344
345 @endverbatim
346 * @{
347 */
348
349 /**
350 * @brief Initializes the I2C according to the specified parameters
351 * in the I2C_InitTypeDef and create the associated handle.
352 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
353 * the configuration information for I2C module
354 * @retval HAL status
355 */
356 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
357 {
358 uint32_t freqrange = 0U;
359 uint32_t pclk1 = 0U;
360
361 /* Check the I2C handle allocation */
362 if(hi2c == NULL)
363 {
364 return HAL_ERROR;
365 }
366
367 /* Check the parameters */
368 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
369 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
370 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
371 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
372 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
373 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
374 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
375 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
376 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
377
378 if(hi2c->State == HAL_I2C_STATE_RESET)
379 {
380 /* Allocate lock resource and initialize it */
381 hi2c->Lock = HAL_UNLOCKED;
382 /* Init the low level hardware : GPIO, CLOCK, NVIC */
383 HAL_I2C_MspInit(hi2c);
384 }
385
386 hi2c->State = HAL_I2C_STATE_BUSY;
387
388 /* Disable the selected I2C peripheral */
389 __HAL_I2C_DISABLE(hi2c);
390
391 /* Get PCLK1 frequency */
392 pclk1 = HAL_RCC_GetPCLK1Freq();
393
394 /* Calculate frequency range */
395 freqrange = I2C_FREQRANGE(pclk1);
396
397 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
398 /* Configure I2Cx: Frequency range */
399 hi2c->Instance->CR2 = freqrange;
400
401 /*---------------------------- I2Cx TRISE Configuration --------------------*/
402 /* Configure I2Cx: Rise Time */
403 hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
404
405 /*---------------------------- I2Cx CCR Configuration ----------------------*/
406 /* Configure I2Cx: Speed */
407 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
408
409 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
410 /* Configure I2Cx: Generalcall and NoStretch mode */
411 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
412
413 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
414 /* Configure I2Cx: Own Address1 and addressing mode */
415 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
416
417 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
418 /* Configure I2Cx: Dual mode and Own Address2 */
419 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
420
421 /* Enable the selected I2C peripheral */
422 __HAL_I2C_ENABLE(hi2c);
423
424 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
425 hi2c->State = HAL_I2C_STATE_READY;
426 hi2c->PreviousState = I2C_STATE_NONE;
427 hi2c->Mode = HAL_I2C_MODE_NONE;
428
429 return HAL_OK;
430 }
431
432 /**
433 * @brief DeInitializes the I2C peripheral.
434 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
435 * the configuration information for I2C module
436 * @retval HAL status
437 */
438 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
439 {
440 /* Check the I2C handle allocation */
441 if(hi2c == NULL)
442 {
443 return HAL_ERROR;
444 }
445
446 /* Check the parameters */
447 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
448
449 hi2c->State = HAL_I2C_STATE_BUSY;
450
451 /* Disable the I2C Peripheral Clock */
452 __HAL_I2C_DISABLE(hi2c);
453
454 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
455 HAL_I2C_MspDeInit(hi2c);
456
457 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
458 hi2c->State = HAL_I2C_STATE_RESET;
459 hi2c->PreviousState = I2C_STATE_NONE;
460 hi2c->Mode = HAL_I2C_MODE_NONE;
461
462 /* Release Lock */
463 __HAL_UNLOCK(hi2c);
464
465 return HAL_OK;
466 }
467
468 /**
469 * @brief I2C MSP Init.
470 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
471 * the configuration information for I2C module
472 * @retval None
473 */
474 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
475 {
476 /* Prevent unused argument(s) compilation warning */
477 UNUSED(hi2c);
478 /* NOTE : This function Should not be modified, when the callback is needed,
479 the HAL_I2C_MspInit could be implemented in the user file
480 */
481 }
482
483 /**
484 * @brief I2C MSP DeInit
485 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
486 * the configuration information for I2C module
487 * @retval None
488 */
489 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
490 {
491 /* Prevent unused argument(s) compilation warning */
492 UNUSED(hi2c);
493 /* NOTE : This function Should not be modified, when the callback is needed,
494 the HAL_I2C_MspDeInit could be implemented in the user file
495 */
496 }
497
498 /**
499 * @}
500 */
501
502 /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
503 * @brief Data transfers functions
504 *
505 @verbatim
506 ===============================================================================
507 ##### IO operation functions #####
508 ===============================================================================
509 [..]
510 This subsection provides a set of functions allowing to manage the I2C data
511 transfers.
512
513 (#) There are two modes of transfer:
514 (++) Blocking mode : The communication is performed in the polling mode.
515 The status of all data processing is returned by the same function
516 after finishing transfer.
517 (++) No-Blocking mode : The communication is performed using Interrupts
518 or DMA. These functions return the status of the transfer startup.
519 The end of the data processing will be indicated through the
520 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
521 using DMA mode.
522
523 (#) Blocking mode functions are :
524 (++) HAL_I2C_Master_Transmit()
525 (++) HAL_I2C_Master_Receive()
526 (++) HAL_I2C_Slave_Transmit()
527 (++) HAL_I2C_Slave_Receive()
528 (++) HAL_I2C_Mem_Write()
529 (++) HAL_I2C_Mem_Read()
530 (++) HAL_I2C_IsDeviceReady()
531
532 (#) No-Blocking mode functions with Interrupt are :
533 (++) HAL_I2C_Master_Transmit_IT()
534 (++) HAL_I2C_Master_Receive_IT()
535 (++) HAL_I2C_Slave_Transmit_IT()
536 (++) HAL_I2C_Slave_Receive_IT()
537 (++) HAL_I2C_Master_Sequential_Transmit_IT()
538 (++) HAL_I2C_Master_Sequential_Receive_IT()
539 (++) HAL_I2C_Slave_Sequential_Transmit_IT()
540 (++) HAL_I2C_Slave_Sequential_Receive_IT()
541 (++) HAL_I2C_Mem_Write_IT()
542 (++) HAL_I2C_Mem_Read_IT()
543
544 (#) No-Blocking mode functions with DMA are :
545 (++) HAL_I2C_Master_Transmit_DMA()
546 (++) HAL_I2C_Master_Receive_DMA()
547 (++) HAL_I2C_Slave_Transmit_DMA()
548 (++) HAL_I2C_Slave_Receive_DMA()
549 (++) HAL_I2C_Mem_Write_DMA()
550 (++) HAL_I2C_Mem_Read_DMA()
551
552 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
553 (++) HAL_I2C_MemTxCpltCallback()
554 (++) HAL_I2C_MemRxCpltCallback()
555 (++) HAL_I2C_MasterTxCpltCallback()
556 (++) HAL_I2C_MasterRxCpltCallback()
557 (++) HAL_I2C_SlaveTxCpltCallback()
558 (++) HAL_I2C_SlaveRxCpltCallback()
559 (++) HAL_I2C_ErrorCallback()
560 (++) HAL_I2C_AbortCpltCallback()
561
562 @endverbatim
563 * @{
564 */
565
566 /**
567 * @brief Transmits in master mode an amount of data in blocking mode.
568 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
569 * the configuration information for the specified I2C.
570 * @param DevAddress Target device address: The device 7 bits address value
571 * in datasheet must be shift at right before call interface
572 * @param pData Pointer to data buffer
573 * @param Size Amount of data to be sent
574 * @param Timeout Timeout duration
575 * @retval HAL status
576 */
577 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
578 {
579 uint32_t tickstart = 0x00U;
580
581 /* Init tickstart for timeout management*/
582 tickstart = HAL_GetTick();
583
584 if(hi2c->State == HAL_I2C_STATE_READY)
585 {
586 /* Wait until BUSY flag is reset */
587 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
588 {
589 return HAL_BUSY;
590 }
591
592 /* Process Locked */
593 __HAL_LOCK(hi2c);
594
595 /* Check if the I2C is already enabled */
596 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
597 {
598 /* Enable I2C peripheral */
599 __HAL_I2C_ENABLE(hi2c);
600 }
601
602 /* Disable Pos */
603 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
604
605 hi2c->State = HAL_I2C_STATE_BUSY_TX;
606 hi2c->Mode = HAL_I2C_MODE_MASTER;
607 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
608
609 /* Prepare transfer parameters */
610 hi2c->pBuffPtr = pData;
611 hi2c->XferCount = Size;
612 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
613 hi2c->XferSize = hi2c->XferCount;
614
615 /* Send Slave Address */
616 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
617 {
618 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
619 {
620 /* Process Unlocked */
621 __HAL_UNLOCK(hi2c);
622 return HAL_ERROR;
623 }
624 else
625 {
626 /* Process Unlocked */
627 __HAL_UNLOCK(hi2c);
628 return HAL_TIMEOUT;
629 }
630 }
631
632 /* Clear ADDR flag */
633 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
634
635 while(hi2c->XferSize > 0U)
636 {
637 /* Wait until TXE flag is set */
638 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
639 {
640 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
641 {
642 /* Generate Stop */
643 hi2c->Instance->CR1 |= I2C_CR1_STOP;
644 return HAL_ERROR;
645 }
646 else
647 {
648 return HAL_TIMEOUT;
649 }
650 }
651
652 /* Write data to DR */
653 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
654 hi2c->XferCount--;
655 hi2c->XferSize--;
656
657 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
658 {
659 /* Write data to DR */
660 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
661 hi2c->XferCount--;
662 hi2c->XferSize--;
663 }
664
665 /* Wait until BTF flag is set */
666 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
667 {
668 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
669 {
670 /* Generate Stop */
671 hi2c->Instance->CR1 |= I2C_CR1_STOP;
672 return HAL_ERROR;
673 }
674 else
675 {
676 return HAL_TIMEOUT;
677 }
678 }
679 }
680
681 /* Generate Stop */
682 hi2c->Instance->CR1 |= I2C_CR1_STOP;
683
684 hi2c->State = HAL_I2C_STATE_READY;
685 hi2c->Mode = HAL_I2C_MODE_NONE;
686
687 /* Process Unlocked */
688 __HAL_UNLOCK(hi2c);
689
690 return HAL_OK;
691 }
692 else
693 {
694 return HAL_BUSY;
695 }
696 }
697
698 /**
699 * @brief Receives in master mode an amount of data in blocking mode.
700 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
701 * the configuration information for the specified I2C.
702 * @param DevAddress Target device address: The device 7 bits address value
703 * in datasheet must be shift at right before call interface
704 * @param pData Pointer to data buffer
705 * @param Size Amount of data to be sent
706 * @param Timeout Timeout duration
707 * @retval HAL status
708 */
709 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
710 {
711 uint32_t tickstart = 0x00U;
712
713 /* Init tickstart for timeout management*/
714 tickstart = HAL_GetTick();
715
716 if(hi2c->State == HAL_I2C_STATE_READY)
717 {
718 /* Wait until BUSY flag is reset */
719 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
720 {
721 return HAL_BUSY;
722 }
723
724 /* Process Locked */
725 __HAL_LOCK(hi2c);
726
727 /* Check if the I2C is already enabled */
728 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
729 {
730 /* Enable I2C peripheral */
731 __HAL_I2C_ENABLE(hi2c);
732 }
733
734 /* Disable Pos */
735 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
736
737 hi2c->State = HAL_I2C_STATE_BUSY_RX;
738 hi2c->Mode = HAL_I2C_MODE_MASTER;
739 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
740
741 /* Prepare transfer parameters */
742 hi2c->pBuffPtr = pData;
743 hi2c->XferCount = Size;
744 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
745 hi2c->XferSize = hi2c->XferCount;
746
747 /* Send Slave Address */
748 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
749 {
750 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
751 {
752 /* Process Unlocked */
753 __HAL_UNLOCK(hi2c);
754 return HAL_ERROR;
755 }
756 else
757 {
758 /* Process Unlocked */
759 __HAL_UNLOCK(hi2c);
760 return HAL_TIMEOUT;
761 }
762 }
763
764 if(hi2c->XferSize == 0U)
765 {
766 /* Clear ADDR flag */
767 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
768
769 /* Generate Stop */
770 hi2c->Instance->CR1 |= I2C_CR1_STOP;
771 }
772 else if(hi2c->XferSize == 1U)
773 {
774 /* Disable Acknowledge */
775 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
776
777 /* Clear ADDR flag */
778 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
779
780 /* Generate Stop */
781 hi2c->Instance->CR1 |= I2C_CR1_STOP;
782 }
783 else if(hi2c->XferSize == 2U)
784 {
785 /* Disable Acknowledge */
786 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
787
788 /* Enable Pos */
789 hi2c->Instance->CR1 |= I2C_CR1_POS;
790
791 /* Clear ADDR flag */
792 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
793 }
794 else
795 {
796 /* Enable Acknowledge */
797 hi2c->Instance->CR1 |= I2C_CR1_ACK;
798
799 /* Clear ADDR flag */
800 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
801 }
802
803 while(hi2c->XferSize > 0U)
804 {
805 if(hi2c->XferSize <= 3U)
806 {
807 /* One byte */
808 if(hi2c->XferSize == 1U)
809 {
810 /* Wait until RXNE flag is set */
811 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
812 {
813 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
814 {
815 return HAL_TIMEOUT;
816 }
817 else
818 {
819 return HAL_ERROR;
820 }
821 }
822
823 /* Read data from DR */
824 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
825 hi2c->XferSize--;
826 hi2c->XferCount--;
827 }
828 /* Two bytes */
829 else if(hi2c->XferSize == 2U)
830 {
831 /* Wait until BTF flag is set */
832 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
833 {
834 return HAL_TIMEOUT;
835 }
836
837 /* Generate Stop */
838 hi2c->Instance->CR1 |= I2C_CR1_STOP;
839
840 /* Read data from DR */
841 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
842 hi2c->XferSize--;
843 hi2c->XferCount--;
844
845 /* Read data from DR */
846 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
847 hi2c->XferSize--;
848 hi2c->XferCount--;
849 }
850 /* 3 Last bytes */
851 else
852 {
853 /* Wait until BTF flag is set */
854 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
855 {
856 return HAL_TIMEOUT;
857 }
858
859 /* Disable Acknowledge */
860 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
861
862 /* Read data from DR */
863 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
864 hi2c->XferSize--;
865 hi2c->XferCount--;
866
867 /* Wait until BTF flag is set */
868 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
869 {
870 return HAL_TIMEOUT;
871 }
872
873 /* Generate Stop */
874 hi2c->Instance->CR1 |= I2C_CR1_STOP;
875
876 /* Read data from DR */
877 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
878 hi2c->XferSize--;
879 hi2c->XferCount--;
880
881 /* Read data from DR */
882 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
883 hi2c->XferSize--;
884 hi2c->XferCount--;
885 }
886 }
887 else
888 {
889 /* Wait until RXNE flag is set */
890 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
891 {
892 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
893 {
894 return HAL_TIMEOUT;
895 }
896 else
897 {
898 return HAL_ERROR;
899 }
900 }
901
902 /* Read data from DR */
903 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
904 hi2c->XferSize--;
905 hi2c->XferCount--;
906
907 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
908 {
909 /* Read data from DR */
910 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
911 hi2c->XferSize--;
912 hi2c->XferCount--;
913 }
914 }
915 }
916
917 hi2c->State = HAL_I2C_STATE_READY;
918 hi2c->Mode = HAL_I2C_MODE_NONE;
919
920 /* Process Unlocked */
921 __HAL_UNLOCK(hi2c);
922
923 return HAL_OK;
924 }
925 else
926 {
927 return HAL_BUSY;
928 }
929 }
930
931 /**
932 * @brief Transmits in slave mode an amount of data in blocking mode.
933 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
934 * the configuration information for the specified I2C.
935 * @param pData Pointer to data buffer
936 * @param Size Amount of data to be sent
937 * @param Timeout Timeout duration
938 * @retval HAL status
939 */
940 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
941 {
942 uint32_t tickstart = 0x00U;
943
944 /* Init tickstart for timeout management*/
945 tickstart = HAL_GetTick();
946
947 if(hi2c->State == HAL_I2C_STATE_READY)
948 {
949 if((pData == NULL) || (Size == 0U))
950 {
951 return HAL_ERROR;
952 }
953
954 /* Process Locked */
955 __HAL_LOCK(hi2c);
956
957 /* Check if the I2C is already enabled */
958 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
959 {
960 /* Enable I2C peripheral */
961 __HAL_I2C_ENABLE(hi2c);
962 }
963
964 /* Disable Pos */
965 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
966
967 hi2c->State = HAL_I2C_STATE_BUSY_TX;
968 hi2c->Mode = HAL_I2C_MODE_SLAVE;
969 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
970
971 /* Prepare transfer parameters */
972 hi2c->pBuffPtr = pData;
973 hi2c->XferCount = Size;
974 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
975 hi2c->XferSize = hi2c->XferCount;
976
977 /* Enable Address Acknowledge */
978 hi2c->Instance->CR1 |= I2C_CR1_ACK;
979
980 /* Wait until ADDR flag is set */
981 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
982 {
983 return HAL_TIMEOUT;
984 }
985
986 /* Clear ADDR flag */
987 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
988
989 /* If 10bit addressing mode is selected */
990 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
991 {
992 /* Wait until ADDR flag is set */
993 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
994 {
995 return HAL_TIMEOUT;
996 }
997
998 /* Clear ADDR flag */
999 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1000 }
1001
1002 while(hi2c->XferSize > 0U)
1003 {
1004 /* Wait until TXE flag is set */
1005 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
1006 {
1007 /* Disable Address Acknowledge */
1008 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1009
1010 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1011 {
1012 return HAL_ERROR;
1013 }
1014 else
1015 {
1016 return HAL_TIMEOUT;
1017 }
1018 }
1019
1020 /* Write data to DR */
1021 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
1022 hi2c->XferCount--;
1023 hi2c->XferSize--;
1024
1025 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
1026 {
1027 /* Write data to DR */
1028 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
1029 hi2c->XferCount--;
1030 hi2c->XferSize--;
1031 }
1032 }
1033
1034 /* Wait until AF flag is set */
1035 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
1036 {
1037 return HAL_TIMEOUT;
1038 }
1039
1040 /* Clear AF flag */
1041 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
1042
1043 /* Disable Address Acknowledge */
1044 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1045
1046 hi2c->State = HAL_I2C_STATE_READY;
1047 hi2c->Mode = HAL_I2C_MODE_NONE;
1048
1049 /* Process Unlocked */
1050 __HAL_UNLOCK(hi2c);
1051
1052 return HAL_OK;
1053 }
1054 else
1055 {
1056 return HAL_BUSY;
1057 }
1058 }
1059
1060 /**
1061 * @brief Receive in slave mode an amount of data in blocking mode
1062 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1063 * the configuration information for the specified I2C.
1064 * @param pData Pointer to data buffer
1065 * @param Size Amount of data to be sent
1066 * @param Timeout Timeout duration
1067 * @retval HAL status
1068 */
1069 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1070 {
1071 uint32_t tickstart = 0x00U;
1072
1073 /* Init tickstart for timeout management*/
1074 tickstart = HAL_GetTick();
1075
1076 if(hi2c->State == HAL_I2C_STATE_READY)
1077 {
1078 if((pData == NULL) || (Size == 0))
1079 {
1080 return HAL_ERROR;
1081 }
1082
1083 /* Process Locked */
1084 __HAL_LOCK(hi2c);
1085
1086 /* Check if the I2C is already enabled */
1087 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1088 {
1089 /* Enable I2C peripheral */
1090 __HAL_I2C_ENABLE(hi2c);
1091 }
1092
1093 /* Disable Pos */
1094 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1095
1096 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1097 hi2c->Mode = HAL_I2C_MODE_SLAVE;
1098 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1099
1100 /* Prepare transfer parameters */
1101 hi2c->pBuffPtr = pData;
1102 hi2c->XferCount = Size;
1103 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1104 hi2c->XferSize = hi2c->XferCount;
1105
1106 /* Enable Address Acknowledge */
1107 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1108
1109 /* Wait until ADDR flag is set */
1110 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
1111 {
1112 return HAL_TIMEOUT;
1113 }
1114
1115 /* Clear ADDR flag */
1116 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1117
1118 while(hi2c->XferSize > 0U)
1119 {
1120 /* Wait until RXNE flag is set */
1121 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
1122 {
1123 /* Disable Address Acknowledge */
1124 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1125
1126 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
1127 {
1128 return HAL_TIMEOUT;
1129 }
1130 else
1131 {
1132 return HAL_ERROR;
1133 }
1134 }
1135
1136 /* Read data from DR */
1137 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
1138 hi2c->XferSize--;
1139 hi2c->XferCount--;
1140
1141 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
1142 {
1143 /* Read data from DR */
1144 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
1145 hi2c->XferSize--;
1146 hi2c->XferCount--;
1147 }
1148 }
1149
1150 /* Wait until STOP flag is set */
1151 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
1152 {
1153 /* Disable Address Acknowledge */
1154 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1155
1156 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1157 {
1158 return HAL_ERROR;
1159 }
1160 else
1161 {
1162 return HAL_TIMEOUT;
1163 }
1164 }
1165
1166 /* Clear STOP flag */
1167 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
1168
1169 /* Disable Address Acknowledge */
1170 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1171
1172 hi2c->State = HAL_I2C_STATE_READY;
1173 hi2c->Mode = HAL_I2C_MODE_NONE;
1174
1175 /* Process Unlocked */
1176 __HAL_UNLOCK(hi2c);
1177
1178 return HAL_OK;
1179 }
1180 else
1181 {
1182 return HAL_BUSY;
1183 }
1184 }
1185
1186 /**
1187 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
1188 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1189 * the configuration information for the specified I2C.
1190 * @param DevAddress Target device address: The device 7 bits address value
1191 * in datasheet must be shift at right before call interface
1192 * @param pData Pointer to data buffer
1193 * @param Size Amount of data to be sent
1194 * @retval HAL status
1195 */
1196 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1197 {
1198 __IO uint32_t count = 0U;
1199
1200 if(hi2c->State == HAL_I2C_STATE_READY)
1201 {
1202 /* Wait until BUSY flag is reset */
1203 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1204 do
1205 {
1206 if(count-- == 0U)
1207 {
1208 hi2c->PreviousState = I2C_STATE_NONE;
1209 hi2c->State= HAL_I2C_STATE_READY;
1210
1211 /* Process Unlocked */
1212 __HAL_UNLOCK(hi2c);
1213
1214 return HAL_TIMEOUT;
1215 }
1216 }
1217 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1218
1219 /* Process Locked */
1220 __HAL_LOCK(hi2c);
1221
1222 /* Check if the I2C is already enabled */
1223 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1224 {
1225 /* Enable I2C peripheral */
1226 __HAL_I2C_ENABLE(hi2c);
1227 }
1228
1229 /* Disable Pos */
1230 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1231
1232 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1233 hi2c->Mode = HAL_I2C_MODE_MASTER;
1234 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1235
1236 /* Prepare transfer parameters */
1237 hi2c->pBuffPtr = pData;
1238 hi2c->XferCount = Size;
1239 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1240 hi2c->XferSize = hi2c->XferCount;
1241 hi2c->Devaddress = DevAddress;
1242
1243 /* Generate Start */
1244 hi2c->Instance->CR1 |= I2C_CR1_START;
1245
1246 /* Process Unlocked */
1247 __HAL_UNLOCK(hi2c);
1248
1249 /* Note : The I2C interrupts must be enabled after unlocking current process
1250 to avoid the risk of I2C interrupt handle execution before current
1251 process unlock */
1252 /* Enable EVT, BUF and ERR interrupt */
1253 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1254
1255 return HAL_OK;
1256 }
1257 else
1258 {
1259 return HAL_BUSY;
1260 }
1261 }
1262
1263 /**
1264 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
1265 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1266 * the configuration information for the specified I2C.
1267 * @param DevAddress Target device address: The device 7 bits address value
1268 * in datasheet must be shift at right before call interface
1269 * @param pData Pointer to data buffer
1270 * @param Size Amount of data to be sent
1271 * @retval HAL status
1272 */
1273 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1274 {
1275 __IO uint32_t count = 0U;
1276
1277 if(hi2c->State == HAL_I2C_STATE_READY)
1278 {
1279 /* Wait until BUSY flag is reset */
1280 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1281 do
1282 {
1283 if(count-- == 0U)
1284 {
1285 hi2c->PreviousState = I2C_STATE_NONE;
1286 hi2c->State= HAL_I2C_STATE_READY;
1287
1288 /* Process Unlocked */
1289 __HAL_UNLOCK(hi2c);
1290
1291 return HAL_TIMEOUT;
1292 }
1293 }
1294 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1295
1296 /* Process Locked */
1297 __HAL_LOCK(hi2c);
1298
1299 /* Check if the I2C is already enabled */
1300 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1301 {
1302 /* Enable I2C peripheral */
1303 __HAL_I2C_ENABLE(hi2c);
1304 }
1305
1306 /* Disable Pos */
1307 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1308
1309 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1310 hi2c->Mode = HAL_I2C_MODE_MASTER;
1311 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1312
1313 /* Prepare transfer parameters */
1314 hi2c->pBuffPtr = pData;
1315 hi2c->XferCount = Size;
1316 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1317 hi2c->XferSize = hi2c->XferCount;
1318 hi2c->Devaddress = DevAddress;
1319
1320 /* Enable Acknowledge */
1321 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1322
1323 /* Generate Start */
1324 hi2c->Instance->CR1 |= I2C_CR1_START;
1325
1326 /* Process Unlocked */
1327 __HAL_UNLOCK(hi2c);
1328
1329 /* Note : The I2C interrupts must be enabled after unlocking current process
1330 to avoid the risk of I2C interrupt handle execution before current
1331 process unlock */
1332
1333 /* Enable EVT, BUF and ERR interrupt */
1334 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1335
1336 return HAL_OK;
1337 }
1338 else
1339 {
1340 return HAL_BUSY;
1341 }
1342 }
1343
1344 /**
1345 * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
1346 * @note This interface allow to manage repeated start condition when a direction change during transfer
1347 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1348 * the configuration information for the specified I2C.
1349 * @param DevAddress Target device address: The device 7 bits address value
1350 * in datasheet must be shift at right before call interface
1351 * @param pData Pointer to data buffer
1352 * @param Size Amount of data to be sent
1353 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
1354 * @retval HAL status
1355 */
1356 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
1357 {
1358 __IO uint32_t Prev_State = 0x00U;
1359 __IO uint32_t count = 0x00U;
1360
1361 /* Check the parameters */
1362 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
1363
1364 if(hi2c->State == HAL_I2C_STATE_READY)
1365 {
1366 /* Check Busy Flag only if FIRST call of Master interface */
1367 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1368 {
1369 /* Wait until BUSY flag is reset */
1370 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1371 do
1372 {
1373 if(count-- == 0U)
1374 {
1375 hi2c->PreviousState = I2C_STATE_NONE;
1376 hi2c->State= HAL_I2C_STATE_READY;
1377
1378 /* Process Unlocked */
1379 __HAL_UNLOCK(hi2c);
1380
1381 return HAL_TIMEOUT;
1382 }
1383 }
1384 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1385 }
1386
1387 /* Process Locked */
1388 __HAL_LOCK(hi2c);
1389
1390 /* Check if the I2C is already enabled */
1391 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1392 {
1393 /* Enable I2C peripheral */
1394 __HAL_I2C_ENABLE(hi2c);
1395 }
1396
1397 /* Disable Pos */
1398 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1399
1400 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1401 hi2c->Mode = HAL_I2C_MODE_MASTER;
1402 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1403
1404 /* Prepare transfer parameters */
1405 hi2c->pBuffPtr = pData;
1406 hi2c->XferCount = Size;
1407 hi2c->XferOptions = XferOptions;
1408 hi2c->XferSize = hi2c->XferCount;
1409 hi2c->Devaddress = DevAddress;
1410
1411 Prev_State = hi2c->PreviousState;
1412
1413 /* Generate Start */
1414 if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
1415 {
1416 /* Generate Start condition if first transfer */
1417 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1418 {
1419 /* Generate Start */
1420 hi2c->Instance->CR1 |= I2C_CR1_START;
1421 }
1422 else
1423 {
1424 /* Generate ReStart */
1425 hi2c->Instance->CR1 |= I2C_CR1_START;
1426 }
1427 }
1428
1429 /* Process Unlocked */
1430 __HAL_UNLOCK(hi2c);
1431
1432 /* Note : The I2C interrupts must be enabled after unlocking current process
1433 to avoid the risk of I2C interrupt handle execution before current
1434 process unlock */
1435
1436 /* Enable EVT, BUF and ERR interrupt */
1437 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1438
1439 return HAL_OK;
1440 }
1441 else
1442 {
1443 return HAL_BUSY;
1444 }
1445 }
1446
1447 /**
1448 * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
1449 * @note This interface allow to manage repeated start condition when a direction change during transfer
1450 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1451 * the configuration information for the specified I2C.
1452 * @param DevAddress Target device address: The device 7 bits address value
1453 * in datasheet must be shift at right before call interface
1454 * @param pData Pointer to data buffer
1455 * @param Size Amount of data to be sent
1456 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
1457 * @retval HAL status
1458 */
1459 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
1460 {
1461 __IO uint32_t count = 0U;
1462
1463 /* Check the parameters */
1464 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
1465
1466 if(hi2c->State == HAL_I2C_STATE_READY)
1467 {
1468 /* Check Busy Flag only if FIRST call of Master interface */
1469 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1470 {
1471 /* Wait until BUSY flag is reset */
1472 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1473 do
1474 {
1475 if(count-- == 0U)
1476 {
1477 hi2c->PreviousState = I2C_STATE_NONE;
1478 hi2c->State= HAL_I2C_STATE_READY;
1479
1480 /* Process Unlocked */
1481 __HAL_UNLOCK(hi2c);
1482
1483 return HAL_TIMEOUT;
1484 }
1485 }
1486 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1487 }
1488
1489 /* Process Locked */
1490 __HAL_LOCK(hi2c);
1491
1492 /* Check if the I2C is already enabled */
1493 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1494 {
1495 /* Enable I2C peripheral */
1496 __HAL_I2C_ENABLE(hi2c);
1497 }
1498
1499 /* Disable Pos */
1500 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1501
1502 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1503 hi2c->Mode = HAL_I2C_MODE_MASTER;
1504 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1505
1506 /* Prepare transfer parameters */
1507 hi2c->pBuffPtr = pData;
1508 hi2c->XferCount = Size;
1509 hi2c->XferOptions = XferOptions;
1510 hi2c->XferSize = hi2c->XferCount;
1511 hi2c->Devaddress = DevAddress;
1512
1513 if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
1514 {
1515 /* Generate Start condition if first transfer */
1516 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1517 {
1518 /* Enable Acknowledge */
1519 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1520
1521 /* Generate Start */
1522 hi2c->Instance->CR1 |= I2C_CR1_START;
1523 }
1524 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1525 {
1526 /* Enable Acknowledge */
1527 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1528
1529 /* Generate ReStart */
1530 hi2c->Instance->CR1 |= I2C_CR1_START;
1531 }
1532 }
1533
1534 /* Process Unlocked */
1535 __HAL_UNLOCK(hi2c);
1536
1537 /* Note : The I2C interrupts must be enabled after unlocking current process
1538 to avoid the risk of I2C interrupt handle execution before current
1539 process unlock */
1540
1541 /* Enable EVT, BUF and ERR interrupt */
1542 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1543
1544 return HAL_OK;
1545 }
1546 else
1547 {
1548 return HAL_BUSY;
1549 }
1550 }
1551
1552 /**
1553 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
1554 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1555 * the configuration information for the specified I2C.
1556 * @param pData Pointer to data buffer
1557 * @param Size Amount of data to be sent
1558 * @retval HAL status
1559 */
1560 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1561 {
1562 __IO uint32_t count = 0U;
1563
1564 if(hi2c->State == HAL_I2C_STATE_READY)
1565 {
1566 if((pData == NULL) || (Size == 0U))
1567 {
1568 return HAL_ERROR;
1569 }
1570
1571 /* Wait until BUSY flag is reset */
1572 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1573 do
1574 {
1575 if(count-- == 0U)
1576 {
1577 hi2c->PreviousState = I2C_STATE_NONE;
1578 hi2c->State= HAL_I2C_STATE_READY;
1579
1580 /* Process Unlocked */
1581 __HAL_UNLOCK(hi2c);
1582
1583 return HAL_TIMEOUT;
1584 }
1585 }
1586 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1587
1588 /* Process Locked */
1589 __HAL_LOCK(hi2c);
1590
1591 /* Check if the I2C is already enabled */
1592 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1593 {
1594 /* Enable I2C peripheral */
1595 __HAL_I2C_ENABLE(hi2c);
1596 }
1597
1598 /* Disable Pos */
1599 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1600
1601 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1602 hi2c->Mode = HAL_I2C_MODE_SLAVE;
1603 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1604
1605 /* Prepare transfer parameters */
1606 hi2c->pBuffPtr = pData;
1607 hi2c->XferCount = Size;
1608 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1609 hi2c->XferSize = hi2c->XferCount;
1610
1611 /* Enable Address Acknowledge */
1612 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1613
1614 /* Process Unlocked */
1615 __HAL_UNLOCK(hi2c);
1616
1617 /* Note : The I2C interrupts must be enabled after unlocking current process
1618 to avoid the risk of I2C interrupt handle execution before current
1619 process unlock */
1620
1621 /* Enable EVT, BUF and ERR interrupt */
1622 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1623
1624 return HAL_OK;
1625 }
1626 else
1627 {
1628 return HAL_BUSY;
1629 }
1630 }
1631
1632 /**
1633 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
1634 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1635 * the configuration information for the specified I2C.
1636 * @param pData Pointer to data buffer
1637 * @param Size Amount of data to be sent
1638 * @retval HAL status
1639 */
1640 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1641 {
1642 __IO uint32_t count = 0U;
1643
1644 if(hi2c->State == HAL_I2C_STATE_READY)
1645 {
1646 if((pData == NULL) || (Size == 0U))
1647 {
1648 return HAL_ERROR;
1649 }
1650
1651 /* Wait until BUSY flag is reset */
1652 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1653 do
1654 {
1655 if(count-- == 0U)
1656 {
1657 hi2c->PreviousState = I2C_STATE_NONE;
1658 hi2c->State= HAL_I2C_STATE_READY;
1659
1660 /* Process Unlocked */
1661 __HAL_UNLOCK(hi2c);
1662
1663 return HAL_TIMEOUT;
1664 }
1665 }
1666 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1667
1668 /* Process Locked */
1669 __HAL_LOCK(hi2c);
1670
1671 /* Check if the I2C is already enabled */
1672 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1673 {
1674 /* Enable I2C peripheral */
1675 __HAL_I2C_ENABLE(hi2c);
1676 }
1677
1678 /* Disable Pos */
1679 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1680
1681 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1682 hi2c->Mode = HAL_I2C_MODE_SLAVE;
1683 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1684
1685 /* Prepare transfer parameters */
1686 hi2c->pBuffPtr = pData;
1687 hi2c->XferSize = Size;
1688 hi2c->XferCount = Size;
1689 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1690
1691 /* Enable Address Acknowledge */
1692 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1693
1694 /* Process Unlocked */
1695 __HAL_UNLOCK(hi2c);
1696
1697 /* Note : The I2C interrupts must be enabled after unlocking current process
1698 to avoid the risk of I2C interrupt handle execution before current
1699 process unlock */
1700
1701 /* Enable EVT, BUF and ERR interrupt */
1702 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1703
1704 return HAL_OK;
1705 }
1706 else
1707 {
1708 return HAL_BUSY;
1709 }
1710 }
1711
1712 /**
1713 * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
1714 * @note This interface allow to manage repeated start condition when a direction change during transfer
1715 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1716 * the configuration information for I2C module
1717 * @param pData Pointer to data buffer
1718 * @param Size Amount of data to be sent
1719 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
1720 * @retval HAL status
1721 */
1722 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
1723 {
1724 /* Check the parameters */
1725 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
1726
1727 if(hi2c->State == HAL_I2C_STATE_LISTEN)
1728 {
1729 if((pData == NULL) || (Size == 0U))
1730 {
1731 return HAL_ERROR;
1732 }
1733
1734 /* Process Locked */
1735 __HAL_LOCK(hi2c);
1736
1737 /* Check if the I2C is already enabled */
1738 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1739 {
1740 /* Enable I2C peripheral */
1741 __HAL_I2C_ENABLE(hi2c);
1742 }
1743
1744 /* Disable Pos */
1745 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1746
1747 hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
1748 hi2c->Mode = HAL_I2C_MODE_SLAVE;
1749 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1750
1751 /* Prepare transfer parameters */
1752 hi2c->pBuffPtr = pData;
1753 hi2c->XferCount = Size;
1754 hi2c->XferOptions = XferOptions;
1755 hi2c->XferSize = hi2c->XferCount;
1756
1757 /* Clear ADDR flag */
1758 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1759
1760 /* Process Unlocked */
1761 __HAL_UNLOCK(hi2c);
1762
1763 /* Note : The I2C interrupts must be enabled after unlocking current process
1764 to avoid the risk of I2C interrupt handle execution before current
1765 process unlock */
1766
1767 /* Enable EVT, BUF and ERR interrupt */
1768 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1769
1770 return HAL_OK;
1771 }
1772 else
1773 {
1774 return HAL_BUSY;
1775 }
1776 }
1777
1778 /**
1779 * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
1780 * @note This interface allow to manage repeated start condition when a direction change during transfer
1781 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1782 * the configuration information for the specified I2C.
1783 * @param pData Pointer to data buffer
1784 * @param Size Amount of data to be sent
1785 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
1786 * @retval HAL status
1787 */
1788 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
1789 {
1790 /* Check the parameters */
1791 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
1792
1793 if(hi2c->State == HAL_I2C_STATE_LISTEN)
1794 {
1795 if((pData == NULL) || (Size == 0U))
1796 {
1797 return HAL_ERROR;
1798 }
1799
1800 /* Process Locked */
1801 __HAL_LOCK(hi2c);
1802
1803 /* Check if the I2C is already enabled */
1804 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1805 {
1806 /* Enable I2C peripheral */
1807 __HAL_I2C_ENABLE(hi2c);
1808 }
1809
1810 /* Disable Pos */
1811 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1812
1813 hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
1814 hi2c->Mode = HAL_I2C_MODE_SLAVE;
1815 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1816
1817 /* Prepare transfer parameters */
1818 hi2c->pBuffPtr = pData;
1819 hi2c->XferCount = Size;
1820 hi2c->XferOptions = XferOptions;
1821 hi2c->XferSize = hi2c->XferCount;
1822
1823 /* Clear ADDR flag */
1824 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1825
1826 /* Process Unlocked */
1827 __HAL_UNLOCK(hi2c);
1828
1829 /* Note : The I2C interrupts must be enabled after unlocking current process
1830 to avoid the risk of I2C interrupt handle execution before current
1831 process unlock */
1832
1833 /* Enable EVT, BUF and ERR interrupt */
1834 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1835
1836 return HAL_OK;
1837 }
1838 else
1839 {
1840 return HAL_BUSY;
1841 }
1842 }
1843
1844 /**
1845 * @brief Enable the Address listen mode with Interrupt.
1846 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1847 * the configuration information for the specified I2C.
1848 * @retval HAL status
1849 */
1850 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
1851 {
1852 if(hi2c->State == HAL_I2C_STATE_READY)
1853 {
1854 hi2c->State = HAL_I2C_STATE_LISTEN;
1855
1856 /* Check if the I2C is already enabled */
1857 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1858 {
1859 /* Enable I2C peripheral */
1860 __HAL_I2C_ENABLE(hi2c);
1861 }
1862
1863 /* Enable Address Acknowledge */
1864 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1865
1866 /* Enable EVT and ERR interrupt */
1867 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
1868
1869 return HAL_OK;
1870 }
1871 else
1872 {
1873 return HAL_BUSY;
1874 }
1875 }
1876
1877 /**
1878 * @brief Disable the Address listen mode with Interrupt.
1879 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1880 * the configuration information for the specified I2C.
1881 * @retval HAL status
1882 */
1883 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
1884 {
1885 /* Declaration of tmp to prevent undefined behavior of volatile usage */
1886 uint32_t tmp;
1887
1888 /* Disable Address listen mode only if a transfer is not ongoing */
1889 if(hi2c->State == HAL_I2C_STATE_LISTEN)
1890 {
1891 tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
1892 hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
1893 hi2c->State = HAL_I2C_STATE_READY;
1894 hi2c->Mode = HAL_I2C_MODE_NONE;
1895
1896 /* Disable Address Acknowledge */
1897 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1898
1899 /* Disable EVT and ERR interrupt */
1900 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
1901
1902 return HAL_OK;
1903 }
1904 else
1905 {
1906 return HAL_BUSY;
1907 }
1908 }
1909
1910 /**
1911 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
1912 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
1913 * the configuration information for the specified I2C.
1914 * @param DevAddress Target device address: The device 7 bits address value
1915 * in datasheet must be shift at right before call interface
1916 * @param pData Pointer to data buffer
1917 * @param Size Amount of data to be sent
1918 * @retval HAL status
1919 */
1920 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1921 {
1922 __IO uint32_t count = 0U;
1923
1924 if(hi2c->State == HAL_I2C_STATE_READY)
1925 {
1926 /* Wait until BUSY flag is reset */
1927 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
1928 do
1929 {
1930 if(count-- == 0U)
1931 {
1932 hi2c->PreviousState = I2C_STATE_NONE;
1933 hi2c->State= HAL_I2C_STATE_READY;
1934
1935 /* Process Unlocked */
1936 __HAL_UNLOCK(hi2c);
1937
1938 return HAL_TIMEOUT;
1939 }
1940 }
1941 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
1942
1943 /* Process Locked */
1944 __HAL_LOCK(hi2c);
1945
1946 /* Check if the I2C is already enabled */
1947 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
1948 {
1949 /* Enable I2C peripheral */
1950 __HAL_I2C_ENABLE(hi2c);
1951 }
1952
1953 /* Disable Pos */
1954 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1955
1956 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1957 hi2c->Mode = HAL_I2C_MODE_MASTER;
1958 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1959
1960 /* Prepare transfer parameters */
1961 hi2c->pBuffPtr = pData;
1962 hi2c->XferCount = Size;
1963 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1964 hi2c->XferSize = hi2c->XferCount;
1965 hi2c->Devaddress = DevAddress;
1966
1967 if(hi2c->XferSize > 0U)
1968 {
1969 /* Set the I2C DMA transfer complete callback */
1970 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
1971
1972 /* Set the DMA error callback */
1973 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1974
1975 /* Set the unused DMA callbacks to NULL */
1976 hi2c->hdmatx->XferHalfCpltCallback = NULL;
1977 hi2c->hdmatx->XferM1CpltCallback = NULL;
1978 hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
1979 hi2c->hdmatx->XferAbortCallback = NULL;
1980
1981 /* Enable the DMA Stream */
1982 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
1983
1984 /* Enable Acknowledge */
1985 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1986
1987 /* Generate Start */
1988 hi2c->Instance->CR1 |= I2C_CR1_START;
1989
1990 /* Process Unlocked */
1991 __HAL_UNLOCK(hi2c);
1992
1993 /* Note : The I2C interrupts must be enabled after unlocking current process
1994 to avoid the risk of I2C interrupt handle execution before current
1995 process unlock */
1996
1997 /* Enable EVT and ERR interrupt */
1998 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
1999
2000 /* Enable DMA Request */
2001 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2002 }
2003 else
2004 {
2005 /* Enable Acknowledge */
2006 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2007
2008 /* Generate Start */
2009 hi2c->Instance->CR1 |= I2C_CR1_START;
2010
2011 /* Process Unlocked */
2012 __HAL_UNLOCK(hi2c);
2013
2014 /* Note : The I2C interrupts must be enabled after unlocking current process
2015 to avoid the risk of I2C interrupt handle execution before current
2016 process unlock */
2017
2018 /* Enable EVT, BUF and ERR interrupt */
2019 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2020 }
2021
2022 return HAL_OK;
2023 }
2024 else
2025 {
2026 return HAL_BUSY;
2027 }
2028 }
2029
2030 /**
2031 * @brief Receive in master mode an amount of data in non-blocking mode with DMA
2032 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2033 * the configuration information for the specified I2C.
2034 * @param DevAddress Target device address: The device 7 bits address value
2035 * in datasheet must be shift at right before call interface
2036 * @param pData Pointer to data buffer
2037 * @param Size Amount of data to be sent
2038 * @retval HAL status
2039 */
2040 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
2041 {
2042 __IO uint32_t count = 0U;
2043
2044 if(hi2c->State == HAL_I2C_STATE_READY)
2045 {
2046 /* Wait until BUSY flag is reset */
2047 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2048 do
2049 {
2050 if(count-- == 0U)
2051 {
2052 hi2c->PreviousState = I2C_STATE_NONE;
2053 hi2c->State= HAL_I2C_STATE_READY;
2054
2055 /* Process Unlocked */
2056 __HAL_UNLOCK(hi2c);
2057
2058 return HAL_TIMEOUT;
2059 }
2060 }
2061 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2062
2063 /* Process Locked */
2064 __HAL_LOCK(hi2c);
2065
2066 /* Check if the I2C is already enabled */
2067 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2068 {
2069 /* Enable I2C peripheral */
2070 __HAL_I2C_ENABLE(hi2c);
2071 }
2072
2073 /* Disable Pos */
2074 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2075
2076 hi2c->State = HAL_I2C_STATE_BUSY_RX;
2077 hi2c->Mode = HAL_I2C_MODE_MASTER;
2078 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2079
2080 /* Prepare transfer parameters */
2081 hi2c->pBuffPtr = pData;
2082 hi2c->XferCount = Size;
2083 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2084 hi2c->XferSize = hi2c->XferCount;
2085 hi2c->Devaddress = DevAddress;
2086
2087 if(hi2c->XferSize > 0U)
2088 {
2089 /* Set the I2C DMA transfer complete callback */
2090 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
2091
2092 /* Set the DMA error callback */
2093 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2094
2095 /* Set the unused DMA callbacks to NULL */
2096 hi2c->hdmarx->XferHalfCpltCallback = NULL;
2097 hi2c->hdmarx->XferM1CpltCallback = NULL;
2098 hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
2099 hi2c->hdmarx->XferAbortCallback = NULL;
2100
2101 /* Enable the DMA Stream */
2102 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
2103
2104 /* Enable Acknowledge */
2105 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2106
2107 /* Generate Start */
2108 hi2c->Instance->CR1 |= I2C_CR1_START;
2109
2110 /* Process Unlocked */
2111 __HAL_UNLOCK(hi2c);
2112
2113 /* Note : The I2C interrupts must be enabled after unlocking current process
2114 to avoid the risk of I2C interrupt handle execution before current
2115 process unlock */
2116
2117 /* Enable EVT and ERR interrupt */
2118 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2119
2120 /* Enable DMA Request */
2121 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2122 }
2123 else
2124 {
2125 /* Enable Acknowledge */
2126 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2127
2128 /* Generate Start */
2129 hi2c->Instance->CR1 |= I2C_CR1_START;
2130
2131 /* Process Unlocked */
2132 __HAL_UNLOCK(hi2c);
2133
2134 /* Note : The I2C interrupts must be enabled after unlocking current process
2135 to avoid the risk of I2C interrupt handle execution before current
2136 process unlock */
2137
2138 /* Enable EVT, BUF and ERR interrupt */
2139 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2140 }
2141
2142 return HAL_OK;
2143 }
2144 else
2145 {
2146 return HAL_BUSY;
2147 }
2148 }
2149
2150 /**
2151 * @brief Abort a master I2C process communication with Interrupt.
2152 * @note This abort can be called only if state is ready
2153 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2154 * the configuration information for the specified I2C.
2155 * @param DevAddress Target device address: The device 7 bits address value
2156 * in datasheet must be shift at right before call interface
2157 * @retval HAL status
2158 */
2159 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
2160 {
2161 /* Prevent unused argument(s) compilation warning */
2162 UNUSED(DevAddress);
2163
2164 /* Abort Master transfer during Receive or Transmit process */
2165 if(hi2c->Mode == HAL_I2C_MODE_MASTER)
2166 {
2167 /* Process Locked */
2168 __HAL_LOCK(hi2c);
2169
2170 hi2c->PreviousState = I2C_STATE_NONE;
2171 hi2c->State = HAL_I2C_STATE_ABORT;
2172
2173 /* Disable Acknowledge */
2174 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2175
2176 /* Generate Stop */
2177 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2178
2179 hi2c->XferCount = 0U;
2180
2181 /* Disable EVT, BUF and ERR interrupt */
2182 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2183
2184 /* Process Unlocked */
2185 __HAL_UNLOCK(hi2c);
2186
2187 /* Call the corresponding callback to inform upper layer of End of Transfer */
2188 I2C_ITError(hi2c);
2189
2190 return HAL_OK;
2191 }
2192 else
2193 {
2194 /* Wrong usage of abort function */
2195 /* This function should be used only in case of abort monitored by master device */
2196 return HAL_ERROR;
2197 }
2198 }
2199
2200 /**
2201 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
2202 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2203 * the configuration information for the specified I2C.
2204 * @param pData Pointer to data buffer
2205 * @param Size Amount of data to be sent
2206 * @retval HAL status
2207 */
2208 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
2209 {
2210 __IO uint32_t count = 0U;
2211
2212 if(hi2c->State == HAL_I2C_STATE_READY)
2213 {
2214 if((pData == NULL) || (Size == 0U))
2215 {
2216 return HAL_ERROR;
2217 }
2218
2219 /* Wait until BUSY flag is reset */
2220 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2221 do
2222 {
2223 if(count-- == 0U)
2224 {
2225 hi2c->PreviousState = I2C_STATE_NONE;
2226 hi2c->State= HAL_I2C_STATE_READY;
2227
2228 /* Process Unlocked */
2229 __HAL_UNLOCK(hi2c);
2230
2231 return HAL_TIMEOUT;
2232 }
2233 }
2234 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2235
2236 /* Process Locked */
2237 __HAL_LOCK(hi2c);
2238
2239 /* Check if the I2C is already enabled */
2240 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2241 {
2242 /* Enable I2C peripheral */
2243 __HAL_I2C_ENABLE(hi2c);
2244 }
2245
2246 /* Disable Pos */
2247 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2248
2249 hi2c->State = HAL_I2C_STATE_BUSY_TX;
2250 hi2c->Mode = HAL_I2C_MODE_SLAVE;
2251 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2252
2253 /* Prepare transfer parameters */
2254 hi2c->pBuffPtr = pData;
2255 hi2c->XferCount = Size;
2256 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2257 hi2c->XferSize = hi2c->XferCount;
2258
2259 /* Set the I2C DMA transfer complete callback */
2260 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
2261
2262 /* Set the DMA error callback */
2263 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2264
2265 /* Set the unused DMA callbacks to NULL */
2266 hi2c->hdmatx->XferHalfCpltCallback = NULL;
2267 hi2c->hdmatx->XferM1CpltCallback = NULL;
2268 hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
2269 hi2c->hdmatx->XferAbortCallback = NULL;
2270
2271 /* Enable the DMA Stream */
2272 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
2273
2274 /* Enable Address Acknowledge */
2275 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2276
2277 /* Process Unlocked */
2278 __HAL_UNLOCK(hi2c);
2279
2280 /* Note : The I2C interrupts must be enabled after unlocking current process
2281 to avoid the risk of I2C interrupt handle execution before current
2282 process unlock */
2283 /* Enable EVT and ERR interrupt */
2284 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2285
2286 /* Enable DMA Request */
2287 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2288
2289 return HAL_OK;
2290 }
2291 else
2292 {
2293 return HAL_BUSY;
2294 }
2295 }
2296
2297 /**
2298 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
2299 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2300 * the configuration information for the specified I2C.
2301 * @param pData Pointer to data buffer
2302 * @param Size Amount of data to be sent
2303 * @retval HAL status
2304 */
2305 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
2306 {
2307 __IO uint32_t count = 0U;
2308
2309 if(hi2c->State == HAL_I2C_STATE_READY)
2310 {
2311 if((pData == NULL) || (Size == 0U))
2312 {
2313 return HAL_ERROR;
2314 }
2315
2316 /* Wait until BUSY flag is reset */
2317 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2318 do
2319 {
2320 if(count-- == 0U)
2321 {
2322 hi2c->PreviousState = I2C_STATE_NONE;
2323 hi2c->State= HAL_I2C_STATE_READY;
2324
2325 /* Process Unlocked */
2326 __HAL_UNLOCK(hi2c);
2327
2328 return HAL_TIMEOUT;
2329 }
2330 }
2331 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2332
2333 /* Process Locked */
2334 __HAL_LOCK(hi2c);
2335
2336 /* Check if the I2C is already enabled */
2337 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2338 {
2339 /* Enable I2C peripheral */
2340 __HAL_I2C_ENABLE(hi2c);
2341 }
2342
2343 /* Disable Pos */
2344 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2345
2346 hi2c->State = HAL_I2C_STATE_BUSY_RX;
2347 hi2c->Mode = HAL_I2C_MODE_SLAVE;
2348 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2349
2350 /* Prepare transfer parameters */
2351 hi2c->pBuffPtr = pData;
2352 hi2c->XferCount = Size;
2353 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2354 hi2c->XferSize = hi2c->XferCount;
2355
2356 /* Set the I2C DMA transfer complete callback */
2357 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
2358
2359 /* Set the DMA error callback */
2360 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2361
2362 /* Set the unused DMA callbacks to NULL */
2363 hi2c->hdmarx->XferHalfCpltCallback = NULL;
2364 hi2c->hdmarx->XferM1CpltCallback = NULL;
2365 hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
2366 hi2c->hdmarx->XferAbortCallback = NULL;
2367
2368 /* Enable the DMA Stream */
2369 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
2370
2371 /* Enable Address Acknowledge */
2372 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2373
2374 /* Process Unlocked */
2375 __HAL_UNLOCK(hi2c);
2376
2377 /* Note : The I2C interrupts must be enabled after unlocking current process
2378 to avoid the risk of I2C interrupt handle execution before current
2379 process unlock */
2380 /* Enable EVT and ERR interrupt */
2381 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2382
2383 /* Enable DMA Request */
2384 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2385
2386 return HAL_OK;
2387 }
2388 else
2389 {
2390 return HAL_BUSY;
2391 }
2392 }
2393 /**
2394 * @brief Write an amount of data in blocking mode to a specific memory address
2395 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2396 * the configuration information for the specified I2C.
2397 * @param DevAddress Target device address
2398 * @param MemAddress Internal memory address
2399 * @param MemAddSize Size of internal memory address
2400 * @param pData Pointer to data buffer
2401 * @param Size Amount of data to be sent
2402 * @param Timeout Timeout duration
2403 * @retval HAL status
2404 */
2405 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2406 {
2407 uint32_t tickstart = 0x00U;
2408
2409 /* Init tickstart for timeout management*/
2410 tickstart = HAL_GetTick();
2411
2412 /* Check the parameters */
2413 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2414
2415 if(hi2c->State == HAL_I2C_STATE_READY)
2416 {
2417 /* Wait until BUSY flag is reset */
2418 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
2419 {
2420 return HAL_BUSY;
2421 }
2422
2423 /* Process Locked */
2424 __HAL_LOCK(hi2c);
2425
2426 /* Check if the I2C is already enabled */
2427 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2428 {
2429 /* Enable I2C peripheral */
2430 __HAL_I2C_ENABLE(hi2c);
2431 }
2432
2433 /* Disable Pos */
2434 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2435
2436 hi2c->State = HAL_I2C_STATE_BUSY_TX;
2437 hi2c->Mode = HAL_I2C_MODE_MEM;
2438 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2439
2440 /* Prepare transfer parameters */
2441 hi2c->pBuffPtr = pData;
2442 hi2c->XferCount = Size;
2443 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2444 hi2c->XferSize = hi2c->XferCount;
2445
2446 /* Send Slave Address and Memory Address */
2447 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
2448 {
2449 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2450 {
2451 /* Process Unlocked */
2452 __HAL_UNLOCK(hi2c);
2453 return HAL_ERROR;
2454 }
2455 else
2456 {
2457 /* Process Unlocked */
2458 __HAL_UNLOCK(hi2c);
2459 return HAL_TIMEOUT;
2460 }
2461 }
2462
2463 while(hi2c->XferSize > 0U)
2464 {
2465 /* Wait until TXE flag is set */
2466 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2467 {
2468 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2469 {
2470 /* Generate Stop */
2471 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2472 return HAL_ERROR;
2473 }
2474 else
2475 {
2476 return HAL_TIMEOUT;
2477 }
2478 }
2479
2480 /* Write data to DR */
2481 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2482 hi2c->XferSize--;
2483 hi2c->XferCount--;
2484
2485 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
2486 {
2487 /* Write data to DR */
2488 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2489 hi2c->XferSize--;
2490 hi2c->XferCount--;
2491 }
2492 }
2493
2494 /* Wait until BTF flag is set */
2495 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2496 {
2497 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2498 {
2499 /* Generate Stop */
2500 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2501 return HAL_ERROR;
2502 }
2503 else
2504 {
2505 return HAL_TIMEOUT;
2506 }
2507 }
2508
2509 /* Generate Stop */
2510 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2511
2512 hi2c->State = HAL_I2C_STATE_READY;
2513 hi2c->Mode = HAL_I2C_MODE_NONE;
2514
2515 /* Process Unlocked */
2516 __HAL_UNLOCK(hi2c);
2517
2518 return HAL_OK;
2519 }
2520 else
2521 {
2522 return HAL_BUSY;
2523 }
2524 }
2525
2526 /**
2527 * @brief Read an amount of data in blocking mode from a specific memory address
2528 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2529 * the configuration information for the specified I2C.
2530 * @param DevAddress Target device address
2531 * @param MemAddress Internal memory address
2532 * @param MemAddSize Size of internal memory address
2533 * @param pData Pointer to data buffer
2534 * @param Size Amount of data to be sent
2535 * @param Timeout Timeout duration
2536 * @retval HAL status
2537 */
2538 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2539 {
2540 uint32_t tickstart = 0x00U;
2541
2542 /* Init tickstart for timeout management*/
2543 tickstart = HAL_GetTick();
2544
2545 /* Check the parameters */
2546 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2547
2548 if(hi2c->State == HAL_I2C_STATE_READY)
2549 {
2550 /* Wait until BUSY flag is reset */
2551 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
2552 {
2553 return HAL_BUSY;
2554 }
2555
2556 /* Process Locked */
2557 __HAL_LOCK(hi2c);
2558
2559 /* Check if the I2C is already enabled */
2560 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2561 {
2562 /* Enable I2C peripheral */
2563 __HAL_I2C_ENABLE(hi2c);
2564 }
2565
2566 /* Disable Pos */
2567 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2568
2569 hi2c->State = HAL_I2C_STATE_BUSY_RX;
2570 hi2c->Mode = HAL_I2C_MODE_MEM;
2571 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2572
2573 /* Prepare transfer parameters */
2574 hi2c->pBuffPtr = pData;
2575 hi2c->XferCount = Size;
2576 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2577 hi2c->XferSize = hi2c->XferCount;
2578
2579 /* Send Slave Address and Memory Address */
2580 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
2581 {
2582 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2583 {
2584 /* Process Unlocked */
2585 __HAL_UNLOCK(hi2c);
2586 return HAL_ERROR;
2587 }
2588 else
2589 {
2590 /* Process Unlocked */
2591 __HAL_UNLOCK(hi2c);
2592 return HAL_TIMEOUT;
2593 }
2594 }
2595
2596 if(hi2c->XferSize == 0U)
2597 {
2598 /* Clear ADDR flag */
2599 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2600
2601 /* Generate Stop */
2602 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2603 }
2604 else if(hi2c->XferSize == 1U)
2605 {
2606 /* Disable Acknowledge */
2607 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2608
2609 /* Clear ADDR flag */
2610 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2611
2612 /* Generate Stop */
2613 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2614 }
2615 else if(hi2c->XferSize == 2U)
2616 {
2617 /* Disable Acknowledge */
2618 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2619
2620 /* Enable Pos */
2621 hi2c->Instance->CR1 |= I2C_CR1_POS;
2622
2623 /* Clear ADDR flag */
2624 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2625 }
2626 else
2627 {
2628 /* Clear ADDR flag */
2629 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2630 }
2631
2632 while(hi2c->XferSize > 0U)
2633 {
2634 if(hi2c->XferSize <= 3U)
2635 {
2636 /* One byte */
2637 if(hi2c->XferSize== 1U)
2638 {
2639 /* Wait until RXNE flag is set */
2640 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2641 {
2642 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
2643 {
2644 return HAL_TIMEOUT;
2645 }
2646 else
2647 {
2648 return HAL_ERROR;
2649 }
2650 }
2651
2652 /* Read data from DR */
2653 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2654 hi2c->XferSize--;
2655 hi2c->XferCount--;
2656 }
2657 /* Two bytes */
2658 else if(hi2c->XferSize == 2U)
2659 {
2660 /* Wait until BTF flag is set */
2661 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
2662 {
2663 return HAL_TIMEOUT;
2664 }
2665
2666 /* Generate Stop */
2667 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2668
2669 /* Read data from DR */
2670 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2671 hi2c->XferSize--;
2672 hi2c->XferCount--;
2673
2674 /* Read data from DR */
2675 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2676 hi2c->XferSize--;
2677 hi2c->XferCount--;
2678 }
2679 /* 3 Last bytes */
2680 else
2681 {
2682 /* Wait until BTF flag is set */
2683 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
2684 {
2685 return HAL_TIMEOUT;
2686 }
2687
2688 /* Disable Acknowledge */
2689 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2690
2691 /* Read data from DR */
2692 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2693 hi2c->XferSize--;
2694 hi2c->XferCount--;
2695
2696 /* Wait until BTF flag is set */
2697 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
2698 {
2699 return HAL_TIMEOUT;
2700 }
2701
2702 /* Generate Stop */
2703 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2704
2705 /* Read data from DR */
2706 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2707 hi2c->XferSize--;
2708 hi2c->XferCount--;
2709
2710 /* Read data from DR */
2711 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2712 hi2c->XferSize--;
2713 hi2c->XferCount--;
2714 }
2715 }
2716 else
2717 {
2718 /* Wait until RXNE flag is set */
2719 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2720 {
2721 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
2722 {
2723 return HAL_TIMEOUT;
2724 }
2725 else
2726 {
2727 return HAL_ERROR;
2728 }
2729 }
2730
2731 /* Read data from DR */
2732 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2733 hi2c->XferSize--;
2734 hi2c->XferCount--;
2735
2736 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
2737 {
2738 /* Read data from DR */
2739 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2740 hi2c->XferSize--;
2741 hi2c->XferCount--;
2742 }
2743 }
2744 }
2745
2746 hi2c->State = HAL_I2C_STATE_READY;
2747 hi2c->Mode = HAL_I2C_MODE_NONE;
2748
2749 /* Process Unlocked */
2750 __HAL_UNLOCK(hi2c);
2751
2752 return HAL_OK;
2753 }
2754 else
2755 {
2756 return HAL_BUSY;
2757 }
2758 }
2759
2760 /**
2761 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
2762 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2763 * the configuration information for the specified I2C.
2764 * @param DevAddress Target device address
2765 * @param MemAddress Internal memory address
2766 * @param MemAddSize Size of internal memory address
2767 * @param pData Pointer to data buffer
2768 * @param Size Amount of data to be sent
2769 * @retval HAL status
2770 */
2771 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2772 {
2773 __IO uint32_t count = 0U;
2774
2775 /* Check the parameters */
2776 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2777
2778 if(hi2c->State == HAL_I2C_STATE_READY)
2779 {
2780 /* Wait until BUSY flag is reset */
2781 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2782 do
2783 {
2784 if(count-- == 0U)
2785 {
2786 hi2c->PreviousState = I2C_STATE_NONE;
2787 hi2c->State= HAL_I2C_STATE_READY;
2788
2789 /* Process Unlocked */
2790 __HAL_UNLOCK(hi2c);
2791
2792 return HAL_TIMEOUT;
2793 }
2794 }
2795 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2796
2797 /* Process Locked */
2798 __HAL_LOCK(hi2c);
2799
2800 /* Check if the I2C is already enabled */
2801 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2802 {
2803 /* Enable I2C peripheral */
2804 __HAL_I2C_ENABLE(hi2c);
2805 }
2806
2807 /* Disable Pos */
2808 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2809
2810 hi2c->State = HAL_I2C_STATE_BUSY_TX;
2811 hi2c->Mode = HAL_I2C_MODE_MEM;
2812 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2813
2814 /* Prepare transfer parameters */
2815 hi2c->pBuffPtr = pData;
2816 hi2c->XferSize = Size;
2817 hi2c->XferCount = Size;
2818 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2819 hi2c->Devaddress = DevAddress;
2820 hi2c->Memaddress = MemAddress;
2821 hi2c->MemaddSize = MemAddSize;
2822 hi2c->EventCount = 0U;
2823
2824 /* Generate Start */
2825 hi2c->Instance->CR1 |= I2C_CR1_START;
2826
2827 /* Process Unlocked */
2828 __HAL_UNLOCK(hi2c);
2829
2830 /* Note : The I2C interrupts must be enabled after unlocking current process
2831 to avoid the risk of I2C interrupt handle execution before current
2832 process unlock */
2833
2834 /* Enable EVT, BUF and ERR interrupt */
2835 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2836
2837 return HAL_OK;
2838 }
2839 else
2840 {
2841 return HAL_BUSY;
2842 }
2843 }
2844
2845 /**
2846 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
2847 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2848 * the configuration information for the specified I2C.
2849 * @param DevAddress Target device address
2850 * @param MemAddress Internal memory address
2851 * @param MemAddSize Size of internal memory address
2852 * @param pData Pointer to data buffer
2853 * @param Size Amount of data to be sent
2854 * @retval HAL status
2855 */
2856 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2857 {
2858 __IO uint32_t count = 0U;
2859
2860 /* Check the parameters */
2861 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2862
2863 if(hi2c->State == HAL_I2C_STATE_READY)
2864 {
2865 /* Wait until BUSY flag is reset */
2866 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2867 do
2868 {
2869 if(count-- == 0U)
2870 {
2871 hi2c->PreviousState = I2C_STATE_NONE;
2872 hi2c->State= HAL_I2C_STATE_READY;
2873
2874 /* Process Unlocked */
2875 __HAL_UNLOCK(hi2c);
2876
2877 return HAL_TIMEOUT;
2878 }
2879 }
2880 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2881
2882 /* Process Locked */
2883 __HAL_LOCK(hi2c);
2884
2885 /* Check if the I2C is already enabled */
2886 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2887 {
2888 /* Enable I2C peripheral */
2889 __HAL_I2C_ENABLE(hi2c);
2890 }
2891
2892 /* Disable Pos */
2893 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2894
2895 hi2c->State = HAL_I2C_STATE_BUSY_RX;
2896 hi2c->Mode = HAL_I2C_MODE_MEM;
2897 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2898
2899 /* Prepare transfer parameters */
2900 hi2c->pBuffPtr = pData;
2901 hi2c->XferSize = Size;
2902 hi2c->XferCount = Size;
2903 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2904 hi2c->Devaddress = DevAddress;
2905 hi2c->Memaddress = MemAddress;
2906 hi2c->MemaddSize = MemAddSize;
2907 hi2c->EventCount = 0U;
2908
2909 /* Enable Acknowledge */
2910 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2911
2912 /* Generate Start */
2913 hi2c->Instance->CR1 |= I2C_CR1_START;
2914
2915 /* Process Unlocked */
2916 __HAL_UNLOCK(hi2c);
2917
2918 if(hi2c->XferSize > 0U)
2919 {
2920 /* Note : The I2C interrupts must be enabled after unlocking current process
2921 to avoid the risk of I2C interrupt handle execution before current
2922 process unlock */
2923
2924 /* Enable EVT, BUF and ERR interrupt */
2925 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2926 }
2927 return HAL_OK;
2928 }
2929 else
2930 {
2931 return HAL_BUSY;
2932 }
2933 }
2934
2935 /**
2936 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
2937 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2938 * the configuration information for the specified I2C.
2939 * @param DevAddress Target device address
2940 * @param MemAddress Internal memory address
2941 * @param MemAddSize Size of internal memory address
2942 * @param pData Pointer to data buffer
2943 * @param Size Amount of data to be sent
2944 * @retval HAL status
2945 */
2946 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2947 {
2948 __IO uint32_t count = 0U;
2949
2950 uint32_t tickstart = 0x00U;
2951
2952 /* Init tickstart for timeout management*/
2953 tickstart = HAL_GetTick();
2954
2955 /* Check the parameters */
2956 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2957
2958 if(hi2c->State == HAL_I2C_STATE_READY)
2959 {
2960 /* Wait until BUSY flag is reset */
2961 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
2962 do
2963 {
2964 if(count-- == 0U)
2965 {
2966 hi2c->PreviousState = I2C_STATE_NONE;
2967 hi2c->State= HAL_I2C_STATE_READY;
2968
2969 /* Process Unlocked */
2970 __HAL_UNLOCK(hi2c);
2971
2972 return HAL_TIMEOUT;
2973 }
2974 }
2975 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
2976
2977 /* Process Locked */
2978 __HAL_LOCK(hi2c);
2979
2980 /* Check if the I2C is already enabled */
2981 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
2982 {
2983 /* Enable I2C peripheral */
2984 __HAL_I2C_ENABLE(hi2c);
2985 }
2986
2987 /* Disable Pos */
2988 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2989
2990 hi2c->State = HAL_I2C_STATE_BUSY_TX;
2991 hi2c->Mode = HAL_I2C_MODE_MEM;
2992 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2993
2994 /* Prepare transfer parameters */
2995 hi2c->pBuffPtr = pData;
2996 hi2c->XferSize = Size;
2997 hi2c->XferCount = Size;
2998 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2999
3000 if(hi2c->XferSize > 0U)
3001 {
3002 /* Set the I2C DMA transfer complete callback */
3003 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
3004
3005 /* Set the DMA error callback */
3006 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
3007
3008 /* Set the unused DMA callbacks to NULL */
3009 hi2c->hdmatx->XferHalfCpltCallback = NULL;
3010 hi2c->hdmatx->XferM1CpltCallback = NULL;
3011 hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
3012 hi2c->hdmatx->XferAbortCallback = NULL;
3013
3014 /* Enable the DMA Stream */
3015 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
3016
3017 /* Send Slave Address and Memory Address */
3018 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
3019 {
3020 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3021 {
3022 /* Process Unlocked */
3023 __HAL_UNLOCK(hi2c);
3024 return HAL_ERROR;
3025 }
3026 else
3027 {
3028 /* Process Unlocked */
3029 __HAL_UNLOCK(hi2c);
3030 return HAL_TIMEOUT;
3031 }
3032 }
3033
3034 /* Clear ADDR flag */
3035 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3036
3037 /* Process Unlocked */
3038 __HAL_UNLOCK(hi2c);
3039
3040 /* Note : The I2C interrupts must be enabled after unlocking current process
3041 to avoid the risk of I2C interrupt handle execution before current
3042 process unlock */
3043 /* Enable ERR interrupt */
3044 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
3045
3046 /* Enable DMA Request */
3047 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
3048 }
3049 return HAL_OK;
3050 }
3051 else
3052 {
3053 return HAL_BUSY;
3054 }
3055 }
3056
3057 /**
3058 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
3059 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3060 * the configuration information for the specified I2C.
3061 * @param DevAddress Target device address
3062 * @param MemAddress Internal memory address
3063 * @param MemAddSize Size of internal memory address
3064 * @param pData Pointer to data buffer
3065 * @param Size Amount of data to be read
3066 * @retval HAL status
3067 */
3068 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
3069 {
3070 uint32_t tickstart = 0x00U;
3071 __IO uint32_t count = 0U;
3072
3073 /* Init tickstart for timeout management*/
3074 tickstart = HAL_GetTick();
3075
3076 /* Check the parameters */
3077 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
3078
3079 if(hi2c->State == HAL_I2C_STATE_READY)
3080 {
3081 /* Wait until BUSY flag is reset */
3082 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
3083 do
3084 {
3085 if(count-- == 0U)
3086 {
3087 hi2c->PreviousState = I2C_STATE_NONE;
3088 hi2c->State= HAL_I2C_STATE_READY;
3089
3090 /* Process Unlocked */
3091 __HAL_UNLOCK(hi2c);
3092
3093 return HAL_TIMEOUT;
3094 }
3095 }
3096 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
3097
3098 /* Process Locked */
3099 __HAL_LOCK(hi2c);
3100
3101 /* Check if the I2C is already enabled */
3102 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
3103 {
3104 /* Enable I2C peripheral */
3105 __HAL_I2C_ENABLE(hi2c);
3106 }
3107
3108 /* Disable Pos */
3109 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
3110
3111 hi2c->State = HAL_I2C_STATE_BUSY_RX;
3112 hi2c->Mode = HAL_I2C_MODE_MEM;
3113 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
3114
3115 /* Prepare transfer parameters */
3116 hi2c->pBuffPtr = pData;
3117 hi2c->XferCount = Size;
3118 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3119 hi2c->XferSize = hi2c->XferCount;
3120
3121 if(hi2c->XferSize > 0U)
3122 {
3123 /* Set the I2C DMA transfer complete callback */
3124 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
3125
3126 /* Set the DMA error callback */
3127 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
3128
3129 /* Set the unused DMA callbacks to NULL */
3130 hi2c->hdmarx->XferHalfCpltCallback = NULL;
3131 hi2c->hdmarx->XferM1CpltCallback = NULL;
3132 hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
3133 hi2c->hdmarx->XferAbortCallback = NULL;
3134
3135 /* Enable the DMA Stream */
3136 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
3137
3138 /* Send Slave Address and Memory Address */
3139 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
3140 {
3141 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3142 {
3143 /* Process Unlocked */
3144 __HAL_UNLOCK(hi2c);
3145 return HAL_ERROR;
3146 }
3147 else
3148 {
3149 /* Process Unlocked */
3150 __HAL_UNLOCK(hi2c);
3151 return HAL_TIMEOUT;
3152 }
3153 }
3154
3155 if(Size == 1U)
3156 {
3157 /* Disable Acknowledge */
3158 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3159 }
3160 else
3161 {
3162 /* Enable Last DMA bit */
3163 hi2c->Instance->CR2 |= I2C_CR2_LAST;
3164 }
3165
3166 /* Clear ADDR flag */
3167 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3168
3169 /* Process Unlocked */
3170 __HAL_UNLOCK(hi2c);
3171
3172 /* Note : The I2C interrupts must be enabled after unlocking current process
3173 to avoid the risk of I2C interrupt handle execution before current
3174 process unlock */
3175 /* Enable ERR interrupt */
3176 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
3177
3178 /* Enable DMA Request */
3179 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
3180 }
3181 else
3182 {
3183 /* Send Slave Address and Memory Address */
3184 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
3185 {
3186 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3187 {
3188 /* Process Unlocked */
3189 __HAL_UNLOCK(hi2c);
3190 return HAL_ERROR;
3191 }
3192 else
3193 {
3194 /* Process Unlocked */
3195 __HAL_UNLOCK(hi2c);
3196 return HAL_TIMEOUT;
3197 }
3198 }
3199
3200 /* Clear ADDR flag */
3201 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3202
3203 /* Generate Stop */
3204 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3205
3206 hi2c->State = HAL_I2C_STATE_READY;
3207
3208 /* Process Unlocked */
3209 __HAL_UNLOCK(hi2c);
3210 }
3211
3212 return HAL_OK;
3213 }
3214 else
3215 {
3216 return HAL_BUSY;
3217 }
3218 }
3219
3220 /**
3221 * @brief Checks if target device is ready for communication.
3222 * @note This function is used with Memory devices
3223 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3224 * the configuration information for the specified I2C.
3225 * @param DevAddress Target device address
3226 * @param Trials Number of trials
3227 * @param Timeout Timeout duration
3228 * @retval HAL status
3229 */
3230 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
3231 {
3232 uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
3233
3234 /* Get tick */
3235 tickstart = HAL_GetTick();
3236
3237 if(hi2c->State == HAL_I2C_STATE_READY)
3238 {
3239 /* Wait until BUSY flag is reset */
3240 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
3241 {
3242 return HAL_BUSY;
3243 }
3244
3245 /* Process Locked */
3246 __HAL_LOCK(hi2c);
3247
3248 /* Check if the I2C is already enabled */
3249 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
3250 {
3251 /* Enable I2C peripheral */
3252 __HAL_I2C_ENABLE(hi2c);
3253 }
3254
3255 /* Disable Pos */
3256 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
3257
3258 hi2c->State = HAL_I2C_STATE_BUSY;
3259 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
3260 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3261
3262 do
3263 {
3264 /* Generate Start */
3265 hi2c->Instance->CR1 |= I2C_CR1_START;
3266
3267 /* Wait until SB flag is set */
3268 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
3269 {
3270 return HAL_TIMEOUT;
3271 }
3272
3273 /* Send slave address */
3274 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3275
3276 /* Wait until ADDR or AF flag are set */
3277 /* Get tick */
3278 tickstart = HAL_GetTick();
3279
3280 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
3281 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
3282 tmp3 = hi2c->State;
3283 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
3284 {
3285 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
3286 {
3287 hi2c->State = HAL_I2C_STATE_TIMEOUT;
3288 }
3289 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
3290 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
3291 tmp3 = hi2c->State;
3292 }
3293
3294 hi2c->State = HAL_I2C_STATE_READY;
3295
3296 /* Check if the ADDR flag has been set */
3297 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
3298 {
3299 /* Generate Stop */
3300 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3301
3302 /* Clear ADDR Flag */
3303 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3304
3305 /* Wait until BUSY flag is reset */
3306 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
3307 {
3308 return HAL_TIMEOUT;
3309 }
3310
3311 hi2c->State = HAL_I2C_STATE_READY;
3312
3313 /* Process Unlocked */
3314 __HAL_UNLOCK(hi2c);
3315
3316 return HAL_OK;
3317 }
3318 else
3319 {
3320 /* Generate Stop */
3321 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3322
3323 /* Clear AF Flag */
3324 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3325
3326 /* Wait until BUSY flag is reset */
3327 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
3328 {
3329 return HAL_TIMEOUT;
3330 }
3331 }
3332 }while(I2C_Trials++ < Trials);
3333
3334 hi2c->State = HAL_I2C_STATE_READY;
3335
3336 /* Process Unlocked */
3337 __HAL_UNLOCK(hi2c);
3338
3339 return HAL_ERROR;
3340 }
3341 else
3342 {
3343 return HAL_BUSY;
3344 }
3345 }
3346
3347 /**
3348 * @brief This function handles I2C event interrupt request.
3349 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3350 * the configuration information for the specified I2C.
3351 * @retval None
3352 */
3353 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
3354 {
3355 uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
3356 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
3357 uint32_t itsources = READ_REG(hi2c->Instance->CR2);
3358
3359 uint32_t CurrentMode = hi2c->Mode;
3360
3361 /* Master or Memory mode selected */
3362 if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
3363 {
3364 /* SB Set ----------------------------------------------------------------*/
3365 if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3366 {
3367 I2C_Master_SB(hi2c);
3368 }
3369 /* ADD10 Set -------------------------------------------------------------*/
3370 else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3371 {
3372 I2C_Master_ADD10(hi2c);
3373 }
3374 /* ADDR Set --------------------------------------------------------------*/
3375 else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3376 {
3377 I2C_Master_ADDR(hi2c);
3378 }
3379
3380 /* I2C in mode Transmitter -----------------------------------------------*/
3381 if((sr2itflags & I2C_FLAG_TRA) != RESET)
3382 {
3383 /* TXE set and BTF reset -----------------------------------------------*/
3384 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
3385 {
3386 I2C_MasterTransmit_TXE(hi2c);
3387 }
3388 /* BTF set -------------------------------------------------------------*/
3389 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3390 {
3391 I2C_MasterTransmit_BTF(hi2c);
3392 }
3393 }
3394 /* I2C in mode Receiver --------------------------------------------------*/
3395 else
3396 {
3397 /* RXNE set and BTF reset -----------------------------------------------*/
3398 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
3399 {
3400 I2C_MasterReceive_RXNE(hi2c);
3401 }
3402 /* BTF set -------------------------------------------------------------*/
3403 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3404 {
3405 I2C_MasterReceive_BTF(hi2c);
3406 }
3407 }
3408 }
3409 /* Slave mode selected */
3410 else
3411 {
3412 /* ADDR set --------------------------------------------------------------*/
3413 if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3414 {
3415 I2C_Slave_ADDR(hi2c);
3416 }
3417 /* STOPF set --------------------------------------------------------------*/
3418 else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3419 {
3420 I2C_Slave_STOPF(hi2c);
3421 }
3422 /* I2C in mode Transmitter -----------------------------------------------*/
3423 else if((sr2itflags & I2C_FLAG_TRA) != RESET)
3424 {
3425 /* TXE set and BTF reset -----------------------------------------------*/
3426 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
3427 {
3428 I2C_SlaveTransmit_TXE(hi2c);
3429 }
3430 /* BTF set -------------------------------------------------------------*/
3431 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3432 {
3433 I2C_SlaveTransmit_BTF(hi2c);
3434 }
3435 }
3436 /* I2C in mode Receiver --------------------------------------------------*/
3437 else
3438 {
3439 /* RXNE set and BTF reset ----------------------------------------------*/
3440 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
3441 {
3442 I2C_SlaveReceive_RXNE(hi2c);
3443 }
3444 /* BTF set -------------------------------------------------------------*/
3445 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
3446 {
3447 I2C_SlaveReceive_BTF(hi2c);
3448 }
3449 }
3450 }
3451 }
3452
3453 /**
3454 * @brief This function handles I2C error interrupt request.
3455 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3456 * the configuration information for the specified I2C.
3457 * @retval None
3458 */
3459 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
3460 {
3461 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
3462 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
3463 uint32_t itsources = READ_REG(hi2c->Instance->CR2);
3464
3465 /* I2C Bus error interrupt occurred ----------------------------------------*/
3466 if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
3467 {
3468 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
3469
3470 /* Clear BERR flag */
3471 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
3472 }
3473
3474 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
3475 if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
3476 {
3477 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
3478
3479 /* Clear ARLO flag */
3480 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
3481 }
3482
3483 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
3484 if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
3485 {
3486 tmp1 = hi2c->Mode;
3487 tmp2 = hi2c->XferCount;
3488 tmp3 = hi2c->State;
3489 tmp4 = hi2c->PreviousState;
3490 if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
3491 ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
3492 ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
3493 {
3494 I2C_Slave_AF(hi2c);
3495 }
3496 else
3497 {
3498 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
3499
3500 /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
3501 if(hi2c->Mode == HAL_I2C_MODE_MASTER)
3502 {
3503 /* Generate Stop */
3504 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
3505 }
3506
3507 /* Clear AF flag */
3508 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3509 }
3510 }
3511
3512 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
3513 if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
3514 {
3515 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
3516 /* Clear OVR flag */
3517 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
3518 }
3519
3520 /* Call the Error Callback in case of Error detected -----------------------*/
3521 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3522 {
3523 I2C_ITError(hi2c);
3524 }
3525 }
3526
3527 /**
3528 * @brief Master Tx Transfer completed callback.
3529 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3530 * the configuration information for the specified I2C.
3531 * @retval None
3532 */
3533 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
3534 {
3535 /* Prevent unused argument(s) compilation warning */
3536 UNUSED(hi2c);
3537
3538 /* NOTE : This function should not be modified, when the callback is needed,
3539 the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
3540 */
3541 }
3542
3543 /**
3544 * @brief Master Rx Transfer completed callback.
3545 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3546 * the configuration information for the specified I2C.
3547 * @retval None
3548 */
3549 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
3550 {
3551 /* Prevent unused argument(s) compilation warning */
3552 UNUSED(hi2c);
3553
3554 /* NOTE : This function should not be modified, when the callback is needed,
3555 the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
3556 */
3557 }
3558
3559 /** @brief Slave Tx Transfer completed callback.
3560 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3561 * the configuration information for the specified I2C.
3562 * @retval None
3563 */
3564 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
3565 {
3566 /* Prevent unused argument(s) compilation warning */
3567 UNUSED(hi2c);
3568
3569 /* NOTE : This function should not be modified, when the callback is needed,
3570 the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
3571 */
3572 }
3573
3574 /**
3575 * @brief Slave Rx Transfer completed callback.
3576 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3577 * the configuration information for the specified I2C.
3578 * @retval None
3579 */
3580 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
3581 {
3582 /* Prevent unused argument(s) compilation warning */
3583 UNUSED(hi2c);
3584
3585 /* NOTE : This function should not be modified, when the callback is needed,
3586 the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
3587 */
3588 }
3589
3590 /**
3591 * @brief Slave Address Match callback.
3592 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3593 * the configuration information for the specified I2C.
3594 * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
3595 * @param AddrMatchCode Address Match Code
3596 * @retval None
3597 */
3598 __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
3599 {
3600 /* Prevent unused argument(s) compilation warning */
3601 UNUSED(hi2c);
3602 UNUSED(TransferDirection);
3603 UNUSED(AddrMatchCode);
3604
3605 /* NOTE : This function should not be modified, when the callback is needed,
3606 the HAL_I2C_AddrCallback can be implemented in the user file
3607 */
3608 }
3609
3610 /**
3611 * @brief Listen Complete callback.
3612 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3613 * the configuration information for the specified I2C.
3614 * @retval None
3615 */
3616 __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
3617 {
3618 /* Prevent unused argument(s) compilation warning */
3619 UNUSED(hi2c);
3620
3621 /* NOTE : This function should not be modified, when the callback is needed,
3622 the HAL_I2C_ListenCpltCallback can be implemented in the user file
3623 */
3624 }
3625
3626 /**
3627 * @brief Memory Tx Transfer completed callback.
3628 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3629 * the configuration information for the specified I2C.
3630 * @retval None
3631 */
3632 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
3633 {
3634 /* Prevent unused argument(s) compilation warning */
3635 UNUSED(hi2c);
3636
3637 /* NOTE : This function should not be modified, when the callback is needed,
3638 the HAL_I2C_MemTxCpltCallback can be implemented in the user file
3639 */
3640 }
3641
3642 /**
3643 * @brief Memory Rx Transfer completed callback.
3644 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3645 * the configuration information for the specified I2C.
3646 * @retval None
3647 */
3648 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
3649 {
3650 /* Prevent unused argument(s) compilation warning */
3651 UNUSED(hi2c);
3652
3653 /* NOTE : This function should not be modified, when the callback is needed,
3654 the HAL_I2C_MemRxCpltCallback can be implemented in the user file
3655 */
3656 }
3657
3658 /**
3659 * @brief I2C error callback.
3660 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3661 * the configuration information for the specified I2C.
3662 * @retval None
3663 */
3664 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
3665 {
3666 /* Prevent unused argument(s) compilation warning */
3667 UNUSED(hi2c);
3668
3669 /* NOTE : This function should not be modified, when the callback is needed,
3670 the HAL_I2C_ErrorCallback can be implemented in the user file
3671 */
3672 }
3673
3674 /**
3675 * @brief I2C abort callback.
3676 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3677 * the configuration information for the specified I2C.
3678 * @retval None
3679 */
3680 __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
3681 {
3682 /* Prevent unused argument(s) compilation warning */
3683 UNUSED(hi2c);
3684
3685 /* NOTE : This function should not be modified, when the callback is needed,
3686 the HAL_I2C_AbortCpltCallback could be implemented in the user file
3687 */
3688 }
3689
3690 /**
3691 * @}
3692 */
3693
3694 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
3695 * @brief Peripheral State and Errors functions
3696 *
3697 @verbatim
3698 ===============================================================================
3699 ##### Peripheral State, Mode and Error functions #####
3700 ===============================================================================
3701 [..]
3702 This subsection permits to get in run-time the status of the peripheral
3703 and the data flow.
3704
3705 @endverbatim
3706 * @{
3707 */
3708
3709 /**
3710 * @brief Return the I2C handle state.
3711 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3712 * the configuration information for the specified I2C.
3713 * @retval HAL state
3714 */
3715 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
3716 {
3717 /* Return I2C handle state */
3718 return hi2c->State;
3719 }
3720
3721 /**
3722 * @brief Return the I2C Master, Slave, Memory or no mode.
3723 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3724 * the configuration information for I2C module
3725 * @retval HAL mode
3726 */
3727 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
3728 {
3729 return hi2c->Mode;
3730 }
3731
3732 /**
3733 * @brief Return the I2C error code
3734 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3735 * the configuration information for the specified I2C.
3736 * @retval I2C Error Code
3737 */
3738 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
3739 {
3740 return hi2c->ErrorCode;
3741 }
3742
3743 /**
3744 * @}
3745 */
3746
3747 /**
3748 * @brief Handle TXE flag for Master
3749 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3750 * the configuration information for I2C module
3751 * @retval HAL status
3752 */
3753 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
3754 {
3755 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
3756 uint32_t CurrentState = hi2c->State;
3757 uint32_t CurrentMode = hi2c->Mode;
3758 uint32_t CurrentXferOptions = hi2c->XferOptions;
3759
3760 if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
3761 {
3762 /* Call TxCpltCallback() directly if no stop mode is set */
3763 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
3764 {
3765 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3766
3767 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
3768 hi2c->Mode = HAL_I2C_MODE_NONE;
3769 hi2c->State = HAL_I2C_STATE_READY;
3770
3771 HAL_I2C_MasterTxCpltCallback(hi2c);
3772 }
3773 else /* Generate Stop condition then Call TxCpltCallback() */
3774 {
3775 /* Disable EVT, BUF and ERR interrupt */
3776 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3777
3778 /* Generate Stop */
3779 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3780
3781 hi2c->PreviousState = I2C_STATE_NONE;
3782 hi2c->State = HAL_I2C_STATE_READY;
3783
3784 if(hi2c->Mode == HAL_I2C_MODE_MEM)
3785 {
3786 hi2c->Mode = HAL_I2C_MODE_NONE;
3787 HAL_I2C_MemTxCpltCallback(hi2c);
3788 }
3789 else
3790 {
3791 hi2c->Mode = HAL_I2C_MODE_NONE;
3792 HAL_I2C_MasterTxCpltCallback(hi2c);
3793 }
3794 }
3795 }
3796 else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
3797 ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
3798 {
3799 if(hi2c->XferCount == 0U)
3800 {
3801 /* Disable BUF interrupt */
3802 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
3803 }
3804 else
3805 {
3806 if(hi2c->Mode == HAL_I2C_MODE_MEM)
3807 {
3808 if(hi2c->EventCount == 0)
3809 {
3810 /* If Memory address size is 8Bit */
3811 if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
3812 {
3813 /* Send Memory Address */
3814 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
3815
3816 hi2c->EventCount += 2;
3817 }
3818 /* If Memory address size is 16Bit */
3819 else
3820 {
3821 /* Send MSB of Memory Address */
3822 hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
3823
3824 hi2c->EventCount++;
3825 }
3826 }
3827 else if(hi2c->EventCount == 1)
3828 {
3829 /* Send LSB of Memory Address */
3830 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
3831
3832 hi2c->EventCount++;
3833 }
3834 else if(hi2c->EventCount == 2)
3835 {
3836 if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
3837 {
3838 /* Generate Restart */
3839 hi2c->Instance->CR1 |= I2C_CR1_START;
3840 }
3841 else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
3842 {
3843 /* Write data to DR */
3844 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
3845 hi2c->XferCount--;
3846 }
3847 }
3848 }
3849 else
3850 {
3851 /* Write data to DR */
3852 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
3853 hi2c->XferCount--;
3854 }
3855 }
3856 }
3857 return HAL_OK;
3858 }
3859
3860 /**
3861 * @brief Handle BTF flag for Master transmitter
3862 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3863 * the configuration information for I2C module
3864 * @retval HAL status
3865 */
3866 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
3867 {
3868 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
3869 uint32_t CurrentXferOptions = hi2c->XferOptions;
3870
3871 if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
3872 {
3873 if(hi2c->XferCount != 0U)
3874 {
3875 /* Write data to DR */
3876 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
3877 hi2c->XferCount--;
3878 }
3879 else
3880 {
3881 /* Call TxCpltCallback() directly if no stop mode is set */
3882 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
3883 {
3884 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3885
3886 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
3887 hi2c->Mode = HAL_I2C_MODE_NONE;
3888 hi2c->State = HAL_I2C_STATE_READY;
3889
3890 HAL_I2C_MasterTxCpltCallback(hi2c);
3891 }
3892 else /* Generate Stop condition then Call TxCpltCallback() */
3893 {
3894 /* Disable EVT, BUF and ERR interrupt */
3895 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3896
3897 /* Generate Stop */
3898 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3899
3900 hi2c->PreviousState = I2C_STATE_NONE;
3901 hi2c->State = HAL_I2C_STATE_READY;
3902
3903 if(hi2c->Mode == HAL_I2C_MODE_MEM)
3904 {
3905 hi2c->Mode = HAL_I2C_MODE_NONE;
3906
3907 HAL_I2C_MemTxCpltCallback(hi2c);
3908 }
3909 else
3910 {
3911 hi2c->Mode = HAL_I2C_MODE_NONE;
3912
3913 HAL_I2C_MasterTxCpltCallback(hi2c);
3914 }
3915 }
3916 }
3917 }
3918 return HAL_OK;
3919 }
3920
3921 /**
3922 * @brief Handle RXNE flag for Master
3923 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3924 * the configuration information for I2C module
3925 * @retval HAL status
3926 */
3927 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
3928 {
3929 if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
3930 {
3931 uint32_t tmp = 0U;
3932
3933 tmp = hi2c->XferCount;
3934 if(tmp > 3U)
3935 {
3936 /* Read data from DR */
3937 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
3938 hi2c->XferCount--;
3939 }
3940 else if((tmp == 2U) || (tmp == 3U))
3941 {
3942 /* Disable Acknowledge */
3943 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3944
3945 /* Enable Pos */
3946 hi2c->Instance->CR1 |= I2C_CR1_POS;
3947
3948 /* Disable BUF interrupt */
3949 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
3950 }
3951 else
3952 {
3953 /* Disable Acknowledge */
3954 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3955
3956 if(hi2c->XferOptions == I2C_NEXT_FRAME)
3957 {
3958 /* Enable Pos */
3959 hi2c->Instance->CR1 |= I2C_CR1_POS;
3960 }
3961
3962 /* Disable EVT, BUF and ERR interrupt */
3963 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3964
3965 /* Read data from DR */
3966 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
3967 hi2c->XferCount--;
3968
3969 hi2c->State = HAL_I2C_STATE_READY;
3970 hi2c->PreviousState = I2C_STATE_NONE;
3971
3972 if(hi2c->Mode == HAL_I2C_MODE_MEM)
3973 {
3974 hi2c->Mode = HAL_I2C_MODE_NONE;
3975 HAL_I2C_MemRxCpltCallback(hi2c);
3976 }
3977 else
3978 {
3979 hi2c->Mode = HAL_I2C_MODE_NONE;
3980 HAL_I2C_MasterRxCpltCallback(hi2c);
3981 }
3982 }
3983 }
3984 return HAL_OK;
3985 }
3986
3987 /**
3988 * @brief Handle BTF flag for Master receiver
3989 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3990 * the configuration information for I2C module
3991 * @retval HAL status
3992 */
3993 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
3994 {
3995 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
3996 uint32_t CurrentXferOptions = hi2c->XferOptions;
3997
3998 if(hi2c->XferCount == 3U)
3999 {
4000 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
4001 {
4002 /* Disable Acknowledge */
4003 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4004 }
4005
4006 /* Read data from DR */
4007 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4008 hi2c->XferCount--;
4009 }
4010 else if(hi2c->XferCount == 2U)
4011 {
4012 /* Prepare next transfer or stop current transfer */
4013 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
4014 {
4015 /* Disable Acknowledge */
4016 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4017
4018 if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4019 {
4020 /* Generate ReStart */
4021 hi2c->Instance->CR1 |= I2C_CR1_START;
4022 }
4023 }
4024 else
4025 {
4026 /* Generate Stop */
4027 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4028 }
4029
4030 /* Read data from DR */
4031 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4032 hi2c->XferCount--;
4033
4034 /* Read data from DR */
4035 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4036 hi2c->XferCount--;
4037
4038 /* Disable EVT and ERR interrupt */
4039 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
4040
4041 hi2c->State = HAL_I2C_STATE_READY;
4042 hi2c->PreviousState = I2C_STATE_NONE;
4043
4044 if(hi2c->Mode == HAL_I2C_MODE_MEM)
4045 {
4046 hi2c->Mode = HAL_I2C_MODE_NONE;
4047
4048 HAL_I2C_MemRxCpltCallback(hi2c);
4049 }
4050 else
4051 {
4052 hi2c->Mode = HAL_I2C_MODE_NONE;
4053
4054 HAL_I2C_MasterRxCpltCallback(hi2c);
4055 }
4056 }
4057 else
4058 {
4059 /* Read data from DR */
4060 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4061 hi2c->XferCount--;
4062 }
4063 return HAL_OK;
4064 }
4065
4066 /**
4067 * @brief Handle SB flag for Master
4068 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4069 * the configuration information for I2C module
4070 * @retval HAL status
4071 */
4072 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
4073 {
4074 if(hi2c->Mode == HAL_I2C_MODE_MEM)
4075 {
4076 if(hi2c->EventCount == 0U)
4077 {
4078 /* Send slave address */
4079 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
4080 }
4081 else
4082 {
4083 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
4084 }
4085 }
4086 else
4087 {
4088 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
4089 {
4090 /* Send slave 7 Bits address */
4091 if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
4092 {
4093 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
4094 }
4095 else
4096 {
4097 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
4098 }
4099 }
4100 else
4101 {
4102 if(hi2c->EventCount == 0U)
4103 {
4104 /* Send header of slave address */
4105 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
4106 }
4107 else if(hi2c->EventCount == 1U)
4108 {
4109 /* Send header of slave address */
4110 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
4111 }
4112 }
4113 }
4114
4115 return HAL_OK;
4116 }
4117
4118 /**
4119 * @brief Handle ADD10 flag for Master
4120 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4121 * the configuration information for I2C module
4122 * @retval HAL status
4123 */
4124 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
4125 {
4126 /* Send slave address */
4127 hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
4128
4129 return HAL_OK;
4130 }
4131
4132 /**
4133 * @brief Handle ADDR flag for Master
4134 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4135 * the configuration information for I2C module
4136 * @retval HAL status
4137 */
4138 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
4139 {
4140 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
4141 uint32_t CurrentMode = hi2c->Mode;
4142 uint32_t CurrentXferOptions = hi2c->XferOptions;
4143 uint32_t Prev_State = hi2c->PreviousState;
4144
4145 if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
4146 {
4147 if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
4148 {
4149 /* Clear ADDR flag */
4150 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4151 }
4152 else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
4153 {
4154 /* Clear ADDR flag */
4155 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4156
4157 /* Generate Restart */
4158 hi2c->Instance->CR1 |= I2C_CR1_START;
4159
4160 hi2c->EventCount++;
4161 }
4162 else
4163 {
4164 if(hi2c->XferCount == 0U)
4165 {
4166 /* Clear ADDR flag */
4167 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4168
4169 /* Generate Stop */
4170 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4171 }
4172 else if(hi2c->XferCount == 1U)
4173 {
4174 if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
4175 {
4176 /* Disable Acknowledge */
4177 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4178
4179 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
4180 {
4181 /* Disable Acknowledge */
4182 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4183
4184 /* Clear ADDR flag */
4185 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4186 }
4187 else
4188 {
4189 /* Clear ADDR flag */
4190 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4191
4192 /* Generate Stop */
4193 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4194 }
4195 }
4196 /* Prepare next transfer or stop current transfer */
4197 else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
4198 && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
4199 {
4200 if(hi2c->XferOptions != I2C_NEXT_FRAME)
4201 {
4202 /* Disable Acknowledge */
4203 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4204 }
4205 else
4206 {
4207 /* Enable Acknowledge */
4208 hi2c->Instance->CR1 |= I2C_CR1_ACK;
4209 }
4210
4211 /* Clear ADDR flag */
4212 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4213 }
4214 else
4215 {
4216 /* Disable Acknowledge */
4217 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4218
4219 /* Clear ADDR flag */
4220 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4221
4222 /* Generate Stop */
4223 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4224 }
4225 }
4226 else if(hi2c->XferCount == 2U)
4227 {
4228 if(hi2c->XferOptions != I2C_NEXT_FRAME)
4229 {
4230 /* Disable Acknowledge */
4231 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4232
4233 /* Enable Pos */
4234 hi2c->Instance->CR1 |= I2C_CR1_POS;
4235 }
4236 else
4237 {
4238 /* Enable Acknowledge */
4239 hi2c->Instance->CR1 |= I2C_CR1_ACK;
4240 }
4241
4242 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
4243 {
4244 /* Enable Last DMA bit */
4245 hi2c->Instance->CR2 |= I2C_CR2_LAST;
4246 }
4247
4248 /* Clear ADDR flag */
4249 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4250 }
4251 else
4252 {
4253 /* Enable Acknowledge */
4254 hi2c->Instance->CR1 |= I2C_CR1_ACK;
4255
4256 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
4257 {
4258 /* Enable Last DMA bit */
4259 hi2c->Instance->CR2 |= I2C_CR2_LAST;
4260 }
4261
4262 /* Clear ADDR flag */
4263 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4264 }
4265
4266 /* Reset Event counter */
4267 hi2c->EventCount = 0U;
4268 }
4269 }
4270 else
4271 {
4272 /* Clear ADDR flag */
4273 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4274 }
4275
4276 return HAL_OK;
4277 }
4278
4279 /**
4280 * @brief Handle TXE flag for Slave
4281 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4282 * the configuration information for I2C module
4283 * @retval HAL status
4284 */
4285 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
4286 {
4287 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
4288 uint32_t CurrentState = hi2c->State;
4289
4290 if(hi2c->XferCount != 0U)
4291 {
4292 /* Write data to DR */
4293 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
4294 hi2c->XferCount--;
4295
4296 if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
4297 {
4298 /* Last Byte is received, disable Interrupt */
4299 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
4300
4301 /* Set state at HAL_I2C_STATE_LISTEN */
4302 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
4303 hi2c->State = HAL_I2C_STATE_LISTEN;
4304
4305 /* Call the Tx complete callback to inform upper layer of the end of receive process */
4306 HAL_I2C_SlaveTxCpltCallback(hi2c);
4307 }
4308 }
4309 return HAL_OK;
4310 }
4311
4312 /**
4313 * @brief Handle BTF flag for Slave transmitter
4314 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4315 * the configuration information for I2C module
4316 * @retval HAL status
4317 */
4318 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
4319 {
4320 if(hi2c->XferCount != 0U)
4321 {
4322 /* Write data to DR */
4323 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
4324 hi2c->XferCount--;
4325 }
4326 return HAL_OK;
4327 }
4328
4329 /**
4330 * @brief Handle RXNE flag for Slave
4331 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4332 * the configuration information for I2C module
4333 * @retval HAL status
4334 */
4335 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
4336 {
4337 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
4338 uint32_t CurrentState = hi2c->State;
4339
4340 if(hi2c->XferCount != 0U)
4341 {
4342 /* Read data from DR */
4343 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4344 hi2c->XferCount--;
4345
4346 if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
4347 {
4348 /* Last Byte is received, disable Interrupt */
4349 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
4350
4351 /* Set state at HAL_I2C_STATE_LISTEN */
4352 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
4353 hi2c->State = HAL_I2C_STATE_LISTEN;
4354
4355 /* Call the Rx complete callback to inform upper layer of the end of receive process */
4356 HAL_I2C_SlaveRxCpltCallback(hi2c);
4357 }
4358 }
4359 return HAL_OK;
4360 }
4361
4362 /**
4363 * @brief Handle BTF flag for Slave receiver
4364 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4365 * the configuration information for I2C module
4366 * @retval HAL status
4367 */
4368 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
4369 {
4370 if(hi2c->XferCount != 0U)
4371 {
4372 /* Read data from DR */
4373 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4374 hi2c->XferCount--;
4375 }
4376 return HAL_OK;
4377 }
4378
4379 /**
4380 * @brief Handle ADD flag for Slave
4381 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4382 * the configuration information for I2C module
4383 * @retval HAL status
4384 */
4385 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
4386 {
4387 uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
4388 uint16_t SlaveAddrCode = 0U;
4389
4390 /* Transfer Direction requested by Master */
4391 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
4392 {
4393 TransferDirection = I2C_DIRECTION_TRANSMIT;
4394 }
4395
4396 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
4397 {
4398 SlaveAddrCode = hi2c->Init.OwnAddress1;
4399 }
4400 else
4401 {
4402 SlaveAddrCode = hi2c->Init.OwnAddress2;
4403 }
4404
4405 /* Call Slave Addr callback */
4406 HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
4407
4408 return HAL_OK;
4409 }
4410
4411 /**
4412 * @brief Handle STOPF flag for Slave
4413 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4414 * the configuration information for I2C module
4415 * @retval HAL status
4416 */
4417 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
4418 {
4419 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
4420 uint32_t CurrentState = hi2c->State;
4421
4422 /* Disable EVT, BUF and ERR interrupt */
4423 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
4424
4425 /* Clear STOPF flag */
4426 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
4427
4428 /* Disable Acknowledge */
4429 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4430
4431 /* If a DMA is ongoing, Update handle size context */
4432 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
4433 {
4434 if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
4435 {
4436 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
4437 }
4438 else
4439 {
4440 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
4441 }
4442 }
4443
4444 /* All data are not transferred, so set error code accordingly */
4445 if(hi2c->XferCount != 0U)
4446 {
4447 /* Store Last receive data if any */
4448 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
4449 {
4450 /* Read data from DR */
4451 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4452 hi2c->XferCount--;
4453 }
4454
4455 /* Store Last receive data if any */
4456 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
4457 {
4458 /* Read data from DR */
4459 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4460 hi2c->XferCount--;
4461 }
4462
4463 /* Set ErrorCode corresponding to a Non-Acknowledge */
4464 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
4465 }
4466
4467 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
4468 {
4469 /* Call the corresponding callback to inform upper layer of End of Transfer */
4470 I2C_ITError(hi2c);
4471 }
4472 else
4473 {
4474 if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
4475 (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
4476 {
4477 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
4478 hi2c->PreviousState = I2C_STATE_NONE;
4479 hi2c->State = HAL_I2C_STATE_READY;
4480 hi2c->Mode = HAL_I2C_MODE_NONE;
4481
4482 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
4483 HAL_I2C_ListenCpltCallback(hi2c);
4484 }
4485 else
4486 {
4487 if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
4488 {
4489 hi2c->PreviousState = I2C_STATE_NONE;
4490 hi2c->State = HAL_I2C_STATE_READY;
4491 hi2c->Mode = HAL_I2C_MODE_NONE;
4492
4493 HAL_I2C_SlaveRxCpltCallback(hi2c);
4494 }
4495 }
4496 }
4497 return HAL_OK;
4498 }
4499
4500 /**
4501 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4502 * the configuration information for I2C module
4503 * @retval HAL status
4504 */
4505 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
4506 {
4507 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
4508 uint32_t CurrentState = hi2c->State;
4509 uint32_t CurrentXferOptions = hi2c->XferOptions;
4510
4511 if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
4512 (CurrentState == HAL_I2C_STATE_LISTEN))
4513 {
4514 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
4515
4516 /* Disable EVT, BUF and ERR interrupt */
4517 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
4518
4519 /* Clear AF flag */
4520 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4521
4522 /* Disable Acknowledge */
4523 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4524
4525 hi2c->PreviousState = I2C_STATE_NONE;
4526 hi2c->State = HAL_I2C_STATE_READY;
4527 hi2c->Mode = HAL_I2C_MODE_NONE;
4528
4529 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
4530 HAL_I2C_ListenCpltCallback(hi2c);
4531 }
4532 else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
4533 {
4534 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
4535 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
4536 hi2c->State = HAL_I2C_STATE_READY;
4537 hi2c->Mode = HAL_I2C_MODE_NONE;
4538
4539 /* Disable EVT, BUF and ERR interrupt */
4540 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
4541
4542 /* Clear AF flag */
4543 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4544
4545 /* Disable Acknowledge */
4546 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4547
4548 HAL_I2C_SlaveTxCpltCallback(hi2c);
4549 }
4550 else
4551 {
4552 /* Clear AF flag only */
4553 /* State Listen, but XferOptions == FIRST or NEXT */
4554 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4555 }
4556
4557 return HAL_OK;
4558 }
4559
4560 /**
4561 * @brief I2C interrupts error process
4562 * @param hi2c I2C handle.
4563 * @retval None
4564 */
4565 static void I2C_ITError(I2C_HandleTypeDef *hi2c)
4566 {
4567 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
4568 uint32_t CurrentState = hi2c->State;
4569
4570 if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
4571 {
4572 /* keep HAL_I2C_STATE_LISTEN */
4573 hi2c->PreviousState = I2C_STATE_NONE;
4574 hi2c->State = HAL_I2C_STATE_LISTEN;
4575 }
4576 else
4577 {
4578 /* If state is an abort treatment on going, don't change state */
4579 /* This change will be do later */
4580 if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
4581 {
4582 hi2c->State = HAL_I2C_STATE_READY;
4583 }
4584 hi2c->PreviousState = I2C_STATE_NONE;
4585 hi2c->Mode = HAL_I2C_MODE_NONE;
4586 }
4587
4588 /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
4589 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
4590
4591 /* Abort DMA transfer */
4592 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
4593 {
4594 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
4595
4596 if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
4597 {
4598 /* Set the DMA Abort callback :
4599 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
4600 hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
4601
4602 if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
4603 {
4604 /* Disable I2C peripheral to prevent dummy data in buffer */
4605 __HAL_I2C_DISABLE(hi2c);
4606
4607 hi2c->State = HAL_I2C_STATE_READY;
4608
4609 /* Call Directly XferAbortCallback function in case of error */
4610 hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
4611 }
4612 }
4613 else
4614 {
4615 /* Set the DMA Abort callback :
4616 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
4617 hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
4618
4619 if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
4620 {
4621 /* Store Last receive data if any */
4622 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
4623 {
4624 /* Read data from DR */
4625 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4626 }
4627
4628 /* Disable I2C peripheral to prevent dummy data in buffer */
4629 __HAL_I2C_DISABLE(hi2c);
4630
4631 hi2c->State = HAL_I2C_STATE_READY;
4632
4633 /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
4634 hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
4635 }
4636 }
4637 }
4638 else if(hi2c->State == HAL_I2C_STATE_ABORT)
4639 {
4640 hi2c->State = HAL_I2C_STATE_READY;
4641 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
4642
4643 /* Store Last receive data if any */
4644 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
4645 {
4646 /* Read data from DR */
4647 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4648 }
4649
4650 /* Disable I2C peripheral to prevent dummy data in buffer */
4651 __HAL_I2C_DISABLE(hi2c);
4652
4653 /* Call the corresponding callback to inform upper layer of End of Transfer */
4654 HAL_I2C_AbortCpltCallback(hi2c);
4655 }
4656 else
4657 {
4658 /* Store Last receive data if any */
4659 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
4660 {
4661 /* Read data from DR */
4662 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
4663 }
4664
4665 /* Call user error callback */
4666 HAL_I2C_ErrorCallback(hi2c);
4667 }
4668 /* STOP Flag is not set after a NACK reception */
4669 /* So may inform upper layer that listen phase is stopped */
4670 /* during NACK error treatment */
4671 if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
4672 {
4673 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
4674 hi2c->PreviousState = I2C_STATE_NONE;
4675 hi2c->State = HAL_I2C_STATE_READY;
4676 hi2c->Mode = HAL_I2C_MODE_NONE;
4677
4678 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
4679 HAL_I2C_ListenCpltCallback(hi2c);
4680 }
4681 }
4682
4683 /**
4684 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4685 * the configuration information for I2C module
4686 * @param DevAddress Target device address: The device 7 bits address value
4687 * in datasheet must be shift at right before call interface
4688 * @param Timeout Timeout duration
4689 * @param Tickstart Tick start value
4690 * @retval HAL status
4691 */
4692 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
4693 {
4694 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
4695 uint32_t CurrentXferOptions = hi2c->XferOptions;
4696
4697 /* Generate Start condition if first transfer */
4698 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
4699 {
4700 /* Generate Start */
4701 hi2c->Instance->CR1 |= I2C_CR1_START;
4702 }
4703 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
4704 {
4705 /* Generate ReStart */
4706 hi2c->Instance->CR1 |= I2C_CR1_START;
4707 }
4708
4709 /* Wait until SB flag is set */
4710 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
4711 {
4712 return HAL_TIMEOUT;
4713 }
4714
4715 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
4716 {
4717 /* Send slave address */
4718 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
4719 }
4720 else
4721 {
4722 /* Send header of slave address */
4723 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
4724
4725 /* Wait until ADD10 flag is set */
4726 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
4727 {
4728 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4729 {
4730 return HAL_ERROR;
4731 }
4732 else
4733 {
4734 return HAL_TIMEOUT;
4735 }
4736 }
4737
4738 /* Send slave address */
4739 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
4740 }
4741
4742 /* Wait until ADDR flag is set */
4743 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
4744 {
4745 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4746 {
4747 return HAL_ERROR;
4748 }
4749 else
4750 {
4751 return HAL_TIMEOUT;
4752 }
4753 }
4754
4755 return HAL_OK;
4756 }
4757
4758 /**
4759 * @brief Master sends target device address for read request.
4760 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4761 * the configuration information for I2C module
4762 * @param DevAddress Target device address: The device 7 bits address value
4763 * in datasheet must be shift at right before call interface
4764 * @param Timeout Timeout duration
4765 * @param Tickstart Tick start value
4766 * @retval HAL status
4767 */
4768 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
4769 {
4770 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
4771 uint32_t CurrentXferOptions = hi2c->XferOptions;
4772
4773 /* Enable Acknowledge */
4774 hi2c->Instance->CR1 |= I2C_CR1_ACK;
4775
4776 /* Generate Start condition if first transfer */
4777 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
4778 {
4779 /* Generate Start */
4780 hi2c->Instance->CR1 |= I2C_CR1_START;
4781 }
4782 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
4783 {
4784 /* Generate ReStart */
4785 hi2c->Instance->CR1 |= I2C_CR1_START;
4786 }
4787
4788 /* Wait until SB flag is set */
4789 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
4790 {
4791 return HAL_TIMEOUT;
4792 }
4793
4794 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
4795 {
4796 /* Send slave address */
4797 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
4798 }
4799 else
4800 {
4801 /* Send header of slave address */
4802 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
4803
4804 /* Wait until ADD10 flag is set */
4805 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
4806 {
4807 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4808 {
4809 return HAL_ERROR;
4810 }
4811 else
4812 {
4813 return HAL_TIMEOUT;
4814 }
4815 }
4816
4817 /* Send slave address */
4818 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
4819
4820 /* Wait until ADDR flag is set */
4821 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
4822 {
4823 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4824 {
4825 return HAL_ERROR;
4826 }
4827 else
4828 {
4829 return HAL_TIMEOUT;
4830 }
4831 }
4832
4833 /* Clear ADDR flag */
4834 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4835
4836 /* Generate Restart */
4837 hi2c->Instance->CR1 |= I2C_CR1_START;
4838
4839 /* Wait until SB flag is set */
4840 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
4841 {
4842 return HAL_TIMEOUT;
4843 }
4844
4845 /* Send header of slave address */
4846 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
4847 }
4848
4849 /* Wait until ADDR flag is set */
4850 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
4851 {
4852 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4853 {
4854 return HAL_ERROR;
4855 }
4856 else
4857 {
4858 return HAL_TIMEOUT;
4859 }
4860 }
4861
4862 return HAL_OK;
4863 }
4864
4865 /**
4866 * @brief Master sends target device address followed by internal memory address for write request.
4867 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4868 * the configuration information for I2C module
4869 * @param DevAddress Target device address
4870 * @param MemAddress Internal memory address
4871 * @param MemAddSize Size of internal memory address
4872 * @param Timeout Timeout duration
4873 * @param Tickstart Tick start value
4874 * @retval HAL status
4875 */
4876 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
4877 {
4878 /* Generate Start */
4879 hi2c->Instance->CR1 |= I2C_CR1_START;
4880
4881 /* Wait until SB flag is set */
4882 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
4883 {
4884 return HAL_TIMEOUT;
4885 }
4886
4887 /* Send slave address */
4888 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
4889
4890 /* Wait until ADDR flag is set */
4891 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
4892 {
4893 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4894 {
4895 return HAL_ERROR;
4896 }
4897 else
4898 {
4899 return HAL_TIMEOUT;
4900 }
4901 }
4902
4903 /* Clear ADDR flag */
4904 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4905
4906 /* Wait until TXE flag is set */
4907 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
4908 {
4909 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4910 {
4911 /* Generate Stop */
4912 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4913 return HAL_ERROR;
4914 }
4915 else
4916 {
4917 return HAL_TIMEOUT;
4918 }
4919 }
4920
4921 /* If Memory address size is 8Bit */
4922 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
4923 {
4924 /* Send Memory Address */
4925 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
4926 }
4927 /* If Memory address size is 16Bit */
4928 else
4929 {
4930 /* Send MSB of Memory Address */
4931 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
4932
4933 /* Wait until TXE flag is set */
4934 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
4935 {
4936 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4937 {
4938 /* Generate Stop */
4939 hi2c->Instance->CR1 |= I2C_CR1_STOP;
4940 return HAL_ERROR;
4941 }
4942 else
4943 {
4944 return HAL_TIMEOUT;
4945 }
4946 }
4947
4948 /* Send LSB of Memory Address */
4949 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
4950 }
4951
4952 return HAL_OK;
4953 }
4954
4955 /**
4956 * @brief Master sends target device address followed by internal memory address for read request.
4957 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
4958 * the configuration information for I2C module
4959 * @param DevAddress Target device address
4960 * @param MemAddress Internal memory address
4961 * @param MemAddSize Size of internal memory address
4962 * @param Timeout Timeout duration
4963 * @param Tickstart Tick start value
4964 * @retval HAL status
4965 */
4966 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
4967 {
4968 /* Enable Acknowledge */
4969 hi2c->Instance->CR1 |= I2C_CR1_ACK;
4970
4971 /* Generate Start */
4972 hi2c->Instance->CR1 |= I2C_CR1_START;
4973
4974 /* Wait until SB flag is set */
4975 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
4976 {
4977 return HAL_TIMEOUT;
4978 }
4979
4980 /* Send slave address */
4981 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
4982
4983 /* Wait until ADDR flag is set */
4984 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
4985 {
4986 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
4987 {
4988 return HAL_ERROR;
4989 }
4990 else
4991 {
4992 return HAL_TIMEOUT;
4993 }
4994 }
4995
4996 /* Clear ADDR flag */
4997 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
4998
4999 /* Wait until TXE flag is set */
5000 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
5001 {
5002 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
5003 {
5004 /* Generate Stop */
5005 hi2c->Instance->CR1 |= I2C_CR1_STOP;
5006 return HAL_ERROR;
5007 }
5008 else
5009 {
5010 return HAL_TIMEOUT;
5011 }
5012 }
5013
5014 /* If Memory address size is 8Bit */
5015 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
5016 {
5017 /* Send Memory Address */
5018 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
5019 }
5020 /* If Memory address size is 16Bit */
5021 else
5022 {
5023 /* Send MSB of Memory Address */
5024 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
5025
5026 /* Wait until TXE flag is set */
5027 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
5028 {
5029 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
5030 {
5031 /* Generate Stop */
5032 hi2c->Instance->CR1 |= I2C_CR1_STOP;
5033 return HAL_ERROR;
5034 }
5035 else
5036 {
5037 return HAL_TIMEOUT;
5038 }
5039 }
5040
5041 /* Send LSB of Memory Address */
5042 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
5043 }
5044
5045 /* Wait until TXE flag is set */
5046 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
5047 {
5048 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
5049 {
5050 /* Generate Stop */
5051 hi2c->Instance->CR1 |= I2C_CR1_STOP;
5052 return HAL_ERROR;
5053 }
5054 else
5055 {
5056 return HAL_TIMEOUT;
5057 }
5058 }
5059
5060 /* Generate Restart */
5061 hi2c->Instance->CR1 |= I2C_CR1_START;
5062
5063 /* Wait until SB flag is set */
5064 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
5065 {
5066 return HAL_TIMEOUT;
5067 }
5068
5069 /* Send slave address */
5070 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
5071
5072 /* Wait until ADDR flag is set */
5073 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
5074 {
5075 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
5076 {
5077 return HAL_ERROR;
5078 }
5079 else
5080 {
5081 return HAL_TIMEOUT;
5082 }
5083 }
5084
5085 return HAL_OK;
5086 }
5087
5088 /**
5089 * @brief DMA I2C process complete callback.
5090 * @param hdma DMA handle
5091 * @retval None
5092 */
5093 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
5094 {
5095 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
5096
5097 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
5098 uint32_t CurrentState = hi2c->State;
5099 uint32_t CurrentMode = hi2c->Mode;
5100
5101 if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
5102 {
5103 /* Disable DMA Request */
5104 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
5105
5106 hi2c->XferCount = 0U;
5107
5108 /* Enable EVT and ERR interrupt */
5109 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
5110 }
5111 else
5112 {
5113 /* Disable Acknowledge */
5114 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
5115
5116 /* Generate Stop */
5117 hi2c->Instance->CR1 |= I2C_CR1_STOP;
5118
5119 /* Disable Last DMA */
5120 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
5121
5122 /* Disable DMA Request */
5123 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
5124
5125 hi2c->XferCount = 0U;
5126
5127 /* Check if Errors has been detected during transfer */
5128 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
5129 {
5130 HAL_I2C_ErrorCallback(hi2c);
5131 }
5132 else
5133 {
5134 hi2c->State = HAL_I2C_STATE_READY;
5135
5136 if(hi2c->Mode == HAL_I2C_MODE_MEM)
5137 {
5138 hi2c->Mode = HAL_I2C_MODE_NONE;
5139
5140 HAL_I2C_MemRxCpltCallback(hi2c);
5141 }
5142 else
5143 {
5144 hi2c->Mode = HAL_I2C_MODE_NONE;
5145
5146 HAL_I2C_MasterRxCpltCallback(hi2c);
5147 }
5148 }
5149 }
5150 }
5151
5152 /**
5153 * @brief DMA I2C communication error callback.
5154 * @param hdma DMA handle
5155 * @retval None
5156 */
5157 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
5158 {
5159 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
5160
5161 /* Ignore DMA FIFO error */
5162 if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
5163 {
5164 /* Disable Acknowledge */
5165 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
5166
5167 hi2c->XferCount = 0U;
5168
5169 hi2c->State = HAL_I2C_STATE_READY;
5170 hi2c->Mode = HAL_I2C_MODE_NONE;
5171
5172 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
5173
5174 HAL_I2C_ErrorCallback(hi2c);
5175 }
5176 }
5177
5178 /**
5179 * @brief DMA I2C communication abort callback
5180 * (To be called at end of DMA Abort procedure).
5181 * @param hdma: DMA handle.
5182 * @retval None
5183 */
5184 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
5185 {
5186 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5187
5188 /* Disable Acknowledge */
5189 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
5190
5191 hi2c->XferCount = 0U;
5192
5193 /* Reset XferAbortCallback */
5194 hi2c->hdmatx->XferAbortCallback = NULL;
5195 hi2c->hdmarx->XferAbortCallback = NULL;
5196
5197 /* Check if come from abort from user */
5198 if(hi2c->State == HAL_I2C_STATE_ABORT)
5199 {
5200 hi2c->State = HAL_I2C_STATE_READY;
5201 hi2c->Mode = HAL_I2C_MODE_NONE;
5202 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
5203
5204 /* Disable I2C peripheral to prevent dummy data in buffer */
5205 __HAL_I2C_DISABLE(hi2c);
5206
5207 /* Call the corresponding callback to inform upper layer of End of Transfer */
5208 HAL_I2C_AbortCpltCallback(hi2c);
5209 }
5210 else
5211 {
5212 hi2c->State = HAL_I2C_STATE_READY;
5213 hi2c->Mode = HAL_I2C_MODE_NONE;
5214
5215 /* Disable I2C peripheral to prevent dummy data in buffer */
5216 __HAL_I2C_DISABLE(hi2c);
5217
5218 /* Call the corresponding callback to inform upper layer of End of Transfer */
5219 HAL_I2C_ErrorCallback(hi2c);
5220 }
5221 }
5222
5223 /**
5224 * @brief This function handles I2C Communication Timeout.
5225 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5226 * the configuration information for I2C module
5227 * @param Flag specifies the I2C flag to check.
5228 * @param Status The new Flag status (SET or RESET).
5229 * @param Timeout Timeout duration
5230 * @param Tickstart Tick start value
5231 * @retval HAL status
5232 */
5233 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
5234 {
5235 /* Wait until flag is set */
5236 while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
5237 {
5238 /* Check for the Timeout */
5239 if(Timeout != HAL_MAX_DELAY)
5240 {
5241 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
5242 {
5243 hi2c->PreviousState = I2C_STATE_NONE;
5244 hi2c->State= HAL_I2C_STATE_READY;
5245 hi2c->Mode = HAL_I2C_MODE_NONE;
5246
5247 /* Process Unlocked */
5248 __HAL_UNLOCK(hi2c);
5249
5250 return HAL_TIMEOUT;
5251 }
5252 }
5253 }
5254
5255 return HAL_OK;
5256 }
5257
5258 /**
5259 * @brief This function handles I2C Communication Timeout for Master addressing phase.
5260 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5261 * the configuration information for I2C module
5262 * @param Flag specifies the I2C flag to check.
5263 * @param Timeout Timeout duration
5264 * @param Tickstart Tick start value
5265 * @retval HAL status
5266 */
5267 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
5268 {
5269 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
5270 {
5271 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
5272 {
5273 /* Generate Stop */
5274 hi2c->Instance->CR1 |= I2C_CR1_STOP;
5275
5276 /* Clear AF Flag */
5277 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5278
5279 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
5280 hi2c->PreviousState = I2C_STATE_NONE;
5281 hi2c->State= HAL_I2C_STATE_READY;
5282
5283 /* Process Unlocked */
5284 __HAL_UNLOCK(hi2c);
5285
5286 return HAL_ERROR;
5287 }
5288
5289 /* Check for the Timeout */
5290 if(Timeout != HAL_MAX_DELAY)
5291 {
5292 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
5293 {
5294 hi2c->PreviousState = I2C_STATE_NONE;
5295 hi2c->State= HAL_I2C_STATE_READY;
5296
5297 /* Process Unlocked */
5298 __HAL_UNLOCK(hi2c);
5299
5300 return HAL_TIMEOUT;
5301 }
5302 }
5303 }
5304 return HAL_OK;
5305 }
5306
5307 /**
5308 * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
5309 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5310 * the configuration information for the specified I2C.
5311 * @param Timeout Timeout duration
5312 * @param Tickstart Tick start value
5313 * @retval HAL status
5314 */
5315 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
5316 {
5317 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
5318 {
5319 /* Check if a NACK is detected */
5320 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
5321 {
5322 return HAL_ERROR;
5323 }
5324
5325 /* Check for the Timeout */
5326 if(Timeout != HAL_MAX_DELAY)
5327 {
5328 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
5329 {
5330 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
5331 hi2c->PreviousState = I2C_STATE_NONE;
5332 hi2c->State= HAL_I2C_STATE_READY;
5333
5334 /* Process Unlocked */
5335 __HAL_UNLOCK(hi2c);
5336
5337 return HAL_TIMEOUT;
5338 }
5339 }
5340 }
5341 return HAL_OK;
5342 }
5343
5344 /**
5345 * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
5346 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5347 * the configuration information for the specified I2C.
5348 * @param Timeout Timeout duration
5349 * @param Tickstart Tick start value
5350 * @retval HAL status
5351 */
5352 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
5353 {
5354 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
5355 {
5356 /* Check if a NACK is detected */
5357 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
5358 {
5359 return HAL_ERROR;
5360 }
5361
5362 /* Check for the Timeout */
5363 if(Timeout != HAL_MAX_DELAY)
5364 {
5365 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
5366 {
5367 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
5368 hi2c->PreviousState = I2C_STATE_NONE;
5369 hi2c->State= HAL_I2C_STATE_READY;
5370
5371 /* Process Unlocked */
5372 __HAL_UNLOCK(hi2c);
5373
5374 return HAL_TIMEOUT;
5375 }
5376 }
5377 }
5378 return HAL_OK;
5379 }
5380
5381 /**
5382 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
5383 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5384 * the configuration information for the specified I2C.
5385 * @param Timeout Timeout duration
5386 * @param Tickstart Tick start value
5387 * @retval HAL status
5388 */
5389 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
5390 {
5391 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
5392 {
5393 /* Check if a NACK is detected */
5394 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
5395 {
5396 return HAL_ERROR;
5397 }
5398
5399 /* Check for the Timeout */
5400 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
5401 {
5402 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
5403 hi2c->PreviousState = I2C_STATE_NONE;
5404 hi2c->State= HAL_I2C_STATE_READY;
5405
5406 /* Process Unlocked */
5407 __HAL_UNLOCK(hi2c);
5408
5409 return HAL_TIMEOUT;
5410 }
5411 }
5412 return HAL_OK;
5413 }
5414
5415 /**
5416 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
5417 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5418 * the configuration information for the specified I2C.
5419 * @param Timeout Timeout duration
5420 * @param Tickstart Tick start value
5421 * @retval HAL status
5422 */
5423 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
5424 {
5425
5426 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
5427 {
5428 /* Check if a STOPF is detected */
5429 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
5430 {
5431 /* Clear STOP Flag */
5432 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
5433
5434 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
5435 hi2c->PreviousState = I2C_STATE_NONE;
5436 hi2c->State= HAL_I2C_STATE_READY;
5437
5438 /* Process Unlocked */
5439 __HAL_UNLOCK(hi2c);
5440
5441 return HAL_ERROR;
5442 }
5443
5444 /* Check for the Timeout */
5445 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
5446 {
5447 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
5448 hi2c->State= HAL_I2C_STATE_READY;
5449
5450 /* Process Unlocked */
5451 __HAL_UNLOCK(hi2c);
5452
5453 return HAL_TIMEOUT;
5454 }
5455 }
5456 return HAL_OK;
5457 }
5458
5459 /**
5460 * @brief This function handles Acknowledge failed detection during an I2C Communication.
5461 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5462 * the configuration information for the specified I2C.
5463 * @retval HAL status
5464 */
5465 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
5466 {
5467 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
5468 {
5469 /* Clear NACKF Flag */
5470 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5471
5472 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
5473 hi2c->PreviousState = I2C_STATE_NONE;
5474 hi2c->State= HAL_I2C_STATE_READY;
5475
5476 /* Process Unlocked */
5477 __HAL_UNLOCK(hi2c);
5478
5479 return HAL_ERROR;
5480 }
5481 return HAL_OK;
5482 }
5483 /**
5484 * @}
5485 */
5486
5487 #endif /* HAL_I2C_MODULE_ENABLED */
5488
5489 /**
5490 * @}
5491 */
5492
5493 /**
5494 * @}
5495 */
5496
5497 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/