?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal.h
blob8f9946f0249777d790e38e355b23e3c97c563551
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal.h
4 * @author MCD Application Team
5 * @brief This file contains all the functions prototypes for the HAL
6 * module driver.
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
11 * All rights reserved.</center></h2>
12 *
13 * This software component is licensed by ST under BSD 3-Clause license,
14 * the "License"; You may not use this file except in compliance with the
15 * License. You may obtain a copy of the License at:
16 * opensource.org/licenses/BSD-3-Clause
17 *
18 ******************************************************************************
19 */
20
21 /* Define to prevent recursive inclusion -------------------------------------*/
22 #ifndef STM32H7xx_HAL_H
23 #define STM32H7xx_HAL_H
24
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32h7xx_hal_conf.h"
31
32 /** @addtogroup STM32H7xx_HAL_Driver
33 * @{
34 */
35
36 /** @addtogroup HAL
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup HAL_TICK_FREQ Tick Frequency
42 * @{
43 */
44 typedef enum
45 {
46 HAL_TICK_FREQ_10HZ = 100U,
47 HAL_TICK_FREQ_100HZ = 10U,
48 HAL_TICK_FREQ_1KHZ = 1U,
49 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
50 } HAL_TickFreqTypeDef;
51 /**
52 * @}
53 */
54
55 /* Exported constants --------------------------------------------------------*/
56
57 /** @defgroup REV_ID device revision ID
58 * @{
59 */
60 #define REV_ID_Y ((uint32_t)0x1003) /*!< STM32H7 rev.Y */
61 #define REV_ID_B ((uint32_t)0x2000) /*!< STM32H7 rev.B */
62 #define REV_ID_X ((uint32_t)0x2001) /*!< STM32H7 rev.X */
63 #define REV_ID_V ((uint32_t)0x2003) /*!< STM32H7 rev.V */
64
65 /**
66 * @}
67 */
68
69 /** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale
70 * @{
71 */
72 #define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_CSR_VRS_OUT2 /*!< Voltage reference scale 0 (VREF_OUT2) */
73 #define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_OUT1 /*!< Voltage reference scale 1 (VREF_OUT1) */
74 #define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_OUT4 /*!< Voltage reference scale 2 (VREF_OUT4) */
75 #define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_CSR_VRS_OUT3 /*!< Voltage reference scale 3 (VREF_OUT3) */
76
77
78 #define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \
79 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1) || \
80 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE2) || \
81 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE3))
82
83
84 /**
85 * @}
86 */
87
88 /** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance
89 * @{
90 */
91 #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */
92 #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */
93
94 #define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \
95 ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE))
96
97 #define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
98
99 /**
100 * @}
101 */
102
103 #if !defined(SYSCFG_PMCR_BOOSTEN)
104 /** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO
105 * @{
106 */
107
108 /** @brief Fast-mode Plus driving capability on a specific GPIO
109 */
110 #define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */
111 #define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */
112 #define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */
113 #define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */
114
115 #define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \
116 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \
117 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
118 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
119
120 /**
121 * @}
122 */
123 #endif /* ! SYSCFG_PMCR_BOOSTEN */
124
125
126 #if defined(SYSCFG_ADC2ALT_ADC2_ROUT0) || defined(SYSCFG_ADC2ALT_ADC2_ROUT1)
127 /** @defgroup SYSCFG_Adc2_Alternate_Connection SYSCFG ADC2 Alternate Connection
128 * @{
129 */
130
131 /** @brief Adc2 Alternate Connection on Vinp[16] and Vinp[17]
132 */
133 #define SYSCFG_ADC2_ROUT0_DAC1_1 ((uint32_t)0x00000000) /*!< DAC1_out1 connected to ADC2 VINP[16] */
134 #define SYSCFG_ADC2_ROUT0_VBAT4 SYSCFG_ADC2ALT_ADC2_ROUT0 /*!< VBAT/4 connected to ADC2 VINP[16] */
135 #define SYSCFG_ADC2_ROUT1_DAC1_2 ((uint32_t)0x00000000) /*!< DAC1_out2 connected to ADC2 VINP[17] */
136 #define SYSCFG_ADC2_ROUT1_VREFINT SYSCFG_ADC2ALT_ADC2_ROUT1 /*!< VREFINT connected to ADC2 VINP[17] */
137
138 #define IS_SYSCFG_ADC2ALT_ROUT0(__VALUE__) (((__VALUE__) == SYSCFG_ADC2_ROUT0_DAC1_1) || \
139 ((__VALUE__) == SYSCFG_ADC2_ROUT0_VBAT4))
140 #define IS_SYSCFG_ADC2ALT_ROUT1(__VALUE__) (((__VALUE__) == SYSCFG_ADC2_ROUT1_DAC1_2) || \
141 ((__VALUE__) == SYSCFG_ADC2_ROUT1_VREFINT))
142
143 /**
144 * @}
145 */
146 #endif /*SYSCFG_ADC2ALT_ADC2_ROUT0 || SYSCFG_ADC2ALT_ADC2_ROUT1*/
147
148
149 /** @defgroup SYSCFG_Ethernet_Config Ethernet Config
150 * @{
151 */
152 #define SYSCFG_ETH_MII ((uint32_t)0x00000000) /*!< Select the Media Independent Interface */
153 #define SYSCFG_ETH_RMII SYSCFG_PMCR_EPIS_SEL_2 /*!< Select the Reduced Media Independent Interface */
154
155 #define IS_SYSCFG_ETHERNET_CONFIG(CONFIG) (((CONFIG) == SYSCFG_ETH_MII) || \
156 ((CONFIG) == SYSCFG_ETH_RMII))
157
158 /**
159 * @}
160 */
161
162
163 /** @defgroup SYSCFG_Analog_Switch_Config Analog Switch Config
164 * @{
165 */
166 #define SYSCFG_SWITCH_PA0 SYSCFG_PMCR_PA0SO /*!< Select PA0 analog switch */
167 #define SYSCFG_SWITCH_PA1 SYSCFG_PMCR_PA1SO /*!< Select PA1 analog switch */
168 #define SYSCFG_SWITCH_PC2 SYSCFG_PMCR_PC2SO /*!< Select PC2 analog switch */
169 #define SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO /*!< Select PC3 analog switch */
170
171
172
173
174 #define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO /*!< PA0 analog switch opened */
175 #define SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) /*!< PA0 analog switch closed */
176 #define SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCR_PA1SO /*!< PA1 analog switch opened */
177 #define SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) /*!< PA1 analog switch closed*/
178 #define SYSCFG_SWITCH_PC2_OPEN SYSCFG_PMCR_PC2SO /*!< PC2 analog switch opened */
179 #define SYSCFG_SWITCH_PC2_CLOSE ((uint32_t)0x00000000) /*!< PC2 analog switch closed */
180 #define SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO /*!< PC3 analog switch opened */
181 #define SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) /*!< PC3 analog switch closed */
182
183 /**
184 * @}
185 */
186
187 #define IS_SYSCFG_ANALOG_SWITCH(SWITCH) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \
188 (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \
189 (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \
190 (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3))
191
192
193 #define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \
194 (((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \
195 (((STATE) & SYSCFG_SWITCH_PA1_OPEN) == SYSCFG_SWITCH_PA1_OPEN) || \
196 (((STATE) & SYSCFG_SWITCH_PA1_CLOSE) == SYSCFG_SWITCH_PA1_CLOSE) || \
197 (((STATE) & SYSCFG_SWITCH_PC2_OPEN) == SYSCFG_SWITCH_PC2_OPEN) || \
198 (((STATE) & SYSCFG_SWITCH_PC2_CLOSE) == SYSCFG_SWITCH_PC2_CLOSE) || \
199 (((STATE) & SYSCFG_SWITCH_PC3_OPEN) == SYSCFG_SWITCH_PC3_OPEN) || \
200 (((STATE) & SYSCFG_SWITCH_PC3_CLOSE) == SYSCFG_SWITCH_PC3_CLOSE))
201
202
203 /** @defgroup SYSCFG_Boot_Config Boot Config
204 * @{
205 */
206 #define SYSCFG_BOOT_ADDR0 ((uint32_t)0x00000000) /*!< Select Boot address0 */
207 #define SYSCFG_BOOT_ADDR1 ((uint32_t)0x00000001) /*!< Select Boot address1 */
208
209 #define IS_SYSCFG_BOOT_REGISTER(REGISTER) (((REGISTER) == SYSCFG_BOOT_ADDR0)|| \
210 ((REGISTER) == SYSCFG_BOOT_ADDR1))
211
212 #define IS_SYSCFG_BOOT_ADDRESS(ADDRESS) ((ADDRESS) < PERIPH_BASE)
213
214 /**
215 * @}
216 */
217
218
219 /** @defgroup SYSCFG_IOCompenstionCell_Config IOCompenstionCell Config
220 * @{
221 */
222 #define SYSCFG_CELL_CODE ((uint32_t)0x00000000) /*!< Select Code from the cell */
223 #define SYSCFG_REGISTER_CODE SYSCFG_CCCSR_CS /*!< Code from the SYSCFG compensation cell code register */
224
225 #define IS_SYSCFG_CODE_SELECT(SELECT) (((SELECT) == SYSCFG_CELL_CODE)|| \
226 ((SELECT) == SYSCFG_REGISTER_CODE))
227
228 #define IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10UL))
229
230 /**
231 * @}
232 */
233
234
235
236
237 /** @defgroup EXTI_Event_Input_Config Event Input Config
238 * @{
239 */
240
241 #define EXTI_MODE_IT ((uint32_t)0x00010000)
242 #define EXTI_MODE_EVT ((uint32_t)0x00020000)
243 #define EXTI_RISING_EDGE ((uint32_t)0x00100000)
244 #define EXTI_FALLING_EDGE ((uint32_t)0x00200000)
245
246 #define IS_EXTI_EDGE_LINE(EDGE) (((EDGE) == EXTI_RISING_EDGE) || ((EDGE) == EXTI_FALLING_EDGE))
247 #define IS_EXTI_MODE_LINE(MODE) (((MODE) == EXTI_MODE_IT) || ((MODE) == EXTI_MODE_EVT))
248
249 #define EXTI_LINE0 ((uint32_t)0x00) /*!< External interrupt LINE 0 */
250 #define EXTI_LINE1 ((uint32_t)0x01) /*!< External interrupt LINE 1 */
251 #define EXTI_LINE2 ((uint32_t)0x02) /*!< External interrupt LINE 2 */
252 #define EXTI_LINE3 ((uint32_t)0x03) /*!< External interrupt LINE 3 */
253 #define EXTI_LINE4 ((uint32_t)0x04) /*!< External interrupt LINE 4 */
254 #define EXTI_LINE5 ((uint32_t)0x05) /*!< External interrupt LINE 5 */
255 #define EXTI_LINE6 ((uint32_t)0x06) /*!< External interrupt LINE 6 */
256 #define EXTI_LINE7 ((uint32_t)0x07) /*!< External interrupt LINE 7 */
257 #define EXTI_LINE8 ((uint32_t)0x08) /*!< External interrupt LINE 8 */
258 #define EXTI_LINE9 ((uint32_t)0x09) /*!< External interrupt LINE 9 */
259 #define EXTI_LINE10 ((uint32_t)0x0A) /*!< External interrupt LINE 10 */
260 #define EXTI_LINE11 ((uint32_t)0x0B) /*!< External interrupt LINE 11 */
261 #define EXTI_LINE12 ((uint32_t)0x0C) /*!< External interrupt LINE 12 */
262 #define EXTI_LINE13 ((uint32_t)0x0D) /*!< External interrupt LINE 13 */
263 #define EXTI_LINE14 ((uint32_t)0x0E) /*!< External interrupt LINE 14 */
264 #define EXTI_LINE15 ((uint32_t)0x0F) /*!< External interrupt LINE 15 */
265 #define EXTI_LINE16 ((uint32_t)0x10)
266 #define EXTI_LINE17 ((uint32_t)0x11)
267 #define EXTI_LINE18 ((uint32_t)0x12)
268 #define EXTI_LINE19 ((uint32_t)0x13)
269 #define EXTI_LINE20 ((uint32_t)0x14)
270 #define EXTI_LINE21 ((uint32_t)0x15)
271 #define EXTI_LINE22 ((uint32_t)0x16)
272 #define EXTI_LINE23 ((uint32_t)0x17)
273 #define EXTI_LINE24 ((uint32_t)0x18)
274 #define EXTI_LINE25 ((uint32_t)0x19)
275 #define EXTI_LINE26 ((uint32_t)0x1A)
276 #define EXTI_LINE27 ((uint32_t)0x1B)
277 #define EXTI_LINE28 ((uint32_t)0x1C)
278 #define EXTI_LINE29 ((uint32_t)0x1D)
279 #define EXTI_LINE30 ((uint32_t)0x1E)
280 #define EXTI_LINE31 ((uint32_t)0x1F)
281 #define EXTI_LINE32 ((uint32_t)0x20)
282 #define EXTI_LINE33 ((uint32_t)0x21)
283 #define EXTI_LINE34 ((uint32_t)0x22)
284 #define EXTI_LINE35 ((uint32_t)0x23)
285 #define EXTI_LINE36 ((uint32_t)0x24)
286 #define EXTI_LINE37 ((uint32_t)0x25)
287 #define EXTI_LINE38 ((uint32_t)0x26)
288 #define EXTI_LINE39 ((uint32_t)0x27)
289
290 #define EXTI_LINE40 ((uint32_t)0x28)
291 #define EXTI_LINE41 ((uint32_t)0x29)
292 #define EXTI_LINE42 ((uint32_t)0x2A)
293 #define EXTI_LINE43 ((uint32_t)0x2B)
294 #define EXTI_LINE44 ((uint32_t)0x2C) /* Not available in all family lines */
295 /* EXTI_LINE45 Reserved */
296 #if defined(DUAL_CORE)
297 #define EXTI_LINE46 ((uint32_t)0x2E)
298 #else
299 /* EXTI_LINE46 Reserved */
300 #endif /* DUAL_CORE */
301 #define EXTI_LINE47 ((uint32_t)0x2F)
302 #define EXTI_LINE48 ((uint32_t)0x30)
303 #define EXTI_LINE49 ((uint32_t)0x31)
304 #define EXTI_LINE50 ((uint32_t)0x32)
305 #define EXTI_LINE51 ((uint32_t)0x33)
306 #define EXTI_LINE52 ((uint32_t)0x34)
307 #define EXTI_LINE53 ((uint32_t)0x35)
308 #define EXTI_LINE54 ((uint32_t)0x36)
309 #define EXTI_LINE55 ((uint32_t)0x37)
310 #define EXTI_LINE56 ((uint32_t)0x38)
311 #define EXTI_LINE57 ((uint32_t)0x39)
312 #define EXTI_LINE58 ((uint32_t)0x3A)
313 #define EXTI_LINE59 ((uint32_t)0x3B)
314 #define EXTI_LINE60 ((uint32_t)0x3C)
315 #define EXTI_LINE61 ((uint32_t)0x3D)
316 #define EXTI_LINE62 ((uint32_t)0x3E)
317 #define EXTI_LINE63 ((uint32_t)0x3F)
318 #define EXTI_LINE64 ((uint32_t)0x40)
319 #define EXTI_LINE65 ((uint32_t)0x41)
320 #define EXTI_LINE66 ((uint32_t)0x42)
321 #define EXTI_LINE67 ((uint32_t)0x43)
322 #define EXTI_LINE68 ((uint32_t)0x44)
323 #define EXTI_LINE69 ((uint32_t)0x45)
324 #define EXTI_LINE70 ((uint32_t)0x46)
325 #define EXTI_LINE71 ((uint32_t)0x47)
326 #define EXTI_LINE72 ((uint32_t)0x48)
327 #define EXTI_LINE73 ((uint32_t)0x49)
328 #define EXTI_LINE74 ((uint32_t)0x4A)
329 #define EXTI_LINE75 ((uint32_t)0x4B) /* Not available in all family lines */
330 #define EXTI_LINE76 ((uint32_t)0x4C) /* Not available in all family lines */
331 #if defined(DUAL_CORE)
332 #define EXTI_LINE77 ((uint32_t)0x4D)
333 #define EXTI_LINE78 ((uint32_t)0x4E)
334 #define EXTI_LINE79 ((uint32_t)0x4F)
335 #define EXTI_LINE80 ((uint32_t)0x50)
336 #else
337 /* EXTI_LINE77 Reserved */
338 /* EXTI_LINE78 Reserved */
339 /* EXTI_LINE79 Reserved */
340 /* EXTI_LINE80 Reserved */
341 #endif /* DUAL_CORE */
342 /* EXTI_LINE81 Reserved */
343 #if defined(DUAL_CORE)
344 #define EXTI_LINE82 ((uint32_t)0x52)
345 #else
346 /* EXTI_LINE82 Reserved */
347 #endif /* DUAL_CORE */
348 /* EXTI_LINE83 Reserved */
349 #if defined(DUAL_CORE)
350 #define EXTI_LINE84 ((uint32_t)0x54)
351 #else
352 /* EXTI_LINE84 Reserved */
353 #endif /* DUAL_CORE */
354 #define EXTI_LINE85 ((uint32_t)0x55)
355 #define EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */
356 #define EXTI_LINE87 ((uint32_t)0x57)
357 #define EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */
358 #define EXTI_LINE89 ((uint32_t)0x59) /* Not available in all family lines */
359 #define EXTI_LINE90 ((uint32_t)0x5A) /* Not available in all family lines */
360 #define EXTI_LINE91 ((uint32_t)0x5B) /* Not available in all family lines */
361
362 #if defined(DUAL_CORE)
363 #define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
364 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
365 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
366 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
367 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
368 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
369 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
370 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
371 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
372 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
373 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
374 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
375 ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE84) || \
376 ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
377 #else
378 #define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1)|| \
379 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
380 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
381 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
382 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
383 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
384 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
385 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
386 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
387 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
388 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
389 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
390 ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
391 #endif /* DUAL_CORE */
392
393 #if defined(DUAL_CORE)
394 #define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
395 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
396 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
397 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
398 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
399 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
400 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
401 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
402 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
403 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
404 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
405 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
406 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
407 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
408 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
409 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
410 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
411 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
412 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
413 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
414 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
415 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
416 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
417 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
418 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
419 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
420 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
421 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
422 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
423 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
424 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
425 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
426 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
427 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
428 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
429 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
430 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
431 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
432 ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
433 ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
434 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
435 ((LINE) == EXTI_LINE78) || \
436 ((LINE) == EXTI_LINE80) || ((LINE) == EXTI_LINE82))
437 #else
438 #define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
439 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
440 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
441 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
442 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
443 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
444 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
445 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
446 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
447 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
448 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
449 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
450 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
451 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
452 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
453 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
454 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
455 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
456 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
457 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
458 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
459 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
460 ((LINE) == EXTI_LINE44) || \
461 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
462 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
463 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
464 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
465 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
466 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
467 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
468 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
469 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
470 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
471 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
472 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
473 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
474 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
475 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
476 ((LINE) == EXTI_LINE85) || \
477 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
478 ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
479 ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
480 #endif /*DUAL_CORE*/
481
482 #if defined(DUAL_CORE)
483 #define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
484 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
485 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
486 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
487 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
488 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
489 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
490 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
491 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
492 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
493 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
494 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
495 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
496 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
497 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
498 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
499 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
500 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
501 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
502 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
503 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
504 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
505 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
506 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
507 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
508 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
509 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
510 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
511 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
512 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
513 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
514 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
515 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
516 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
517 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
518 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
519 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
520 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
521 ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
522 ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
523 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
524 #else
525 #define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
526 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
527 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
528 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
529 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
530 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
531 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
532 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
533 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
534 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
535 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
536 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
537 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
538 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
539 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
540 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
541 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
542 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
543 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
544 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
545 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
546 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
547 ((LINE) == EXTI_LINE44) || \
548 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
549 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
550 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
551 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
552 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
553 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
554 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
555 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
556 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
557 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
558 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
559 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
560 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
561 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
562 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
563 ((LINE) == EXTI_LINE85) || \
564 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
565 ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
566 ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
567 #endif /*DUAL_CORE*/
568
569 #if defined(DUAL_CORE)
570 #define IS_EXTI_D2_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
571 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
572 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
573 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
574 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
575 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
576 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
577 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
578 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
579 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
580 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
581 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
582 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
583 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
584 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
585 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
586 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
587 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
588 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
589 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
590 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
591 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
592 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
593 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
594 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
595 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
596 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
597 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
598 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
599 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
600 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
601 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
602 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
603 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
604 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
605 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
606 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
607 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
608 ((LINE) == EXTI_LINE78) || ((LINE) == EXTI_LINE80) || \
609 ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE85) || \
610 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
611 #endif /*DUAL_CORE*/
612
613 #if defined(DUAL_CORE)
614 #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
615 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
616 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
617 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
618 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
619 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
620 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
621 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
622 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
623 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
624 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
625 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
626 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
627 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
628 ((LINE) == EXTI_LINE53))
629 #elif (POWER_DOMAINS_NUMBER == 3U)
630 #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
631 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
632 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
633 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
634 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
635 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
636 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
637 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
638 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
639 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
640 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
641 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
642 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
643 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
644 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE88))
645 #else
646 #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
647 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
648 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
649 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
650 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
651 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
652 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
653 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
654 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
655 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
656 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
657 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
658 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
659 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE88))
660 #endif /*DUAL_CORE*/
661
662
663 #define BDMA_CH6_CLEAR ((uint32_t)0x00000000) /*!< BDMA ch6 event selected as D3 domain pendclear source*/
664 #define BDMA_CH7_CLEAR ((uint32_t)0x00000001) /*!< BDMA ch7 event selected as D3 domain pendclear source*/
665 #if defined (LPTIM4)
666 #define LPTIM4_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM4 out selected as D3 domain pendclear source*/
667 #else
668 #define LPTIM2_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM2 out selected as D3 domain pendclear source*/
669 #endif /* LPTIM4 */
670 #if defined (LPTIM5)
671 #define LPTIM5_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM5 out selected as D3 domain pendclear source*/
672 #else
673 #define LPTIM3_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM3 out selected as D3 domain pendclear source*/
674 #endif /* LPTIM5 */
675 #if defined (LPTIM4) && defined (LPTIM5)
676 #define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
677 ((SOURCE) == LPTIM4_OUT_CLEAR) || ((SOURCE) == LPTIM5_OUT_CLEAR))
678 #else
679 #define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
680 ((SOURCE) == LPTIM2_OUT_CLEAR) || ((SOURCE) == LPTIM3_OUT_CLEAR))
681 #endif /* LPTIM4 LPTIM5 */
682 /**
683 * @}
684 */
685
686
687 /** @defgroup FMC_SwapBankMapping_Config SwapBankMapping Config
688 * @{
689 */
690 #define FMC_SWAPBMAP_DISABLE (0x00000000U)
691 #define FMC_SWAPBMAP_SDRAM_SRAM FMC_BCR1_BMAP_0
692 #define FMC_SWAPBMAP_SDRAMB2 FMC_BCR1_BMAP_1
693
694 #define IS_FMC_SWAPBMAP_MODE(__MODE__) (((__MODE__) == FMC_SWAPBMAP_DISABLE) || \
695 ((__MODE__) == FMC_SWAPBMAP_SDRAM_SRAM) || \
696 ((__MODE__) == FMC_SWAPBMAP_SDRAMB2))
697 /**
698 * @}
699 */
700
701
702 /* Exported macro ------------------------------------------------------------*/
703 #if defined(DUAL_CORE)
704 /** @defgroup ART_Exported_Macros ART Exported Macros
705 * @{
706 */
707
708 /** @brief ART Enable Macro.
709 * Enable the Cortex-M4 ART cache.
710 */
711 #define __HAL_ART_ENABLE() SET_BIT(ART->CTR, ART_CTR_EN)
712
713 /** @brief ART Disable Macro.
714 * Disable the Cortex-M4 ART cache.
715 */
716 #define __HAL_ART_DISABLE() CLEAR_BIT(ART->CTR, ART_CTR_EN)
717
718 /** @brief ART Cache BaseAddress Config.
719 * Configure the Cortex-M4 ART cache Base Address.
720 */
721 #define __HAL_ART_CONFIG_BASE_ADDRESS(__BASE_ADDRESS__) MODIFY_REG(ART->CTR, ART_CTR_PCACHEADDR, (((__BASE_ADDRESS__) >> 12U) & 0x000FFF00UL))
722
723 /**
724 * @}
725 */
726 #endif /* DUAL_CORE */
727
728 /** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
729 * @{
730 */
731
732 /** @brief SYSCFG Break AXIRAM double ECC lock.
733 * Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
734 * @note The selected configuration is locked and can be unlocked only by system reset.
735 This feature is available on STM32H7 rev.B and above.
736 */
737 #define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)
738
739 /** @brief SYSCFG Break ITCM double ECC lock.
740 * Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
741 * @note The selected configuration is locked and can be unlocked only by system reset.
742 This feature is available on STM32H7 rev.B and above.
743 */
744 #define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)
745
746 /** @brief SYSCFG Break DTCM double ECC lock.
747 * Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
748 * @note The selected configuration is locked and can be unlocked only by system reset.
749 This feature is available on STM32H7 rev.B and above.
750 */
751 #define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)
752
753 /** @brief SYSCFG Break SRAM1 double ECC lock.
754 * Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
755 * @note The selected configuration is locked and can be unlocked only by system reset.
756 This feature is available on STM32H7 rev.B and above.
757 */
758 #define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)
759
760 /** @brief SYSCFG Break SRAM2 double ECC lock.
761 * Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
762 * @note The selected configuration is locked and can be unlocked only by system reset.
763 This feature is available on STM32H7 rev.B and above.
764 */
765 #define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)
766
767 /** @brief SYSCFG Break SRAM3 double ECC lock.
768 * Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
769 * @note The selected configuration is locked and can be unlocked only by system reset.
770 This feature is available on STM32H7 rev.B and above.
771 */
772 #define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)
773
774 /** @brief SYSCFG Break SRAM4 double ECC lock.
775 * Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
776 * @note The selected configuration is locked and can be unlocked only by system reset.
777 This feature is available on STM32H7 rev.B and above.
778 */
779 #define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)
780
781 /** @brief SYSCFG Break Backup SRAM double ECC lock.
782 * Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
783 * @note The selected configuration is locked and can be unlocked only by system reset.
784 This feature is available on STM32H7 rev.B and above.
785 */
786 #define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)
787
788 /** @brief SYSCFG Break Cortex-M7 Lockup lock.
789 * Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
790 * @note The selected configuration is locked and can be unlocked only by system reset.
791 This feature is available on STM32H7 rev.B and above.
792 */
793 #define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)
794
795 /** @brief SYSCFG Break FLASH double ECC lock.
796 * Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.
797 * @note The selected configuration is locked and can be unlocked only by system reset.
798 This feature is available on STM32H7 rev.B and above.
799 */
800 #define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)
801
802 /** @brief SYSCFG Break PVD lock.
803 * Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.
804 * @note The selected configuration is locked and can be unlocked only by system reset.
805 This feature is available on STM32H7 rev.B and above.
806 */
807 #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)
808
809 #if defined(DUAL_CORE)
810 /** @brief SYSCFG Break Cortex-M4 Lockup lock.
811 * Enable and lock the connection of Cortex-M4 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
812 * @note The selected configuration is locked and can be unlocked only by system reset.
813 This feature is available on STM32H7 rev.B and above.
814 */
815 #define __HAL_SYSCFG_BREAK_CM4_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM4L)
816 #endif /* DUAL_CORE */
817
818 #if !defined(SYSCFG_PMCR_BOOSTEN)
819 /** @brief Fast-mode Plus driving capability enable/disable macros
820 * @param __FASTMODEPLUS__ This parameter can be a value of :
821 * @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
822 * @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
823 * @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
824 * @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9
825 */
826 #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
827 SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
828 }while(0)
829
830 #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
831 CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
832 }while(0)
833
834 #endif /* !SYSCFG_PMCR_BOOSTEN */
835 /**
836 * @}
837 */
838
839 /** @brief Freeze/Unfreeze Peripherals in Debug mode
840 */
841 #define __HAL_DBGMCU_FREEZE_WWDG1() (DBGMCU->APB3FZ1 |= (DBGMCU_APB3FZ1_DBG_WWDG1))
842
843 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM2))
844 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM3))
845 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM4))
846 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM5))
847 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM6))
848 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM7))
849 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM12))
850 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM13))
851 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM14))
852 #define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_LPTIM1))
853 #define __HAL_DBGMCU_FREEZE_I2C1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1))
854 #define __HAL_DBGMCU_FREEZE_I2C2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2))
855 #define __HAL_DBGMCU_FREEZE_I2C3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3))
856 #if defined(I2C5)
857 #define __HAL_DBGMCU_FREEZE_I2C5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C5))
858 #endif /*I2C5*/
859 #if defined(DBGMCU_APB1HFZ1_DBG_FDCAN)
860 #define __HAL_DBGMCU_FREEZE_FDCAN() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN))
861 #endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
862
863 #if defined(TIM23)
864 #define __HAL_DBGMCU_FREEZE_TIM23() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM23))
865 #endif /*TIM23*/
866 #if defined(TIM24)
867 #define __HAL_DBGMCU_FREEZE_TIM24() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM24))
868 #endif /*TIM24*/
869
870 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1))
871 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8))
872 #define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM15))
873 #define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM16))
874 #define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM17))
875 #define __HAL_DBGMCU_FREEZE_HRTIM() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_HRTIM))
876
877 #define __HAL_DBGMCU_FREEZE_I2C4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_I2C4))
878 #define __HAL_DBGMCU_FREEZE_LPTIM2() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM2))
879 #define __HAL_DBGMCU_FREEZE_LPTIM3() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM3))
880 #define __HAL_DBGMCU_FREEZE_LPTIM4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM4))
881 #define __HAL_DBGMCU_FREEZE_LPTIM5() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM5))
882 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_RTC))
883 #define __HAL_DBGMCU_FREEZE_IWDG1() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_IWDG1))
884
885
886 #define __HAL_DBGMCU_UnFreeze_WWDG1() (DBGMCU->APB3FZ1 &= ~ (DBGMCU_APB3FZ1_DBG_WWDG1))
887
888 #define __HAL_DBGMCU_UnFreeze_TIM2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM2))
889 #define __HAL_DBGMCU_UnFreeze_TIM3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM3))
890 #define __HAL_DBGMCU_UnFreeze_TIM4() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM4))
891 #define __HAL_DBGMCU_UnFreeze_TIM5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM5))
892 #define __HAL_DBGMCU_UnFreeze_TIM6() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM6))
893 #define __HAL_DBGMCU_UnFreeze_TIM7() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM7))
894 #define __HAL_DBGMCU_UnFreeze_TIM12() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM12))
895 #define __HAL_DBGMCU_UnFreeze_TIM13() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM13))
896 #define __HAL_DBGMCU_UnFreeze_TIM14() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM14))
897 #define __HAL_DBGMCU_UnFreeze_LPTIM1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_LPTIM1))
898 #define __HAL_DBGMCU_UnFreeze_I2C1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1))
899 #define __HAL_DBGMCU_UnFreeze_I2C2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2))
900 #define __HAL_DBGMCU_UnFreeze_I2C3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3))
901 #if defined(I2C5)
902 #define __HAL_DBGMCU_UnFreeze_I2C5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C5))
903 #endif /*I2C5*/
904 #if defined(DBGMCU_APB1HFZ1_DBG_FDCAN)
905 #define __HAL_DBGMCU_UnFreeze_FDCAN() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_FDCAN))
906 #endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
907
908 #if defined(TIM23)
909 #define __HAL_DBGMCU_UnFreeze_TIM23() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM23))
910 #endif /*TIM23*/
911 #if defined(TIM24)
912 #define __HAL_DBGMCU_UnFreeze_TIM24() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM24))
913 #endif /*TIM24*/
914
915 #define __HAL_DBGMCU_UnFreeze_TIM1() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1))
916 #define __HAL_DBGMCU_UnFreeze_TIM8() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8))
917 #define __HAL_DBGMCU_UnFreeze_TIM15() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM15))
918 #define __HAL_DBGMCU_UnFreeze_TIM16() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM16))
919 #define __HAL_DBGMCU_UnFreeze_TIM17() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM17))
920 #define __HAL_DBGMCU_UnFreeze_HRTIM() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_HRTIM))
921
922 #define __HAL_DBGMCU_UnFreeze_I2C4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_I2C4))
923 #define __HAL_DBGMCU_UnFreeze_LPTIM2() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM2))
924 #define __HAL_DBGMCU_UnFreeze_LPTIM3() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM3))
925 #define __HAL_DBGMCU_UnFreeze_LPTIM4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM4))
926 #define __HAL_DBGMCU_UnFreeze_LPTIM5() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM5))
927 #define __HAL_DBGMCU_UnFreeze_RTC() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_RTC))
928 #define __HAL_DBGMCU_UnFreeze_IWDG1() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_IWDG1))
929
930
931 #if defined(DUAL_CORE)
932 #define __HAL_DBGMCU_FREEZE2_IWDG2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG2))
933 #define __HAL_DBGMCU_FREEZE2_WWDG2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_WWDG2))
934
935 #define __HAL_DBGMCU_UnFreeze2_IWDG2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG2))
936 #define __HAL_DBGMCU_UnFreeze2_WWDG2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_WWDG2))
937
938
939 #define __HAL_DBGMCU_FREEZE2_WWDG1() (DBGMCU->APB3FZ2 |= (DBGMCU_APB3FZ2_DBG_WWDG1))
940
941 #define __HAL_DBGMCU_FREEZE2_TIM2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM2))
942 #define __HAL_DBGMCU_FREEZE2_TIM3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM3))
943 #define __HAL_DBGMCU_FREEZE2_TIM4() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM4))
944 #define __HAL_DBGMCU_FREEZE2_TIM5() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM5))
945 #define __HAL_DBGMCU_FREEZE2_TIM6() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM6))
946 #define __HAL_DBGMCU_FREEZE2_TIM7() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM7))
947 #define __HAL_DBGMCU_FREEZE2_TIM12() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM12))
948 #define __HAL_DBGMCU_FREEZE2_TIM13() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM13))
949 #define __HAL_DBGMCU_FREEZE2_TIM14() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM14))
950 #define __HAL_DBGMCU_FREEZE2_LPTIM1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_LPTIM1))
951 #define __HAL_DBGMCU_FREEZE2_I2C1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C1))
952 #define __HAL_DBGMCU_FREEZE2_I2C2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C2))
953 #define __HAL_DBGMCU_FREEZE2_I2C3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C3))
954 #define __HAL_DBGMCU_FREEZE2_FDCAN() (DBGMCU->APB1HFZ2 |= (DBGMCU_APB1HFZ2_DBG_FDCAN))
955
956
957 #define __HAL_DBGMCU_FREEZE2_TIM1() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM1))
958 #define __HAL_DBGMCU_FREEZE2_TIM8() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM8))
959 #define __HAL_DBGMCU_FREEZE2_TIM15() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM15))
960 #define __HAL_DBGMCU_FREEZE2_TIM16() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM16))
961 #define __HAL_DBGMCU_FREEZE2_TIM17() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM17))
962 #define __HAL_DBGMCU_FREEZE2_HRTIM() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_HRTIM))
963
964 #define __HAL_DBGMCU_FREEZE2_I2C4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_I2C4))
965 #define __HAL_DBGMCU_FREEZE2_LPTIM2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM2))
966 #define __HAL_DBGMCU_FREEZE2_LPTIM3() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM3))
967 #define __HAL_DBGMCU_FREEZE2_LPTIM4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM4))
968 #define __HAL_DBGMCU_FREEZE2_LPTIM5() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM5))
969 #define __HAL_DBGMCU_FREEZE2_RTC() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_RTC))
970 #define __HAL_DBGMCU_FREEZE2_IWDG1() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG1))
971
972 #define __HAL_DBGMCU_UnFreeze2_WWDG1() (DBGMCU->APB3FZ2 &= ~ (DBGMCU_APB3FZ2_DBG_WWDG1))
973
974 #define __HAL_DBGMCU_UnFreeze2_TIM2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM2))
975 #define __HAL_DBGMCU_UnFreeze2_TIM3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM3))
976 #define __HAL_DBGMCU_UnFreeze2_TIM4() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM4))
977 #define __HAL_DBGMCU_UnFreeze2_TIM5() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM5))
978 #define __HAL_DBGMCU_UnFreeze2_TIM6() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM6))
979 #define __HAL_DBGMCU_UnFreeze2_TIM7() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM7))
980 #define __HAL_DBGMCU_UnFreeze2_TIM12() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM12))
981 #define __HAL_DBGMCU_UnFreeze2_TIM13() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM13))
982 #define __HAL_DBGMCU_UnFreeze2_TIM14() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM14))
983 #define __HAL_DBGMCU_UnFreeze2_LPTIM1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_LPTIM1))
984 #define __HAL_DBGMCU_UnFreeze2_I2C1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C1))
985 #define __HAL_DBGMCU_UnFreeze2_I2C2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C2))
986 #define __HAL_DBGMCU_UnFreeze2_I2C3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C3))
987 #define __HAL_DBGMCU_UnFreeze2_FDCAN() (DBGMCU->APB1HFZ2 &= ~ (DBGMCU_APB1HFZ2_DBG_FDCAN))
988
989
990 #define __HAL_DBGMCU_UnFreeze2_TIM1() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM1))
991 #define __HAL_DBGMCU_UnFreeze2_TIM8() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM8))
992 #define __HAL_DBGMCU_UnFreeze2_TIM15() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM15))
993 #define __HAL_DBGMCU_UnFreeze2_TIM16() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM16))
994 #define __HAL_DBGMCU_UnFreeze2_TIM17() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM17))
995 #define __HAL_DBGMCU_UnFreeze2_HRTIM() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_HRTIM))
996
997 #define __HAL_DBGMCU_UnFreeze2_I2C4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_I2C4))
998 #define __HAL_DBGMCU_UnFreeze2_LPTIM2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM2))
999 #define __HAL_DBGMCU_UnFreeze2_LPTIM3() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM3))
1000 #define __HAL_DBGMCU_UnFreeze2_LPTIM4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM4))
1001 #define __HAL_DBGMCU_UnFreeze2_LPTIM5() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM5))
1002 #define __HAL_DBGMCU_UnFreeze2_RTC() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_RTC))
1003 #define __HAL_DBGMCU_UnFreeze2_IWDG1() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG1))
1004
1005 #endif /*DUAL_CORE*/
1006
1007 /** @defgroup HAL_Private_Macros HAL Private Macros
1008 * @{
1009 */
1010 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
1011 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
1012 ((FREQ) == HAL_TICK_FREQ_1KHZ))
1013 /**
1014 * @}
1015 */
1016
1017 /* Exported variables --------------------------------------------------------*/
1018
1019 /** @addtogroup HAL_Exported_Variables
1020 * @{
1021 */
1022 extern __IO uint32_t uwTick;
1023 extern uint32_t uwTickPrio;
1024 extern HAL_TickFreqTypeDef uwTickFreq;
1025 /**
1026 * @}
1027 */
1028
1029 /* Exported functions --------------------------------------------------------*/
1030
1031 /* Initialization and de-initialization functions ******************************/
1032 HAL_StatusTypeDef HAL_Init(void);
1033 HAL_StatusTypeDef HAL_DeInit(void);
1034 void HAL_MspInit(void);
1035 void HAL_MspDeInit(void);
1036 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
1037
1038 /* Peripheral Control functions ************************************************/
1039 void HAL_IncTick(void);
1040 void HAL_Delay(uint32_t Delay);
1041 uint32_t HAL_GetTick(void);
1042 uint32_t HAL_GetTickPrio(void);
1043 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
1044 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
1045 void HAL_SuspendTick(void);
1046 void HAL_ResumeTick(void);
1047 uint32_t HAL_GetHalVersion(void);
1048 uint32_t HAL_GetREVID(void);
1049 uint32_t HAL_GetDEVID(void);
1050 uint32_t HAL_GetUIDw0(void);
1051 uint32_t HAL_GetUIDw1(void);
1052 uint32_t HAL_GetUIDw2(void);
1053 #if defined(SYSCFG_PMCR_EPIS_SEL)
1054 void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface);
1055 #endif /* SYSCFG_PMCR_EPIS_SEL */
1056 void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState );
1057 #if defined(SYSCFG_PMCR_BOOSTEN)
1058 void HAL_SYSCFG_EnableBOOST(void);
1059 void HAL_SYSCFG_DisableBOOST(void);
1060 #endif /* SYSCFG_PMCR_BOOSTEN */
1061
1062 #if defined (SYSCFG_UR2_BOOT_ADD0) || defined (SYSCFG_UR2_BCM7_ADD0)
1063 void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
1064 #endif /* SYSCFG_UR2_BOOT_ADD0 || SYSCFG_UR2_BCM7_ADD0*/
1065
1066 #if defined(DUAL_CORE)
1067 void HAL_SYSCFG_CM4BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
1068 void HAL_SYSCFG_EnableCM7BOOT(void);
1069 void HAL_SYSCFG_DisableCM7BOOT(void);
1070 void HAL_SYSCFG_EnableCM4BOOT(void);
1071 void HAL_SYSCFG_DisableCM4BOOT(void);
1072 #endif /*DUAL_CORE*/
1073 void HAL_EnableCompensationCell(void);
1074 void HAL_DisableCompensationCell(void);
1075 void HAL_SYSCFG_EnableIOSpeedOptimize(void);
1076 void HAL_SYSCFG_DisableIOSpeedOptimize(void);
1077 void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode);
1078 void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1079 #if defined(SYSCFG_CCCR_NCC_MMC)
1080 void HAL_SYSCFG_VDDMMC_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1081 #endif /* SYSCFG_CCCR_NCC_MMC */
1082 void HAL_EnableDBGSleepMode(void);
1083 void HAL_DisableDBGSleepMode(void);
1084 void HAL_EnableDBGStopMode(void);
1085 void HAL_DisableDBGStopMode(void);
1086 void HAL_EnableDBGStandbyMode(void);
1087 void HAL_DisableDBGStandbyMode(void);
1088 #if defined(DUAL_CORE)
1089 void HAL_EnableDomain2DBGSleepMode(void);
1090 void HAL_DisableDomain2DBGSleepMode(void);
1091 void HAL_EnableDomain2DBGStopMode(void);
1092 void HAL_DisableDomain2DBGStopMode(void);
1093 void HAL_EnableDomain2DBGStandbyMode(void);
1094 void HAL_DisableDomain2DBGStandbyMode(void);
1095 #endif /*DUAL_CORE*/
1096 void HAL_EnableDomain3DBGStopMode(void);
1097 void HAL_DisableDomain3DBGStopMode(void);
1098 void HAL_EnableDomain3DBGStandbyMode(void);
1099 void HAL_DisableDomain3DBGStandbyMode(void);
1100 void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line , uint32_t EXTI_Edge );
1101 void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
1102 #if defined(DUAL_CORE)
1103 void HAL_EXTI_D2_ClearFlag(uint32_t EXTI_Line);
1104 #endif /*DUAL_CORE*/
1105 void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line);
1106 void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
1107 #if defined(DUAL_CORE)
1108 void HAL_EXTI_D2_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
1109 #endif /*DUAL_CORE*/
1110 void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd , uint32_t EXTI_ClearSrc);
1111 void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig);
1112 uint32_t HAL_GetFMCMemorySwappingConfig(void);
1113 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling);
1114 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode);
1115 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue);
1116 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void);
1117 void HAL_SYSCFG_DisableVREFBUF(void);
1118 #if defined(SYSCFG_ADC2ALT_ADC2_ROUT0)
1119 void HAL_SYSCFG_ADC2ALT_Rout0Config(uint32_t Adc2AltRout0);
1120 #endif /*SYSCFG_ADC2ALT_ADC2_ROUT0*/
1121 #if defined(SYSCFG_ADC2ALT_ADC2_ROUT1)
1122 void HAL_SYSCFG_ADC2ALT_Rout1Config(uint32_t Adc2AltRout1);
1123 #endif /*SYSCFG_ADC2ALT_ADC2_ROUT1*/
1124
1125 /**
1126 * @}
1127 */
1128
1129 /**
1130 * @}
1131 */
1132
1133 #ifdef __cplusplus
1134 }
1135 #endif
1136
1137 #endif /* STM32H7xx_HAL_H */
1138
1139 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/