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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_cec.h
blob9b138bacf136f4ef25086a89046abb5ebcac9680
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_cec.h
4 * @author MCD Application Team
5 * @brief Header file of CEC HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_CEC_H
22 #define STM32H7xx_HAL_CEC_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30
31 #if defined (CEC)
32
33 /** @addtogroup STM32H7xx_HAL_Driver
34 * @{
35 */
36
37 /** @addtogroup CEC
38 * @{
39 */
40
41 /* Exported types ------------------------------------------------------------*/
42 /** @defgroup CEC_Exported_Types CEC Exported Types
43 * @{
44 */
45
46 /**
47 * @brief CEC Init Structure definition
48 */
49 typedef struct
50 {
51 uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time.
52 It can be one of @ref CEC_Signal_Free_Time
53 and belongs to the set {0,...,7} where
54 0x0 is the default configuration
55 else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
56
57 uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
58 it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE
59 or CEC_EXTENDED_TOLERANCE */
60
61 uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception.
62 CEC_NO_RX_STOP_ON_BRE: reception is not stopped.
63 CEC_RX_STOP_ON_BRE: reception is stopped. */
64
65 uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the
66 CEC line upon Bit Rising Error detection.
67 CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation.
68 CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */
69
70 uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the
71 CEC line upon Long Bit Period Error detection.
72 CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation.
73 CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */
74
75 uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line
76 upon an error detected on a broadcast message.
77
78 It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
79
80 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
81 a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE
82 and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
83 b) LBPE detection: error-bit generation on the CEC line
84 if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
85
86 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
87 no error-bit generation in case neither a) nor b) are satisfied. Additionally,
88 there is no error-bit generation in case of Short Bit Period Error detection in
89 a broadcast message while LSTN bit is set. */
90
91 uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts.
92 CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software.
93 CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */
94
95 uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values:
96
97 CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its
98 own address (OAR). Messages addressed to different destination are ignored.
99 Broadcast messages are always received.
100
101 CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own
102 address (OAR) with positive acknowledge. Messages addressed to different destination
103 are received, but without interfering with the CEC bus: no acknowledge sent. */
104
105 uint16_t OwnAddress; /*!< Own addresses configuration
106 This parameter can be a value of @ref CEC_OWN_ADDRESS */
107
108 uint8_t *RxBuffer; /*!< CEC Rx buffer pointeur */
109
110
111 } CEC_InitTypeDef;
112
113 /**
114 * @brief HAL CEC State definition
115 * @note HAL CEC State value is a combination of 2 different substates: gState and RxState (see @ref CEC_State_Definition).
116 * - gState contains CEC state information related to global Handle management
117 * and also information related to Tx operations.
118 * gState value coding follow below described bitmap :
119 * b7 (not used)
120 * x : Should be set to 0
121 * b6 Error information
122 * 0 : No Error
123 * 1 : Error
124 * b5 IP initilisation status
125 * 0 : Reset (IP not initialized)
126 * 1 : Init done (IP initialized. HAL CEC Init function already called)
127 * b4-b3 (not used)
128 * xx : Should be set to 00
129 * b2 Intrinsic process state
130 * 0 : Ready
131 * 1 : Busy (IP busy with some configuration or internal operations)
132 * b1 (not used)
133 * x : Should be set to 0
134 * b0 Tx state
135 * 0 : Ready (no Tx operation ongoing)
136 * 1 : Busy (Tx operation ongoing)
137 * - RxState contains information related to Rx operations.
138 * RxState value coding follow below described bitmap :
139 * b7-b6 (not used)
140 * xx : Should be set to 00
141 * b5 IP initilisation status
142 * 0 : Reset (IP not initialized)
143 * 1 : Init done (IP initialized)
144 * b4-b2 (not used)
145 * xxx : Should be set to 000
146 * b1 Rx state
147 * 0 : Ready (no Rx operation ongoing)
148 * 1 : Busy (Rx operation ongoing)
149 * b0 (not used)
150 * x : Should be set to 0.
151 */
152 typedef uint32_t HAL_CEC_StateTypeDef;
153
154 /**
155 * @brief CEC handle Structure definition
156 */
157 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
158 typedef struct __CEC_HandleTypeDef
159 #else
160 typedef struct
161 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
162 {
163 CEC_TypeDef *Instance; /*!< CEC registers base address */
164
165 CEC_InitTypeDef Init; /*!< CEC communication parameters */
166
167 uint8_t *pTxBuffPtr; /*!< Pointer to CEC Tx transfer Buffer */
168
169 uint16_t TxXferCount; /*!< CEC Tx Transfer Counter */
170
171 uint16_t RxXferSize; /*!< CEC Rx Transfer size, 0: header received only */
172
173 HAL_LockTypeDef Lock; /*!< Locking object */
174
175 HAL_CEC_StateTypeDef gState; /*!< CEC state information related to global Handle management
176 and also related to Tx operations.
177 This parameter can be a value of @ref HAL_CEC_StateTypeDef */
178
179 HAL_CEC_StateTypeDef RxState; /*!< CEC state information related to Rx operations.
180 This parameter can be a value of @ref HAL_CEC_StateTypeDef */
181
182 uint32_t ErrorCode; /*!< For errors handling purposes, copy of ISR register
183 in case error is reported */
184
185 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
186 void (* TxCpltCallback)(struct __CEC_HandleTypeDef
187 *hcec); /*!< CEC Tx Transfer completed callback */
188 void (* RxCpltCallback)(struct __CEC_HandleTypeDef *hcec,
189 uint32_t RxFrameSize); /*!< CEC Rx Transfer completed callback */
190 void (* ErrorCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC error callback */
191
192 void (* MspInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp Init callback */
193 void (* MspDeInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp DeInit callback */
194
195 #endif /* (USE_HAL_CEC_REGISTER_CALLBACKS) */
196 } CEC_HandleTypeDef;
197
198 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
199 /**
200 * @brief HAL CEC Callback ID enumeration definition
201 */
202 typedef enum
203 {
204 HAL_CEC_TX_CPLT_CB_ID = 0x00U, /*!< CEC Tx Transfer completed callback ID */
205 HAL_CEC_RX_CPLT_CB_ID = 0x01U, /*!< CEC Rx Transfer completed callback ID */
206 HAL_CEC_ERROR_CB_ID = 0x02U, /*!< CEC error callback ID */
207 HAL_CEC_MSPINIT_CB_ID = 0x03U, /*!< CEC Msp Init callback ID */
208 HAL_CEC_MSPDEINIT_CB_ID = 0x04U /*!< CEC Msp DeInit callback ID */
209 } HAL_CEC_CallbackIDTypeDef;
210
211 /**
212 * @brief HAL CEC Callback pointer definition
213 */
214 typedef void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef *hcec); /*!< pointer to an CEC callback function */
215 typedef void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef *hcec,
216 uint32_t RxFrameSize); /*!< pointer to an Rx Transfer completed callback function */
217 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
218 /**
219 * @}
220 */
221
222 /* Exported constants --------------------------------------------------------*/
223 /** @defgroup CEC_Exported_Constants CEC Exported Constants
224 * @{
225 */
226 /** @defgroup CEC_State_Definition CEC State Code Definition
227 * @{
228 */
229 #define HAL_CEC_STATE_RESET ((uint32_t)0x00000000) /*!< Peripheral is not yet Initialized
230 Value is allowed for gState and RxState */
231 #define HAL_CEC_STATE_READY ((uint32_t)0x00000020) /*!< Peripheral Initialized and ready for use
232 Value is allowed for gState and RxState */
233 #define HAL_CEC_STATE_BUSY ((uint32_t)0x00000024) /*!< an internal process is ongoing
234 Value is allowed for gState only */
235 #define HAL_CEC_STATE_BUSY_RX ((uint32_t)0x00000022) /*!< Data Reception process is ongoing
236 Value is allowed for RxState only */
237 #define HAL_CEC_STATE_BUSY_TX ((uint32_t)0x00000021) /*!< Data Transmission process is ongoing
238 Value is allowed for gState only */
239 #define HAL_CEC_STATE_BUSY_RX_TX ((uint32_t)0x00000023) /*!< an internal process is ongoing
240 Value is allowed for gState only */
241 #define HAL_CEC_STATE_ERROR ((uint32_t)0x00000050) /*!< Error Value is allowed for gState only */
242 /**
243 * @}
244 */
245 /** @defgroup CEC_Error_Code CEC Error Code
246 * @{
247 */
248 #define HAL_CEC_ERROR_NONE (uint32_t) 0x0000U /*!< no error */
249 #define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR /*!< CEC Rx-Overrun */
250 #define HAL_CEC_ERROR_BRE CEC_ISR_BRE /*!< CEC Rx Bit Rising Error */
251 #define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE /*!< CEC Rx Short Bit period Error */
252 #define HAL_CEC_ERROR_LBPE CEC_ISR_LBPE /*!< CEC Rx Long Bit period Error */
253 #define HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE /*!< CEC Rx Missing Acknowledge */
254 #define HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST /*!< CEC Arbitration Lost */
255 #define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR /*!< CEC Tx-Buffer Underrun */
256 #define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR /*!< CEC Tx-Error */
257 #define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */
258 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
259 #define HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00002000U) /*!< Invalid Callback Error */
260 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
261 /**
262 * @}
263 */
264
265 /** @defgroup CEC_Signal_Free_Time CEC Signal Free Time setting parameter
266 * @{
267 */
268 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000U)
269 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U)
270 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U)
271 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U)
272 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U)
273 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U)
274 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U)
275 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U)
276 /**
277 * @}
278 */
279
280 /** @defgroup CEC_Tolerance CEC Receiver Tolerance
281 * @{
282 */
283 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U)
284 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
285 /**
286 * @}
287 */
288
289 /** @defgroup CEC_BRERxStop CEC Reception Stop on Error
290 * @{
291 */
292 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U)
293 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
294 /**
295 * @}
296 */
297
298 /** @defgroup CEC_BREErrorBitGen CEC Error Bit Generation if Bit Rise Error reported
299 * @{
300 */
301 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
302 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
303 /**
304 * @}
305 */
306
307 /** @defgroup CEC_LBPEErrorBitGen CEC Error Bit Generation if Long Bit Period Error reported
308 * @{
309 */
310 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
311 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
312 /**
313 * @}
314 */
315
316 /** @defgroup CEC_BroadCastMsgErrorBitGen CEC Error Bit Generation on Broadcast message
317 * @{
318 */
319 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U)
320 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
321 /**
322 * @}
323 */
324
325 /** @defgroup CEC_SFT_Option CEC Signal Free Time start option
326 * @{
327 */
328 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U)
329 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
330 /**
331 * @}
332 */
333
334 /** @defgroup CEC_Listening_Mode CEC Listening mode option
335 * @{
336 */
337 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U)
338 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
339 /**
340 * @}
341 */
342
343 /** @defgroup CEC_OAR_Position CEC Device Own Address position in CEC CFGR register
344 * @{
345 */
346 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U)
347 /**
348 * @}
349 */
350
351 /** @defgroup CEC_Initiator_Position CEC Initiator logical address position in message header
352 * @{
353 */
354 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4U)
355 /**
356 * @}
357 */
358
359 /** @defgroup CEC_OWN_ADDRESS CEC Own Address
360 * @{
361 */
362 #define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */
363 #define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */
364 #define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */
365 #define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */
366 #define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */
367 #define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */
368 #define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */
369 #define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */
370 #define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */
371 #define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */
372 #define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */
373 #define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */
374 #define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */
375 #define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */
376 #define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */
377 #define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */
378 /**
379 * @}
380 */
381
382 /** @defgroup CEC_Interrupts_Definitions CEC Interrupts definition
383 * @{
384 */
385 #define CEC_IT_TXACKE CEC_IER_TXACKEIE
386 #define CEC_IT_TXERR CEC_IER_TXERRIE
387 #define CEC_IT_TXUDR CEC_IER_TXUDRIE
388 #define CEC_IT_TXEND CEC_IER_TXENDIE
389 #define CEC_IT_TXBR CEC_IER_TXBRIE
390 #define CEC_IT_ARBLST CEC_IER_ARBLSTIE
391 #define CEC_IT_RXACKE CEC_IER_RXACKEIE
392 #define CEC_IT_LBPE CEC_IER_LBPEIE
393 #define CEC_IT_SBPE CEC_IER_SBPEIE
394 #define CEC_IT_BRE CEC_IER_BREIE
395 #define CEC_IT_RXOVR CEC_IER_RXOVRIE
396 #define CEC_IT_RXEND CEC_IER_RXENDIE
397 #define CEC_IT_RXBR CEC_IER_RXBRIE
398 /**
399 * @}
400 */
401
402 /** @defgroup CEC_Flags_Definitions CEC Flags definition
403 * @{
404 */
405 #define CEC_FLAG_TXACKE CEC_ISR_TXACKE
406 #define CEC_FLAG_TXERR CEC_ISR_TXERR
407 #define CEC_FLAG_TXUDR CEC_ISR_TXUDR
408 #define CEC_FLAG_TXEND CEC_ISR_TXEND
409 #define CEC_FLAG_TXBR CEC_ISR_TXBR
410 #define CEC_FLAG_ARBLST CEC_ISR_ARBLST
411 #define CEC_FLAG_RXACKE CEC_ISR_RXACKE
412 #define CEC_FLAG_LBPE CEC_ISR_LBPE
413 #define CEC_FLAG_SBPE CEC_ISR_SBPE
414 #define CEC_FLAG_BRE CEC_ISR_BRE
415 #define CEC_FLAG_RXOVR CEC_ISR_RXOVR
416 #define CEC_FLAG_RXEND CEC_ISR_RXEND
417 #define CEC_FLAG_RXBR CEC_ISR_RXBR
418 /**
419 * @}
420 */
421
422 /** @defgroup CEC_ALL_ERROR CEC all RX or TX errors flags
423 * @{
424 */
425 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
426 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
427 /**
428 * @}
429 */
430
431 /** @defgroup CEC_IER_ALL_RX CEC all RX errors interrupts enabling flag
432 * @{
433 */
434 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
435 /**
436 * @}
437 */
438
439 /** @defgroup CEC_IER_ALL_TX CEC all TX errors interrupts enabling flag
440 * @{
441 */
442 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
443 /**
444 * @}
445 */
446
447 /**
448 * @}
449 */
450
451 /* Exported macros -----------------------------------------------------------*/
452 /** @defgroup CEC_Exported_Macros CEC Exported Macros
453 * @{
454 */
455
456 /** @brief Reset CEC handle gstate & RxState
457 * @param __HANDLE__ CEC handle.
458 * @retval None
459 */
460 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
461 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
462 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
463 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
464 (__HANDLE__)->MspInitCallback = NULL; \
465 (__HANDLE__)->MspDeInitCallback = NULL; \
466 } while(0)
467 #else
468 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
469 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
470 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
471 } while(0)
472 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
473 /** @brief Checks whether or not the specified CEC interrupt flag is set.
474 * @param __HANDLE__ specifies the CEC Handle.
475 * @param __FLAG__ specifies the flag to check.
476 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
477 * @arg CEC_FLAG_TXERR: Tx Error.
478 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
479 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
480 * @arg CEC_FLAG_TXBR: Tx-Byte Request.
481 * @arg CEC_FLAG_ARBLST: Arbitration Lost
482 * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge
483 * @arg CEC_FLAG_LBPE: Rx Long period Error
484 * @arg CEC_FLAG_SBPE: Rx Short period Error
485 * @arg CEC_FLAG_BRE: Rx Bit Rising Error
486 * @arg CEC_FLAG_RXOVR: Rx Overrun.
487 * @arg CEC_FLAG_RXEND: End Of Reception.
488 * @arg CEC_FLAG_RXBR: Rx-Byte Received.
489 * @retval ITStatus
490 */
491 #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
492
493 /** @brief Clears the interrupt or status flag when raised (write at 1)
494 * @param __HANDLE__ specifies the CEC Handle.
495 * @param __FLAG__ specifies the interrupt/status flag to clear.
496 * This parameter can be one of the following values:
497 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
498 * @arg CEC_FLAG_TXERR: Tx Error.
499 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
500 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
501 * @arg CEC_FLAG_TXBR: Tx-Byte Request.
502 * @arg CEC_FLAG_ARBLST: Arbitration Lost
503 * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge
504 * @arg CEC_FLAG_LBPE: Rx Long period Error
505 * @arg CEC_FLAG_SBPE: Rx Short period Error
506 * @arg CEC_FLAG_BRE: Rx Bit Rising Error
507 * @arg CEC_FLAG_RXOVR: Rx Overrun.
508 * @arg CEC_FLAG_RXEND: End Of Reception.
509 * @arg CEC_FLAG_RXBR: Rx-Byte Received.
510 * @retval none
511 */
512 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__))
513
514 /** @brief Enables the specified CEC interrupt.
515 * @param __HANDLE__ specifies the CEC Handle.
516 * @param __INTERRUPT__ specifies the CEC interrupt to enable.
517 * This parameter can be one of the following values:
518 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
519 * @arg CEC_IT_TXERR: Tx Error IT Enable
520 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable
521 * @arg CEC_IT_TXEND: End of transmission IT Enable
522 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable
523 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable
524 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable
525 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable
526 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable
527 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable
528 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable
529 * @arg CEC_IT_RXEND: End Of Reception IT Enable
530 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable
531 * @retval none
532 */
533 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
534
535 /** @brief Disables the specified CEC interrupt.
536 * @param __HANDLE__ specifies the CEC Handle.
537 * @param __INTERRUPT__ specifies the CEC interrupt to disable.
538 * This parameter can be one of the following values:
539 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
540 * @arg CEC_IT_TXERR: Tx Error IT Enable
541 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable
542 * @arg CEC_IT_TXEND: End of transmission IT Enable
543 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable
544 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable
545 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable
546 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable
547 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable
548 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable
549 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable
550 * @arg CEC_IT_RXEND: End Of Reception IT Enable
551 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable
552 * @retval none
553 */
554 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
555
556 /** @brief Checks whether or not the specified CEC interrupt is enabled.
557 * @param __HANDLE__ specifies the CEC Handle.
558 * @param __INTERRUPT__ specifies the CEC interrupt to check.
559 * This parameter can be one of the following values:
560 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
561 * @arg CEC_IT_TXERR: Tx Error IT Enable
562 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable
563 * @arg CEC_IT_TXEND: End of transmission IT Enable
564 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable
565 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable
566 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable
567 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable
568 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable
569 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable
570 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable
571 * @arg CEC_IT_RXEND: End Of Reception IT Enable
572 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable
573 * @retval FlagStatus
574 */
575 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
576
577 /** @brief Enables the CEC device
578 * @param __HANDLE__ specifies the CEC Handle.
579 * @retval none
580 */
581 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
582
583 /** @brief Disables the CEC device
584 * @param __HANDLE__ specifies the CEC Handle.
585 * @retval none
586 */
587 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
588
589 /** @brief Set Transmission Start flag
590 * @param __HANDLE__ specifies the CEC Handle.
591 * @retval none
592 */
593 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
594
595 /** @brief Set Transmission End flag
596 * @param __HANDLE__ specifies the CEC Handle.
597 * @retval none
598 * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.
599 */
600 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
601
602 /** @brief Get Transmission Start flag
603 * @param __HANDLE__ specifies the CEC Handle.
604 * @retval FlagStatus
605 */
606 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
607
608 /** @brief Get Transmission End flag
609 * @param __HANDLE__ specifies the CEC Handle.
610 * @retval FlagStatus
611 */
612 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
613
614 /** @brief Clear OAR register
615 * @param __HANDLE__ specifies the CEC Handle.
616 * @retval none
617 */
618 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
619
620 /** @brief Set OAR register (without resetting previously set address in case of multi-address mode)
621 * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
622 * @param __HANDLE__ specifies the CEC Handle.
623 * @param __ADDRESS__ Own Address value (CEC logical address is identified by bit position)
624 * @retval none
625 */
626 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
627
628 /**
629 * @}
630 */
631
632 /* Exported functions --------------------------------------------------------*/
633 /** @addtogroup CEC_Exported_Functions
634 * @{
635 */
636
637 /** @addtogroup CEC_Exported_Functions_Group1
638 * @{
639 */
640 /* Initialization and de-initialization functions ****************************/
641 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
642 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
643 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
644 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
645 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
646
647 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
648 HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
649 pCEC_CallbackTypeDef pCallback);
650 HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID);
651
652 HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback);
653 HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec);
654 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
655 /**
656 * @}
657 */
658
659 /** @addtogroup CEC_Exported_Functions_Group2
660 * @{
661 */
662 /* I/O operation functions ***************************************************/
663 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
664 uint8_t *pData, uint32_t Size);
665 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec);
666 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer);
667 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
668 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
669 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
670 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
671 /**
672 * @}
673 */
674
675 /** @addtogroup CEC_Exported_Functions_Group3
676 * @{
677 */
678 /* Peripheral State functions ************************************************/
679 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
680 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
681 /**
682 * @}
683 */
684
685 /**
686 * @}
687 */
688
689 /* Private types -------------------------------------------------------------*/
690 /** @defgroup CEC_Private_Types CEC Private Types
691 * @{
692 */
693
694 /**
695 * @}
696 */
697
698 /* Private variables ---------------------------------------------------------*/
699 /** @defgroup CEC_Private_Variables CEC Private Variables
700 * @{
701 */
702
703 /**
704 * @}
705 */
706
707 /* Private constants ---------------------------------------------------------*/
708 /** @defgroup CEC_Private_Constants CEC Private Constants
709 * @{
710 */
711
712 /**
713 * @}
714 */
715
716 /* Private macros ------------------------------------------------------------*/
717 /** @defgroup CEC_Private_Macros CEC Private Macros
718 * @{
719 */
720
721 #define IS_CEC_SIGNALFREETIME(__SFT__) ((__SFT__) <= CEC_CFGR_SFT)
722
723 #define IS_CEC_TOLERANCE(__RXTOL__) (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
724 ((__RXTOL__) == CEC_EXTENDED_TOLERANCE))
725
726 #define IS_CEC_BRERXSTOP(__BRERXSTOP__) (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
727 ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))
728
729 #define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
730 ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))
731
732 #define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
733 ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))
734
735 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
736 ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
737
738 #define IS_CEC_SFTOP(__SFTOP__) (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
739 ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))
740
741 #define IS_CEC_LISTENING_MODE(__MODE__) (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
742 ((__MODE__) == CEC_FULL_LISTENING_MODE))
743
744 /** @brief Check CEC message size.
745 * The message size is the payload size: without counting the header,
746 * it varies from 0 byte (ping operation, one header only, no payload) to
747 * 15 bytes (1 opcode and up to 14 operands following the header).
748 * @param __SIZE__ CEC message size.
749 * @retval Test result (TRUE or FALSE).
750 */
751 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U)
752
753 /** @brief Check CEC device Own Address Register (OAR) setting.
754 * OAR address is written in a 15-bit field within CEC_CFGR register.
755 * @param __ADDRESS__ CEC own address.
756 * @retval Test result (TRUE or FALSE).
757 */
758 #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFFU)
759
760 /** @brief Check CEC initiator or destination logical address setting.
761 * Initiator and destination addresses are coded over 4 bits.
762 * @param __ADDRESS__ CEC initiator or logical address.
763 * @retval Test result (TRUE or FALSE).
764 */
765 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xFU)
766 /**
767 * @}
768 */
769 /* Private functions ---------------------------------------------------------*/
770 /** @defgroup CEC_Private_Functions CEC Private Functions
771 * @{
772 */
773
774 /**
775 * @}
776 */
777
778 /**
779 * @}
780 */
781
782 /**
783 * @}
784 */
785
786 #endif /* CEC */
787
788 #ifdef __cplusplus
789 }
790 #endif
791
792 #endif /* STM32H7xxHAL_CEC_H */
793
794 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/