Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_dac.h
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dac.h
4 * @author MCD Application Team
5 * @brief Header file of DAC HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_DAC_H
22 #define STM32H7xx_HAL_DAC_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 /** @addtogroup STM32H7xx_HAL_Driver
29 * @{
32 /* Includes ------------------------------------------------------------------*/
33 #include "stm32h7xx_hal_def.h"
35 #if defined(DAC1) || defined(DAC2)
37 /** @addtogroup DAC
38 * @{
41 /* Exported types ------------------------------------------------------------*/
43 /** @defgroup DAC_Exported_Types DAC Exported Types
44 * @{
47 /**
48 * @brief HAL State structures definition
50 typedef enum
52 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
53 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
54 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
55 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
56 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
58 } HAL_DAC_StateTypeDef;
60 /**
61 * @brief DAC handle Structure definition
63 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
64 typedef struct __DAC_HandleTypeDef
65 #else
66 typedef struct
67 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
69 DAC_TypeDef *Instance; /*!< Register base address */
71 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
73 HAL_LockTypeDef Lock; /*!< DAC locking object */
75 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
77 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
79 __IO uint32_t ErrorCode; /*!< DAC Error code */
81 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
82 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
83 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
84 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
85 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
86 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
87 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
88 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
89 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
91 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
92 void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac);
93 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
95 } DAC_HandleTypeDef;
97 /**
98 * @brief DAC Configuration sample and hold Channel structure definition
100 typedef struct
102 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel.
103 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
104 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
106 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel
107 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
108 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
110 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel
111 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
112 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */
113 } DAC_SampleAndHoldConfTypeDef;
116 * @brief DAC Configuration regular Channel structure definition
118 typedef struct
120 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode.
121 This parameter can be a value of @ref DAC_SampleAndHold */
123 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
124 This parameter can be a value of @ref DAC_trigger_selection */
126 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
127 This parameter can be a value of @ref DAC_output_buffer */
129 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral .
130 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */
132 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode
133 This parameter must be a value of @ref DAC_UserTrimming
134 DAC_UserTrimming is either factory or user trimming */
136 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value
137 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER.
138 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */
142 } DAC_ChannelConfTypeDef;
144 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
146 * @brief HAL DAC Callback ID enumeration definition
148 typedef enum
150 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */
151 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */
152 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */
153 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */
154 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */
155 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */
156 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */
157 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */
158 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */
159 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */
160 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
161 } HAL_DAC_CallbackIDTypeDef;
164 * @brief HAL DAC Callback pointer definition
166 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
167 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
170 * @}
173 /* Exported constants --------------------------------------------------------*/
175 /** @defgroup DAC_Exported_Constants DAC Exported Constants
176 * @{
179 /** @defgroup DAC_Error_Code DAC Error Code
180 * @{
182 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
183 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */
184 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */
185 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
186 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */
187 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
188 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */
189 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
192 * @}
195 /** @defgroup DAC_trigger_selection DAC trigger selection
196 * @{
198 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */
199 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
200 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */
201 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
202 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
203 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
204 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
205 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
206 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
207 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */
208 #if defined(HRTIM1)
209 #define DAC_TRIGGER_HR1_TRGO1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< HR1 TRGO1 selected as external conversion trigger for DAC channel */
210 #define DAC_TRIGGER_HR1_TRGO2 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< HR1 TRGO2 selected as external conversion trigger for DAC channel */
211 #endif
212 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */
213 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */
214 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
215 #if defined(TIM23)
216 #define DAC_TRIGGER_T23_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM23 TRGO selected as external conversion trigger for DAC channel */
217 #endif
218 #if defined(TIM24)
219 #define DAC_TRIGGER_T24_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM24 TRGO selected as external conversion trigger for DAC channel */
220 #endif
221 #if defined(DAC2)
222 #define DAC_TRIGGER_LPTIM3_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< LPTIM3 OUT TRGO selected as external conversion trigger for DAC channel */
223 #endif
226 * @}
229 /** @defgroup DAC_output_buffer DAC output buffer
230 * @{
232 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
233 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1)
236 * @}
239 /** @defgroup DAC_Channel_selection DAC Channel selection
240 * @{
242 #define DAC_CHANNEL_1 0x00000000U
243 #define DAC_CHANNEL_2 0x00000010U
245 * @}
248 /** @defgroup DAC_data_alignment DAC data alignment
249 * @{
251 #define DAC_ALIGN_12B_R 0x00000000U
252 #define DAC_ALIGN_12B_L 0x00000004U
253 #define DAC_ALIGN_8B_R 0x00000008U
256 * @}
259 /** @defgroup DAC_flags_definition DAC flags definition
260 * @{
262 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
263 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
266 * @}
269 /** @defgroup DAC_IT_definition DAC IT definition
270 * @{
272 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
273 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
276 * @}
279 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral
280 * @{
282 #define DAC_CHIPCONNECT_EXTERNAL (1UL << 0)
283 #define DAC_CHIPCONNECT_INTERNAL (1UL << 1)
284 #define DAC_CHIPCONNECT_BOTH (1UL << 2)
287 * @}
290 /** @defgroup DAC_UserTrimming DAC User Trimming
291 * @{
293 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */
294 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */
296 * @}
299 /** @defgroup DAC_SampleAndHold DAC power mode
300 * @{
302 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL)
303 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2)
306 * @}
309 * @}
312 /* Exported macro ------------------------------------------------------------*/
314 /** @defgroup DAC_Exported_Macros DAC Exported Macros
315 * @{
318 /** @brief Reset DAC handle state.
319 * @param __HANDLE__ specifies the DAC handle.
320 * @retval None
322 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
323 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
324 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \
325 (__HANDLE__)->MspInitCallback = NULL; \
326 (__HANDLE__)->MspDeInitCallback = NULL; \
327 } while(0)
328 #else
329 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
330 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
332 /** @brief Enable the DAC channel.
333 * @param __HANDLE__ specifies the DAC handle.
334 * @param __DAC_Channel__ specifies the DAC channel
335 * @retval None
337 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
338 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
340 /** @brief Disable the DAC channel.
341 * @param __HANDLE__ specifies the DAC handle
342 * @param __DAC_Channel__ specifies the DAC channel.
343 * @retval None
345 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
346 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
348 /** @brief Set DHR12R1 alignment.
349 * @param __ALIGNMENT__ specifies the DAC alignment
350 * @retval None
352 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
354 /** @brief Set DHR12R2 alignment.
355 * @param __ALIGNMENT__ specifies the DAC alignment
356 * @retval None
358 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
360 /** @brief Set DHR12RD alignment.
361 * @param __ALIGNMENT__ specifies the DAC alignment
362 * @retval None
364 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
366 /** @brief Enable the DAC interrupt.
367 * @param __HANDLE__ specifies the DAC handle
368 * @param __INTERRUPT__ specifies the DAC interrupt.
369 * This parameter can be any combination of the following values:
370 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
371 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
372 * @retval None
374 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
376 /** @brief Disable the DAC interrupt.
377 * @param __HANDLE__ specifies the DAC handle
378 * @param __INTERRUPT__ specifies the DAC interrupt.
379 * This parameter can be any combination of the following values:
380 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
381 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
382 * @retval None
384 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
386 /** @brief Check whether the specified DAC interrupt source is enabled or not.
387 * @param __HANDLE__ DAC handle
388 * @param __INTERRUPT__ DAC interrupt source to check
389 * This parameter can be any combination of the following values:
390 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
391 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
392 * @retval State of interruption (SET or RESET)
394 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
396 /** @brief Get the selected DAC's flag status.
397 * @param __HANDLE__ specifies the DAC handle.
398 * @param __FLAG__ specifies the DAC flag to get.
399 * This parameter can be any combination of the following values:
400 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
401 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
402 * @retval None
404 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
406 /** @brief Clear the DAC's flag.
407 * @param __HANDLE__ specifies the DAC handle.
408 * @param __FLAG__ specifies the DAC flag to clear.
409 * This parameter can be any combination of the following values:
410 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
411 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
412 * @retval None
414 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
417 * @}
420 /* Private macro -------------------------------------------------------------*/
422 /** @defgroup DAC_Private_Macros DAC Private Macros
423 * @{
425 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
426 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
428 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
429 ((CHANNEL) == DAC_CHANNEL_2))
431 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
432 ((ALIGN) == DAC_ALIGN_12B_L) || \
433 ((ALIGN) == DAC_ALIGN_8B_R))
435 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
437 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL)
440 * @}
443 /* Include DAC HAL Extended module */
444 #include "stm32h7xx_hal_dac_ex.h"
446 /* Exported functions --------------------------------------------------------*/
448 /** @addtogroup DAC_Exported_Functions
449 * @{
452 /** @addtogroup DAC_Exported_Functions_Group1
453 * @{
455 /* Initialization and de-initialization functions *****************************/
456 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
457 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
458 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
459 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
462 * @}
465 /** @addtogroup DAC_Exported_Functions_Group2
466 * @{
468 /* IO operation functions *****************************************************/
469 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
470 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
471 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
472 uint32_t Alignment);
473 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
474 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
475 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
477 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
478 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
479 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
480 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
482 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
483 /* DAC callback registering/unregistering */
484 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
485 pDAC_CallbackTypeDef pCallback);
486 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
487 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
490 * @}
493 /** @addtogroup DAC_Exported_Functions_Group3
494 * @{
496 /* Peripheral Control functions ***********************************************/
497 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
498 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
500 * @}
503 /** @addtogroup DAC_Exported_Functions_Group4
504 * @{
506 /* Peripheral State and Error functions ***************************************/
507 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
508 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
511 * @}
515 * @}
518 /** @defgroup DAC_Private_Functions DAC Private Functions
519 * @{
521 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
522 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
523 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
525 * @}
529 * @}
532 #endif /* DAC1 || DAC2 */
535 * @}
538 #ifdef __cplusplus
540 #endif
543 #endif /*STM32H7xx_HAL_DAC_H */
545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/