lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_hal_dma2d.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of DMA2D HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32H7xx_HAL_DMA2D_H
  22 #define STM32H7xx_HAL_DMA2D_H
  23
  24 #ifdef __cplusplus
  25  extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32h7xx_hal_def.h"
  30
  31 /** @addtogroup STM32H7xx_HAL_Driver
  32   * @{
  33   */
  34
  35 #if defined (DMA2D)
  36
  37 /** @addtogroup DMA2D DMA2D
  38   * @brief DMA2D HAL module driver
  39   * @{
  40   */
  41
  42 /* Exported types ------------------------------------------------------------*/
  43 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
  44   * @{
  45   */
  46 #define MAX_DMA2D_LAYER  2U  /*!< DMA2D maximum number of layers */
  47
  48 /**
  49   * @brief DMA2D CLUT Structure definition
  50   */
  51 typedef struct
  52 {
  53   uint32_t *pCLUT;                  /*!< Configures the DMA2D CLUT memory address.*/
  54
  55   uint32_t CLUTColorMode;           /*!< Configures the DMA2D CLUT color mode.
  56                                          This parameter can be one value of @ref DMA2D_CLUT_CM. */
  57
  58   uint32_t Size;                    /*!< Configures the DMA2D CLUT size.
  59                                          This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
  60 } DMA2D_CLUTCfgTypeDef;
  61
  62 /**
  63   * @brief DMA2D Init structure definition
  64   */
  65 typedef struct
  66 {
  67   uint32_t             Mode;               /*!< Configures the DMA2D transfer mode.
  68                                                 This parameter can be one value of @ref DMA2D_Mode. */
  69
  70   uint32_t             ColorMode;          /*!< Configures the color format of the output image.
  71                                                 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */
  72
  73   uint32_t             OutputOffset;       /*!< Specifies the Offset value.
  74                                                 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  75   uint32_t             AlphaInverted;     /*!< Select regular or inverted alpha value for the output pixel format converter.
  76                                                This parameter can be one value of @ref DMA2D_Alpha_Inverted. */
  77
  78   uint32_t             RedBlueSwap;       /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR)
  79                                                for the output pixel format converter.
  80                                                This parameter can be one value of @ref DMA2D_RB_Swap. */
  81
  82
  83   uint32_t             BytesSwap;         /*!< Select byte regular mode or bytes swap mode (two by two).
  84                                                This parameter can be one value of @ref DMA2D_Bytes_Swap. */
  85
  86   uint32_t             LineOffsetMode;    /*!< Configures how is expressed the line offset for the foreground, background and output.
  87                                                This parameter can be one value of @ref DMA2D_Line_Offset_Mode. */
  88
  89 } DMA2D_InitTypeDef;
  90
  91
  92 /**
  93   * @brief DMA2D Layer structure definition
  94   */
  95 typedef struct
  96 {
  97   uint32_t             InputOffset;       /*!< Configures the DMA2D foreground or background offset.
  98                                                This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  99
 100   uint32_t             InputColorMode;    /*!< Configures the DMA2D foreground or background color mode.
 101                                                This parameter can be one value of @ref DMA2D_Input_Color_Mode. */
 102
 103   uint32_t             AlphaMode;         /*!< Configures the DMA2D foreground or background alpha mode.
 104                                                This parameter can be one value of @ref DMA2D_Alpha_Mode. */
 105
 106   uint32_t             InputAlpha;        /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.
 107                                                This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.
 108                                                @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between
 109                                                Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where
 110                                                - InputAlpha[24:31] is the alpha value ALPHA[0:7]
 111                                                - InputAlpha[16:23] is the red value RED[0:7]
 112                                                - InputAlpha[8:15] is the green value GREEN[0:7]
 113                                                - InputAlpha[0:7] is the blue value BLUE[0:7]. */
 114   uint32_t             AlphaInverted;     /*!< Select regular or inverted alpha value.
 115                                                This parameter can be one value of @ref DMA2D_Alpha_Inverted. */
 116
 117   uint32_t             RedBlueSwap;       /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR).
 118                                                This parameter can be one value of @ref DMA2D_RB_Swap. */
 119
 120   uint32_t             ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode
 121                                                This parameter can be one value of @ref DMA2D_Chroma_Sub_Sampling */
 122
 123 } DMA2D_LayerCfgTypeDef;
 124
 125 /**
 126   * @brief  HAL DMA2D State structures definition
 127   */
 128 typedef enum
 129 {
 130   HAL_DMA2D_STATE_RESET             = 0x00U,    /*!< DMA2D not yet initialized or disabled       */
 131   HAL_DMA2D_STATE_READY             = 0x01U,    /*!< Peripheral Initialized and ready for use    */
 132   HAL_DMA2D_STATE_BUSY              = 0x02U,    /*!< An internal process is ongoing              */
 133   HAL_DMA2D_STATE_TIMEOUT           = 0x03U,    /*!< Timeout state                               */
 134   HAL_DMA2D_STATE_ERROR             = 0x04U,    /*!< DMA2D state error                           */
 135   HAL_DMA2D_STATE_SUSPEND           = 0x05U     /*!< DMA2D process is suspended                  */
 136 }HAL_DMA2D_StateTypeDef;
 137
 138 /**
 139   * @brief  DMA2D handle Structure definition
 140   */
 141 typedef struct __DMA2D_HandleTypeDef
 142 {
 143   DMA2D_TypeDef               *Instance;                                                    /*!< DMA2D register base address.               */
 144
 145   DMA2D_InitTypeDef           Init;                                                         /*!< DMA2D communication parameters.            */
 146
 147   void                        (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d);  /*!< DMA2D transfer complete callback.          */
 148
 149   void                        (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback.             */
 150
 151 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 152   void                        (* LineEventCallback)( struct __DMA2D_HandleTypeDef * hdma2d);   /*!< DMA2D line event callback.      */
 153
 154   void                        (* CLUTLoadingCpltCallback)( struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D CLUT loading completion callback. */
 155
 156   void                        (* MspInitCallback)( struct __DMA2D_HandleTypeDef * hdma2d);   /*!< DMA2D Msp Init callback.          */
 157
 158   void                        (* MspDeInitCallback)( struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D Msp DeInit callback.        */
 159
 160 #endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
 161
 162   DMA2D_LayerCfgTypeDef       LayerCfg[MAX_DMA2D_LAYER];                                    /*!< DMA2D Layers parameters           */
 163
 164   HAL_LockTypeDef             Lock;                                                         /*!< DMA2D lock.                                */
 165
 166   __IO HAL_DMA2D_StateTypeDef State;                                                        /*!< DMA2D transfer state.                      */
 167
 168   __IO uint32_t               ErrorCode;                                                    /*!< DMA2D error code.                          */
 169 } DMA2D_HandleTypeDef;
 170
 171 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 172 /**
 173   * @brief  HAL DMA2D Callback pointer definition
 174   */
 175 typedef  void (*pDMA2D_CallbackTypeDef)(DMA2D_HandleTypeDef * hdma2d); /*!< Pointer to a DMA2D common callback function */
 176 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
 177 /**
 178   * @}
 179   */
 180
 181 /* Exported constants --------------------------------------------------------*/
 182 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
 183   * @{
 184   */
 185
 186 /** @defgroup DMA2D_Error_Code DMA2D Error Code
 187   * @{
 188   */
 189 #define HAL_DMA2D_ERROR_NONE        0x00000000U  /*!< No error             */
 190 #define HAL_DMA2D_ERROR_TE          0x00000001U  /*!< Transfer error       */
 191 #define HAL_DMA2D_ERROR_CE          0x00000002U  /*!< Configuration error  */
 192 #define HAL_DMA2D_ERROR_CAE         0x00000004U  /*!< CLUT access error    */
 193 #define HAL_DMA2D_ERROR_TIMEOUT     0x00000020U  /*!< Timeout error        */
 194 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 195 #define HAL_DMA2D_ERROR_INVALID_CALLBACK 0x00000040U  /*!< Invalid callback error  */
 196 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
 197
 198 /**
 199   * @}
 200   */
 201
 202 /** @defgroup DMA2D_Mode DMA2D Mode
 203   * @{
 204   */
 205 #define DMA2D_M2M                   0x00000000U                         /*!< DMA2D memory to memory transfer mode */
 206 #define DMA2D_M2M_PFC               DMA2D_CR_MODE_0                     /*!< DMA2D memory to memory with pixel format conversion transfer mode */
 207 #define DMA2D_M2M_BLEND             DMA2D_CR_MODE_1                     /*!< DMA2D memory to memory with blending transfer mode */
 208 #define DMA2D_R2M                   (DMA2D_CR_MODE_1 | DMA2D_CR_MODE_0) /*!< DMA2D register to memory transfer mode */
 209 #define DMA2D_M2M_BLEND_FG          DMA2D_CR_MODE_2                     /*!< DMA2D memory to memory with blending transfer mode and fixed color FG */
 210 #define DMA2D_M2M_BLEND_BG          (DMA2D_CR_MODE_2 | DMA2D_CR_MODE_0) /*!< DMA2D memory to memory with blending transfer mode and fixed color BG */
 211 /**
 212   * @}
 213   */
 214
 215 /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode
 216   * @{
 217   */
 218 #define DMA2D_OUTPUT_ARGB8888       0x00000000U                           /*!< ARGB8888 DMA2D color mode */
 219 #define DMA2D_OUTPUT_RGB888         DMA2D_OPFCCR_CM_0                     /*!< RGB888 DMA2D color mode   */
 220 #define DMA2D_OUTPUT_RGB565         DMA2D_OPFCCR_CM_1                     /*!< RGB565 DMA2D color mode   */
 221 #define DMA2D_OUTPUT_ARGB1555       (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */
 222 #define DMA2D_OUTPUT_ARGB4444       DMA2D_OPFCCR_CM_2                     /*!< ARGB4444 DMA2D color mode */
 223 /**
 224   * @}
 225   */
 226
 227 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
 228   * @{
 229   */
 230 #define DMA2D_INPUT_ARGB8888        0x00000000U  /*!< ARGB8888 color mode */
 231 #define DMA2D_INPUT_RGB888          0x00000001U  /*!< RGB888 color mode   */
 232 #define DMA2D_INPUT_RGB565          0x00000002U  /*!< RGB565 color mode   */
 233 #define DMA2D_INPUT_ARGB1555        0x00000003U  /*!< ARGB1555 color mode */
 234 #define DMA2D_INPUT_ARGB4444        0x00000004U  /*!< ARGB4444 color mode */
 235 #define DMA2D_INPUT_L8              0x00000005U  /*!< L8 color mode       */
 236 #define DMA2D_INPUT_AL44            0x00000006U  /*!< AL44 color mode     */
 237 #define DMA2D_INPUT_AL88            0x00000007U  /*!< AL88 color mode     */
 238 #define DMA2D_INPUT_L4              0x00000008U  /*!< L4 color mode       */
 239 #define DMA2D_INPUT_A8              0x00000009U  /*!< A8 color mode       */
 240 #define DMA2D_INPUT_A4              0x0000000AU  /*!< A4 color mode       */
 241 #define DMA2D_INPUT_YCBCR           0x0000000BU  /*!< YCbCr color mode */
 242 /**
 243   * @}
 244   */
 245
 246 /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode
 247   * @{
 248   */
 249 #define DMA2D_NO_MODIF_ALPHA        0x00000000U  /*!< No modification of the alpha channel value */
 250 #define DMA2D_REPLACE_ALPHA         0x00000001U  /*!< Replace original alpha channel value by programmed alpha value */
 251 #define DMA2D_COMBINE_ALPHA         0x00000002U  /*!< Replace original alpha channel value by programmed alpha value
 252                                                                 with original alpha channel value                              */
 253 /**
 254   * @}
 255   */
 256
 257 /** @defgroup DMA2D_Alpha_Inverted DMA2D Alpha Inversion
 258   * @{
 259   */
 260 #define DMA2D_REGULAR_ALPHA         0x00000000U  /*!< No modification of the alpha channel value */
 261 #define DMA2D_INVERTED_ALPHA        0x00000001U  /*!< Invert the alpha channel value */
 262 /**
 263   * @}
 264   */
 265
 266 /** @defgroup DMA2D_RB_Swap DMA2D Red and Blue Swap
 267   * @{
 268   */
 269 #define DMA2D_RB_REGULAR            0x00000000U  /*!< Select regular mode (RGB or ARGB) */
 270 #define DMA2D_RB_SWAP               0x00000001U  /*!< Select swap mode (BGR or ABGR) */
 271 /**
 272   * @}
 273   */
 274
 275
 276
 277 /** @defgroup DMA2D_Line_Offset_Mode DMA2D Line Offset Mode
 278   * @{
 279   */
 280 #define DMA2D_LOM_PIXELS            0x00000000U   /*!< Line offsets expressed in pixels */
 281 #define DMA2D_LOM_BYTES             DMA2D_CR_LOM  /*!< Line offsets expressed in bytes */
 282 /**
 283   * @}
 284   */
 285
 286 /** @defgroup DMA2D_Bytes_Swap DMA2D Bytes Swap
 287   * @{
 288   */
 289 #define DMA2D_BYTES_REGULAR         0x00000000U      /*!< Bytes in regular order in output FIFO */
 290 #define DMA2D_BYTES_SWAP            DMA2D_OPFCCR_SB  /*!< Bytes are swapped two by two in output FIFO */
 291 /**
 292   * @}
 293   */
 294
 295 /** @defgroup DMA2D_Chroma_Sub_Sampling DMA2D Chroma Sub Sampling
 296   * @{
 297   */
 298 #define DMA2D_NO_CSS               0x00000000U  /*!< No chroma sub-sampling 4:4:4 */
 299 #define DMA2D_CSS_422              0x00000001U  /*!< chroma sub-sampling 4:2:2 */
 300 #define DMA2D_CSS_420              0x00000002U  /*!< chroma sub-sampling 4:2:0 */
 301 /**
 302   * @}
 303   */
 304
 305 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode
 306   * @{
 307   */
 308 #define DMA2D_CCM_ARGB8888          0x00000000U  /*!< ARGB8888 DMA2D CLUT color mode */
 309 #define DMA2D_CCM_RGB888            0x00000001U  /*!< RGB888 DMA2D CLUT color mode   */
 310 /**
 311   * @}
 312   */
 313
 314 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
 315   * @{
 316   */
 317 #define DMA2D_IT_CE                 DMA2D_CR_CEIE            /*!< Configuration Error Interrupt */
 318 #define DMA2D_IT_CTC                DMA2D_CR_CTCIE           /*!< CLUT Transfer Complete Interrupt */
 319 #define DMA2D_IT_CAE                DMA2D_CR_CAEIE           /*!< CLUT Access Error Interrupt */
 320 #define DMA2D_IT_TW                 DMA2D_CR_TWIE            /*!< Transfer Watermark Interrupt */
 321 #define DMA2D_IT_TC                 DMA2D_CR_TCIE            /*!< Transfer Complete Interrupt */
 322 #define DMA2D_IT_TE                 DMA2D_CR_TEIE            /*!< Transfer Error Interrupt */
 323 /**
 324   * @}
 325   */
 326
 327 /** @defgroup DMA2D_Flags DMA2D Flags
 328   * @{
 329   */
 330 #define DMA2D_FLAG_CE               DMA2D_ISR_CEIF           /*!< Configuration Error Interrupt Flag */
 331 #define DMA2D_FLAG_CTC              DMA2D_ISR_CTCIF          /*!< CLUT Transfer Complete Interrupt Flag */
 332 #define DMA2D_FLAG_CAE              DMA2D_ISR_CAEIF          /*!< CLUT Access Error Interrupt Flag */
 333 #define DMA2D_FLAG_TW               DMA2D_ISR_TWIF           /*!< Transfer Watermark Interrupt Flag */
 334 #define DMA2D_FLAG_TC               DMA2D_ISR_TCIF           /*!< Transfer Complete Interrupt Flag */
 335 #define DMA2D_FLAG_TE               DMA2D_ISR_TEIF           /*!< Transfer Error Interrupt Flag */
 336 /**
 337   * @}
 338   */
 339
 340 /** @defgroup DMA2D_Aliases DMA2D API Aliases
 341   * @{
 342   */
 343 #define HAL_DMA2D_DisableCLUT       HAL_DMA2D_CLUTLoading_Abort    /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */
 344 /**
 345   * @}
 346   */
 347
 348 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 349 /**
 350   * @brief  HAL DMA2D common Callback ID enumeration definition
 351   */
 352 typedef enum
 353 {
 354   HAL_DMA2D_MSPINIT_CB_ID           = 0x00U,    /*!< DMA2D MspInit callback ID                 */
 355   HAL_DMA2D_MSPDEINIT_CB_ID         = 0x01U,    /*!< DMA2D MspDeInit callback ID               */
 356   HAL_DMA2D_TRANSFERCOMPLETE_CB_ID  = 0x02U,    /*!< DMA2D transfer complete callback ID       */
 357   HAL_DMA2D_TRANSFERERROR_CB_ID     = 0x03U,    /*!< DMA2D transfer error callback ID          */
 358   HAL_DMA2D_LINEEVENT_CB_ID         = 0x04U,    /*!< DMA2D line event callback ID              */
 359   HAL_DMA2D_CLUTLOADINGCPLT_CB_ID   = 0x05U,    /*!< DMA2D CLUT loading completion callback ID */
 360 }HAL_DMA2D_CallbackIDTypeDef;
 361 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
 362
 363
 364 /**
 365   * @}
 366   */
 367 /* Exported macros ------------------------------------------------------------*/
 368 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
 369   * @{
 370   */
 371
 372 /** @brief Reset DMA2D handle state
 373   * @param  __HANDLE__ specifies the DMA2D handle.
 374   * @retval None
 375   */
 376 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 377 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) do{                                            \
 378                                                       (__HANDLE__)->State = HAL_DMA2D_STATE_RESET;\
 379                                                       (__HANDLE__)->MspInitCallback = NULL;       \
 380                                                       (__HANDLE__)->MspDeInitCallback = NULL;     \
 381                                                      }while(0)
 382 #else
 383 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
 384 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
 385
 386
 387 /**
 388   * @brief  Enable the DMA2D.
 389   * @param  __HANDLE__ DMA2D handle
 390   * @retval None.
 391   */
 392 #define __HAL_DMA2D_ENABLE(__HANDLE__)        ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
 393
 394
 395 /* Interrupt & Flag management */
 396 /**
 397   * @brief  Get the DMA2D pending flags.
 398   * @param  __HANDLE__ DMA2D handle
 399   * @param  __FLAG__ flag to check.
 400   *          This parameter can be any combination of the following values:
 401   *            @arg DMA2D_FLAG_CE:  Configuration error flag
 402   *            @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
 403   *            @arg DMA2D_FLAG_CAE: CLUT access error flag
 404   *            @arg DMA2D_FLAG_TW:  Transfer Watermark flag
 405   *            @arg DMA2D_FLAG_TC:  Transfer complete flag
 406   *            @arg DMA2D_FLAG_TE:  Transfer error flag
 407   * @retval The state of FLAG.
 408   */
 409 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
 410
 411 /**
 412   * @brief  Clear the DMA2D pending flags.
 413   * @param  __HANDLE__ DMA2D handle
 414   * @param  __FLAG__ specifies the flag to clear.
 415   *          This parameter can be any combination of the following values:
 416   *            @arg DMA2D_FLAG_CE:  Configuration error flag
 417   *            @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
 418   *            @arg DMA2D_FLAG_CAE: CLUT access error flag
 419   *            @arg DMA2D_FLAG_TW:  Transfer Watermark flag
 420   *            @arg DMA2D_FLAG_TC:  Transfer complete flag
 421   *            @arg DMA2D_FLAG_TE:  Transfer error flag
 422   * @retval None
 423   */
 424 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
 425
 426 /**
 427   * @brief  Enable the specified DMA2D interrupts.
 428   * @param  __HANDLE__ DMA2D handle
 429   * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be enabled.
 430   *          This parameter can be any combination of the following values:
 431   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask
 432   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
 433   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask
 434   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask
 435   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask
 436   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask
 437   * @retval None
 438   */
 439 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
 440
 441 /**
 442   * @brief  Disable the specified DMA2D interrupts.
 443   * @param  __HANDLE__ DMA2D handle
 444   * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be disabled.
 445   *          This parameter can be any combination of the following values:
 446   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask
 447   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
 448   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask
 449   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask
 450   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask
 451   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask
 452   * @retval None
 453   */
 454 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
 455
 456 /**
 457   * @brief  Check whether the specified DMA2D interrupt source is enabled or not.
 458   * @param  __HANDLE__ DMA2D handle
 459   * @param  __INTERRUPT__ specifies the DMA2D interrupt source to check.
 460   *          This parameter can be one of the following values:
 461   *            @arg DMA2D_IT_CE:  Configuration error interrupt mask
 462   *            @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
 463   *            @arg DMA2D_IT_CAE: CLUT access error interrupt mask
 464   *            @arg DMA2D_IT_TW:  Transfer Watermark interrupt mask
 465   *            @arg DMA2D_IT_TC:  Transfer complete interrupt mask
 466   *            @arg DMA2D_IT_TE:  Transfer error interrupt mask
 467   * @retval The state of INTERRUPT source.
 468   */
 469 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
 470
 471 /**
 472   * @}
 473   */
 474
 475 /* Exported functions --------------------------------------------------------*/
 476 /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions
 477   * @{
 478   */
 479
 480 /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
 481   * @{
 482   */
 483
 484 /* Initialization and de-initialization functions *******************************/
 485 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
 486 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
 487 void              HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
 488 void              HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
 489 /* Callbacks Register/UnRegister functions  ***********************************/
 490 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
 491 HAL_StatusTypeDef HAL_DMA2D_RegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID, pDMA2D_CallbackTypeDef pCallback);
 492 HAL_StatusTypeDef HAL_DMA2D_UnRegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID);
 493 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
 494
 495 /**
 496   * @}
 497   */
 498
 499
 500 /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions
 501   * @{
 502   */
 503
 504 /* IO operation functions *******************************************************/
 505 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
 506 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width,  uint32_t Height);
 507 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
 508 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
 509 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
 510 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
 511 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
 512 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
 513 HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx);
 514 HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx);
 515 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
 516 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
 517 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
 518 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
 519 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
 520 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
 521 void              HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
 522 void              HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
 523 void              HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);
 524
 525 /**
 526   * @}
 527   */
 528
 529 /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
 530   * @{
 531   */
 532
 533 /* Peripheral Control functions *************************************************/
 534 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
 535 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
 536 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
 537 HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
 538 HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
 539 HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);
 540
 541 /**
 542   * @}
 543   */
 544
 545 /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
 546   * @{
 547   */
 548
 549 /* Peripheral State functions ***************************************************/
 550 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
 551 uint32_t               HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
 552
 553 /**
 554   * @}
 555   */
 556
 557 /**
 558   * @}
 559   */
 560
 561 /* Private constants ---------------------------------------------------------*/
 562
 563 /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants
 564   * @{
 565   */
 566
 567 /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark
 568   * @{
 569   */
 570 #define DMA2D_LINE_WATERMARK_MAX            DMA2D_LWR_LW       /*!< DMA2D maximum line watermark */
 571 /**
 572   * @}
 573   */
 574
 575 /** @defgroup DMA2D_Color_Value DMA2D Color Value
 576   * @{
 577   */
 578 #define DMA2D_COLOR_VALUE                 0x000000FFU  /*!< Color value mask */
 579 /**
 580   * @}
 581   */
 582
 583 /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers
 584   * @{
 585   */
 586 #define DMA2D_MAX_LAYER         2U         /*!< DMA2D maximum number of layers */
 587 /**
 588   * @}
 589   */
 590
 591 /** @defgroup DMA2D_Layers DMA2D Layers
 592   * @{
 593   */
 594 #define DMA2D_BACKGROUND_LAYER             0x00000000U   /*!< DMA2D Background Layer (layer 0) */
 595 #define DMA2D_FOREGROUND_LAYER             0x00000001U   /*!< DMA2D Foreground Layer (layer 1) */
 596 /**
 597   * @}
 598   */
 599
 600 /** @defgroup DMA2D_Offset DMA2D Offset
 601   * @{
 602   */
 603 #define DMA2D_OFFSET                DMA2D_FGOR_LO            /*!< maximum Line Offset */
 604 /**
 605   * @}
 606   */
 607
 608 /** @defgroup DMA2D_Size DMA2D Size
 609   * @{
 610   */
 611 #define DMA2D_PIXEL                 (DMA2D_NLR_PL >> 16U)    /*!< DMA2D maximum number of pixels per line */
 612 #define DMA2D_LINE                  DMA2D_NLR_NL             /*!< DMA2D maximum number of lines           */
 613 /**
 614   * @}
 615   */
 616
 617 /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size
 618   * @{
 619   */
 620 #define DMA2D_CLUT_SIZE             (DMA2D_FGPFCCR_CS >> 8U)  /*!< DMA2D maximum CLUT size */
 621 /**
 622   * @}
 623   */
 624
 625 /**
 626   * @}
 627   */
 628
 629
 630 /* Private macros ------------------------------------------------------------*/
 631 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
 632   * @{
 633   */
 634 #define IS_DMA2D_LAYER(LAYER)                 (((LAYER) == DMA2D_BACKGROUND_LAYER) || ((LAYER) == DMA2D_FOREGROUND_LAYER))
 635
 636 #define IS_DMA2D_MODE(MODE)                   (((MODE) == DMA2D_M2M)          || ((MODE) == DMA2D_M2M_PFC) || \
 637                                                ((MODE) == DMA2D_M2M_BLEND)    || ((MODE) == DMA2D_R2M)     || \
 638                                                ((MODE) == DMA2D_M2M_BLEND_FG) || ((MODE) == DMA2D_M2M_BLEND_BG))
 639
 640 #define IS_DMA2D_CMODE(MODE_ARGB)             (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888)   || \
 641                                                ((MODE_ARGB) == DMA2D_OUTPUT_RGB565)   || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
 642                                                ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
 643
 644 #define IS_DMA2D_COLOR(COLOR)                 ((COLOR) <= DMA2D_COLOR_VALUE)
 645 #define IS_DMA2D_LINE(LINE)                   ((LINE) <= DMA2D_LINE)
 646 #define IS_DMA2D_PIXEL(PIXEL)                 ((PIXEL) <= DMA2D_PIXEL)
 647 #define IS_DMA2D_OFFSET(OOFFSET)              ((OOFFSET) <= DMA2D_OFFSET)
 648
 649 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM)   (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888)   || \
 650                                                ((INPUT_CM) == DMA2D_INPUT_RGB565)   || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
 651                                                ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8)       || \
 652                                                ((INPUT_CM) == DMA2D_INPUT_AL44)     || ((INPUT_CM) == DMA2D_INPUT_AL88)     || \
 653                                                ((INPUT_CM) == DMA2D_INPUT_L4)       || ((INPUT_CM) == DMA2D_INPUT_A8)       || \
 654                                                ((INPUT_CM) == DMA2D_INPUT_A4)       || ((INPUT_CM) == DMA2D_INPUT_YCBCR))
 655
 656 #define IS_DMA2D_ALPHA_MODE(AlphaMode)        (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
 657                                                ((AlphaMode) == DMA2D_REPLACE_ALPHA)  || \
 658                                                ((AlphaMode) == DMA2D_COMBINE_ALPHA))
 659
 660 #define IS_DMA2D_ALPHA_INVERTED(Alpha_Inverted) (((Alpha_Inverted) == DMA2D_REGULAR_ALPHA) || \
 661                                                  ((Alpha_Inverted) == DMA2D_INVERTED_ALPHA))
 662
 663 #define IS_DMA2D_RB_SWAP(RB_Swap) (((RB_Swap) == DMA2D_RB_REGULAR) || \
 664                                    ((RB_Swap) == DMA2D_RB_SWAP))
 665
 666 #define IS_DMA2D_LOM_MODE(LOM)          (((LOM) == DMA2D_LOM_PIXELS) || \
 667                                          ((LOM) == DMA2D_LOM_BYTES))
 668
 669 #define IS_DMA2D_BYTES_SWAP(BYTES_SWAP) (((BYTES_SWAP) == DMA2D_BYTES_REGULAR) || \
 670                                          ((BYTES_SWAP) == DMA2D_BYTES_SWAP))
 671
 672 #define IS_DMA2D_CHROMA_SUB_SAMPLING(CSS) (((CSS) == DMA2D_NO_CSS)  || \
 673                                            ((CSS) == DMA2D_CSS_422) || \
 674                                            ((CSS) == DMA2D_CSS_420))
 675
 676 #define IS_DMA2D_CLUT_CM(CLUT_CM)             (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
 677 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE)         ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
 678 #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
 679 #define IS_DMA2D_IT(IT)                       (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
 680                                                ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
 681                                                ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
 682 #define IS_DMA2D_GET_FLAG(FLAG)               (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
 683                                                ((FLAG) == DMA2D_FLAG_TW)   || ((FLAG) == DMA2D_FLAG_TC)  || \
 684                                                ((FLAG) == DMA2D_FLAG_TE)   || ((FLAG) == DMA2D_FLAG_CE))
 685 /**
 686   * @}
 687   */
 688
 689 /**
 690   * @}
 691   */
 692
 693 #endif /* defined (DMA2D) */
 694
 695 /**
 696   * @}
 697   */
 698
 699 #ifdef __cplusplus
 700 }
 701 #endif
 702
 703 #endif /* STM32H7xx_HAL_DMA2D_H */
 704
 705
 706 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/