?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_exti.h
blob18cffec8a7ded8a157b908c00a675fce9dfa6404
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_EXTI_H
22 #define STM32H7xx_HAL_EXTI_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
33 */
34
35 /** @defgroup EXTI EXTI
36 * @brief EXTI HAL module driver
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41
42 /** @defgroup EXTI_Exported_Types EXTI Exported Types
43 * @{
44 */
45 typedef enum
46 {
47 HAL_EXTI_COMMON_CB_ID = 0x00U,
48 } EXTI_CallbackIDTypeDef;
49
50
51 /**
52 * @brief EXTI Handle structure definition
53 */
54 typedef struct
55 {
56 uint32_t Line; /*!< Exti line number */
57 void (* PendingCallback)(void); /*!< Exti pending callback */
58 } EXTI_HandleTypeDef;
59
60 /**
61 * @brief EXTI Configuration structure definition
62 */
63 typedef struct
64 {
65 uint32_t Line; /*!< The Exti line to be configured. This parameter
66 can be a value of @ref EXTI_Line */
67 uint32_t Mode; /*!< The Exit Mode to be configured for a core.
68 This parameter can be a combination of @ref EXTI_Mode */
69 uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
70 can be a value of @ref EXTI_Trigger */
71 uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
72 This parameter is only possible for line 0 to 15. It
73 can be a value of @ref EXTI_GPIOSel */
74
75 uint32_t PendClearSource; /*!< Specifies the event pending clear source for D3/SRD
76 domain. This parameter can be a value of @ref
77 EXTI_PendClear_Source */
78
79 } EXTI_ConfigTypeDef;
80
81 /**
82 * @}
83 */
84
85 /* Exported constants --------------------------------------------------------*/
86 /** @defgroup EXTI_Exported_Constants EXTI Exported Constants
87 * @{
88 */
89
90 /** @defgroup EXTI_Line EXTI Line
91 * @{
92 */
93 #define EXTI_LINE_0 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x00U)
94 #define EXTI_LINE_1 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x01U)
95 #define EXTI_LINE_2 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x02U)
96 #define EXTI_LINE_3 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x03U)
97 #define EXTI_LINE_4 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x04U)
98 #define EXTI_LINE_5 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x05U)
99 #define EXTI_LINE_6 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x06U)
100 #define EXTI_LINE_7 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x07U)
101 #define EXTI_LINE_8 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x08U)
102 #define EXTI_LINE_9 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x09U)
103 #define EXTI_LINE_10 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0AU)
104 #define EXTI_LINE_11 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0BU)
105 #define EXTI_LINE_12 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0CU)
106 #define EXTI_LINE_13 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0DU)
107 #define EXTI_LINE_14 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0EU)
108 #define EXTI_LINE_15 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0FU)
109 #define EXTI_LINE_16 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x10U)
110 #define EXTI_LINE_17 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x11U)
111 #define EXTI_LINE_18 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x12U)
112 #define EXTI_LINE_19 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x13U)
113 #define EXTI_LINE_20 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x14U)
114 #define EXTI_LINE_21 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x15U)
115 #define EXTI_LINE_22 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x16U)
116 #define EXTI_LINE_23 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x17U)
117 #define EXTI_LINE_24 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x18U)
118 #define EXTI_LINE_25 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x19U)
119 #define EXTI_LINE_26 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU)
120 #define EXTI_LINE_27 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU)
121 #define EXTI_LINE_28 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU)
122 #define EXTI_LINE_29 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU)
123 #define EXTI_LINE_30 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU)
124 #define EXTI_LINE_31 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU)
125 #define EXTI_LINE_32 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x00U)
126 #define EXTI_LINE_33 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x01U)
127 #define EXTI_LINE_34 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x02U)
128 #define EXTI_LINE_35 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x03U)
129 #define EXTI_LINE_36 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x04U)
130 #define EXTI_LINE_37 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x05U)
131 #define EXTI_LINE_38 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x06U)
132 #define EXTI_LINE_39 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x07U)
133 #define EXTI_LINE_40 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x08U)
134 #define EXTI_LINE_41 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x09U)
135 #define EXTI_LINE_42 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU)
136 #define EXTI_LINE_43 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU)
137 #if !defined(USB2_OTG_FS)
138 #define EXTI_LINE_44 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0CU)
139 #else
140 #define EXTI_LINE_44 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU)
141 #endif /* USB2_OTG_FS */
142 #define EXTI_LINE_45 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0DU)
143 #if defined(DSI)
144 #define EXTI_LINE_46 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0EU)
145 #else
146 #define EXTI_LINE_46 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0EU)
147 #endif /* DSI */
148 #define EXTI_LINE_47 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0FU)
149 #define EXTI_LINE_48 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x10U)
150 #define EXTI_LINE_49 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x11U)
151 #define EXTI_LINE_50 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x12U)
152 #define EXTI_LINE_51 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x13U)
153 #if defined(LPTIM4)
154 #define EXTI_LINE_52 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x14U)
155 #else
156 #define EXTI_LINE_52 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x14U)
157 #endif /*LPTIM4*/
158 #if defined(LPTIM5)
159 #define EXTI_LINE_53 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x15U)
160 #else
161 #define EXTI_LINE_53 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x15U)
162 #endif /*LPTIM5*/
163 #define EXTI_LINE_54 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x16U)
164 #define EXTI_LINE_55 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x17U)
165 #define EXTI_LINE_56 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x18U)
166 #if defined(EXTI_IMR2_IM57)
167 #define EXTI_LINE_57 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x19U)
168 #else
169 #define EXTI_LINE_57 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x19U)
170 #endif /*EXTI_IMR2_IM57*/
171 #define EXTI_LINE_58 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU)
172 #if defined(EXTI_IMR2_IM59)
173 #define EXTI_LINE_59 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU)
174 #else
175 #define EXTI_LINE_59 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x1BU)
176 #endif /*EXTI_IMR2_IM59*/
177 #define EXTI_LINE_60 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU)
178 #define EXTI_LINE_61 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU)
179 #define EXTI_LINE_62 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU)
180 #define EXTI_LINE_63 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU)
181 #define EXTI_LINE_64 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x00U)
182 #define EXTI_LINE_65 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x01U)
183 #define EXTI_LINE_66 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x02U)
184 #define EXTI_LINE_67 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x03U)
185 #define EXTI_LINE_68 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x04U)
186 #define EXTI_LINE_69 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x05U)
187 #define EXTI_LINE_70 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x06U)
188 #define EXTI_LINE_71 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x07U)
189 #define EXTI_LINE_72 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x08U)
190 #define EXTI_LINE_73 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x09U)
191 #define EXTI_LINE_74 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU)
192 #if defined(ADC3)
193 #define EXTI_LINE_75 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU)
194 #else
195 #define EXTI_LINE_75 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE | 0x0BU)
196 #endif /* ADC3 */
197 #if defined(SAI4)
198 #define EXTI_LINE_76 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU)
199 #else
200 #define EXTI_LINE_76 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE | 0x0CU)
201 #endif /* SAI4 */
202 #if defined (DUAL_CORE)
203 #define EXTI_LINE_77 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0DU)
204 #define EXTI_LINE_78 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x0EU)
205 #define EXTI_LINE_79 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0FU)
206 #define EXTI_LINE_80 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x10U)
207 #else
208 #define EXTI_LINE_77 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0DU)
209 #define EXTI_LINE_78 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0EU)
210 #define EXTI_LINE_79 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0FU)
211 #define EXTI_LINE_80 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x10U)
212 #endif /* DUAL_CORE */
213 #define EXTI_LINE_81 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x11U)
214 #if defined (DUAL_CORE)
215 #define EXTI_LINE_82 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x12U)
216 #else
217 #define EXTI_LINE_82 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x12U)
218 #endif /* DUAL_CORE */
219 #define EXTI_LINE_83 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x13U)
220 #if defined (DUAL_CORE)
221 #define EXTI_LINE_84 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x14U)
222 #else
223 #define EXTI_LINE_84 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x14U)
224 #endif /* DUAL_CORE */
225 #define EXTI_LINE_85 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x15U)
226 #if defined(ETH)
227 #define EXTI_LINE_86 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x16U)
228 #else
229 #define EXTI_LINE_86 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x16U)
230 #endif /* ETH */
231 #define EXTI_LINE_87 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x17U)
232 #if defined(DTS)
233 #define EXTI_LINE_88 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL | 0x18U)
234 #endif /* DTS */
235 #if defined(EXTI_IMR3_IM89)
236 #define EXTI_LINE_89 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x19U)
237 #endif /*EXTI_IMR3_IM89*/
238 #if defined(EXTI_IMR3_IM90)
239 #define EXTI_LINE_90 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU)
240 #endif /*EXTI_IMR3_IM90*/
241 #if defined(I2C5)
242 #define EXTI_LINE_91 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU)
243 #endif /*I2C5*/
244
245 /**
246 * @}
247 */
248
249 /** @defgroup EXTI_Mode EXTI Mode
250 * @{
251 */
252 #define EXTI_MODE_NONE 0x00000000U
253 #define EXTI_MODE_INTERRUPT 0x00000001U
254 #define EXTI_MODE_EVENT 0x00000002U
255 #if defined(DUAL_CORE)
256 #define EXTI_MODE_CORE1_INTERRUPT EXTI_MODE_INTERRUPT
257 #define EXTI_MODE_CORE1_EVENT EXTI_MODE_EVENT
258 #define EXTI_MODE_CORE2_INTERRUPT 0x00000010U
259 #define EXTI_MODE_CORE2_EVENT 0x00000020U
260 #endif /* DUAL_CORE */
261 /**
262 * @}
263 */
264
265 /** @defgroup EXTI_Trigger EXTI Trigger
266 * @{
267 */
268 #define EXTI_TRIGGER_NONE 0x00000000U
269 #define EXTI_TRIGGER_RISING 0x00000001U
270 #define EXTI_TRIGGER_FALLING 0x00000002U
271 #define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
272 /**
273 * @}
274 */
275
276 /** @defgroup EXTI_GPIOSel EXTI GPIOSel
277 * @brief
278 * @{
279 */
280 #define EXTI_GPIOA 0x00000000U
281 #define EXTI_GPIOB 0x00000001U
282 #define EXTI_GPIOC 0x00000002U
283 #define EXTI_GPIOD 0x00000003U
284 #define EXTI_GPIOE 0x00000004U
285 #define EXTI_GPIOF 0x00000005U
286 #define EXTI_GPIOG 0x00000006U
287 #define EXTI_GPIOH 0x00000007U
288 #if defined(GPIOI)
289 #define EXTI_GPIOI 0x00000008U
290 #endif /*GPIOI*/
291 #define EXTI_GPIOJ 0x00000009U
292 #define EXTI_GPIOK 0x0000000AU
293
294 /**
295 * @}
296 */
297
298 /** @defgroup EXTI_PendClear_Source EXTI PendClear Source
299 * @brief
300 * @{
301 */
302 #define EXTI_D3_PENDCLR_SRC_NONE 0x00000000U /*!< No D3 domain pendclear source , PMRx register to be set to zero */
303 #define EXTI_D3_PENDCLR_SRC_DMACH6 0x00000001U /*!< DMA ch6 event selected as D3 domain pendclear source, PMRx register to be set to 1 */
304 #define EXTI_D3_PENDCLR_SRC_DMACH7 0x00000002U /*!< DMA ch7 event selected as D3 domain pendclear source, PMRx register to be set to 1*/
305 #if defined (LPTIM4)
306 #define EXTI_D3_PENDCLR_SRC_LPTIM4 0x00000003U /*!< LPTIM4 out selected as D3 domain pendclear source, PMRx register to be set to 1 */
307 #else
308 #define EXTI_D3_PENDCLR_SRC_LPTIM2 0x00000003U /*!< LPTIM2 out selected as D3 domain pendclear source, PMRx register to be set to 1 */
309 #endif
310 #if defined (LPTIM5)
311 #define EXTI_D3_PENDCLR_SRC_LPTIM5 0x00000004U /*!< LPTIM5 out selected as D3 domain pendclear source, PMRx register to be set to 1 */
312 #else
313 #define EXTI_D3_PENDCLR_SRC_LPTIM3 0x00000004U /*!< LPTIM3 out selected as D3 domain pendclear source, PMRx register to be set to 1 */
314 #endif
315 /**
316 * @}
317 */
318
319 /**
320 * @}
321 */
322
323 /* Exported macro ------------------------------------------------------------*/
324 /** @defgroup EXTI_Exported_Macros EXTI Exported Macros
325 * @{
326 */
327
328 /**
329 * @}
330 */
331
332 /* Private constants --------------------------------------------------------*/
333 /** @defgroup EXTI_Private_Constants EXTI Private Constants
334 * @{
335 */
336 /**
337 * @brief EXTI Line property definition
338 */
339 #define EXTI_PROPERTY_SHIFT 24U
340 #define EXTI_DIRECT (0x01UL << EXTI_PROPERTY_SHIFT)
341 #define EXTI_CONFIG (0x02UL << EXTI_PROPERTY_SHIFT)
342 #define EXTI_GPIO ((0x04UL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
343 #define EXTI_RESERVED (0x08UL << EXTI_PROPERTY_SHIFT)
344 #define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO)
345
346 /**
347 * @brief EXTI Event presence definition
348 */
349 #define EXTI_EVENT_PRESENCE_SHIFT 28U
350 #define EXTI_EVENT (0x01UL << EXTI_EVENT_PRESENCE_SHIFT)
351 #define EXTI_EVENT_PRESENCE_MASK (EXTI_EVENT)
352
353 /**
354 * @brief EXTI Register and bit usage
355 */
356 #define EXTI_REG_SHIFT 16U
357 #define EXTI_REG1 (0x00UL << EXTI_REG_SHIFT)
358 #define EXTI_REG2 (0x01UL << EXTI_REG_SHIFT)
359 #define EXTI_REG3 (0x02UL << EXTI_REG_SHIFT)
360 #define EXTI_REG_MASK (EXTI_REG1 | EXTI_REG2 | EXTI_REG3)
361 #define EXTI_PIN_MASK 0x0000001FUL
362
363 /**
364 * @brief EXTI Target and bit usage
365 */
366 #define EXTI_TARGET_SHIFT 20U
367 #define EXTI_TARGET_MSK_NONE (0x00UL << EXTI_TARGET_SHIFT)
368 #define EXTI_TARGET_MSK_D3SRD (0x01UL << EXTI_TARGET_SHIFT)
369 #define EXTI_TARGET_MSK_CPU1 (0x02UL << EXTI_TARGET_SHIFT)
370 #if defined (DUAL_CORE)
371 #define EXTI_TARGET_MSK_CPU2 (0x04UL << EXTI_TARGET_SHIFT)
372 #define EXTI_TARGET_MASK (EXTI_TARGET_MSK_D3SRD | EXTI_TARGET_MSK_CPU1 | EXTI_TARGET_MSK_CPU2)
373 #define EXTI_TARGET_MSK_ALL_CPU (EXTI_TARGET_MSK_CPU1 | EXTI_TARGET_MSK_CPU2)
374 #else
375 #define EXTI_TARGET_MASK (EXTI_TARGET_MSK_D3SRD | EXTI_TARGET_MSK_CPU1)
376 #define EXTI_TARGET_MSK_ALL_CPU EXTI_TARGET_MSK_CPU1
377 #endif /* DUAL_CORE */
378 #define EXTI_TARGET_MSK_ALL EXTI_TARGET_MASK
379
380 /**
381 * @brief EXTI Mask for interrupt & event mode
382 */
383 #if defined (DUAL_CORE)
384 #define EXTI_MODE_MASK (EXTI_MODE_CORE1_EVENT | EXTI_MODE_CORE1_INTERRUPT | EXTI_MODE_CORE2_INTERRUPT | EXTI_MODE_CORE2_EVENT)
385 #else
386 #define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
387 #endif /* DUAL_CORE */
388
389 /**
390 * @brief EXTI Mask for trigger possibilities
391 */
392 #define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
393
394 /**
395 * @brief EXTI Line number
396 */
397 #if (STM32H7_DEV_ID == 0x483UL)
398 #define EXTI_LINE_NB 92UL
399 #elif (STM32H7_DEV_ID == 0x480UL)
400 #define EXTI_LINE_NB 89UL
401 #else
402 #define EXTI_LINE_NB 88UL
403 #endif /* EXTI_LINE_91 */
404
405 /**
406 * @}
407 */
408
409 /* Private macros ------------------------------------------------------------*/
410 /** @defgroup EXTI_Private_Macros EXTI Private Macros
411 * @{
412 */
413 #define IS_EXTI_PROPERTY(__LINE__) ((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
414 (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
415 (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO))
416 #if defined (DUAL_CORE)
417 #define IS_EXTI_TARGET(__LINE__) ((((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU1) || \
418 (((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU2) || \
419 (((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL_CPU) || \
420 (((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL))
421 #else
422 #define IS_EXTI_TARGET(__LINE__) ((((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU1) || \
423 (((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL))
424 #endif
425
426 #define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_EVENT_PRESENCE_MASK | EXTI_REG_MASK | EXTI_PIN_MASK | EXTI_TARGET_MASK)) == 0x00UL) && \
427 IS_EXTI_PROPERTY(__LINE__) && IS_EXTI_TARGET(__LINE__) && \
428 (((__LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \
429 (((EXTI_LINE_NB / 32UL) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32UL))))
430
431 #define IS_EXTI_MODE(__MODE__) (((__MODE__) & ~EXTI_MODE_MASK) == 0x00UL)
432
433 #define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00UL)
434
435 #define IS_EXTI_PENDING_EDGE(__LINE__) (((__LINE__) == EXTI_TRIGGER_RISING) || \
436 ((__LINE__) == EXTI_TRIGGER_FALLING)|| \
437 ((__LINE__) == EXTI_TRIGGER_RISING_FALLING))
438
439 #define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00UL)
440
441 #if defined(GPIOI)
442 #define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
443 ((__PORT__) == EXTI_GPIOB) || \
444 ((__PORT__) == EXTI_GPIOC) || \
445 ((__PORT__) == EXTI_GPIOD) || \
446 ((__PORT__) == EXTI_GPIOE) || \
447 ((__PORT__) == EXTI_GPIOF) || \
448 ((__PORT__) == EXTI_GPIOG) || \
449 ((__PORT__) == EXTI_GPIOH) || \
450 ((__PORT__) == EXTI_GPIOI) || \
451 ((__PORT__) == EXTI_GPIOJ) || \
452 ((__PORT__) == EXTI_GPIOK))
453 #else
454 #define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
455 ((__PORT__) == EXTI_GPIOB) || \
456 ((__PORT__) == EXTI_GPIOC) || \
457 ((__PORT__) == EXTI_GPIOD) || \
458 ((__PORT__) == EXTI_GPIOE) || \
459 ((__PORT__) == EXTI_GPIOF) || \
460 ((__PORT__) == EXTI_GPIOG) || \
461 ((__PORT__) == EXTI_GPIOH) || \
462 ((__PORT__) == EXTI_GPIOJ) || \
463 ((__PORT__) == EXTI_GPIOK))
464 #endif /*GPIOI*/
465
466 #define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16UL)
467 #if defined (LPTIM4) && defined (LPTIM5)
468 #define IS_EXTI_D3_PENDCLR_SRC(__SRC__) (((__SRC__) == EXTI_D3_PENDCLR_SRC_NONE) || \
469 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH6) || \
470 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH7) || \
471 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM4) || \
472 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM5))
473 #else
474 #define IS_EXTI_D3_PENDCLR_SRC(__SRC__) (((__SRC__) == EXTI_D3_PENDCLR_SRC_NONE) || \
475 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH6) || \
476 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH7) || \
477 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM2) || \
478 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM3))
479 #endif /* LPTIM4 && LPTIM5 */
480
481 /**
482 * @}
483 */
484
485
486 /* Exported functions --------------------------------------------------------*/
487 /** @defgroup EXTI_Exported_Functions EXTI Exported Functions
488 * @brief EXTI Exported Functions
489 * @{
490 */
491
492 /** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
493 * @brief Configuration functions
494 * @{
495 */
496 /* Configuration functions ****************************************************/
497 HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
498 HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
499 HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
500 HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
501 HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
502 /**
503 * @}
504 */
505
506 /** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
507 * @brief IO operation functions
508 * @{
509 */
510 /* IO operation functions *****************************************************/
511 void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
512 uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
513 void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
514 void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
515
516 /**
517 * @}
518 */
519
520 /**
521 * @}
522 */
523
524 /**
525 * @}
526 */
527
528 /**
529 * @}
530 */
531
532 #ifdef __cplusplus
533 }
534 #endif
535
536 #endif /* STM32H7xx_HAL_EXTI_H */
537
538 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/