Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_gfxmmu.h
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_gfxmmu.h
4 * @author MCD Application Team
5 * @brief Header file of GFXMMU HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_GFXMMU_H
22 #define STM32H7xx_HAL_GFXMMU_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
31 #if defined(GFXMMU)
33 /** @addtogroup STM32H7xx_HAL_Driver
34 * @{
37 /** @addtogroup GFXMMU
38 * @{
39 */
41 /* Exported types ------------------------------------------------------------*/
42 /** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types
43 * @{
46 /**
47 * @brief HAL GFXMMU states definition
49 typedef enum
51 HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized */
52 HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use */
53 }HAL_GFXMMU_StateTypeDef;
55 /**
56 * @brief GFXMMU buffers structure definition
58 typedef struct
60 uint32_t Buf0Address; /*!< Physical address of buffer 0. */
61 uint32_t Buf1Address; /*!< Physical address of buffer 1. */
62 uint32_t Buf2Address; /*!< Physical address of buffer 2. */
63 uint32_t Buf3Address; /*!< Physical address of buffer 3. */
64 }GFXMMU_BuffersTypeDef;
66 /**
67 * @brief GFXMMU cache and pre-fetch structure definition
69 typedef struct
71 FunctionalState Activation; /*!< Cache and pre-fetch enable/disable.
72 @note: All following parameters are usefull only if cache and pre-fetch are enabled. */
73 uint32_t CacheLock; /*!< Locking the cache to a buffer.
74 This parameter can be a value of @ref GFXMMU_CacheLock. */
75 uint32_t CacheLockBuffer; /*!< Buffer on which the cache is locked.
76 This parameter can be a value of @ref GFXMMU_CacheLockBuffer.
77 @note: Usefull only when lock of the cache is enabled. */
78 uint32_t CacheForce; /*!< Forcing the cache regardless MPU attributes.
79 This parameter can be a value of @ref GFXMMU_CacheForce.
80 @note: Usefull only when lock of the cache is enabled. */
81 uint32_t OutterBufferability; /*!< Bufferability of an access generated by the GFXMMU cache.
82 This parameter can be a value of @ref GFXMMU_OutterBufferability. */
83 uint32_t OutterCachability; /*!< Cachability of an access generated by the GFXMMU cache.
84 This parameter can be a value of @ref GFXMMU_OutterCachability. */
85 uint32_t Prefetch; /*!< Pre-fetch enable/disable.
86 This parameter can be a value of @ref GFXMMU_Prefetch. */
87 }GFXMMU_CachePrefetchTypeDef;
89 /**
90 * @brief GFXMMU interrupts structure definition
92 typedef struct
94 FunctionalState Activation; /*!< Interrupts enable/disable */
95 uint32_t UsedInterrupts; /*!< Interrupts used.
96 This parameter can be a values combination of @ref GFXMMU_Interrupts.
97 @note: Usefull only when interrupts are enabled. */
98 }GFXMMU_InterruptsTypeDef;
100 /**
101 * @brief GFXMMU init structure definition
103 typedef struct
105 uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line.
106 This parameter can be a value of @ref GFXMMU_BlocksPerLine. */
107 uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */
108 GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */
109 GFXMMU_CachePrefetchTypeDef CachePrefetch; /*!< Cache and pre-fetch parameters. */
110 GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */
111 }GFXMMU_InitTypeDef;
113 /**
114 * @brief GFXMMU handle structure definition
116 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
117 typedef struct __GFXMMU_HandleTypeDef
118 #else
119 typedef struct
120 #endif
122 GFXMMU_TypeDef *Instance; /*!< GFXMMU instance */
123 GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters */
124 HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state */
125 __IO uint32_t ErrorCode; /*!< GFXMMU error code */
126 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
127 void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback */
128 void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback */
129 void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback */
130 #endif
131 }GFXMMU_HandleTypeDef;
133 /**
134 * @brief GFXMMU LUT line structure definition
136 typedef struct
138 uint32_t LineNumber; /*!< LUT line number.
139 This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */
140 uint32_t LineStatus; /*!< LUT line enable/disable.
141 This parameter can be a value of @ref GFXMMU_LutLineStatus. */
142 uint32_t FirstVisibleBlock; /*!< First visible block on this line.
143 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
144 uint32_t LastVisibleBlock; /*!< Last visible block on this line.
145 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
146 int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer.
147 This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208.
148 @note: Line offset has to be computed with the following formula:
149 LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */
150 }GFXMMU_LutLineTypeDef;
152 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
154 * @brief GFXMMU callback ID enumeration definition
156 typedef enum
158 HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID */
159 HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID */
160 HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID */
161 }HAL_GFXMMU_CallbackIDTypeDef;
164 * @brief GFXMMU callback pointer definition
166 typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu);
167 #endif
170 * @}
172 /* End of exported types -----------------------------------------------------*/
174 /* Exported constants --------------------------------------------------------*/
175 /** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants
176 * @{
179 /** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line
180 * @{
182 #define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */
183 #define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */
185 * @}
188 /** @defgroup GFXMMU_CacheLock GFXMMU cache lock
189 * @{
191 #define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U /*!< Cache not locked to a buffer */
192 #define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL /*!< Cache locked to a buffer */
194 * @}
197 /** @defgroup GFXMMU_CacheLockBuffer GFXMMU cache lock buffer
198 * @{
200 #define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U /*!< Cache locked to buffer 0 */
201 #define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0 /*!< Cache locked to buffer 1 */
202 #define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1 /*!< Cache locked to buffer 2 */
203 #define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB /*!< Cache locked to buffer 3 */
205 * @}
208 /** @defgroup GFXMMU_CacheForce GFXMMU cache force
209 * @{
211 #define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U /*!< Caching not forced */
212 #define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC /*!< Caching forced */
214 * @}
217 /** @defgroup GFXMMU_OutterBufferability GFXMMU outter bufferability
218 * @{
220 #define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U /*!< No bufferable */
221 #define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB /*!< Bufferable */
223 * @}
226 /** @defgroup GFXMMU_OutterCachability GFXMMU outter cachability
227 * @{
229 #define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U /*!< No cachable */
230 #define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC /*!< Cachable */
232 * @}
235 /** @defgroup GFXMMU_Prefetch GFXMMU pre-fetch
236 * @{
238 #define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD /*!< Pre-fetch disable */
239 #define GFXMMU_PREFETCH_ENABLE 0x00000000U /*!< Pre-fetch enable */
241 * @}
244 /** @defgroup GFXMMU_Interrupts GFXMMU interrupts
245 * @{
247 #define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt */
248 #define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt */
249 #define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt */
250 #define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt */
251 #define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt */
253 * @}
256 /** @defgroup GFXMMU_Error_Code GFXMMU Error Code
257 * @{
259 #define GFXMMU_ERROR_NONE 0x00000000U /*!< No error */
260 #define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow */
261 #define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow */
262 #define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow */
263 #define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow */
264 #define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error */
265 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
266 #define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */
267 #endif
269 * @}
272 /** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status
273 * @{
275 #define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled */
276 #define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled */
278 * @}
281 /** @defgroup GFXMMU_CacheForceParam GFXMMU cache force parameter
282 * @{
284 #define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF /*!< Force cache flush */
285 #define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI /*!< Force cache invalidate */
287 * @}
291 * @}
293 /* End of exported constants -------------------------------------------------*/
295 /* Exported macros -----------------------------------------------------------*/
296 /** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros
297 * @{
300 /** @brief Reset GFXMMU handle state.
301 * @param __HANDLE__ GFXMMU handle.
302 * @retval None
304 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
305 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \
306 (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \
307 (__HANDLE__)->MspInitCallback = NULL; \
308 (__HANDLE__)->MspDeInitCallback = NULL; \
309 } while(0)
310 #else
311 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET)
312 #endif
315 * @}
317 /* End of exported macros ----------------------------------------------------*/
319 /* Exported functions --------------------------------------------------------*/
320 /** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions
321 * @{
324 /** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions
325 * @{
327 /* Initialization and de-initialization functions *****************************/
328 HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu);
329 HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu);
330 void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu);
331 void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu);
332 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
333 /* GFXMMU callbacks register/unregister functions *****************************/
334 HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
335 HAL_GFXMMU_CallbackIDTypeDef CallbackID,
336 pGFXMMU_CallbackTypeDef pCallback);
337 HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
338 HAL_GFXMMU_CallbackIDTypeDef CallbackID);
339 #endif
341 * @}
344 /** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions
345 * @{
347 /* Operation functions ********************************************************/
348 HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu,
349 uint32_t FirstLine,
350 uint32_t LinesNumber,
351 uint32_t Address);
353 HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu,
354 uint32_t FirstLine,
355 uint32_t LinesNumber);
357 HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine);
359 HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam);
361 HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers);
363 HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu,
364 GFXMMU_CachePrefetchTypeDef *CachePrefetch);
366 void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu);
368 void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu);
370 * @}
373 /** @defgroup GFXMMU_Exported_Functions_Group3 State functions
374 * @{
376 /* State function *************************************************************/
377 HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu);
379 uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu);
381 * @}
385 * @}
387 /* End of exported functions -------------------------------------------------*/
389 /* Private macros ------------------------------------------------------------*/
390 /** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros
391 * @{
393 #define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \
394 ((VALUE) == GFXMMU_192BLOCKS))
396 #define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U)
398 #define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \
399 ((VALUE) == GFXMMU_CACHE_LOCK_ENABLE))
401 #define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \
402 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \
403 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \
404 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3))
406 #define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \
407 ((VALUE) == GFXMMU_CACHE_FORCE_ENABLE))
409 #define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \
410 ((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE))
412 #define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \
413 ((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE))
415 #define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \
416 ((VALUE) == GFXMMU_PREFETCH_ENABLE))
418 #define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U)
420 #define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U)
422 #define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U))
424 #define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \
425 ((VALUE) == GFXMMU_LUT_LINE_ENABLE))
427 #define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U)
429 #define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208))
431 #define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \
432 ((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \
433 ((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE)))
435 * @}
437 /* End of private macros -----------------------------------------------------*/
440 * @}
444 * @}
446 #endif /* GFXMMU */
447 #ifdef __cplusplus
449 #endif
451 #endif /* STM32H7xx_HAL_GFXMMU_H */
453 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/