Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_pssi.h
blob922fafa95c0856a841fe514fc2d1cb64fe4b6334
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_pssi.h
4 * @author MCD Application Team
5 * @brief Header file of PSSI HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_PSSI_H
22 #define STM32H7xx_HAL_PSSI_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
34 #if defined(PSSI)
35 /** @addtogroup PSSI PSSI
36 * @brief PSSI HAL module driver
37 * @{
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PSSI_Exported_Types PSSI Exported Types
42 * @{
46 /**
47 * @brief PSSI Init structure definition
49 typedef struct
51 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
52 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
53 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */
54 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */
55 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */
56 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */
58 } PSSI_InitTypeDef;
61 /**
62 * @brief HAL PSSI State structures definition
64 typedef enum
66 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */
67 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */
68 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */
69 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */
70 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */
71 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */
72 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */
73 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */
75 } HAL_PSSI_StateTypeDef;
77 /**
78 * @brief PSSI handle Structure definition
80 typedef struct __PSSI_HandleTypeDef
82 PSSI_TypeDef *Instance; /*!< PSSI register base address. */
83 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */
84 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */
85 uint32_t XferCount; /*!< PSSI transfer count */
86 uint32_t XferSize; /*!< PSSI transfer size */
87 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */
88 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */
90 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
91 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
92 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
93 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */
95 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */
96 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */
98 HAL_LockTypeDef Lock; /*!< PSSI lock. */
99 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */
100 __IO uint32_t ErrorCode; /*!< PSSI error code. */
102 } PSSI_HandleTypeDef;
106 * @brief HAL PSSI Callback pointer definition
108 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */
111 * @}
114 * @brief HAL PSSI Callback ID enumeration definition
116 typedef enum
118 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */
119 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */
120 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */
121 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */
123 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */
124 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */
126 } HAL_PSSI_CallbackIDTypeDef;
128 /* Exported constants --------------------------------------------------------*/
129 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants
130 * @{
133 /** @defgroup PSSI_Error_Code PSSI Error Code
134 * @{
136 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */
137 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */
138 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */
139 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */
140 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */
141 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */
142 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */
146 * @}
149 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width
150 * @{
153 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */
154 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */
155 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */
157 * @}
160 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width
161 * @{
164 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */
165 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */
167 * @}
169 /** @defgroup PSSI_MODE PSSI mode
170 * @{
172 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */
173 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */
175 * @}
178 /** @defgroup PSSI_ControlSignal Configuration
179 * @{
181 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */
182 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */
183 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */
184 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */
185 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */
186 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */
187 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */
188 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */
191 * @}
195 /** @defgroup PSSI_Data_Enable_Polarity Data Enable Polarity
196 * @{
198 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */
199 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */
201 * @}
203 /** @defgroup PSSI_Reday_Polarity Reday Polarity
204 * @{
206 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */
207 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */
209 * @}
212 /** @defgroup PSSI_Clock_Polarity Clock Polarity
213 * @{
215 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */
216 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */
220 * @}
224 /** @defgroup PSSI_DEFINITION PSSI definitions
225 * @{
228 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */
229 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */
231 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */
232 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */
234 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */
235 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disble */
237 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */
238 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */
240 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/
241 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/
246 * @}
249 /** @defgroup PSSI_Interrupts PSSI Interrupts
250 * @{
253 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */
254 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */
255 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */
257 * @}
263 * @}
265 /* Exported macros ------------------------------------------------------------*/
266 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros
267 * @{
270 /** @brief Reset PSSI handle state
271 * @param __HANDLE__ specifies the PSSI handle.
272 * @retval None
275 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \
276 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\
277 (__HANDLE__)->MspInitCallback = NULL; \
278 (__HANDLE__)->MspDeInitCallback = NULL; \
279 }while(0)
283 * @brief Enable the PSSI.
284 * @param __HANDLE__ PSSI handle
285 * @retval None.
287 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE)
289 * @brief Disable the PSSI.
290 * @param __HANDLE__ PSSI handle
291 * @retval None.
293 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE))
295 /* PSSI pripheral STATUS */
297 * @brief Get the PSSI pending flags.
298 * @param __HANDLE__ PSSI handle
299 * @param __FLAG__ flag to check.
300 * This parameter can be any combination of the following values:
301 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte
302 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes
303 * @retval The state of FLAG.
306 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
310 /* Interrupt & Flag management */
312 * @brief Get the PSSI pending flags.
313 * @param __HANDLE__ PSSI handle
314 * @param __FLAG__ flag to check.
315 * This parameter can be any combination of the following values:
316 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
317 * @retval The state of FLAG.
319 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__))
322 * @brief Clear the PSSI pending flags.
323 * @param __HANDLE__ PSSI handle
324 * @param __FLAG__ specifies the flag to clear.
325 * This parameter can be any combination of the following values:
326 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
327 * @retval None
329 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
332 * @brief Enable the specified PSSI interrupts.
333 * @param __HANDLE__ PSSI handle
334 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled.
335 * This parameter can be any combination of the following values:
336 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask
337 * @retval None
339 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
342 * @brief Disable the specified PSSI interrupts.
343 * @param __HANDLE__ PSSI handle
344 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled.
345 * This parameter can be any combination of the following values:
346 * @arg PSSI_IT_OVR_IE: Configuration error mask
347 * @retval None
349 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
352 * @brief Check whether the specified PSSI interrupt source is enabled or not.
353 * @param __HANDLE__ PSSI handle
354 * @param __INTERRUPT__ specifies the PSSI interrupt source to check.
355 * This parameter can be one of the following values:
356 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask
357 * @retval The state of INTERRUPT source.
359 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
362 * @brief Check whether the PSSI Control signal is valid.
363 * @param __CONTROL__ Control signals configuration
364 * @retval Valid or not.
367 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \
368 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \
369 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \
370 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \
371 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \
372 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \
373 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \
374 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE ))
376 * @brief Check whether the PSSI Bus Width is valid.
377 * @param __BUSWIDTH__ PSSI Bush width
378 * @retval Valid or not.
381 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \
382 ((__BUSWIDTH__) == HAL_PSSI_16LINES ))
385 * @brief Check whether the PSSI Clock Polarity is valid.
386 * @param __CLOCKPOL__ PSSI Clock Polarity
387 * @retval Valid or not.
390 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \
391 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE ))
393 * @brief Check whether the PSSI Data Enable Polarity is valid.
394 * @param __DEPOL__ PSSI DE Polarity
395 * @retval Valid or not.
398 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \
399 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH ))
401 * @brief Check whether the PSSI Ready Polarity is valid.
402 * @param __RDYPOL__ PSSI RDY Polarity
403 * @retval Valid or not.
406 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \
407 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH ))
409 * @}
413 /* Exported functions --------------------------------------------------------*/
414 /** @addtogroup PSSI_Exported_Functions
415 * @{
418 /** @addtogroup PSSI_Exported_Functions_Group1
419 * @{
422 /* Initialization and de-initialization functions *******************************/
423 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi);
424 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi);
425 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi);
426 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi);
427 /* Callbacks Register/UnRegister functions ***********************************/
429 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback);
430 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID);
434 * @}
437 /** @addtogroup PSSI_Exported_Functions_Group2
438 * @{
441 /* IO operation functions *******************************************************/
442 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
443 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
444 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
445 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
446 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi);
447 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi);
450 * @}
453 /** @addtogroup PSSI_Exported_Functions_Group3
454 * @{
457 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi);
458 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi);
459 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi);
460 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi);
464 * @}
467 /** @addtogroup PSSI_Exported_Functions_Group4
468 * @{
471 /* Peripheral State functions ***************************************************/
472 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi);
473 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi);
476 * @}
480 * @}
483 /* Private constants ---------------------------------------------------------*/
486 /* Private macros ------------------------------------------------------------*/
490 * @}
492 #endif /* PSSI */
495 * @}
499 #ifdef __cplusplus
501 #endif
503 #endif /* STM32H7xx_HAL_PSSI_H */
506 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/