lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ramecc.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_hal_ramecc.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of RAMECC HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32H7xx_HAL_RAMECC_H
  22 #define STM32H7xx_HAL_RAMECC_H
  23
  24 #ifdef __cplusplus
  25  extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32h7xx_hal_def.h"
  30
  31 /** @addtogroup STM32H7xx_HAL_Driver
  32   * @{
  33   */
  34
  35 /** @addtogroup RAMECC
  36   * @{
  37   */
  38
  39 /* Exported types ------------------------------------------------------------*/
  40
  41 /** @defgroup RAMECC_Exported_Types RAMECC Exported Types
  42   * @brief    RAMECC Exported Types
  43   * @{
  44   */
  45
  46 /**
  47   * @brief  HAL RAMECC State structures definition
  48   */
  49 typedef enum
  50 {
  51   HAL_RAMECC_STATE_RESET             = 0x00U,  /*!< RAMECC not yet initialized or disabled */
  52   HAL_RAMECC_STATE_READY             = 0x01U,  /*!< RAMECC initialized and ready for use   */
  53   HAL_RAMECC_STATE_BUSY              = 0x02U,  /*!< RAMECC process is ongoing              */
  54   HAL_RAMECC_STATE_ERROR             = 0x03U,  /*!< RAMECC error state                     */
  55 }HAL_RAMECC_StateTypeDef;
  56
  57
  58 /**
  59   * @brief  RAMECC handle Structure definition
  60   */
  61
  62 typedef struct __RAMECC_HandleTypeDef
  63 {
  64   RAMECC_MonitorTypeDef           *Instance;                                                            /*!< Register base address        */
  65   __IO HAL_RAMECC_StateTypeDef    State;                                                                /*!< RAMECC state                 */
  66   __IO uint32_t                   ErrorCode;                                                            /*!< RAMECC Error Code            */
  67   void                            (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc);     /*!< RAMECC error detect callback */
  68 }RAMECC_HandleTypeDef;
  69
  70 /**
  71   * @}
  72   */
  73
  74
  75 /* Exported constants --------------------------------------------------------*/
  76
  77 /** @defgroup RAMECC_Error_Codes RAMECC Error Codes
  78   * @{
  79   */
  80 #define HAL_RAMECC_ERROR_NONE              0x00000000U  /*!< RAMECC No Error         */
  81 #define HAL_RAMECC_ERROR_TIMEOUT           0x00000001U  /*!< RAMECC Timeout Error    */
  82 #define HAL_RAMECC_ERROR_BUSY              0x00000002U  /*!< RAMECC Busy Error       */
  83 #define HAL_RAMECC_ERROR_INVALID_CALLBACK  0x00000003U  /*!< Invalid Callback error  */
  84 /**
  85   * @}
  86   */
  87
  88 /** @defgroup RAMECC_Interrupt RAMECC interrupts
  89   * @{
  90   */
  91 #define RAMECC_IT_GLOBAL_ID                0x10000000UL
  92 #define RAMECC_IT_MONITOR_ID               0x20000000UL
  93
  94 #define RAMECC_IT_GLOBAL_ENABLE            (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE)
  95 #define RAMECC_IT_GLOBAL_SINGLEERR_R       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE)
  96 #define RAMECC_IT_GLOBAL_DOUBLEERR_R       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE)
  97 #define RAMECC_IT_GLOBAL_DOUBLEERR_W       (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE)
  98 #define RAMECC_IT_GLOBAL_ALL               (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE)
  99
 100
 101 #define RAMECC_IT_MONITOR_SINGLEERR_R      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE)
 102 #define RAMECC_IT_MONITOR_DOUBLEERR_R      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE)
 103 #define RAMECC_IT_MONITOR_DOUBLEERR_W      (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE)
 104 #define RAMECC_IT_MONITOR_ALL              (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE)
 105 /**
 106   * @}
 107   */
 108
 109 /** @defgroup RAMECC_FLAG RAMECC Monitor flags
 110   * @{
 111   */
 112 #define RAMECC_FLAG_SINGLEERR_R            RAMECC_SR_SEDCF
 113 #define RAMECC_FLAG_DOUBLEERR_R            RAMECC_SR_DEDF
 114 #define RAMECC_FLAG_DOUBLEERR_W            RAMECC_SR_DEBWDF
 115 #define RAMECC_FLAGS_ALL                   (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF)
 116
 117 /**
 118   * @}
 119   */
 120
 121 /* Exported macro ------------------------------------------------------------*/
 122 /** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros
 123   * @{
 124   */
 125
 126 #define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
 127 #define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
 128
 129 /**
 130   * @brief  Enable the specified RAMECC interrupts.
 131   * @param  __HANDLE__   : RAMECC handle.
 132   * @param  __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
 133   *        This parameter can be one of the following values:
 134   *           @arg RAMECC_IT_GLOBAL_E      : Global interrupt enable mask.
 135   *           @arg RAMECC_IT_GLOBAL_SEE    : Global ECC single error interrupt enable.
 136   *           @arg RAMECC_IT_GLOBAL_DEE    : Global ECC double error interrupt enable.
 137   *           @arg RAMECC_IT_GLOBAL_DEBWE  : Global ECC double error on byte write (BW) interrupt enable.
 138   *           @arg RAMECC_IT_GLOBAL_ALL    : All Global ECC interrupts enable mask.
 139   *           @arg RAMECC_IT_MONITOR_SEE   : Monitor ECC single error interrupt enable.
 140   *           @arg RAMECC_IT_MONITOR_DEE   : Monitor ECC double error interrupt enable.
 141   *           @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable.
 142   *           @arg RAMECC_IT_MONITOR_ALL   : All Monitor ECC interrupts enable mask.
 143   * @retval None
 144   */
 145 #define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \
 146 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
 147 (__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
 148
 149
 150 #define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
 151 #define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
 152
 153 /**
 154   * @brief  Disable the specified RAMECC interrupts.
 155   * @param  __HANDLE__   : RAMECC handle.
 156   * @param  __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
 157   *        This parameter can be one of the following values:
 158   *           @arg RAMECC_IT_GLOBAL_E      : Global interrupt enable mask.
 159   *           @arg RAMECC_IT_GLOBAL_SEE    : Global ECC single error interrupt enable.
 160   *           @arg RAMECC_IT_GLOBAL_DEE    : Global ECC double error interrupt enable.
 161   *           @arg RAMECC_IT_GLOBAL_DEBWE  : Global ECC double error on byte write (BW) interrupt enable.
 162   *           @arg RAMECC_IT_GLOBAL_ALL    : All Global ECC interrupts enable mask.
 163   *           @arg RAMECC_IT_MONITOR_SEE   : Monitor ECC single error interrupt enable.
 164   *           @arg RAMECC_IT_MONITOR_DEE   : Monitor ECC double error interrupt enable.
 165   *           @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable.
 166   *           @arg RAMECC_IT_MONITOR_ALL   : All Monitor ECC interrupts enable mask.
 167   * @retval None
 168   */
 169 #define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \
 170 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
 171 (__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
 172
 173
 174 #define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
 175 #define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
 176
 177 /**
 178   * @brief  Check whether the specified RAMECC interrupt source is enabled or not.
 179   * @param  __HANDLE__    : Specifies the RAMECC Handle.
 180   * @param  __INTERRUPT__ : Specifies the RAMECC interrupt source to check.
 181   *          This parameter can be one of the following values:
 182   *           @arg RAMECC_IT_GLOBAL_E      : Global interrupt enable mask.
 183   *           @arg RAMECC_IT_GLOBAL_SEE    : Global ECC single error interrupt enable.
 184   *           @arg RAMECC_IT_GLOBAL_DEE    : Global ECC double error interrupt enable.
 185   *           @arg RAMECC_IT_GLOBAL_DEBWE  : Global ECC double error on byte write (BW) interrupt enable.
 186   *           @arg RAMECC_IT_GLOBAL_ALL    : All Global ECC interrupts enable mask.
 187   *           @arg RAMECC_IT_MONITOR_SEE   : Monitor ECC single error interrupt enable.
 188   *           @arg RAMECC_IT_MONITOR_DEE   : Monitor ECC double error interrupt enable.
 189   *           @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable.
 190   *           @arg RAMECC_IT_MONITOR_ALL   : All Monitor ECC interrupts enable mask.
 191   * @retval The new state of __INTERRUPT__ (SET or RESET).
 192   */
 193 #define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (  \
 194 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
 195 (__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))
 196
 197
 198 /**
 199   * @brief  Get the RAMECC pending flags.
 200   * @param  __HANDLE__   : RAMECC handle.
 201   * @param  __FLAG__     : specifies the flag to clear.
 202   *          This parameter can be any combination of the following values:
 203   *            @arg RAMECC_FLAG_SEDCF  : RAMECC instance ECC single error detected and corrected flag.
 204   *            @arg RAMECC_FLAG_DEDF   : RAMECC instance ECC double error detected flag.
 205   *            @arg RAMECC_FLAG_DEBWDF : RAMECC instance ECC double error on byte write (BW) detected flag.
 206   *            @arg RAMECC_FLAGS_ALL   : RAMECC instance all flag.
 207   * @retval The state of __FLAG__ (SET or RESET).
 208   */
 209 #define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__))
 210
 211
 212 /**
 213   * @brief  Clear the RAMECC pending flags.
 214   * @param  __HANDLE__   : RAMECC handle.
 215   * @param  __FLAG__     : specifies the flag to clear.
 216   *          This parameter can be any combination of the following values:
 217   *            @arg RAMECC_FLAG_SEDCF  : RAMECC instance ECC single error detected and corrected flag.
 218   *            @arg RAMECC_FLAG_DEDF   : RAMECC instance ECC double error detected flag.
 219   *            @arg RAMECC_FLAG_DEBWDF : RAMECC instance ECC double error on byte write (BW) detected flag.
 220   *            @arg RAMECC_FLAGS_ALL   : RAMECC instance all flag.
 221   * @retval None.
 222   */
 223 #define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
 224
 225 /**
 226   * @brief  Reset the RAMECC handle state.
 227   * @param  __HANDLE__    : Specifies the RAMECC Handle.
 228   * @retval None.
 229   */
 230 #define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET)
 231 /**
 232   * @}
 233   */
 234
 235 /* Exported functions --------------------------------------------------------*/
 236
 237 /** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions
 238   * @brief    RAMECC Exported functions
 239   * @{
 240   */
 241
 242 /** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions
 243   * @brief    Initialization and de-initialization functions
 244   * @{
 245   */
 246 HAL_StatusTypeDef HAL_RAMECC_Init   (RAMECC_HandleTypeDef *hramecc);
 247 HAL_StatusTypeDef HAL_RAMECC_DeInit (RAMECC_HandleTypeDef *hramecc);
 248 /**
 249   * @}
 250   */
 251
 252 /** @defgroup RAMECC_Exported_Functions_Group2 monitoring operation functions
 253   * @brief    monitoring operation functions
 254   * @{
 255   */
 256 HAL_StatusTypeDef HAL_RAMECC_StartMonitor        (RAMECC_HandleTypeDef *hramecc);
 257 HAL_StatusTypeDef HAL_RAMECC_StopMonitor         (RAMECC_HandleTypeDef *hramecc);
 258 HAL_StatusTypeDef HAL_RAMECC_EnableNotification  (RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
 259 HAL_StatusTypeDef HAL_RAMECC_DisableNotification (RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
 260 void              HAL_RAMECC_IRQHandler          (RAMECC_HandleTypeDef *hramecc);
 261 HAL_StatusTypeDef HAL_RAMECC_RegisterCallback    (RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc));
 262 HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback  (RAMECC_HandleTypeDef *hramecc);
 263 /**
 264   * @}
 265   */
 266
 267 /** @defgroup RAMECC_Exported_Functions_Group3 Error informations functions
 268   * @brief    Error informations functions
 269   * @{
 270   */
 271 uint32_t HAL_RAMECC_GetFailingAddress        (RAMECC_HandleTypeDef *hramecc);
 272 uint32_t HAL_RAMECC_GetFailingDataLow        (RAMECC_HandleTypeDef *hramecc);
 273 uint32_t HAL_RAMECC_GetFailingDataHigh       (RAMECC_HandleTypeDef *hramecc);
 274 uint32_t HAL_RAMECC_GetHammingErrorCode      (RAMECC_HandleTypeDef *hramecc);
 275 uint32_t HAL_RAMECC_IsECCSingleErrorDetected (RAMECC_HandleTypeDef *hramecc);
 276 uint32_t HAL_RAMECC_IsECCDoubleErrorDetected (RAMECC_HandleTypeDef *hramecc);
 277 /**
 278   * @}
 279   */
 280
 281 /** @defgroup RAMECC_Exported_Functions_Group3 Error informations functions
 282   * @brief    Error informations functions
 283   * @{
 284   */
 285 HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState (RAMECC_HandleTypeDef *hramecc);
 286 uint32_t                HAL_RAMECC_GetError (RAMECC_HandleTypeDef *hramecc);
 287 /**
 288   * @}
 289   */
 290
 291 /**
 292   * @}
 293   */
 294 /* Private Constants -------------------------------------------------------------*/
 295 /** @defgroup RAMECC_Private_Constants RAMECC Private Constants
 296   * @brief    RAMECC private defines and constants
 297   * @{
 298   */
 299 /**
 300   * @}
 301   */
 302
 303 /* Private macros ------------------------------------------------------------*/
 304 /** @defgroup RAMECC_Private_Macros RAMECC Private Macros
 305   * @brief    RAMECC private macros
 306   * @{
 307   */
 308
 309 #define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE)      || \
 310                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \
 311                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \
 312                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \
 313                                                ((INTERRUPT) == RAMECC_IT_GLOBAL_ALL))
 314
 315
 316 #define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \
 317                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \
 318                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \
 319                                                 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL))
 320
 321 #define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \
 322                                         (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT)))
 323
 324 /**
 325   * @}
 326   */
 327
 328 /** @defgroup RAMECC_FLAG RAMECC Monitor flags
 329   * @{
 330   */
 331
 332 /* Private functions ---------------------------------------------------------*/
 333 /** @defgroup RAMECC_Private_Functions RAMECC Private Functions
 334   * @brief    RAMECC private  functions
 335   * @{
 336   */
 337 /**
 338   * @}
 339   */
 340
 341 /**
 342   * @}
 343   */
 344
 345 /**
 346   * @}
 347   */
 348
 349 /**
 350   * @}
 351   */
 352 #ifdef __cplusplus
 353 }
 354 #endif
 355
 356 #endif /* STM32H7xx_HAL_RAMECC_H */
 357
 358 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/