lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_spdifrx.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_hal_spdifrx.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of SPDIFRX HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32H7xx_HAL_SPDIFRX_H
  22 #define STM32H7xx_HAL_SPDIFRX_H
  23
  24 #ifdef __cplusplus
  25  extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32h7xx_hal_def.h"
  30
  31
  32 /** @addtogroup STM32H7xx_HAL_Driver
  33   * @{
  34   */
  35 #if defined (SPDIFRX)
  36
  37 /** @addtogroup SPDIFRX
  38   * @{
  39   */
  40
  41 /* Exported types ------------------------------------------------------------*/
  42 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
  43   * @{
  44   */
  45
  46 /**
  47   * @brief SPDIFRX Init structure definition
  48   */
  49 typedef struct
  50 {
  51   uint32_t InputSelection;           /*!< Specifies the SPDIF input selection.
  52                                           This parameter can be a value of @ref SPDIFRX_Input_Selection */
  53
  54   uint32_t Retries;                  /*!< Specifies the Maximum allowed re-tries during synchronization phase.
  55                                           This parameter can be a value of @ref SPDIFRX_Max_Retries */
  56
  57   uint32_t WaitForActivity;          /*!< Specifies the wait for activity on SPDIF selected input.
  58                                           This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
  59
  60   uint32_t ChannelSelection;         /*!< Specifies whether the control flow will take the channel status from channel A or B.
  61                                           This parameter can be a value of @ref SPDIFRX_Channel_Selection */
  62
  63   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
  64                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
  65
  66   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
  67                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
  68
  69   uint32_t PreambleTypeMask;          /*!< Specifies whether The preamble type bits are copied or not into the received frame.
  70                                            This parameter can be a value of @ref SPDIFRX_PT_Mask */
  71
  72   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
  73                                           This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
  74
  75   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
  76                                           This parameter can be a value of @ref SPDIFRX_V_Mask */
  77
  78   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not into the received frame.
  79                                           This parameter can be a value of @ref SPDIFRX_PE_Mask */
  80   FunctionalState SymbolClockGen;     /*!< Enable/Disable the SPDIFRX Symbol Clock generation.
  81                                           This parameter can be set to Enable or Disable */
  82
  83   FunctionalState BackupSymbolClockGen; /*!< Enable/Disable the SPDIFRX Backup Symbol Clock generation.
  84                                           This parameter can be set to Enable or Disable */
  85 } SPDIFRX_InitTypeDef;
  86
  87 /**
  88   * @brief SPDIFRX SetDataFormat structure definition
  89   */
  90 typedef struct
  91 {
  92   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
  93                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
  94
  95   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
  96                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
  97
  98   uint32_t PreambleTypeMask;          /*!< Specifies whether The preamble type bits are copied or not into the received frame.
  99                                                                                    This parameter can be a value of @ref SPDIFRX_PT_Mask */
 100
 101   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
 102                                                                                   This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
 103
 104   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
 105                                                                                   This parameter can be a value of @ref SPDIFRX_V_Mask */
 106
 107   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not into the received frame.
 108                                                                                   This parameter can be a value of @ref SPDIFRX_PE_Mask */
 109
 110 } SPDIFRX_SetDataFormatTypeDef;
 111
 112 /**
 113   * @brief  HAL State structures definition
 114   */
 115 typedef enum
 116 {
 117   HAL_SPDIFRX_STATE_RESET      = 0x00U,  /*!< SPDIFRX not yet initialized or disabled                */
 118   HAL_SPDIFRX_STATE_READY      = 0x01U,  /*!< SPDIFRX initialized and ready for use                  */
 119   HAL_SPDIFRX_STATE_BUSY       = 0x02U,  /*!< SPDIFRX internal process is ongoing                    */
 120   HAL_SPDIFRX_STATE_BUSY_RX    = 0x03U,  /*!< SPDIFRX internal Data Flow RX process is ongoing       */
 121   HAL_SPDIFRX_STATE_BUSY_CX    = 0x04U,  /*!< SPDIFRX internal Control Flow RX process is ongoing    */
 122   HAL_SPDIFRX_STATE_ERROR      = 0x07U   /*!< SPDIFRX error state                                    */
 123 } HAL_SPDIFRX_StateTypeDef;
 124
 125 /**
 126   * @brief SPDIFRX handle Structure definition
 127   */
 128 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 129 typedef struct __SPDIFRX_HandleTypeDef
 130 #else
 131 typedef struct
 132 #endif
 133 {
 134   SPDIFRX_TypeDef            *Instance;    /* SPDIFRX registers base address */
 135
 136   SPDIFRX_InitTypeDef        Init;         /* SPDIFRX communication parameters */
 137
 138   uint32_t                   *pRxBuffPtr;  /* Pointer to SPDIFRX Rx transfer buffer */
 139
 140   uint32_t                   *pCsBuffPtr;  /* Pointer to SPDIFRX Cx transfer buffer */
 141
 142   __IO uint16_t              RxXferSize;   /* SPDIFRX Rx transfer size */
 143
 144   __IO uint16_t              RxXferCount;  /* SPDIFRX Rx transfer counter
 145                                               (This field is initialized at the
 146                                                same value as transfer size at the
 147                                                beginning of the transfer and
 148                                                decremented when a sample is received.
 149                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
 150
 151   __IO uint16_t              CsXferSize;   /* SPDIFRX Rx transfer size */
 152
 153   __IO uint16_t              CsXferCount;  /* SPDIFRX Rx transfer counter
 154                                               (This field is initialized at the
 155                                                same value as transfer size at the
 156                                                beginning of the transfer and
 157                                                decremented when a sample is received.
 158                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
 159
 160   DMA_HandleTypeDef          *hdmaCsRx;    /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
 161
 162   DMA_HandleTypeDef          *hdmaDrRx;    /* SPDIFRX Rx DMA handle parameters */
 163
 164   __IO HAL_LockTypeDef       Lock;         /* SPDIFRX locking object */
 165
 166   __IO HAL_SPDIFRX_StateTypeDef  State;    /* SPDIFRX communication state */
 167
 168   __IO uint32_t  ErrorCode;                /* SPDIFRX Error code */
 169
 170 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 171   void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);   /*!< SPDIFRX Data flow half completed callback */
 172   void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);       /*!< SPDIFRX Data flow completed callback */
 173   void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);   /*!< SPDIFRX Control flow half completed callback */
 174   void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);       /*!< SPDIFRX Control flow completed callback */
 175   void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);        /*!< SPDIFRX error callback */
 176   void (* MspInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif);   /*!< SPDIFRX Msp Init callback  */
 177   void (* MspDeInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif); /*!< SPDIFRX Msp DeInit callback  */
 178 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
 179
 180 } SPDIFRX_HandleTypeDef;
 181 /**
 182   * @}
 183   */
 184
 185 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 186 /**
 187   * @brief  HAL SPDIFRX Callback ID enumeration definition
 188   */
 189 typedef enum
 190 {
 191   HAL_SPDIFRX_RX_HALF_CB_ID   = 0x00U,    /*!< SPDIFRX Data flow half completed callback ID */
 192   HAL_SPDIFRX_RX_CPLT_CB_ID   = 0x01U,    /*!< SPDIFRX Data flow completed callback */
 193   HAL_SPDIFRX_CX_HALF_CB_ID   = 0x02U,    /*!< SPDIFRX Control flow half completed callback */
 194   HAL_SPDIFRX_CX_CPLT_CB_ID   = 0x03U,    /*!< SPDIFRX Control flow completed callback */
 195   HAL_SPDIFRX_ERROR_CB_ID     = 0x04U,    /*!< SPDIFRX error callback */
 196   HAL_SPDIFRX_MSPINIT_CB_ID   = 0x05U,    /*!< SPDIFRX Msp Init callback ID     */
 197   HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U     /*!< SPDIFRX Msp DeInit callback ID   */
 198 }HAL_SPDIFRX_CallbackIDTypeDef;
 199
 200 /**
 201   * @brief  HAL SPDIFRX Callback pointer definition
 202   */
 203 typedef  void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef * hspdif); /*!< pointer to an SPDIFRX callback function */
 204 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
 205
 206 /* Exported constants --------------------------------------------------------*/
 207 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
 208   * @{
 209   */
 210 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
 211   * @{
 212   */
 213 #define HAL_SPDIFRX_ERROR_NONE      ((uint32_t)0x00000000U)  /*!< No error           */
 214 #define HAL_SPDIFRX_ERROR_TIMEOUT   ((uint32_t)0x00000001U)  /*!< Timeout error      */
 215 #define HAL_SPDIFRX_ERROR_OVR       ((uint32_t)0x00000002U)  /*!< OVR error          */
 216 #define HAL_SPDIFRX_ERROR_PE        ((uint32_t)0x00000004U)  /*!< Parity error       */
 217 #define HAL_SPDIFRX_ERROR_DMA       ((uint32_t)0x00000008U)  /*!< DMA transfer error */
 218 #define HAL_SPDIFRX_ERROR_UNKNOWN   ((uint32_t)0x00000010U)  /*!< Unknown Error error */
 219 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 220 #define  HAL_SPDIFRX_ERROR_INVALID_CALLBACK   ((uint32_t)0x00000020U)    /*!< Invalid Callback error  */
 221 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
 227   * @{
 228   */
 229 #define SPDIFRX_INPUT_IN0   ((uint32_t)0x00000000U)
 230 #define SPDIFRX_INPUT_IN1   ((uint32_t)0x00010000U)
 231 #define SPDIFRX_INPUT_IN2   ((uint32_t)0x00020000U)
 232 #define SPDIFRX_INPUT_IN3   ((uint32_t)0x00030000U)
 233 /**
 234   * @}
 235   */
 236
 237 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
 238   * @{
 239   */
 240 #define SPDIFRX_MAXRETRIES_NONE   ((uint32_t)0x00000000U)
 241 #define SPDIFRX_MAXRETRIES_3      ((uint32_t)0x00001000U)
 242 #define SPDIFRX_MAXRETRIES_15     ((uint32_t)0x00002000U)
 243 #define SPDIFRX_MAXRETRIES_63     ((uint32_t)0x00003000U)
 244 /**
 245   * @}
 246   */
 247
 248 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
 249   * @{
 250   */
 251 #define SPDIFRX_WAITFORACTIVITY_OFF   ((uint32_t)0x00000000U)
 252 #define SPDIFRX_WAITFORACTIVITY_ON    ((uint32_t)SPDIFRX_CR_WFA)
 253 /**
 254   * @}
 255   */
 256
 257 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
 258   * @{
 259   */
 260 #define SPDIFRX_PREAMBLETYPEMASK_OFF    ((uint32_t)0x00000000U)
 261 #define SPDIFRX_PREAMBLETYPEMASK_ON     ((uint32_t)SPDIFRX_CR_PTMSK)
 262 /**
 263   * @}
 264   */
 265
 266 /** @defgroup SPDIFRX_ChannelStatus_Mask  SPDIFRX Channel Status Mask
 267   * @{
 268   */
 269 #define SPDIFRX_CHANNELSTATUS_OFF   ((uint32_t)0x00000000U)        /* The channel status and user bits are copied into the SPDIF_DR */
 270 #define SPDIFRX_CHANNELSTATUS_ON    ((uint32_t)SPDIFRX_CR_CUMSK)  /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
 271 /**
 272   * @}
 273   */
 274
 275 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
 276 * @{
 277 */
 278 #define SPDIFRX_VALIDITYMASK_OFF    ((uint32_t)0x00000000U)
 279 #define SPDIFRX_VALIDITYMASK_ON     ((uint32_t)SPDIFRX_CR_VMSK)
 280 /**
 281   * @}
 282   */
 283
 284 /** @defgroup SPDIFRX_PE_Mask  SPDIFRX Parity Error Mask
 285   * @{
 286   */
 287 #define SPDIFRX_PARITYERRORMASK_OFF   ((uint32_t)0x00000000U)
 288 #define SPDIFRX_PARITYERRORMASK_ON    ((uint32_t)SPDIFRX_CR_PMSK)
 289 /**
 290   * @}
 291   */
 292
 293 /** @defgroup SPDIFRX_Channel_Selection  SPDIFRX Channel Selection
 294   * @{
 295   */
 296 #define SPDIFRX_CHANNEL_A   ((uint32_t)0x00000000U)
 297 #define SPDIFRX_CHANNEL_B   ((uint32_t)SPDIFRX_CR_CHSEL)
 298 /**
 299   * @}
 300   */
 301
 302 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
 303   * @{
 304   */
 305 #define SPDIFRX_DATAFORMAT_LSB      ((uint32_t)0x00000000U)
 306 #define SPDIFRX_DATAFORMAT_MSB      ((uint32_t)0x00000010U)
 307 #define SPDIFRX_DATAFORMAT_32BITS   ((uint32_t)0x00000020U)
 308 /**
 309   * @}
 310   */
 311
 312 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
 313   * @{
 314   */
 315 #define SPDIFRX_STEREOMODE_DISABLE    ((uint32_t)0x00000000U)
 316 #define SPDIFRX_STEREOMODE_ENABLE     ((uint32_t)SPDIFRX_CR_RXSTEO)
 317 /**
 318   * @}
 319   */
 320
 321 /** @defgroup SPDIFRX_State SPDIFRX State
 322   * @{
 323   */
 324
 325 #define SPDIFRX_STATE_IDLE    ((uint32_t)0xFFFFFFFCU)
 326 #define SPDIFRX_STATE_SYNC    ((uint32_t)0x00000001U)
 327 #define SPDIFRX_STATE_RCV     ((uint32_t)SPDIFRX_CR_SPDIFEN)
 328 /**
 329   * @}
 330   */
 331
 332 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
 333   * @{
 334   */
 335 #define SPDIFRX_IT_RXNE       ((uint32_t)SPDIFRX_IMR_RXNEIE)
 336 #define SPDIFRX_IT_CSRNE      ((uint32_t)SPDIFRX_IMR_CSRNEIE)
 337 #define SPDIFRX_IT_PERRIE     ((uint32_t)SPDIFRX_IMR_PERRIE)
 338 #define SPDIFRX_IT_OVRIE      ((uint32_t)SPDIFRX_IMR_OVRIE)
 339 #define SPDIFRX_IT_SBLKIE     ((uint32_t)SPDIFRX_IMR_SBLKIE)
 340 #define SPDIFRX_IT_SYNCDIE    ((uint32_t)SPDIFRX_IMR_SYNCDIE)
 341 #define SPDIFRX_IT_IFEIE      ((uint32_t)SPDIFRX_IMR_IFEIE )
 342 /**
 343   * @}
 344   */
 345
 346 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
 347   * @{
 348   */
 349 #define SPDIFRX_FLAG_RXNE     ((uint32_t)SPDIFRX_SR_RXNE)
 350 #define SPDIFRX_FLAG_CSRNE    ((uint32_t)SPDIFRX_SR_CSRNE)
 351 #define SPDIFRX_FLAG_PERR     ((uint32_t)SPDIFRX_SR_PERR)
 352 #define SPDIFRX_FLAG_OVR      ((uint32_t)SPDIFRX_SR_OVR)
 353 #define SPDIFRX_FLAG_SBD      ((uint32_t)SPDIFRX_SR_SBD)
 354 #define SPDIFRX_FLAG_SYNCD    ((uint32_t)SPDIFRX_SR_SYNCD)
 355 #define SPDIFRX_FLAG_FERR     ((uint32_t)SPDIFRX_SR_FERR)
 356 #define SPDIFRX_FLAG_SERR     ((uint32_t)SPDIFRX_SR_SERR)
 357 #define SPDIFRX_FLAG_TERR     ((uint32_t)SPDIFRX_SR_TERR)
 358 /**
 359   * @}
 360   */
 361
 362 /**
 363   * @}
 364   */
 365
 366 /* Exported macros -----------------------------------------------------------*/
 367 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
 368   * @{
 369   */
 370
 371 /** @brief  Reset SPDIFRX handle state
 372   * @param  __HANDLE__ SPDIFRX handle.
 373   * @retval None
 374   */
 375 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 376 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\
 377                                                       (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\
 378                                                       (__HANDLE__)->MspInitCallback = NULL;\
 379                                                       (__HANDLE__)->MspDeInitCallback = NULL;\
 380                                                      }while(0)
 381 #else
 382 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET)
 383 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
 384
 385 /** @brief  Disable the specified SPDIFRX peripheral (IDLE State).
 386   * @param  __HANDLE__ specifies the SPDIFRX Handle.
 387   * @retval None
 388   */
 389 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
 390
 391 /** @brief  Enable the specified SPDIFRX peripheral (SYNC State).
 392   * @param  __HANDLE__ specifies the SPDIFRX Handle.
 393   * @retval None
 394   */
 395 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
 396
 397
 398 /** @brief  Enable the specified SPDIFRX peripheral (RCV State).
 399   * @param  __HANDLE__ specifies the SPDIFRX Handle.
 400   * @retval None
 401   */
 402 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
 403
 404
 405 /** @brief  Enable or disable the specified SPDIFRX interrupts.
 406   * @param  __HANDLE__    specifies the SPDIFRX Handle.
 407   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
 408   *        This parameter can be one of the following values:
 409   *            @arg SPDIFRX_IT_RXNE
 410   *            @arg SPDIFRX_IT_CSRNE
 411   *            @arg SPDIFRX_IT_PERRIE
 412   *            @arg SPDIFRX_IT_OVRIE
 413   *            @arg SPDIFRX_IT_SBLKIE
 414   *            @arg SPDIFRX_IT_SYNCDIE
 415   *            @arg SPDIFRX_IT_IFEIE
 416   * @retval None
 417   */
 418 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
 419 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
 420
 421 /** @brief  Checks if the specified SPDIFRX interrupt source is enabled or disabled.
 422   * @param  __HANDLE__    specifies the SPDIFRX Handle.
 423   * @param  __INTERRUPT__ specifies the SPDIFRX interrupt source to check.
 424   *          This parameter can be one of the following values:
 425   *            @arg SPDIFRX_IT_RXNE
 426   *            @arg SPDIFRX_IT_CSRNE
 427   *            @arg SPDIFRX_IT_PERRIE
 428   *            @arg SPDIFRX_IT_OVRIE
 429   *            @arg SPDIFRX_IT_SBLKIE
 430   *            @arg SPDIFRX_IT_SYNCDIE
 431   *            @arg SPDIFRX_IT_IFEIE
 432   * @retval The new state of __IT__ (TRUE or FALSE).
 433   */
 434 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 435
 436 /** @brief  Checks whether the specified SPDIFRX flag is set or not.
 437   * @param  __HANDLE__  specifies the SPDIFRX Handle.
 438   * @param  __FLAG__    specifies the flag to check.
 439   *        This parameter can be one of the following values:
 440   *            @arg SPDIFRX_FLAG_RXNE
 441   *            @arg SPDIFRX_FLAG_CSRNE
 442   *            @arg SPDIFRX_FLAG_PERR
 443   *            @arg SPDIFRX_FLAG_OVR
 444   *            @arg SPDIFRX_FLAG_SBD
 445   *            @arg SPDIFRX_FLAG_SYNCD
 446   *            @arg SPDIFRX_FLAG_FERR
 447   *            @arg SPDIFRX_FLAG_SERR
 448   *            @arg SPDIFRX_FLAG_TERR
 449   * @retval The new state of __FLAG__ (TRUE or FALSE).
 450   */
 451 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
 452
 453 /** @brief  Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
 454   * @param  __HANDLE__    specifies the USART Handle.
 455   * @param  __IT_CLEAR__  specifies the interrupt clear register flag that needs to be set
 456   *                       to clear the corresponding interrupt
 457   *          This parameter can be one of the following values:
 458   *            @arg SPDIFRX_FLAG_PERR
 459   *            @arg SPDIFRX_FLAG_OVR
 460   *            @arg SPDIFRX_SR_SBD
 461   *            @arg SPDIFRX_SR_SYNCD
 462   * @retval None
 463   */
 464 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
 465
 466 /**
 467   * @}
 468   */
 469
 470 /* Exported functions --------------------------------------------------------*/
 471 /** @addtogroup SPDIFRX_Exported_Functions
 472   * @{
 473   */
 474
 475 /** @addtogroup SPDIFRX_Exported_Functions_Group1
 476   * @{
 477   */
 478 /* Initialization/de-initialization functions  **********************************/
 479 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
 480 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
 481 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
 482 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
 483 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef  sDataFormat);
 484
 485 /* Callbacks Register/UnRegister functions  ***********************************/
 486 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
 487 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback);
 488 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID);
 489 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
 490 /**
 491   * @}
 492   */
 493
 494 /** @addtogroup SPDIFRX_Exported_Functions_Group2
 495   * @{
 496   */
 497 /* I/O operation functions  ***************************************************/
 498  /* Blocking mode: Polling */
 499 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
 500 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
 501
 502 /* Non-Blocking mode: Interrupt */
 503 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
 504 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
 505 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
 506
 507 /* Non-Blocking mode: DMA */
 508 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
 509 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
 510 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
 511
 512 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
 513 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
 514 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
 515 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
 516 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
 517 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
 518 /**
 519   * @}
 520   */
 521
 522 /** @addtogroup SPDIFRX_Exported_Functions_Group3
 523   * @{
 524   */
 525 /* Peripheral Control and State functions  ************************************/
 526 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif);
 527 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif);
 528 /**
 529   * @}
 530   */
 531
 532 /**
 533   * @}
 534   */
 535 /* Private types -------------------------------------------------------------*/
 536 /* Private variables ---------------------------------------------------------*/
 537 /* Private constants ---------------------------------------------------------*/
 538 /* Private macros ------------------------------------------------------------*/
 539 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
 540   * @{
 541   */
 542 #define IS_SPDIFRX_INPUT_SELECT(INPUT)      (((INPUT) == SPDIFRX_INPUT_IN1) || \
 543                                             ((INPUT) == SPDIFRX_INPUT_IN2)  || \
 544                                             ((INPUT) == SPDIFRX_INPUT_IN3)  || \
 545                                             ((INPUT) == SPDIFRX_INPUT_IN0))
 546
 547 #define IS_SPDIFRX_MAX_RETRIES(RET)         (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
 548                                             ((RET) == SPDIFRX_MAXRETRIES_3)     || \
 549                                             ((RET) == SPDIFRX_MAXRETRIES_15)    || \
 550                                             ((RET) == SPDIFRX_MAXRETRIES_63))
 551
 552 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL)   (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
 553                                             ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
 554
 555 #define IS_PREAMBLE_TYPE_MASK(VAL)          (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
 556                                             ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
 557
 558 #define IS_VALIDITY_MASK(VAL)               (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
 559                                             ((VAL) == SPDIFRX_VALIDITYMASK_ON))
 560
 561 #define IS_PARITY_ERROR_MASK(VAL)           (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
 562                                             ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
 563
 564 #define IS_SPDIFRX_CHANNEL(CHANNEL)         (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
 565                                             ((CHANNEL) == SPDIFRX_CHANNEL_B))
 566
 567 #define IS_SPDIFRX_DATA_FORMAT(FORMAT)      (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
 568                                             ((FORMAT) == SPDIFRX_DATAFORMAT_MSB)  || \
 569                                             ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
 570
 571 #define IS_STEREO_MODE(MODE)                (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
 572                                             ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
 573
 574 #define IS_CHANNEL_STATUS_MASK(VAL)         (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
 575                                             ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
 576
 577 #define IS_SYMBOL_CLOCK_GEN(VAL)            (((VAL) == ENABLE) || ((VAL) == DISABLE))
 578 /**
 579   * @}
 580   */
 581
 582 /* Private functions ---------------------------------------------------------*/
 583 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
 584   * @{
 585   */
 586 /**
 587   * @}
 588   */
 589
 590 /**
 591   * @}
 592   */
 593 #endif /* SPDIFRX */
 594 /**
 595   * @}
 596   */
 597
 598
 599 #ifdef __cplusplus
 600 }
 601 #endif
 602
 603
 604 #endif /* __STM32H7xx_HAL_SPDIFRX_H */
 605
 606 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/