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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_uart.h
bloba7075833bf85282c2628b774f94c4bc289ae1f69
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_uart.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_UART_H
22 #define STM32H7xx_HAL_UART_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup UART
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup UART_Exported_Types UART Exported Types
41 * @{
42 */
43
44 /**
45 * @brief UART Init Structure definition
46 */
47 typedef struct
48 {
49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
50 The baud rate register is computed using the following formula:
51 LPUART:
52 =======
53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
55 UART:
56 =====
57 - If oversampling is 16 or in LIN mode,
58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
59 - If oversampling is 8,
60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4]
61 Baud Rate Register[3] = 0
62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1
63 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
64
65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
66 This parameter can be a value of @ref UARTEx_Word_Length. */
67
68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
69 This parameter can be a value of @ref UART_Stop_Bits. */
70
71 uint32_t Parity; /*!< Specifies the parity mode.
72 This parameter can be a value of @ref UART_Parity
73 @note When parity is enabled, the computed parity is inserted
74 at the MSB position of the transmitted data (9th bit when
75 the word length is set to 9 data bits; 8th bit when the
76 word length is set to 8 data bits). */
77
78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
79 This parameter can be a value of @ref UART_Mode. */
80
81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
82 or disabled.
83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
84
85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
86 This parameter can be a value of @ref UART_Over_Sampling. */
87
88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
89 Selecting the single sample method increases the receiver tolerance to clock
90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
91
92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
93 This parameter can be a value of @ref UART_ClockPrescaler. */
94
95 } UART_InitTypeDef;
96
97 /**
98 * @brief UART Advanced Features initialization structure definition
99 */
100 typedef struct
101 {
102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
103 Advanced Features may be initialized at the same time .
104 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
105
106 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
107 This parameter can be a value of @ref UART_Tx_Inv. */
108
109 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
110 This parameter can be a value of @ref UART_Rx_Inv. */
111
112 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
113 vs negative/inverted logic).
114 This parameter can be a value of @ref UART_Data_Inv. */
115
116 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
117 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
118
119 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
120 This parameter can be a value of @ref UART_Overrun_Disable. */
121
122 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
123 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
124
125 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
126 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
127
128 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
129 detection is carried out.
130 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
131
132 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
133 This parameter can be a value of @ref UART_MSB_First. */
134 } UART_AdvFeatureInitTypeDef;
135
136 /**
137 * @brief HAL UART State definition
138 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition).
139 * - gState contains UART state information related to global Handle management
140 * and also information related to Tx operations.
141 * gState value coding follow below described bitmap :
142 * b7-b6 Error information
143 * 00 : No Error
144 * 01 : (Not Used)
145 * 10 : Timeout
146 * 11 : Error
147 * b5 Peripheral initialization status
148 * 0 : Reset (Peripheral not initialized)
149 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called)
150 * b4-b3 (not used)
151 * xx : Should be set to 00
152 * b2 Intrinsic process state
153 * 0 : Ready
154 * 1 : Busy (Peripheral busy with some configuration or internal operations)
155 * b1 (not used)
156 * x : Should be set to 0
157 * b0 Tx state
158 * 0 : Ready (no Tx operation ongoing)
159 * 1 : Busy (Tx operation ongoing)
160 * - RxState contains information related to Rx operations.
161 * RxState value coding follow below described bitmap :
162 * b7-b6 (not used)
163 * xx : Should be set to 00
164 * b5 Peripheral initialization status
165 * 0 : Reset (Peripheral not initialized)
166 * 1 : Init done (Peripheral not initialized)
167 * b4-b2 (not used)
168 * xxx : Should be set to 000
169 * b1 Rx state
170 * 0 : Ready (no Rx operation ongoing)
171 * 1 : Busy (Rx operation ongoing)
172 * b0 (not used)
173 * x : Should be set to 0.
174 */
175 typedef uint32_t HAL_UART_StateTypeDef;
176
177 /**
178 * @brief UART clock sources definition
179 */
180 typedef enum
181 {
182 UART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
183 UART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
184 UART_CLOCKSOURCE_D3PCLK1 = 0x02U, /*!< Domain3 PCLK1 clock source */
185 UART_CLOCKSOURCE_PLL2 = 0x04U, /*!< PLL2Q clock source */
186 UART_CLOCKSOURCE_PLL3 = 0x08U, /*!< PLL3Q clock source */
187 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */
188 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */
189 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */
190 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */
191 } UART_ClockSourceTypeDef;
192
193 /**
194 * @brief UART handle Structure definition
195 */
196 typedef struct __UART_HandleTypeDef
197 {
198 USART_TypeDef *Instance; /*!< UART registers base address */
199
200 UART_InitTypeDef Init; /*!< UART communication parameters */
201
202 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
203
204 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
205
206 uint16_t TxXferSize; /*!< UART Tx Transfer size */
207
208 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
209
210 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
211
212 uint16_t RxXferSize; /*!< UART Rx Transfer size */
213
214 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
215
216 uint16_t Mask; /*!< UART Rx RDR register mask */
217
218 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
219 This parameter can be a value of @ref UARTEx_FIFO_mode. */
220
221 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
222
223 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
224
225 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
226
227 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
228
229 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
230
231 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
232
233 HAL_LockTypeDef Lock; /*!< Locking object */
234
235 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
236 and also related to Tx operations.
237 This parameter can be a value of @ref HAL_UART_StateTypeDef */
238
239 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
240 This parameter can be a value of @ref HAL_UART_StateTypeDef */
241
242 __IO uint32_t ErrorCode; /*!< UART Error code */
243
244 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
245 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
246 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
247 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
248 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
249 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
250 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
251 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
252 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
253 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
254 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
255 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
256
257 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
258 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
259 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
260
261 } UART_HandleTypeDef;
262
263 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
264 /**
265 * @brief HAL UART Callback ID enumeration definition
266 */
267 typedef enum
268 {
269 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
270 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
271 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
272 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
273 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
274 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
275 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
276 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
277 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
278 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
279 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
280
281 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
282 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
283
284 } HAL_UART_CallbackIDTypeDef;
285
286 /**
287 * @brief HAL UART Callback pointer definition
288 */
289 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
290
291 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
292
293 /**
294 * @}
295 */
296
297 /* Exported constants --------------------------------------------------------*/
298 /** @defgroup UART_Exported_Constants UART Exported Constants
299 * @{
300 */
301
302 /** @defgroup UART_State_Definition UART State Code Definition
303 * @{
304 */
305 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
306 Value is allowed for gState and RxState */
307 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
308 Value is allowed for gState and RxState */
309 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
310 Value is allowed for gState only */
311 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
312 Value is allowed for gState only */
313 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
314 Value is allowed for RxState only */
315 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
316 Not to be used for neither gState nor RxState.
317 Value is result of combination (Or) between gState and RxState values */
318 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
319 Value is allowed for gState only */
320 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
321 Value is allowed for gState only */
322 /**
323 * @}
324 */
325
326 /** @defgroup UART_Error_Definition UART Error Definition
327 * @{
328 */
329 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
330 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
331 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
332 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
333 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
334 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
335 #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */
336
337 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
338 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */
339 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
340 /**
341 * @}
342 */
343
344 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
345 * @{
346 */
347 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
348 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
349 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
350 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
351 /**
352 * @}
353 */
354
355 /** @defgroup UART_Parity UART Parity
356 * @{
357 */
358 #define UART_PARITY_NONE 0x00000000U /*!< No parity */
359 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
360 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
361 /**
362 * @}
363 */
364
365 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
366 * @{
367 */
368 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
369 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
370 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
371 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
372 /**
373 * @}
374 */
375
376 /** @defgroup UART_Mode UART Transfer Mode
377 * @{
378 */
379 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */
380 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */
381 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
382 /**
383 * @}
384 */
385
386 /** @defgroup UART_State UART State
387 * @{
388 */
389 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
390 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
391 /**
392 * @}
393 */
394
395 /** @defgroup UART_Over_Sampling UART Over Sampling
396 * @{
397 */
398 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
399 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
400 /**
401 * @}
402 */
403
404 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
405 * @{
406 */
407 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
408 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
409 /**
410 * @}
411 */
412
413 /** @defgroup UART_ClockPrescaler UART Clock Prescaler
414 * @{
415 */
416 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
417 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
418 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
419 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
420 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
421 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
422 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
423 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
424 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
425 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
426 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
427 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
428 /**
429 * @}
430 */
431
432 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
433 * @{
434 */
435 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
436 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
437 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */
438 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */
439 /**
440 * @}
441 */
442
443 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout
444 * @{
445 */
446 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */
447 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */
448 /**
449 * @}
450 */
451
452 /** @defgroup UART_LIN UART Local Interconnection Network mode
453 * @{
454 */
455 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
456 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
457 /**
458 * @}
459 */
460
461 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
462 * @{
463 */
464 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
465 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
466 /**
467 * @}
468 */
469
470 /** @defgroup UART_DMA_Tx UART DMA Tx
471 * @{
472 */
473 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
474 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
475 /**
476 * @}
477 */
478
479 /** @defgroup UART_DMA_Rx UART DMA Rx
480 * @{
481 */
482 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
483 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
484 /**
485 * @}
486 */
487
488 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
489 * @{
490 */
491 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
492 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
493 /**
494 * @}
495 */
496
497 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
498 * @{
499 */
500 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
501 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
502 /**
503 * @}
504 */
505
506 /** @defgroup UART_Request_Parameters UART Request Parameters
507 * @{
508 */
509 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
510 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
511 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
512 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
513 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
514 /**
515 * @}
516 */
517
518 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
519 * @{
520 */
521 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
522 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
523 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
524 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
525 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
526 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
527 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
528 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
529 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
530 /**
531 * @}
532 */
533
534 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
535 * @{
536 */
537 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
538 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
539 /**
540 * @}
541 */
542
543 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
544 * @{
545 */
546 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
547 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
548 /**
549 * @}
550 */
551
552 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
553 * @{
554 */
555 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
556 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
557 /**
558 * @}
559 */
560
561 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
562 * @{
563 */
564 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
565 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
566 /**
567 * @}
568 */
569
570 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
571 * @{
572 */
573 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
574 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
575 /**
576 * @}
577 */
578
579 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
580 * @{
581 */
582 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
583 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
584 /**
585 * @}
586 */
587
588 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
589 * @{
590 */
591 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
592 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
593 /**
594 * @}
595 */
596
597 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
598 * @{
599 */
600 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */
601 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
602 /**
603 * @}
604 */
605
606 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
607 * @{
608 */
609 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
610 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
611 /**
612 * @}
613 */
614
615 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
616 * @{
617 */
618 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
619 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
620 /**
621 * @}
622 */
623
624 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
625 * @{
626 */
627 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
628 /**
629 * @}
630 */
631
632 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
633 * @{
634 */
635 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
636 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
637 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */
638 /**
639 * @}
640 */
641
642 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
643 * @{
644 */
645 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
646 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
647 /**
648 * @}
649 */
650
651 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
652 * @{
653 */
654 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */
655 /**
656 * @}
657 */
658
659 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
660 * @{
661 */
662 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
663 /**
664 * @}
665 */
666
667 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
668 * @{
669 */
670 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
671 /**
672 * @}
673 */
674
675 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
676 * @{
677 */
678 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
679 /**
680 * @}
681 */
682
683 /** @defgroup UART_Flags UART Status Flags
684 * Elements values convention: 0xXXXX
685 * - 0xXXXX : Flag mask in the ISR register
686 * @{
687 */
688 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
689 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
690 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
691 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
692 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
693 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
694 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
695 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
696 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
697 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
698 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
699 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
700 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
701 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */
702 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
703 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
704 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
705 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
706 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
707 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
708 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
709 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
710 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
711 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
712 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
713 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
714 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
715 /**
716 * @}
717 */
718
719 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
720 * Elements values convention: 000ZZZZZ0XXYYYYYb
721 * - YYYYY : Interrupt source position in the XX register (5bits)
722 * - XX : Interrupt source register (2bits)
723 * - 01: CR1 register
724 * - 10: CR2 register
725 * - 11: CR3 register
726 * - ZZZZZ : Flag position in the ISR register(5bits)
727 * Elements values convention: 000000000XXYYYYYb
728 * - YYYYY : Interrupt source position in the XX register (5bits)
729 * - XX : Interrupt source register (2bits)
730 * - 01: CR1 register
731 * - 10: CR2 register
732 * - 11: CR3 register
733 * Elements values convention: 0000ZZZZ00000000b
734 * - ZZZZ : Flag position in the ISR register(4bits)
735 * @{
736 */
737 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */
738 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
739 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
740 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
741 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
742 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
743 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
744 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
745 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
746 #define UART_IT_CM 0x112EU /*!< UART character match interruption */
747 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
748 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
749 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
750 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
751 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
752 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */
753
754 #define UART_IT_ERR 0x0060U /*!< UART error interruption */
755
756 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
757 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */
758 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */
759 /**
760 * @}
761 */
762
763 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
764 * @{
765 */
766 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
767 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
768 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
769 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
770 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
771 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
772 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
773 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
774 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
775 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
776 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
777 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */
778 /**
779 * @}
780 */
781
782
783 /**
784 * @}
785 */
786
787 /* Exported macros -----------------------------------------------------------*/
788 /** @defgroup UART_Exported_Macros UART Exported Macros
789 * @{
790 */
791
792 /** @brief Reset UART handle states.
793 * @param __HANDLE__ UART handle.
794 * @retval None
795 */
796 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
797 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
798 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
799 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
800 (__HANDLE__)->MspInitCallback = NULL; \
801 (__HANDLE__)->MspDeInitCallback = NULL; \
802 } while(0U)
803 #else
804 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
805 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
806 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
807 } while(0U)
808 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */
809
810 /** @brief Flush the UART Data registers.
811 * @param __HANDLE__ specifies the UART Handle.
812 * @retval None
813 */
814 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
815 do{ \
816 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
817 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
818 } while(0U)
819
820 /** @brief Clear the specified UART pending flag.
821 * @param __HANDLE__ specifies the UART Handle.
822 * @param __FLAG__ specifies the flag to check.
823 * This parameter can be any combination of the following values:
824 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
825 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
826 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
827 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
828 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
829 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
830 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
831 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag
832 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
833 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
834 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
835 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
836 * @retval None
837 */
838 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
839
840 /** @brief Clear the UART PE pending flag.
841 * @param __HANDLE__ specifies the UART Handle.
842 * @retval None
843 */
844 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
845
846 /** @brief Clear the UART FE pending flag.
847 * @param __HANDLE__ specifies the UART Handle.
848 * @retval None
849 */
850 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
851
852 /** @brief Clear the UART NE pending flag.
853 * @param __HANDLE__ specifies the UART Handle.
854 * @retval None
855 */
856 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
857
858 /** @brief Clear the UART ORE pending flag.
859 * @param __HANDLE__ specifies the UART Handle.
860 * @retval None
861 */
862 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
863
864 /** @brief Clear the UART IDLE pending flag.
865 * @param __HANDLE__ specifies the UART Handle.
866 * @retval None
867 */
868 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
869
870 /** @brief Clear the UART TX FIFO empty clear flag.
871 * @param __HANDLE__ specifies the UART Handle.
872 * @retval None
873 */
874 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
875
876 /** @brief Check whether the specified UART flag is set or not.
877 * @param __HANDLE__ specifies the UART Handle.
878 * @param __FLAG__ specifies the flag to check.
879 * This parameter can be one of the following values:
880 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
881 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
882 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
883 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
884 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
885 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
886 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
887 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
888 * @arg @ref UART_FLAG_SBKF Send Break flag
889 * @arg @ref UART_FLAG_CMF Character match flag
890 * @arg @ref UART_FLAG_BUSY Busy flag
891 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
892 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
893 * @arg @ref UART_FLAG_CTS CTS Change flag
894 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
895 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
896 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
897 * @arg @ref UART_FLAG_TC Transmission Complete flag
898 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
899 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
900 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag
901 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
902 * @arg @ref UART_FLAG_ORE Overrun Error flag
903 * @arg @ref UART_FLAG_NE Noise Error flag
904 * @arg @ref UART_FLAG_FE Framing Error flag
905 * @arg @ref UART_FLAG_PE Parity Error flag
906 * @retval The new state of __FLAG__ (TRUE or FALSE).
907 */
908 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
909
910 /** @brief Enable the specified UART interrupt.
911 * @param __HANDLE__ specifies the UART Handle.
912 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
913 * This parameter can be one of the following values:
914 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
915 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
916 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
917 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
918 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
919 * @arg @ref UART_IT_CM Character match interrupt
920 * @arg @ref UART_IT_CTS CTS change interrupt
921 * @arg @ref UART_IT_LBD LIN Break detection interrupt
922 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
923 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
924 * @arg @ref UART_IT_TC Transmission complete interrupt
925 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
926 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
927 * @arg @ref UART_IT_RTO Receive Timeout interrupt
928 * @arg @ref UART_IT_IDLE Idle line detection interrupt
929 * @arg @ref UART_IT_PE Parity Error interrupt
930 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
931 * @retval None
932 */
933 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
934 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
935 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
936
937
938 /** @brief Disable the specified UART interrupt.
939 * @param __HANDLE__ specifies the UART Handle.
940 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
941 * This parameter can be one of the following values:
942 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
943 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
944 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
945 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
946 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
947 * @arg @ref UART_IT_CM Character match interrupt
948 * @arg @ref UART_IT_CTS CTS change interrupt
949 * @arg @ref UART_IT_LBD LIN Break detection interrupt
950 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
951 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
952 * @arg @ref UART_IT_TC Transmission complete interrupt
953 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
954 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
955 * @arg @ref UART_IT_RTO Receive Timeout interrupt
956 * @arg @ref UART_IT_IDLE Idle line detection interrupt
957 * @arg @ref UART_IT_PE Parity Error interrupt
958 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
959 * @retval None
960 */
961 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
962 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
963 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
964
965 /** @brief Check whether the specified UART interrupt has occurred or not.
966 * @param __HANDLE__ specifies the UART Handle.
967 * @param __INTERRUPT__ specifies the UART interrupt to check.
968 * This parameter can be one of the following values:
969 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
970 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
971 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
972 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
973 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
974 * @arg @ref UART_IT_CM Character match interrupt
975 * @arg @ref UART_IT_CTS CTS change interrupt
976 * @arg @ref UART_IT_LBD LIN Break detection interrupt
977 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
978 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
979 * @arg @ref UART_IT_TC Transmission complete interrupt
980 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
981 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
982 * @arg @ref UART_IT_RTO Receive Timeout interrupt
983 * @arg @ref UART_IT_IDLE Idle line detection interrupt
984 * @arg @ref UART_IT_PE Parity Error interrupt
985 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
986 * @retval The new state of __INTERRUPT__ (SET or RESET).
987 */
988 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
989 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
990
991 /** @brief Check whether the specified UART interrupt source is enabled or not.
992 * @param __HANDLE__ specifies the UART Handle.
993 * @param __INTERRUPT__ specifies the UART interrupt source to check.
994 * This parameter can be one of the following values:
995 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
996 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
997 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
998 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
999 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1000 * @arg @ref UART_IT_CM Character match interrupt
1001 * @arg @ref UART_IT_CTS CTS change interrupt
1002 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1003 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1004 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1005 * @arg @ref UART_IT_TC Transmission complete interrupt
1006 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1007 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1008 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1009 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1010 * @arg @ref UART_IT_PE Parity Error interrupt
1011 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1012 * @retval The new state of __INTERRUPT__ (SET or RESET).
1013 */
1014 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \
1015 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \
1016 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET)
1017
1018 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
1019 * @param __HANDLE__ specifies the UART Handle.
1020 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1021 * to clear the corresponding interrupt
1022 * This parameter can be one of the following values:
1023 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
1024 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
1025 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
1026 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
1027 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
1028 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag
1029 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1030 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
1031 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
1032 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
1033 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
1034 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
1035 * @retval None
1036 */
1037 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1038
1039 /** @brief Set a specific UART request flag.
1040 * @param __HANDLE__ specifies the UART Handle.
1041 * @param __REQ__ specifies the request flag to set
1042 * This parameter can be one of the following values:
1043 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1044 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1045 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1046 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1047 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1048 * @retval None
1049 */
1050 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1051
1052 /** @brief Enable the UART one bit sample method.
1053 * @param __HANDLE__ specifies the UART Handle.
1054 * @retval None
1055 */
1056 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1057
1058 /** @brief Disable the UART one bit sample method.
1059 * @param __HANDLE__ specifies the UART Handle.
1060 * @retval None
1061 */
1062 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1063
1064 /** @brief Enable UART.
1065 * @param __HANDLE__ specifies the UART Handle.
1066 * @retval None
1067 */
1068 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1069
1070 /** @brief Disable UART.
1071 * @param __HANDLE__ specifies the UART Handle.
1072 * @retval None
1073 */
1074 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1075
1076 /** @brief Enable CTS flow control.
1077 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
1078 * without need to call HAL_UART_Init() function.
1079 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1080 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1081 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1082 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1083 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1084 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1085 * @param __HANDLE__ specifies the UART Handle.
1086 * @retval None
1087 */
1088 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
1089 do{ \
1090 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1091 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
1092 } while(0U)
1093
1094 /** @brief Disable CTS flow control.
1095 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
1096 * without need to call HAL_UART_Init() function.
1097 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1098 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1099 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1100 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1101 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1102 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1103 * @param __HANDLE__ specifies the UART Handle.
1104 * @retval None
1105 */
1106 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
1107 do{ \
1108 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1109 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
1110 } while(0U)
1111
1112 /** @brief Enable RTS flow control.
1113 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
1114 * without need to call HAL_UART_Init() function.
1115 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1116 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1117 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1118 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1119 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1120 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1121 * @param __HANDLE__ specifies the UART Handle.
1122 * @retval None
1123 */
1124 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
1125 do{ \
1126 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1127 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
1128 } while(0U)
1129
1130 /** @brief Disable RTS flow control.
1131 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
1132 * without need to call HAL_UART_Init() function.
1133 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1134 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1135 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1136 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1137 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1138 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1139 * @param __HANDLE__ specifies the UART Handle.
1140 * @retval None
1141 */
1142 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
1143 do{ \
1144 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1145 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
1146 } while(0U)
1147 /**
1148 * @}
1149 */
1150
1151 /* Private macros --------------------------------------------------------*/
1152 /** @defgroup UART_Private_Macros UART Private Macros
1153 * @{
1154 */
1155 /** @brief Get UART clok division factor from clock prescaler value.
1156 * @param __CLOCKPRESCALER__ UART prescaler value.
1157 * @retval UART clock division factor
1158 */
1159 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1160 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
1161 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
1162 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
1163 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
1164 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
1165 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
1166 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
1167 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
1168 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
1169 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
1170 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \
1171 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U)
1172
1173
1174 /** @brief BRR division operation to set BRR register with LPUART.
1175 * @param __PCLK__ LPUART clock.
1176 * @param __BAUD__ Baud rate set by the user.
1177 * @param __CLOCKPRESCALER__ UART prescaler value.
1178 * @retval Division result
1179 */
1180 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)\
1181 + (uint32_t)((__BAUD__)/2U)) / (__BAUD__)))
1182
1183 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
1184 * @param __PCLK__ UART clock.
1185 * @param __BAUD__ Baud rate set by the user.
1186 * @param __CLOCKPRESCALER__ UART prescaler value.
1187 * @retval Division result
1188 */
1189 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U)\
1190 + ((__BAUD__)/2U)) / (__BAUD__))
1191
1192 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
1193 * @param __PCLK__ UART clock.
1194 * @param __BAUD__ Baud rate set by the user.
1195 * @param __CLOCKPRESCALER__ UART prescaler value.
1196 * @retval Division result
1197 */
1198 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])\
1199 + ((__BAUD__)/2U)) / (__BAUD__))
1200
1201 /** @brief Check whether or not UART instance is Low Power UART.
1202 * @param __HANDLE__ specifies the UART Handle.
1203 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1204 */
1205 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1206
1207 /** @brief Check UART Baud rate.
1208 * @param __BAUDRATE__ Baudrate specified by the user.
1209 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
1210 * divided by the smallest oversampling used on the USART (i.e. 8)
1211 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1212 */
1213 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 12500001U)
1214
1215 /** @brief Check UART assertion time.
1216 * @param __TIME__ 5-bit value assertion time.
1217 * @retval Test result (TRUE or FALSE).
1218 */
1219 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1220
1221 /** @brief Check UART deassertion time.
1222 * @param __TIME__ 5-bit value deassertion time.
1223 * @retval Test result (TRUE or FALSE).
1224 */
1225 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1226
1227 /**
1228 * @brief Ensure that UART frame number of stop bits is valid.
1229 * @param __STOPBITS__ UART frame number of stop bits.
1230 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1231 */
1232 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1233 ((__STOPBITS__) == UART_STOPBITS_1) || \
1234 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1235 ((__STOPBITS__) == UART_STOPBITS_2))
1236
1237 /**
1238 * @brief Ensure that LPUART frame number of stop bits is valid.
1239 * @param __STOPBITS__ LPUART frame number of stop bits.
1240 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1241 */
1242 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1243 ((__STOPBITS__) == UART_STOPBITS_2))
1244
1245 /**
1246 * @brief Ensure that UART frame parity is valid.
1247 * @param __PARITY__ UART frame parity.
1248 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1249 */
1250 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1251 ((__PARITY__) == UART_PARITY_EVEN) || \
1252 ((__PARITY__) == UART_PARITY_ODD))
1253
1254 /**
1255 * @brief Ensure that UART hardware flow control is valid.
1256 * @param __CONTROL__ UART hardware flow control.
1257 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1258 */
1259 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1260 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1261 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
1262 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
1263 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1264
1265 /**
1266 * @brief Ensure that UART communication mode is valid.
1267 * @param __MODE__ UART communication mode.
1268 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1269 */
1270 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1271
1272 /**
1273 * @brief Ensure that UART state is valid.
1274 * @param __STATE__ UART state.
1275 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1276 */
1277 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1278 ((__STATE__) == UART_STATE_ENABLE))
1279
1280 /**
1281 * @brief Ensure that UART oversampling is valid.
1282 * @param __SAMPLING__ UART oversampling.
1283 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1284 */
1285 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1286 ((__SAMPLING__) == UART_OVERSAMPLING_8))
1287
1288 /**
1289 * @brief Ensure that UART frame sampling is valid.
1290 * @param __ONEBIT__ UART frame sampling.
1291 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1292 */
1293 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1294 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1295
1296 /**
1297 * @brief Ensure that UART auto Baud rate detection mode is valid.
1298 * @param __MODE__ UART auto Baud rate detection mode.
1299 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1300 */
1301 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1302 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1303 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1304 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1305
1306 /**
1307 * @brief Ensure that UART receiver timeout setting is valid.
1308 * @param __TIMEOUT__ UART receiver timeout setting.
1309 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1310 */
1311 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1312 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1313
1314 /** @brief Check the receiver timeout value.
1315 * @note The maximum UART receiver timeout value is 0xFFFFFF.
1316 * @param __TIMEOUTVALUE__ receiver timeout value.
1317 * @retval Test result (TRUE or FALSE)
1318 */
1319 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU)
1320
1321 /**
1322 * @brief Ensure that UART LIN state is valid.
1323 * @param __LIN__ UART LIN state.
1324 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1325 */
1326 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
1327 ((__LIN__) == UART_LIN_ENABLE))
1328
1329 /**
1330 * @brief Ensure that UART LIN break detection length is valid.
1331 * @param __LENGTH__ UART LIN break detection length.
1332 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1333 */
1334 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1335 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1336
1337 /**
1338 * @brief Ensure that UART DMA TX state is valid.
1339 * @param __DMATX__ UART DMA TX state.
1340 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1341 */
1342 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1343 ((__DMATX__) == UART_DMA_TX_ENABLE))
1344
1345 /**
1346 * @brief Ensure that UART DMA RX state is valid.
1347 * @param __DMARX__ UART DMA RX state.
1348 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1349 */
1350 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1351 ((__DMARX__) == UART_DMA_RX_ENABLE))
1352
1353 /**
1354 * @brief Ensure that UART half-duplex state is valid.
1355 * @param __HDSEL__ UART half-duplex state.
1356 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1357 */
1358 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1359 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1360
1361 /**
1362 * @brief Ensure that UART wake-up method is valid.
1363 * @param __WAKEUP__ UART wake-up method .
1364 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1365 */
1366 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1367 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1368
1369 /**
1370 * @brief Ensure that UART request parameter is valid.
1371 * @param __PARAM__ UART request parameter.
1372 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1373 */
1374 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
1375 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
1376 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
1377 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1378 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1379
1380 /**
1381 * @brief Ensure that UART advanced features initialization is valid.
1382 * @param __INIT__ UART advanced features initialization.
1383 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1384 */
1385 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
1386 UART_ADVFEATURE_TXINVERT_INIT | \
1387 UART_ADVFEATURE_RXINVERT_INIT | \
1388 UART_ADVFEATURE_DATAINVERT_INIT | \
1389 UART_ADVFEATURE_SWAP_INIT | \
1390 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1391 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1392 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1393 UART_ADVFEATURE_MSBFIRST_INIT))
1394
1395 /**
1396 * @brief Ensure that UART frame TX inversion setting is valid.
1397 * @param __TXINV__ UART frame TX inversion setting.
1398 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1399 */
1400 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1401 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1402
1403 /**
1404 * @brief Ensure that UART frame RX inversion setting is valid.
1405 * @param __RXINV__ UART frame RX inversion setting.
1406 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1407 */
1408 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1409 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1410
1411 /**
1412 * @brief Ensure that UART frame data inversion setting is valid.
1413 * @param __DATAINV__ UART frame data inversion setting.
1414 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1415 */
1416 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1417 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1418
1419 /**
1420 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1421 * @param __SWAP__ UART frame RX/TX pins swap setting.
1422 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1423 */
1424 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1425 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1426
1427 /**
1428 * @brief Ensure that UART frame overrun setting is valid.
1429 * @param __OVERRUN__ UART frame overrun setting.
1430 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1431 */
1432 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1433 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1434
1435 /**
1436 * @brief Ensure that UART auto Baud rate state is valid.
1437 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1438 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1439 */
1440 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1441 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1442
1443 /**
1444 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1445 * @param __DMA__ UART DMA enabling or disabling on error setting.
1446 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1447 */
1448 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1449 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1450
1451 /**
1452 * @brief Ensure that UART frame MSB first setting is valid.
1453 * @param __MSBFIRST__ UART frame MSB first setting.
1454 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1455 */
1456 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1457 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1458
1459 /**
1460 * @brief Ensure that UART stop mode state is valid.
1461 * @param __STOPMODE__ UART stop mode state.
1462 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1463 */
1464 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1465 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1466
1467 /**
1468 * @brief Ensure that UART mute mode state is valid.
1469 * @param __MUTE__ UART mute mode state.
1470 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1471 */
1472 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1473 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1474
1475 /**
1476 * @brief Ensure that UART wake-up selection is valid.
1477 * @param __WAKE__ UART wake-up selection.
1478 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1479 */
1480 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
1481 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
1482 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1483
1484 /**
1485 * @brief Ensure that UART driver enable polarity is valid.
1486 * @param __POLARITY__ UART driver enable polarity.
1487 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1488 */
1489 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1490 ((__POLARITY__) == UART_DE_POLARITY_LOW))
1491
1492 /**
1493 * @brief Ensure that UART Prescaler is valid.
1494 * @param __CLOCKPRESCALER__ UART Prescaler value.
1495 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1496 */
1497 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
1498 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
1499 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
1500 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
1501 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
1502 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
1503 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
1504 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
1505 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
1506 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
1507 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1508 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1509
1510 /**
1511 * @}
1512 */
1513
1514 /* Include UART HAL Extended module */
1515 #include "stm32h7xx_hal_uart_ex.h"
1516
1517
1518 /* Prescaler Table used in BRR computation macros.
1519 Declared as extern here to allow use of private UART macros, outside of HAL UART fonctions */
1520 extern const uint16_t UARTPrescTable[12];
1521
1522
1523 /* Exported functions --------------------------------------------------------*/
1524 /** @addtogroup UART_Exported_Functions UART Exported Functions
1525 * @{
1526 */
1527
1528 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1529 * @{
1530 */
1531
1532 /* Initialization and de-initialization functions ****************************/
1533 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1534 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1535 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1536 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1537 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1538 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1539 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1540
1541 /* Callbacks Register/UnRegister functions ***********************************/
1542 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1543 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
1544 pUART_CallbackTypeDef pCallback);
1545 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1546 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1547
1548 /**
1549 * @}
1550 */
1551
1552 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1553 * @{
1554 */
1555
1556 /* IO operation functions *****************************************************/
1557 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1558 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1559 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1560 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1561 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1562 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1563 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1564 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1565 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1566 /* Transfer Abort functions */
1567 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1568 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1569 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1570 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1571 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1572 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1573
1574 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1575 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1576 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1577 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1578 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1579 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1580 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1581 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1582 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1583
1584 /**
1585 * @}
1586 */
1587
1588 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1589 * @{
1590 */
1591
1592 /* Peripheral Control functions ************************************************/
1593 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue);
1594 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart);
1595 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart);
1596
1597 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1598 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1599 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1600 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1601 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1602 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1603
1604 /**
1605 * @}
1606 */
1607
1608 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1609 * @{
1610 */
1611
1612 /* Peripheral State and Errors functions **************************************************/
1613 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
1614 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
1615
1616 /**
1617 * @}
1618 */
1619
1620 /**
1621 * @}
1622 */
1623
1624 /* Private functions -----------------------------------------------------------*/
1625 /** @addtogroup UART_Private_Functions UART Private Functions
1626 * @{
1627 */
1628 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1629 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1630 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1631 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1632 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1633 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
1634 uint32_t Tickstart, uint32_t Timeout);
1635 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1636
1637 /**
1638 * @}
1639 */
1640
1641 /**
1642 * @}
1643 */
1644
1645 /**
1646 * @}
1647 */
1648
1649 #ifdef __cplusplus
1650 }
1651 #endif
1652
1653 #endif /* STM32H7xx_HAL_UART_H */
1654
1655 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/