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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_usart.h
blob15b610e8128c0c1c3289915cbc6b45b23b039965
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_usart.h
4 * @author MCD Application Team
5 * @brief Header file of USART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_USART_H
22 #define STM32H7xx_HAL_USART_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
30
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup USART
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup USART_Exported_Types USART Exported Types
41 * @{
42 */
43
44 /**
45 * @brief USART Init Structure definition
46 */
47 typedef struct
48 {
49 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
50 The baud rate is computed using the following formula:
51 Baud Rate Register[15:4] = ((2 * fclk_pres) / ((huart->Init.BaudRate)))[15:4]
52 Baud Rate Register[3] = 0
53 Baud Rate Register[2:0] = (((2 * fclk_pres) / ((huart->Init.BaudRate)))[3:0]) >> 1
54 where fclk_pres is the USART input clock frequency (fclk) divided by a prescaler.
55 @note Oversampling by 8 is systematically applied to achieve high baud rates. */
56
57 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
58 This parameter can be a value of @ref USARTEx_Word_Length. */
59
60 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
61 This parameter can be a value of @ref USART_Stop_Bits. */
62
63 uint32_t Parity; /*!< Specifies the parity mode.
64 This parameter can be a value of @ref USART_Parity
65 @note When parity is enabled, the computed parity is inserted
66 at the MSB position of the transmitted data (9th bit when
67 the word length is set to 9 data bits; 8th bit when the
68 word length is set to 8 data bits). */
69
70 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
71 This parameter can be a value of @ref USART_Mode. */
72
73 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
74 This parameter can be a value of @ref USART_Clock_Polarity. */
75
76 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
77 This parameter can be a value of @ref USART_Clock_Phase. */
78
79 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
80 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
81 This parameter can be a value of @ref USART_Last_Bit. */
82
83 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source.
84 This parameter can be a value of @ref USART_ClockPrescaler. */
85 } USART_InitTypeDef;
86
87 /**
88 * @brief HAL USART State structures definition
89 */
90 typedef enum
91 {
92 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
93 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
94 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
95 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
96 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
97 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
98 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
99 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
100 } HAL_USART_StateTypeDef;
101
102 /**
103 * @brief USART clock sources definitions
104 */
105 typedef enum
106 {
107 USART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
108 USART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
109 USART_CLOCKSOURCE_PLL2 = 0x02U, /*!< PLL2Q clock source */
110 USART_CLOCKSOURCE_PLL3 = 0x04U, /*!< PLL3Q clock source */
111 USART_CLOCKSOURCE_HSI = 0x08U, /*!< HSI clock source */
112 USART_CLOCKSOURCE_CSI = 0x10U, /*!< CSI clock source */
113 USART_CLOCKSOURCE_LSE = 0x20U, /*!< LSE clock source */
114 USART_CLOCKSOURCE_UNDEFINED = 0x40U /*!< Undefined clock source */
115 } USART_ClockSourceTypeDef;
116
117 /**
118 * @brief USART handle Structure definition
119 */
120 typedef struct __USART_HandleTypeDef
121 {
122 USART_TypeDef *Instance; /*!< USART registers base address */
123
124 USART_InitTypeDef Init; /*!< USART communication parameters */
125
126 uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
127
128 uint16_t TxXferSize; /*!< USART Tx Transfer size */
129
130 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
131
132 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
133
134 uint16_t RxXferSize; /*!< USART Rx Transfer size */
135
136 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
137
138 uint16_t Mask; /*!< USART Rx RDR register mask */
139
140 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
141
142 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
143
144 uint32_t SlaveMode; /*!< Enable/Disable UART SPI Slave Mode. This parameter can be a value
145 of @ref USARTEx_Slave_Mode */
146
147 uint32_t FifoMode; /*!< Specifies if the FIFO mode will be used. This parameter can be a value
148 of @ref USARTEx_FIFO_mode. */
149
150 void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */
151
152 void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */
153
154 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
155
156 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
157
158 HAL_LockTypeDef Lock; /*!< Locking object */
159
160 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */
161
162 __IO uint32_t ErrorCode; /*!< USART Error code */
163
164 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
165 void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */
166 void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */
167 void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */
168 void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */
169 void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */
170 void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */
171 void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */
172 void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Fifo Full Callback */
173 void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Fifo Empty Callback */
174
175 void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */
176 void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */
177 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
178
179 } USART_HandleTypeDef;
180
181 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
182 /**
183 * @brief HAL USART Callback ID enumeration definition
184 */
185 typedef enum
186 {
187 HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */
188 HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */
189 HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */
190 HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */
191 HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */
192 HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */
193 HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */
194 HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U, /*!< USART Rx Fifo Full Callback ID */
195 HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U, /*!< USART Tx Fifo Empty Callback ID */
196
197 HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */
198 HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */
199
200 } HAL_USART_CallbackIDTypeDef;
201
202 /**
203 * @brief HAL USART Callback pointer definition
204 */
205 typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */
206
207 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
208
209 /**
210 * @}
211 */
212
213 /* Exported constants --------------------------------------------------------*/
214 /** @defgroup USART_Exported_Constants USART Exported Constants
215 * @{
216 */
217
218 /** @defgroup USART_Error_Definition USART Error Definition
219 * @{
220 */
221 #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
222 #define HAL_USART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
223 #define HAL_USART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
224 #define HAL_USART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
225 #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
226 #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
227 #define HAL_USART_ERROR_UDR ((uint32_t)0x00000020U) /*!< SPI slave underrun error */
228 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
229 #define HAL_USART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */
230 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
231 #define HAL_USART_ERROR_RTO ((uint32_t)0x00000080U) /*!< Receiver Timeout error */
232 /**
233 * @}
234 */
235
236 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
237 * @{
238 */
239 #define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */
240 #define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */
241 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */
242 #define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */
243 /**
244 * @}
245 */
246
247 /** @defgroup USART_Parity USART Parity
248 * @{
249 */
250 #define USART_PARITY_NONE 0x00000000U /*!< No parity */
251 #define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
252 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
253 /**
254 * @}
255 */
256
257 /** @defgroup USART_Mode USART Mode
258 * @{
259 */
260 #define USART_MODE_RX USART_CR1_RE /*!< RX mode */
261 #define USART_MODE_TX USART_CR1_TE /*!< TX mode */
262 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
263 /**
264 * @}
265 */
266
267 /** @defgroup USART_Over_Sampling USART Over Sampling
268 * @{
269 */
270 #define USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
271 #define USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
272 /**
273 * @}
274 */
275
276 /** @defgroup USART_Clock USART Clock
277 * @{
278 */
279 #define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */
280 #define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */
281 /**
282 * @}
283 */
284
285 /** @defgroup USART_Clock_Polarity USART Clock Polarity
286 * @{
287 */
288 #define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */
289 #define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */
290 /**
291 * @}
292 */
293
294 /** @defgroup USART_Clock_Phase USART Clock Phase
295 * @{
296 */
297 #define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */
298 #define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */
299 /**
300 * @}
301 */
302
303 /** @defgroup USART_Last_Bit USART Last Bit
304 * @{
305 */
306 #define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */
307 #define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */
308 /**
309 * @}
310 */
311
312 /** @defgroup USART_ClockPrescaler USART Clock Prescaler
313 * @{
314 */
315 #define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
316 #define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
317 #define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
318 #define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
319 #define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
320 #define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
321 #define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
322 #define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
323 #define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
324 #define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
325 #define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
326 #define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
327
328 /**
329 * @}
330 */
331
332 /** @defgroup USART_Request_Parameters USART Request Parameters
333 * @{
334 */
335 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
336 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
337 /**
338 * @}
339 */
340
341 /** @defgroup USART_Flags USART Flags
342 * Elements values convention: 0xXXXX
343 * - 0xXXXX : Flag mask in the ISR register
344 * @{
345 */
346 #define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */
347 #define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */
348 #define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */
349 #define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */
350 #define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */
351 #define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
352 #define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */
353 #define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */
354 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */
355 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */
356 #define USART_FLAG_RTOF USART_ISR_RTOF /*!< USART receiver timeout flag */
357 #define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */
358 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */
359 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */
360 #define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */
361 #define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */
362 #define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */
363 #define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */
364 #define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */
365 /**
366 * @}
367 */
368
369 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
370 * Elements values convention: 0000ZZZZ0XXYYYYYb
371 * - YYYYY : Interrupt source position in the XX register (5bits)
372 * - XX : Interrupt source register (2bits)
373 * - 01: CR1 register
374 * - 10: CR2 register
375 * - 11: CR3 register
376 * - ZZZZ : Flag position in the ISR register(4bits)
377 * @{
378 */
379
380 #define USART_IT_PE 0x0028U /*!< USART parity error interruption */
381 #define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */
382 #define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */
383 #define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */
384 #define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */
385 #define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */
386 #define USART_IT_IDLE 0x0424U /*!< USART idle interruption */
387 #define USART_IT_ERR 0x0060U /*!< USART error interruption */
388 #define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */
389 #define USART_IT_NE 0x0200U /*!< USART noise error interruption */
390 #define USART_IT_FE 0x0100U /*!< USART frame error interruption */
391 #define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */
392 #define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */
393 #define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */
394 #define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */
395
396 /**
397 * @}
398 */
399
400 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
401 * @{
402 */
403 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
404 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
405 #define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
406 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
407 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
408 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
409 #define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */
410 #define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */
411 #define USART_CLEAR_RTOF USART_ICR_RTOCF /*!< USART receiver timeout clear flag */
412 /**
413 * @}
414 */
415
416 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
417 * @{
418 */
419 #define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */
420 #define USART_CR_MASK 0x00E0U /*!< USART control register mask */
421 #define USART_CR_POS 5U /*!< USART control register position */
422 #define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */
423 #define USART_ISR_POS 8U /*!< USART ISR register position */
424 /**
425 * @}
426 */
427
428 /**
429 * @}
430 */
431
432 /* Exported macros -----------------------------------------------------------*/
433 /** @defgroup USART_Exported_Macros USART Exported Macros
434 * @{
435 */
436
437 /** @brief Reset USART handle state.
438 * @param __HANDLE__ USART handle.
439 * @retval None
440 */
441 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
442 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \
443 (__HANDLE__)->State = HAL_USART_STATE_RESET; \
444 (__HANDLE__)->MspInitCallback = NULL; \
445 (__HANDLE__)->MspDeInitCallback = NULL; \
446 } while(0U)
447 #else
448 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
449 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
450
451 /** @brief Check whether the specified USART flag is set or not.
452 * @param __HANDLE__ specifies the USART Handle
453 * @param __FLAG__ specifies the flag to check.
454 * This parameter can be one of the following values:
455 * @arg @ref USART_FLAG_TXFT TXFIFO threshold flag
456 * @arg @ref USART_FLAG_RXFT RXFIFO threshold flag
457 * @arg @ref USART_FLAG_RXFF RXFIFO Full flag
458 * @arg @ref USART_FLAG_TXFE TXFIFO Empty flag
459 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
460 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
461 * @arg @ref USART_FLAG_BUSY Busy flag
462 * @arg @ref USART_FLAG_UDR SPI slave underrun error flag
463 * @arg @ref USART_FLAG_TXE Transmit data register empty flag
464 * @arg @ref USART_FLAG_TXFNF TXFIFO not full flag
465 * @arg @ref USART_FLAG_TC Transmission Complete flag
466 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag
467 * @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag
468 * @arg @ref USART_FLAG_RTOF Receiver Timeout flag
469 * @arg @ref USART_FLAG_IDLE Idle Line detection flag
470 * @arg @ref USART_FLAG_ORE OverRun Error flag
471 * @arg @ref USART_FLAG_NE Noise Error flag
472 * @arg @ref USART_FLAG_FE Framing Error flag
473 * @arg @ref USART_FLAG_PE Parity Error flag
474 * @retval The new state of __FLAG__ (TRUE or FALSE).
475 */
476 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
477
478 /** @brief Clear the specified USART pending flag.
479 * @param __HANDLE__ specifies the USART Handle.
480 * @param __FLAG__ specifies the flag to check.
481 * This parameter can be any combination of the following values:
482 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
483 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
484 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
485 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
486 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
487 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
488 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
489 * @arg @ref USART_CLEAR_RTOF Receiver Timeout clear flag
490 * @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag
491 * @retval None
492 */
493 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
494
495 /** @brief Clear the USART PE pending flag.
496 * @param __HANDLE__ specifies the USART Handle.
497 * @retval None
498 */
499 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
500
501 /** @brief Clear the USART FE pending flag.
502 * @param __HANDLE__ specifies the USART Handle.
503 * @retval None
504 */
505 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
506
507 /** @brief Clear the USART NE pending flag.
508 * @param __HANDLE__ specifies the USART Handle.
509 * @retval None
510 */
511 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
512
513 /** @brief Clear the USART ORE pending flag.
514 * @param __HANDLE__ specifies the USART Handle.
515 * @retval None
516 */
517 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
518
519 /** @brief Clear the USART IDLE pending flag.
520 * @param __HANDLE__ specifies the USART Handle.
521 * @retval None
522 */
523 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
524
525 /** @brief Clear the USART TX FIFO empty clear flag.
526 * @param __HANDLE__ specifies the USART Handle.
527 * @retval None
528 */
529 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF)
530
531 /** @brief Clear SPI slave underrun error flag.
532 * @param __HANDLE__ specifies the USART Handle.
533 * @retval None
534 */
535 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF)
536
537 /** @brief Enable the specified USART interrupt.
538 * @param __HANDLE__ specifies the USART Handle.
539 * @param __INTERRUPT__ specifies the USART interrupt source to enable.
540 * This parameter can be one of the following values:
541 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
542 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
543 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
544 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
545 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
546 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
547 * @arg @ref USART_IT_TC Transmission complete interrupt
548 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
549 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
550 * @arg @ref USART_IT_IDLE Idle line detection interrupt
551 * @arg @ref USART_IT_PE Parity Error interrupt
552 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
553 * @retval None
554 */
555 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
556 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
557 ((__HANDLE__)->Instance->CR3 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
558
559 /** @brief Disable the specified USART interrupt.
560 * @param __HANDLE__ specifies the USART Handle.
561 * @param __INTERRUPT__ specifies the USART interrupt source to disable.
562 * This parameter can be one of the following values:
563 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
564 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
565 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
566 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
567 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
568 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
569 * @arg @ref USART_IT_TC Transmission complete interrupt
570 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
571 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
572 * @arg @ref USART_IT_IDLE Idle line detection interrupt
573 * @arg @ref USART_IT_PE Parity Error interrupt
574 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
575 * @retval None
576 */
577 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
578 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
579 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
580
581
582 /** @brief Check whether the specified USART interrupt has occurred or not.
583 * @param __HANDLE__ specifies the USART Handle.
584 * @param __INTERRUPT__ specifies the USART interrupt source to check.
585 * This parameter can be one of the following values:
586 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
587 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
588 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
589 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
590 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
591 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
592 * @arg @ref USART_IT_TC Transmission complete interrupt
593 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
594 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
595 * @arg @ref USART_IT_IDLE Idle line detection interrupt
596 * @arg @ref USART_IT_ORE OverRun Error interrupt
597 * @arg @ref USART_IT_NE Noise Error interrupt
598 * @arg @ref USART_IT_FE Framing Error interrupt
599 * @arg @ref USART_IT_PE Parity Error interrupt
600 * @retval The new state of __INTERRUPT__ (SET or RESET).
601 */
602 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
603 & ((uint32_t)0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>> USART_ISR_POS))) != 0U) ? SET : RESET)
604
605 /** @brief Check whether the specified USART interrupt source is enabled or not.
606 * @param __HANDLE__ specifies the USART Handle.
607 * @param __INTERRUPT__ specifies the USART interrupt source to check.
608 * This parameter can be one of the following values:
609 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
610 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
611 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
612 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
613 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
614 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
615 * @arg @ref USART_IT_TC Transmission complete interrupt
616 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
617 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
618 * @arg @ref USART_IT_IDLE Idle line detection interrupt
619 * @arg @ref USART_IT_ORE OverRun Error interrupt
620 * @arg @ref USART_IT_NE Noise Error interrupt
621 * @arg @ref USART_IT_FE Framing Error interrupt
622 * @arg @ref USART_IT_PE Parity Error interrupt
623 * @retval The new state of __INTERRUPT__ (SET or RESET).
624 */
625 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ? (__HANDLE__)->Instance->CR1 : \
626 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ? (__HANDLE__)->Instance->CR2 : \
627 (__HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & USART_IT_MASK))) != 0U) ? SET : RESET)
628
629
630 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
631 * @param __HANDLE__ specifies the USART Handle.
632 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
633 * to clear the corresponding interrupt.
634 * This parameter can be one of the following values:
635 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
636 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
637 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
638 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
639 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
640 * @arg @ref USART_CLEAR_RTOF Receiver timeout clear flag
641 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
642 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
643 * @retval None
644 */
645 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
646
647 /** @brief Set a specific USART request flag.
648 * @param __HANDLE__ specifies the USART Handle.
649 * @param __REQ__ specifies the request flag to set.
650 * This parameter can be one of the following values:
651 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
652 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
653 *
654 * @retval None
655 */
656 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
657
658 /** @brief Enable the USART one bit sample method.
659 * @param __HANDLE__ specifies the USART Handle.
660 * @retval None
661 */
662 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
663
664 /** @brief Disable the USART one bit sample method.
665 * @param __HANDLE__ specifies the USART Handle.
666 * @retval None
667 */
668 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
669
670 /** @brief Enable USART.
671 * @param __HANDLE__ specifies the USART Handle.
672 * @retval None
673 */
674 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
675
676 /** @brief Disable USART.
677 * @param __HANDLE__ specifies the USART Handle.
678 * @retval None
679 */
680 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
681
682 /**
683 * @}
684 */
685
686 /* Private macros --------------------------------------------------------*/
687 /** @defgroup USART_Private_Macros USART Private Macros
688 * @{
689 */
690
691 /** @brief Get USART clock division factor from clock prescaler value.
692 * @param __CLOCKPRESCALER__ USART prescaler value.
693 * @retval USART clock division factor
694 */
695 #define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
696 (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \
697 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \
698 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \
699 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \
700 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \
701 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \
702 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \
703 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \
704 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \
705 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \
706 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : \
707 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256) ? 256U : 1U)
708
709 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
710 * @param __PCLK__ USART clock.
711 * @param __BAUD__ Baud rate set by the user.
712 * @param __CLOCKPRESCALER__ UART prescaler value.
713 * @retval Division result
714 */
715 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\
716 + ((__BAUD__)/2U)) / (__BAUD__))
717
718 /** @brief Report the USART clock source.
719 * @param __HANDLE__ specifies the USART Handle.
720 * @param __CLOCKSOURCE__ output variable.
721 * @retval the USART clocking source, written in __CLOCKSOURCE__.
722 */
723 #if defined(UART9) && defined(USART10)
724 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
725 do { \
726 if((__HANDLE__)->Instance == USART1) \
727 { \
728 switch(__HAL_RCC_GET_USART1_SOURCE()) \
729 { \
730 case RCC_USART1CLKSOURCE_D2PCLK2: \
731 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
732 break; \
733 case RCC_USART1CLKSOURCE_PLL2: \
734 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
735 break; \
736 case RCC_USART1CLKSOURCE_PLL3: \
737 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
738 break; \
739 case RCC_USART1CLKSOURCE_HSI: \
740 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
741 break; \
742 case RCC_USART1CLKSOURCE_CSI: \
743 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
744 break; \
745 case RCC_USART1CLKSOURCE_LSE: \
746 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
747 break; \
748 default: \
749 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
750 break; \
751 } \
752 } \
753 else if((__HANDLE__)->Instance == USART2) \
754 { \
755 switch(__HAL_RCC_GET_USART2_SOURCE()) \
756 { \
757 case RCC_USART2CLKSOURCE_D2PCLK1: \
758 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
759 break; \
760 case RCC_USART2CLKSOURCE_PLL2: \
761 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
762 break; \
763 case RCC_USART2CLKSOURCE_PLL3: \
764 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
765 break; \
766 case RCC_USART2CLKSOURCE_HSI: \
767 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
768 break; \
769 case RCC_USART2CLKSOURCE_CSI: \
770 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
771 break; \
772 case RCC_USART2CLKSOURCE_LSE: \
773 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
774 break; \
775 default: \
776 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
777 break; \
778 } \
779 } \
780 else if((__HANDLE__)->Instance == USART3) \
781 { \
782 switch(__HAL_RCC_GET_USART3_SOURCE()) \
783 { \
784 case RCC_USART3CLKSOURCE_D2PCLK1: \
785 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
786 break; \
787 case RCC_USART3CLKSOURCE_PLL2: \
788 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
789 break; \
790 case RCC_USART3CLKSOURCE_PLL3: \
791 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
792 break; \
793 case RCC_USART3CLKSOURCE_HSI: \
794 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
795 break; \
796 case RCC_USART3CLKSOURCE_CSI: \
797 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
798 break; \
799 case RCC_USART3CLKSOURCE_LSE: \
800 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
801 break; \
802 default: \
803 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
804 break; \
805 } \
806 } \
807 else if((__HANDLE__)->Instance == USART6) \
808 { \
809 switch(__HAL_RCC_GET_USART6_SOURCE()) \
810 { \
811 case RCC_USART6CLKSOURCE_D2PCLK2: \
812 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
813 break; \
814 case RCC_USART6CLKSOURCE_PLL2: \
815 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
816 break; \
817 case RCC_USART6CLKSOURCE_PLL3: \
818 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
819 break; \
820 case RCC_USART6CLKSOURCE_HSI: \
821 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
822 break; \
823 case RCC_USART6CLKSOURCE_CSI: \
824 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
825 break; \
826 case RCC_USART6CLKSOURCE_LSE: \
827 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
828 break; \
829 default: \
830 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
831 break; \
832 } \
833 } \
834 else if((__HANDLE__)->Instance == USART10) \
835 { \
836 switch(__HAL_RCC_GET_USART10_SOURCE()) \
837 { \
838 case RCC_USART10CLKSOURCE_D2PCLK2: \
839 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
840 break; \
841 case RCC_USART10CLKSOURCE_PLL2: \
842 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
843 break; \
844 case RCC_USART10CLKSOURCE_PLL3: \
845 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
846 break; \
847 case RCC_USART10CLKSOURCE_HSI: \
848 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
849 break; \
850 case RCC_USART10CLKSOURCE_CSI: \
851 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
852 break; \
853 case RCC_USART10CLKSOURCE_LSE: \
854 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
855 break; \
856 default: \
857 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
858 break; \
859 } \
860 } \
861 else \
862 { \
863 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
864 } \
865 } while(0U)
866 #else
867 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
868 do { \
869 if((__HANDLE__)->Instance == USART1) \
870 { \
871 switch(__HAL_RCC_GET_USART1_SOURCE()) \
872 { \
873 case RCC_USART1CLKSOURCE_D2PCLK2: \
874 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
875 break; \
876 case RCC_USART1CLKSOURCE_PLL2: \
877 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
878 break; \
879 case RCC_USART1CLKSOURCE_PLL3: \
880 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
881 break; \
882 case RCC_USART1CLKSOURCE_HSI: \
883 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
884 break; \
885 case RCC_USART1CLKSOURCE_CSI: \
886 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
887 break; \
888 case RCC_USART1CLKSOURCE_LSE: \
889 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
890 break; \
891 default: \
892 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
893 break; \
894 } \
895 } \
896 else if((__HANDLE__)->Instance == USART2) \
897 { \
898 switch(__HAL_RCC_GET_USART2_SOURCE()) \
899 { \
900 case RCC_USART2CLKSOURCE_D2PCLK1: \
901 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
902 break; \
903 case RCC_USART2CLKSOURCE_PLL2: \
904 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
905 break; \
906 case RCC_USART2CLKSOURCE_PLL3: \
907 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
908 break; \
909 case RCC_USART2CLKSOURCE_HSI: \
910 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
911 break; \
912 case RCC_USART2CLKSOURCE_CSI: \
913 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
914 break; \
915 case RCC_USART2CLKSOURCE_LSE: \
916 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
917 break; \
918 default: \
919 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
920 break; \
921 } \
922 } \
923 else if((__HANDLE__)->Instance == USART3) \
924 { \
925 switch(__HAL_RCC_GET_USART3_SOURCE()) \
926 { \
927 case RCC_USART3CLKSOURCE_D2PCLK1: \
928 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
929 break; \
930 case RCC_USART3CLKSOURCE_PLL2: \
931 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
932 break; \
933 case RCC_USART3CLKSOURCE_PLL3: \
934 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
935 break; \
936 case RCC_USART3CLKSOURCE_HSI: \
937 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
938 break; \
939 case RCC_USART3CLKSOURCE_CSI: \
940 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
941 break; \
942 case RCC_USART3CLKSOURCE_LSE: \
943 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
944 break; \
945 default: \
946 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
947 break; \
948 } \
949 } \
950 else if((__HANDLE__)->Instance == USART6) \
951 { \
952 switch(__HAL_RCC_GET_USART6_SOURCE()) \
953 { \
954 case RCC_USART6CLKSOURCE_D2PCLK2: \
955 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
956 break; \
957 case RCC_USART6CLKSOURCE_PLL2: \
958 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
959 break; \
960 case RCC_USART6CLKSOURCE_PLL3: \
961 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
962 break; \
963 case RCC_USART6CLKSOURCE_HSI: \
964 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
965 break; \
966 case RCC_USART6CLKSOURCE_CSI: \
967 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
968 break; \
969 case RCC_USART6CLKSOURCE_LSE: \
970 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
971 break; \
972 default: \
973 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
974 break; \
975 } \
976 } \
977 else \
978 { \
979 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
980 } \
981 } while(0U)
982 #endif /* UART9 && USART10 */
983
984 /** @brief Check USART Baud rate.
985 * @param __BAUDRATE__ Baudrate specified by the user.
986 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
987 * divided by the smallest oversampling used on the USART (i.e. 8)
988 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */
989 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
990
991 /**
992 * @brief Ensure that USART frame number of stop bits is valid.
993 * @param __STOPBITS__ USART frame number of stop bits.
994 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
995 */
996 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
997 ((__STOPBITS__) == USART_STOPBITS_1) || \
998 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
999 ((__STOPBITS__) == USART_STOPBITS_2))
1000
1001 /**
1002 * @brief Ensure that USART frame parity is valid.
1003 * @param __PARITY__ USART frame parity.
1004 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1005 */
1006 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
1007 ((__PARITY__) == USART_PARITY_EVEN) || \
1008 ((__PARITY__) == USART_PARITY_ODD))
1009
1010 /**
1011 * @brief Ensure that USART communication mode is valid.
1012 * @param __MODE__ USART communication mode.
1013 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1014 */
1015 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
1016
1017 /**
1018 * @brief Ensure that USART oversampling is valid.
1019 * @param __SAMPLING__ USART oversampling.
1020 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1021 */
1022 #define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
1023 ((__SAMPLING__) == USART_OVERSAMPLING_8))
1024
1025 /**
1026 * @brief Ensure that USART clock state is valid.
1027 * @param __CLOCK__ USART clock state.
1028 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
1029 */
1030 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
1031 ((__CLOCK__) == USART_CLOCK_ENABLE))
1032
1033 /**
1034 * @brief Ensure that USART frame polarity is valid.
1035 * @param __CPOL__ USART frame polarity.
1036 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
1037 */
1038 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
1039
1040 /**
1041 * @brief Ensure that USART frame phase is valid.
1042 * @param __CPHA__ USART frame phase.
1043 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
1044 */
1045 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
1046
1047 /**
1048 * @brief Ensure that USART frame last bit clock pulse setting is valid.
1049 * @param __LASTBIT__ USART frame last bit clock pulse setting.
1050 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
1051 */
1052 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
1053 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
1054
1055 /**
1056 * @brief Ensure that USART request parameter is valid.
1057 * @param __PARAM__ USART request parameter.
1058 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1059 */
1060 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
1061 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
1062
1063 /**
1064 * @brief Ensure that USART Prescaler is valid.
1065 * @param __CLOCKPRESCALER__ USART Prescaler value.
1066 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1067 */
1068 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \
1069 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \
1070 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \
1071 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \
1072 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \
1073 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \
1074 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \
1075 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \
1076 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \
1077 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \
1078 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \
1079 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256))
1080
1081 /**
1082 * @}
1083 */
1084
1085 /* Include USART HAL Extended module */
1086 #include "stm32h7xx_hal_usart_ex.h"
1087
1088 /* Exported functions --------------------------------------------------------*/
1089 /** @addtogroup USART_Exported_Functions USART Exported Functions
1090 * @{
1091 */
1092
1093 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
1094 * @{
1095 */
1096
1097 /* Initialization and de-initialization functions ****************************/
1098 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
1099 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
1100 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
1101 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
1102
1103 /* Callbacks Register/UnRegister functions ***********************************/
1104 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1105 HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
1106 pUSART_CallbackTypeDef pCallback);
1107 HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
1108 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1109
1110 /**
1111 * @}
1112 */
1113
1114 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
1115 * @{
1116 */
1117
1118 /* IO operation functions *****************************************************/
1119 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
1120 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
1121 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
1122 uint16_t Size, uint32_t Timeout);
1123 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
1124 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1125 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
1126 uint16_t Size);
1127 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
1128 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1129 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
1130 uint16_t Size);
1131 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
1132 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
1133 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
1134 /* Transfer Abort functions */
1135 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
1136 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
1137
1138 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
1139 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
1140 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
1141 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
1142 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
1143 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
1144 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
1145 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
1146
1147 /**
1148 * @}
1149 */
1150
1151 /** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
1152 * @{
1153 */
1154
1155 /* Peripheral State and Error functions ***************************************/
1156 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
1157 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
1158
1159 /**
1160 * @}
1161 */
1162
1163 /**
1164 * @}
1165 */
1166
1167 /**
1168 * @}
1169 */
1170
1171 /**
1172 * @}
1173 */
1174
1175 #ifdef __cplusplus
1176 }
1177 #endif
1178
1179 #endif /* STM32H7xx_HAL_USART_H */
1180
1181 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/