[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_ll_hrtim.h
| blob | 69d00fceefce671798f9626588df7e3e230e75dc |
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_hrtim.h
4 * @author MCD Application Team
5 * @brief Header file of HRTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_LL_HRTIM_H
22 #define STM32H7xx_LL_HRTIM_H
24 #ifdef __cplusplus
26 #endif
28 /* Includes ------------------------------------------------------------------*/
31 /** @addtogroup STM32H7xx_LL_Driver
32 * @{
33 */
35 #if defined (HRTIM1)
37 /** @defgroup HRTIM_LL HRTIM
38 * @{
39 */
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /** @defgroup HRTIM_LL_Private_Variables HRTIM Private Variables
44 * @{
45 */
47 {
54 };
57 {
62 };
65 {
76 };
79 {
90 };
93 {
104 };
107 {
113 };
116 {
123 };
126 {
133 };
136 {
147 };
150 {
156 HRTIM_TIMCR_UPDGAT /* 5: TIMER E */
157 };
160 {
167 };
170 {
181 };
184 {
195 };
198 {
204 };
206 /**
207 * @}
208 */
211 /* Private constants ---------------------------------------------------------*/
212 /** @defgroup HRTIM_LL_Private_Constants HRTIM Private Constants
213 * @{
214 */
215 #define HRTIM_CR1_UDIS_MASK ((uint32_t)(HRTIM_CR1_MUDIS |\
216 HRTIM_CR1_TAUDIS |\
217 HRTIM_CR1_TBUDIS |\
218 HRTIM_CR1_TCUDIS |\
219 HRTIM_CR1_TDUDIS |\
220 HRTIM_CR1_TEUDIS))
222 #define HRTIM_CR2_SWUPD_MASK ((uint32_t)(HRTIM_CR2_MSWU |\
223 HRTIM_CR2_TASWU |\
224 HRTIM_CR2_TBSWU |\
225 HRTIM_CR2_TCSWU |\
226 HRTIM_CR2_TDSWU |\
227 HRTIM_CR2_TESWU))
229 #define HRTIM_CR2_SWRST_MASK ((uint32_t)(HRTIM_CR2_MRST |\
230 HRTIM_CR2_TARST |\
231 HRTIM_CR2_TBRST |\
232 HRTIM_CR2_TCRST |\
233 HRTIM_CR2_TDRST |\
234 HRTIM_CR2_TERST))
236 #define HRTIM_OENR_OEN_MASK ((uint32_t)(HRTIM_OENR_TA1OEN |\
237 HRTIM_OENR_TA2OEN |\
238 HRTIM_OENR_TB1OEN |\
239 HRTIM_OENR_TB2OEN |\
240 HRTIM_OENR_TC1OEN |\
241 HRTIM_OENR_TC2OEN |\
242 HRTIM_OENR_TD1OEN |\
243 HRTIM_OENR_TD2OEN |\
244 HRTIM_OENR_TE1OEN |\
245 HRTIM_OENR_TE2OEN))
247 #define HRTIM_OENR_ODIS_MASK ((uint32_t)(HRTIM_ODISR_TA1ODIS |\
248 HRTIM_ODISR_TA2ODIS |\
249 HRTIM_ODISR_TB1ODIS |\
250 HRTIM_ODISR_TB2ODIS |\
251 HRTIM_ODISR_TC1ODIS |\
252 HRTIM_ODISR_TC2ODIS |\
253 HRTIM_ODISR_TD1ODIS |\
254 HRTIM_ODISR_TD2ODIS |\
255 HRTIM_ODISR_TE1ODIS |\
256 HRTIM_ODISR_TE2ODIS))
258 #define HRTIM_OUT_CONFIG_MASK ((uint32_t)(HRTIM_OUTR_POL1 |\
259 HRTIM_OUTR_IDLM1 |\
260 HRTIM_OUTR_IDLES1 |\
261 HRTIM_OUTR_FAULT1 |\
262 HRTIM_OUTR_CHP1 |\
263 HRTIM_OUTR_DIDL1))
265 #define HRTIM_EE_CONFIG_MASK ((uint32_t)(HRTIM_EECR1_EE1SRC |\
266 HRTIM_EECR1_EE1POL |\
267 HRTIM_EECR1_EE1SNS |\
268 HRTIM_EECR1_EE1FAST))
270 #define HRTIM_FLT_CONFIG_MASK ((uint32_t)(HRTIM_FLTINR1_FLT1P |\
271 HRTIM_FLTINR1_FLT1SRC))
273 #define HRTIM_BM_CONFIG_MASK ((uint32_t)( HRTIM_BMCR_BMPRSC |\
274 HRTIM_BMCR_BMCLK |\
275 HRTIM_BMCR_BMOM))
277 /**
278 * @}
279 */
282 /* Private macros ------------------------------------------------------------*/
283 /* Exported types ------------------------------------------------------------*/
284 /* Exported constants --------------------------------------------------------*/
285 /** @defgroup HRTIM_LL_Exported_Constants HRTIM Exported Constants
286 * @{
287 */
289 /** @defgroup HRTIM_LL_EC_GET_FLAG Get Flags Defines
290 * @brief Flags defines which can be used with LL_HRTIM_ReadReg function
291 * @{
292 */
293 #define LL_HRTIM_ISR_FLT1 HRTIM_ISR_FLT1
294 #define LL_HRTIM_ISR_FLT2 HRTIM_ISR_FLT2
295 #define LL_HRTIM_ISR_FLT3 HRTIM_ISR_FLT3
296 #define LL_HRTIM_ISR_FLT4 HRTIM_ISR_FLT4
297 #define LL_HRTIM_ISR_FLT5 HRTIM_ISR_FLT5
298 #define LL_HRTIM_ISR_SYSFLT HRTIM_ISR_SYSFLT
299 #define LL_HRTIM_ISR_BMPER HRTIM_ISR_BMPER
301 #define LL_HRTIM_MISR_MCMP1 HRTIM_MISR_MCMP1
302 #define LL_HRTIM_MISR_MCMP2 HRTIM_MISR_MCMP2
303 #define LL_HRTIM_MISR_MCMP3 HRTIM_MISR_MCMP3
304 #define LL_HRTIM_MISR_MCMP4 HRTIM_MISR_MCMP4
305 #define LL_HRTIM_MISR_MREP HRTIM_MISR_MREP
306 #define LL_HRTIM_MISR_SYNC HRTIM_MISR_SYNC
307 #define LL_HRTIM_MISR_MUPD HRTIM_MISR_MUPD
309 #define LL_HRTIM_TIMISR_CMP1 HRTIM_TIMISR_CMP1
310 #define LL_HRTIM_TIMISR_CMP2 HRTIM_TIMISR_CMP2
311 #define LL_HRTIM_TIMISR_CMP3 HRTIM_TIMISR_CMP3
312 #define LL_HRTIM_TIMISR_CMP4 HRTIM_TIMISR_CMP4
313 #define LL_HRTIM_TIMISR_REP HRTIM_TIMISR_REP
314 #define LL_HRTIM_TIMISR_UPD HRTIM_TIMISR_UPD
315 #define LL_HRTIM_TIMISR_CPT1 HRTIM_TIMISR_CPT1
316 #define LL_HRTIM_TIMISR_CPT2 HRTIM_TIMISR_CPT2
317 #define LL_HRTIM_TIMISR_SET1 HRTIM_TIMISR_SET1
318 #define LL_HRTIM_TIMISR_RST1 HRTIM_TIMISR_RST1
319 #define LL_HRTIM_TIMISR_SET2 HRTIM_TIMISR_SET2
320 #define LL_HRTIM_TIMISR_RST2 HRTIM_TIMISR_RST2
321 #define LL_HRTIM_TIMISR_RST HRTIM_TIMISR_RST
322 #define LL_HRTIM_TIMISR_DLYPRT HRTIM_TIMISR_DLYPRT
323 /**
324 * @}
325 */
327 /** @defgroup HRTIM_LL_EC_IT IT Defines
328 * @brief IT defines which can be used with LL_HRTIM_ReadReg and LL_HRTIM_WriteReg functions
329 * @{
330 */
331 #define LL_HRTIM_IER_FLT1IE HRTIM_IER_FLT1IE
332 #define LL_HRTIM_IER_FLT2IE HRTIM_IER_FLT2IE
333 #define LL_HRTIM_IER_FLT3IE HRTIM_IER_FLT3IE
334 #define LL_HRTIM_IER_FLT4IE HRTIM_IER_FLT4IE
335 #define LL_HRTIM_IER_FLT5IE HRTIM_IER_FLT5IE
336 #define LL_HRTIM_IER_SYSFLTIE HRTIM_IER_SYSFLTIE
337 #define LL_HRTIM_IER_BMPERIE HRTIM_IER_BMPERIE
339 #define LL_HRTIM_MDIER_MCMP1IE HRTIM_MDIER_MCMP1IE
340 #define LL_HRTIM_MDIER_MCMP2IE HRTIM_MDIER_MCMP2IE
341 #define LL_HRTIM_MDIER_MCMP3IE HRTIM_MDIER_MCMP3IE
342 #define LL_HRTIM_MDIER_MCMP4IE HRTIM_MDIER_MCMP4IE
343 #define LL_HRTIM_MDIER_MREPIE HRTIM_MDIER_MREPIE
344 #define LL_HRTIM_MDIER_SYNCIE HRTIM_MDIER_SYNCIE
345 #define LL_HRTIM_MDIER_MUPDIE HRTIM_MDIER_MUPDIE
347 #define LL_HRTIM_TIMDIER_CMP1IE HRTIM_TIMDIER_CMP1IE
348 #define LL_HRTIM_TIMDIER_CMP2IE HRTIM_TIMDIER_CMP2IE
349 #define LL_HRTIM_TIMDIER_CMP3IE HRTIM_TIMDIER_CMP3IE
350 #define LL_HRTIM_TIMDIER_CMP4IE HRTIM_TIMDIER_CMP4IE
351 #define LL_HRTIM_TIMDIER_REPIE HRTIM_TIMDIER_REPIE
352 #define LL_HRTIM_TIMDIER_UPDIE HRTIM_TIMDIER_UPDIE
353 #define LL_HRTIM_TIMDIER_CPT1IE HRTIM_TIMDIER_CPT1IE
354 #define LL_HRTIM_TIMDIER_CPT2IE HRTIM_TIMDIER_CPT2IE
355 #define LL_HRTIM_TIMDIER_SET1IE HRTIM_TIMDIER_SET1IE
356 #define LL_HRTIM_TIMDIER_RST1IE HRTIM_TIMDIER_RST1IE
357 #define LL_HRTIM_TIMDIER_SET2IE HRTIM_TIMDIER_SET2IE
358 #define LL_HRTIM_TIMDIER_RST2IE HRTIM_TIMDIER_RST2IE
359 #define LL_HRTIM_TIMDIER_RSTIE HRTIM_TIMDIER_RSTIE
360 #define LL_HRTIM_TIMDIER_DLYPRTIE HRTIM_TIMDIER_DLYPRTIE
361 /**
362 * @}
363 */
365 /** @defgroup HRTIM_LL_EC_SYNCIN_SRC SYNCHRONIZATION INPUT SOURCE
366 * @{
367 * @brief Constants defining defining the synchronization input source.
368 */
369 #define LL_HRTIM_SYNCIN_SRC_NONE 0x00000000U /*!< HRTIM is not synchronized and runs in standalone mode */
370 #define LL_HRTIM_SYNCIN_SRC_TIM_EVENT (HRTIM_MCR_SYNC_IN_1) /*!< The HRTIM is synchronized with the on-chip timer */
371 #define LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT (HRTIM_MCR_SYNC_IN_1 | HRTIM_MCR_SYNC_IN_0) /*!< A positive pulse on SYNCIN input triggers the HRTIM */
372 /**
373 * @}
374 */
376 /** @defgroup HRTIM_LL_EC_SYNCOUT_SRC SYNCHRONIZATION OUTPUT SOURCE
377 * @{
378 * @brief Constants defining the source and event to be sent on the synchronization output.
379 */
380 #define LL_HRTIM_SYNCOUT_SRC_MASTER_START 0x00000000U /*!< A pulse is sent on the SYNCOUT output upon master timer start event */
381 #define LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon master timer compare 1 event*/
382 #define LL_HRTIM_SYNCOUT_SRC_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on the SYNCOUT output upon timer A start or reset events */
383 #define LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon timer A compare 1 event */
384 /**
385 * @}
386 */
388 /** @defgroup HRTIM_LL_EC_SYNCOUT_POLARITY SYNCHRONIZATION OUTPUT POLARITY
389 * @{
390 * @brief Constants defining the routing and conditioning of the synchronization output event.
391 */
393 #define LL_HRTIM_SYNCOUT_POSITIVE_PULSE (HRTIM_MCR_SYNC_OUT_1) /*!< SCOUT pin has a low idle level and issues a positive pulse of 16 fHRTIM clock cycles length for the synchronization */
394 #define LL_HRTIM_SYNCOUT_NEGATIVE_PULSE (HRTIM_MCR_SYNC_OUT_1 | HRTIM_MCR_SYNC_OUT_0) /*!< SCOUT pin has a high idle level and issues a negative pulse of 16 fHRTIM clock cycles length for the synchronization */
395 /**
396 * @}
397 */
399 /** @defgroup HRTIM_LL_EC_TIMER TIMER ID
400 * @{
401 * @brief Constants identifying a timing unit.
402 */
410 #define LL_HRTIM_TIMER_X (HRTIM_MCR_TACEN |\
411 HRTIM_MCR_TBCEN | HRTIM_MCR_TCCEN |\
412 HRTIM_MCR_TDCEN | HRTIM_MCR_TECEN )
413 #define LL_HRTIM_TIMER_ALL (LL_HRTIM_TIMER_MASTER | LL_HRTIM_TIMER_X)
415 /**
416 * @}
417 */
419 /** @defgroup HRTIM_LL_EC_OUTPUT OUTPUT ID
420 * @{
421 * @brief Constants identifying an HRTIM output.
422 */
433 /**
434 * @}
435 */
437 /** @defgroup HRTIM_LL_EC_COMPAREUNIT COMPARE UNIT ID
438 * @{
439 * @brief Constants identifying a compare unit.
440 */
443 /**
444 * @}
445 */
447 /** @defgroup HRTIM_LL_EC_CAPTUREUNIT CAPTURE UNIT ID
448 * @{
449 * @brief Constants identifying a capture unit.
450 */
453 /**
454 * @}
455 */
457 /** @defgroup HRTIM_LL_EC_FAULT FAULT ID
458 * @{
459 * @brief Constants identifying a fault channel.
460 */
466 /**
467 * @}
468 */
470 /** @defgroup HRTIM_LL_EC_EVENT EXTERNAL EVENT ID
471 * @{
472 * @brief Constants identifying an external event channel.
473 */
484 /**
485 * @}
486 */
488 /** @defgroup HRTIM_LL_EC_OUTPUTSTATE OUTPUT STATE
489 * @{
490 * @brief Constants defining the state of an HRTIM output.
491 */
492 #define LL_HRTIM_OUTPUTSTATE_IDLE ((uint32_t)0x00000001U) /*!< Main operating mode, where the output can take the active or inactive level as programmed in the crossbar unit */
493 #define LL_HRTIM_OUTPUTSTATE_RUN ((uint32_t)0x00000002U) /*!< Default operating state (e.g. after an HRTIM reset, when the outputs are disabled by software or during a burst mode operation) */
494 #define LL_HRTIM_OUTPUTSTATE_FAULT ((uint32_t)0x00000003U) /*!< Safety state, entered in case of a shut-down request on FAULTx inputs */
495 /**
496 * @}
497 */
499 /** @defgroup HRTIM_LL_EC_ADCTRIG ADC TRIGGER
500 * @{
501 * @brief Constants identifying an ADC trigger.
502 */
507 /**
508 * @}
509 */
511 /** @defgroup HRTIM_LL_EC_ADCTRIG_UPDATE ADC TRIGGER UPDATE
512 * @{
513 * @brief constants defining the source triggering the update of the HRTIM_ADCxR register (transfer from preload to active register).
514 */
515 #define LL_HRTIM_ADCTRIG_UPDATE_MASTER 0x00000000U /*!< HRTIM_ADCxR register update is triggered by the Master timer */
516 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_A (HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer A */
517 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_B (HRTIM_CR1_ADC1USRC_1) /*!< HRTIM_ADCxR register update is triggered by the Timer B */
518 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_C (HRTIM_CR1_ADC1USRC_1 | HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer C */
519 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_D (HRTIM_CR1_ADC1USRC_2) /*!< HRTIM_ADCxR register update is triggered by the Timer D */
520 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_E (HRTIM_CR1_ADC1USRC_2 | HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer E */
521 /**
522 * @}
523 */
525 /** @defgroup HRTIM_LL_EC_ADCTRIG_SRC13 ADC TRIGGER 1/3 SOURCE
526 * @{
527 * @brief constants defining the events triggering ADC conversion for ADC Triggers 1 and 3.
528 */
540 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP2 HRTIM_ADC1R_AD1TAC2 /*!< ADC Trigger on Timer A compare 2 */
541 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP3 HRTIM_ADC1R_AD1TAC3 /*!< ADC Trigger on Timer A compare 3 */
542 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP4 HRTIM_ADC1R_AD1TAC4 /*!< ADC Trigger on Timer A compare 4 */
543 #define LL_HRTIM_ADCTRIG_SRC13_TIMAPER HRTIM_ADC1R_AD1TAPER /*!< ADC Trigger on Timer A period */
544 #define LL_HRTIM_ADCTRIG_SRC13_TIMARST HRTIM_ADC1R_AD1TARST /*!< ADC Trigger on Timer A reset */
545 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2 HRTIM_ADC1R_AD1TBC2 /*!< ADC Trigger on Timer B compare 2 */
546 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3 HRTIM_ADC1R_AD1TBC3 /*!< ADC Trigger on Timer B compare 3 */
547 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4 HRTIM_ADC1R_AD1TBC4 /*!< ADC Trigger on Timer B compare 4 */
548 #define LL_HRTIM_ADCTRIG_SRC13_TIMBPER HRTIM_ADC1R_AD1TBPER /*!< ADC Trigger on Timer B period */
549 #define LL_HRTIM_ADCTRIG_SRC13_TIMBRST HRTIM_ADC1R_AD1TBRST /*!< ADC Trigger on Timer B reset */
550 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2 HRTIM_ADC1R_AD1TCC2 /*!< ADC Trigger on Timer C compare 2 */
551 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3 HRTIM_ADC1R_AD1TCC3 /*!< ADC Trigger on Timer C compare 3 */
552 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4 HRTIM_ADC1R_AD1TCC4 /*!< ADC Trigger on Timer C compare 4 */
553 #define LL_HRTIM_ADCTRIG_SRC13_TIMCPER HRTIM_ADC1R_AD1TCPER /*!< ADC Trigger on Timer C period */
554 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2 HRTIM_ADC1R_AD1TDC2 /*!< ADC Trigger on Timer D compare 2 */
555 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3 HRTIM_ADC1R_AD1TDC3 /*!< ADC Trigger on Timer D compare 3 */
556 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4 HRTIM_ADC1R_AD1TDC4 /*!< ADC Trigger on Timer D compare 4 */
557 #define LL_HRTIM_ADCTRIG_SRC13_TIMDPER HRTIM_ADC1R_AD1TDPER /*!< ADC Trigger on Timer D period */
558 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP2 HRTIM_ADC1R_AD1TEC2 /*!< ADC Trigger on Timer E compare 2 */
559 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP3 HRTIM_ADC1R_AD1TEC3 /*!< ADC Trigger on Timer E compare 3 */
560 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP4 HRTIM_ADC1R_AD1TEC4 /*!< ADC Trigger on Timer E compare 4 */
561 #define LL_HRTIM_ADCTRIG_SRC13_TIMEPER HRTIM_ADC1R_AD1TEPER /*!< ADC Trigger on Timer E period */
562 /**
563 * @}
564 */
566 /** @defgroup HRTIM_LL_EC_ADCTRIG_SRC24 ADC TRIGGER 2/4 SOURCE
567 * @{
568 * @brief constants defining the events triggering ADC conversion for ADC Triggers 2 and 4.
569 */
580 #define LL_HRTIM_ADCTRIG_SRC24_EEV10 HRTIM_ADC2R_AD2EEV10 /*!< ADC Trigger on external event 10 */
581 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP2 HRTIM_ADC2R_AD2TAC2 /*!< ADC Trigger on Timer A compare 2 */
582 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP3 HRTIM_ADC2R_AD2TAC3 /*!< ADC Trigger on Timer A compare 3 */
583 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP4 HRTIM_ADC2R_AD2TAC4 /*!< ADC Trigger on Timer A compare 4 */
584 #define LL_HRTIM_ADCTRIG_SRC24_TIMAPER HRTIM_ADC2R_AD2TAPER /*!< ADC Trigger on Timer A period */
585 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2 HRTIM_ADC2R_AD2TBC2 /*!< ADC Trigger on Timer B compare 2 */
586 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3 HRTIM_ADC2R_AD2TBC3 /*!< ADC Trigger on Timer B compare 3 */
587 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4 HRTIM_ADC2R_AD2TBC4 /*!< ADC Trigger on Timer B compare 4 */
588 #define LL_HRTIM_ADCTRIG_SRC24_TIMBPER HRTIM_ADC2R_AD2TBPER /*!< ADC Trigger on Timer B period */
589 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2 HRTIM_ADC2R_AD2TCC2 /*!< ADC Trigger on Timer C compare 2 */
590 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3 HRTIM_ADC2R_AD2TCC3 /*!< ADC Trigger on Timer C compare 3 */
591 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4 HRTIM_ADC2R_AD2TCC4 /*!< ADC Trigger on Timer C compare 4 */
592 #define LL_HRTIM_ADCTRIG_SRC24_TIMCPER HRTIM_ADC2R_AD2TCPER /*!< ADC Trigger on Timer C period */
593 #define LL_HRTIM_ADCTRIG_SRC24_TIMCRST HRTIM_ADC2R_AD2TCRST /*!< ADC Trigger on Timer C reset */
594 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2 HRTIM_ADC2R_AD2TDC2 /*!< ADC Trigger on Timer D compare 2 */
595 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3 HRTIM_ADC2R_AD2TDC3 /*!< ADC Trigger on Timer D compare 3 */
596 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4 HRTIM_ADC2R_AD2TDC4 /*!< ADC Trigger on Timer D compare 4 */
597 #define LL_HRTIM_ADCTRIG_SRC24_TIMDPER HRTIM_ADC2R_AD2TDPER /*!< ADC Trigger on Timer D period */
598 #define LL_HRTIM_ADCTRIG_SRC24_TIMDRST HRTIM_ADC2R_AD2TDRST /*!< ADC Trigger on Timer D reset */
599 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP2 HRTIM_ADC2R_AD2TEC2 /*!< ADC Trigger on Timer E compare 2 */
600 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP3 HRTIM_ADC2R_AD2TEC3 /*!< ADC Trigger on Timer E compare 3 */
601 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP4 HRTIM_ADC2R_AD2TEC4 /*!< ADC Trigger on Timer E compare 4 */
602 #define LL_HRTIM_ADCTRIG_SRC24_TIMERST HRTIM_ADC2R_AD2TERST /*!< ADC Trigger on Timer E reset */
603 /**
604 * @}
605 */
607 /** @defgroup HRTIM_LL_EC_PRESCALERRATIO PRESCALER RATIO
608 * @{
609 * @brief Constants defining timer high-resolution clock prescaler ratio.
610 */
611 #define LL_HRTIM_PRESCALERRATIO_DIV1 ((uint32_t)0x00000005U) /*!< fHRCK: fHRTIM = 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz) */
612 #define LL_HRTIM_PRESCALERRATIO_DIV2 ((uint32_t)0x00000006U) /*!< fHRCK: fHRTIM / 2 = 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz) */
613 #define LL_HRTIM_PRESCALERRATIO_DIV4 ((uint32_t)0x00000007U) /*!< fHRCK: fHRTIM / 4 = 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz) */
614 /**
615 * @}
616 */
618 /** @defgroup HRTIM_LL_EC_MODE COUNTER MODE
619 * @{
620 * @brief Constants defining timer counter operating mode.
621 */
622 #define LL_HRTIM_MODE_CONTINUOUS ((uint32_t)0x00000008U) /*!< The timer operates in continuous (free-running) mode */
623 #define LL_HRTIM_MODE_SINGLESHOT 0x00000000U /*!< The timer operates in non retriggerable single-shot mode */
624 #define LL_HRTIM_MODE_RETRIGGERABLE ((uint32_t)0x00000010U) /*!< The timer operates in retriggerable single-shot mode */
625 /**
626 * @}
627 */
629 /** @defgroup HRTIM_LL_EC_DACTRIG DAC TRIGGER
630 * @{
631 * @brief Constants defining on which output the DAC synchronization event is sent.
632 */
634 #define LL_HRTIM_DACTRIG_DACTRIGOUT_1 (HRTIM_MCR_DACSYNC_0) /*!< DAC synchronization event generated on DACTrigOut1 output upon timer update */
635 #define LL_HRTIM_DACTRIG_DACTRIGOUT_2 (HRTIM_MCR_DACSYNC_1) /*!< DAC synchronization event generated on DACTrigOut2 output upon timer update */
636 #define LL_HRTIM_DACTRIG_DACTRIGOUT_3 (HRTIM_MCR_DACSYNC_1 | HRTIM_MCR_DACSYNC_0) /*!< DAC synchronization event generated on DACTrigOut3 output upon timer update */
637 /**
638 * @}
639 */
641 /** @defgroup HRTIM_LL_EC_UPDATETRIG UPDATE TRIGGER
642 * @{
643 * @brief Constants defining whether the registers update is done synchronously with any other timer or master update.
644 */
646 #define LL_HRTIM_UPDATETRIG_MASTER HRTIM_TIMCR_MSTU /*!< Register update is triggered by the master timer update */
647 #define LL_HRTIM_UPDATETRIG_TIMER_A HRTIM_TIMCR_TAU /*!< Register update is triggered by the timer A update */
648 #define LL_HRTIM_UPDATETRIG_TIMER_B HRTIM_TIMCR_TBU /*!< Register update is triggered by the timer B update */
649 #define LL_HRTIM_UPDATETRIG_TIMER_C HRTIM_TIMCR_TCU /*!< Register update is triggered by the timer C update*/
650 #define LL_HRTIM_UPDATETRIG_TIMER_D HRTIM_TIMCR_TDU /*!< Register update is triggered by the timer D update */
651 #define LL_HRTIM_UPDATETRIG_TIMER_E HRTIM_TIMCR_TEU /*!< Register update is triggered by the timer E update */
652 #define LL_HRTIM_UPDATETRIG_REPETITION HRTIM_TIMCR_TREPU /*!< Register update is triggered when the counter rolls over and HRTIM_REPx = 0*/
653 #define LL_HRTIM_UPDATETRIG_RESET HRTIM_TIMCR_TRSTU /*!< Register update is triggered by counter reset or roll-over to 0 after reaching the period value in continuous mode */
654 /**
655 * @}
656 */
658 /** @defgroup HRTIM_LL_EC_UPDATEGATING UPDATE GATING
659 * @{
660 * @brief Constants defining how the update occurs relatively to the burst DMA transaction and the external update request on update enable inputs 1 to 3.
661 */
662 #define LL_HRTIM_UPDATEGATING_INDEPENDENT 0x00000000U /*!< Update done independently from the DMA burst transfer completion */
663 #define LL_HRTIM_UPDATEGATING_DMABURST (HRTIM_TIMCR_UPDGAT_0) /*!< Update done when the DMA burst transfer is completed */
664 #define LL_HRTIM_UPDATEGATING_DMABURST_UPDATE (HRTIM_TIMCR_UPDGAT_1) /*!< Update done on timer roll-over following a DMA burst transfer completion*/
665 #define LL_HRTIM_UPDATEGATING_UPDEN1 (HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 1 */
666 #define LL_HRTIM_UPDATEGATING_UPDEN2 (HRTIM_TIMCR_UPDGAT_2) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 2 */
667 #define LL_HRTIM_UPDATEGATING_UPDEN3 (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 3 */
668 #define LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 1 */
669 #define LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 2 */
670 #define LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE (HRTIM_TIMCR_UPDGAT_3) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 3 */
671 /**
672 * @}
673 */
675 /** @defgroup HRTIM_LL_EC_COMPAREMODE COMPARE MODE
676 * @{
677 * @brief Constants defining whether the compare register is behaving in regular mode (compare match issued as soon as counter equal compare) or in auto-delayed mode.
678 */
680 #define LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT (HRTIM_TIMCR_DELCMP2_0) /*!< Compare event generated only if a capture has occurred */
681 #define LL_HRTIM_COMPAREMODE_DELAY_CMP1 (HRTIM_TIMCR_DELCMP2_1) /*!< Compare event generated if a capture has occurred or after a Compare 1 match (timeout if capture event is missing) */
682 #define LL_HRTIM_COMPAREMODE_DELAY_CMP3 (HRTIM_TIMCR_DELCMP2_1 | HRTIM_TIMCR_DELCMP2_0) /*!< Compare event generated if a capture has occurred or after a Compare 3 match (timeout if capture event is missing) */
683 /**
684 * @}
685 */
687 /** @defgroup HRTIM_LL_EC_RESETTRIG RESET TRIGGER
688 * @{
689 * @brief Constants defining the events that can be selected to trigger the reset of the timer counter.
690 */
692 #define LL_HRTIM_RESETTRIG_UPDATE HRTIM_RSTR_UPDATE /*!< The timer counter is reset upon update event */
693 #define LL_HRTIM_RESETTRIG_CMP2 HRTIM_RSTR_CMP2 /*!< The timer counter is reset upon Timer Compare 2 event */
694 #define LL_HRTIM_RESETTRIG_CMP4 HRTIM_RSTR_CMP4 /*!< The timer counter is reset upon Timer Compare 4 event */
695 #define LL_HRTIM_RESETTRIG_MASTER_PER HRTIM_RSTR_MSTPER /*!< The timer counter is reset upon master timer period event */
696 #define LL_HRTIM_RESETTRIG_MASTER_CMP1 HRTIM_RSTR_MSTCMP1 /*!< The timer counter is reset upon master timer Compare 1 event */
697 #define LL_HRTIM_RESETTRIG_MASTER_CMP2 HRTIM_RSTR_MSTCMP2 /*!< The timer counter is reset upon master timer Compare 2 event */
698 #define LL_HRTIM_RESETTRIG_MASTER_CMP3 HRTIM_RSTR_MSTCMP3 /*!< The timer counter is reset upon master timer Compare 3 event */
699 #define LL_HRTIM_RESETTRIG_MASTER_CMP4 HRTIM_RSTR_MSTCMP4 /*!< The timer counter is reset upon master timer Compare 4 event */
700 #define LL_HRTIM_RESETTRIG_EEV_1 HRTIM_RSTR_EXTEVNT1 /*!< The timer counter is reset upon external event 1 */
701 #define LL_HRTIM_RESETTRIG_EEV_2 HRTIM_RSTR_EXTEVNT2 /*!< The timer counter is reset upon external event 2 */
702 #define LL_HRTIM_RESETTRIG_EEV_3 HRTIM_RSTR_EXTEVNT3 /*!< The timer counter is reset upon external event 3 */
703 #define LL_HRTIM_RESETTRIG_EEV_4 HRTIM_RSTR_EXTEVNT4 /*!< The timer counter is reset upon external event 4 */
704 #define LL_HRTIM_RESETTRIG_EEV_5 HRTIM_RSTR_EXTEVNT5 /*!< The timer counter is reset upon external event 5 */
705 #define LL_HRTIM_RESETTRIG_EEV_6 HRTIM_RSTR_EXTEVNT6 /*!< The timer counter is reset upon external event 6 */
706 #define LL_HRTIM_RESETTRIG_EEV_7 HRTIM_RSTR_EXTEVNT7 /*!< The timer counter is reset upon external event 7 */
707 #define LL_HRTIM_RESETTRIG_EEV_8 HRTIM_RSTR_EXTEVNT8 /*!< The timer counter is reset upon external event 8 */
708 #define LL_HRTIM_RESETTRIG_EEV_9 HRTIM_RSTR_EXTEVNT9 /*!< The timer counter is reset upon external event 9 */
709 #define LL_HRTIM_RESETTRIG_EEV_10 HRTIM_RSTR_EXTEVNT10 /*!< The timer counter is reset upon external event 10 */
710 #define LL_HRTIM_RESETTRIG_OTHER1_CMP1 HRTIM_RSTR_TIMBCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
711 #define LL_HRTIM_RESETTRIG_OTHER1_CMP2 HRTIM_RSTR_TIMBCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
712 #define LL_HRTIM_RESETTRIG_OTHER1_CMP4 HRTIM_RSTR_TIMBCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
713 #define LL_HRTIM_RESETTRIG_OTHER2_CMP1 HRTIM_RSTR_TIMCCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
714 #define LL_HRTIM_RESETTRIG_OTHER2_CMP2 HRTIM_RSTR_TIMCCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
715 #define LL_HRTIM_RESETTRIG_OTHER2_CMP4 HRTIM_RSTR_TIMCCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
716 #define LL_HRTIM_RESETTRIG_OTHER3_CMP1 HRTIM_RSTR_TIMDCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
717 #define LL_HRTIM_RESETTRIG_OTHER3_CMP2 HRTIM_RSTR_TIMDCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
718 #define LL_HRTIM_RESETTRIG_OTHER3_CMP4 HRTIM_RSTR_TIMDCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
719 #define LL_HRTIM_RESETTRIG_OTHER4_CMP1 HRTIM_RSTR_TIMECMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
720 #define LL_HRTIM_RESETTRIG_OTHER4_CMP2 HRTIM_RSTR_TIMECMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
721 #define LL_HRTIM_RESETTRIG_OTHER4_CMP4 HRTIM_RSTR_TIMECMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
722 /**
723 * @}
724 */
726 /** @defgroup HRTIM_LL_EC_CAPTURETRIG CAPTURE TRIGGER
727 * @{
728 * @brief Constants defining the events that can be selected to trigger the capture of the timing unit counter.
729 */
731 #define LL_HRTIM_CAPTURETRIG_UPDATE HRTIM_CPT1CR_UPDCPT /*!< The update event triggers the Capture */
732 #define LL_HRTIM_CAPTURETRIG_EEV_1 HRTIM_CPT1CR_EXEV1CPT /*!< The External event 1 triggers the Capture */
733 #define LL_HRTIM_CAPTURETRIG_EEV_2 HRTIM_CPT1CR_EXEV2CPT /*!< The External event 2 triggers the Capture */
734 #define LL_HRTIM_CAPTURETRIG_EEV_3 HRTIM_CPT1CR_EXEV3CPT /*!< The External event 3 triggers the Capture */
735 #define LL_HRTIM_CAPTURETRIG_EEV_4 HRTIM_CPT1CR_EXEV4CPT /*!< The External event 4 triggers the Capture */
736 #define LL_HRTIM_CAPTURETRIG_EEV_5 HRTIM_CPT1CR_EXEV5CPT /*!< The External event 5 triggers the Capture */
737 #define LL_HRTIM_CAPTURETRIG_EEV_6 HRTIM_CPT1CR_EXEV6CPT /*!< The External event 6 triggers the Capture */
738 #define LL_HRTIM_CAPTURETRIG_EEV_7 HRTIM_CPT1CR_EXEV7CPT /*!< The External event 7 triggers the Capture */
739 #define LL_HRTIM_CAPTURETRIG_EEV_8 HRTIM_CPT1CR_EXEV8CPT /*!< The External event 8 triggers the Capture */
740 #define LL_HRTIM_CAPTURETRIG_EEV_9 HRTIM_CPT1CR_EXEV9CPT /*!< The External event 9 triggers the Capture */
741 #define LL_HRTIM_CAPTURETRIG_EEV_10 HRTIM_CPT1CR_EXEV10CPT /*!< The External event 10 triggers the Capture */
742 #define LL_HRTIM_CAPTURETRIG_TA1_SET HRTIM_CPT1CR_TA1SET /*!< Capture is triggered by TA1 output inactive to active transition */
743 #define LL_HRTIM_CAPTURETRIG_TA1_RESET HRTIM_CPT1CR_TA1RST /*!< Capture is triggered by TA1 output active to inactive transition */
744 #define LL_HRTIM_CAPTURETRIG_TIMA_CMP1 HRTIM_CPT1CR_TIMACMP1 /*!< Timer A Compare 1 triggers Capture */
745 #define LL_HRTIM_CAPTURETRIG_TIMA_CMP2 HRTIM_CPT1CR_TIMACMP2 /*!< Timer A Compare 2 triggers Capture */
746 #define LL_HRTIM_CAPTURETRIG_TB1_SET HRTIM_CPT1CR_TB1SET /*!< Capture is triggered by TB1 output inactive to active transition */
747 #define LL_HRTIM_CAPTURETRIG_TB1_RESET HRTIM_CPT1CR_TB1RST /*!< Capture is triggered by TB1 output active to inactive transition */
748 #define LL_HRTIM_CAPTURETRIG_TIMB_CMP1 HRTIM_CPT1CR_TIMBCMP1 /*!< Timer B Compare 1 triggers Capture */
749 #define LL_HRTIM_CAPTURETRIG_TIMB_CMP2 HRTIM_CPT1CR_TIMBCMP2 /*!< Timer B Compare 2 triggers Capture */
750 #define LL_HRTIM_CAPTURETRIG_TC1_SET HRTIM_CPT1CR_TC1SET /*!< Capture is triggered by TC1 output inactive to active transition */
751 #define LL_HRTIM_CAPTURETRIG_TC1_RESET HRTIM_CPT1CR_TC1RST /*!< Capture is triggered by TC1 output active to inactive transition */
752 #define LL_HRTIM_CAPTURETRIG_TIMC_CMP1 HRTIM_CPT1CR_TIMCCMP1 /*!< Timer C Compare 1 triggers Capture */
753 #define LL_HRTIM_CAPTURETRIG_TIMC_CMP2 HRTIM_CPT1CR_TIMCCMP2 /*!< Timer C Compare 2 triggers Capture */
754 #define LL_HRTIM_CAPTURETRIG_TD1_SET HRTIM_CPT1CR_TD1SET /*!< Capture is triggered by TD1 output inactive to active transition */
755 #define LL_HRTIM_CAPTURETRIG_TD1_RESET HRTIM_CPT1CR_TD1RST /*!< Capture is triggered by TD1 output active to inactive transition */
756 #define LL_HRTIM_CAPTURETRIG_TIMD_CMP1 HRTIM_CPT1CR_TIMDCMP1 /*!< Timer D Compare 1 triggers Capture */
757 #define LL_HRTIM_CAPTURETRIG_TIMD_CMP2 HRTIM_CPT1CR_TIMDCMP2 /*!< Timer D Compare 2 triggers Capture */
758 #define LL_HRTIM_CAPTURETRIG_TE1_SET HRTIM_CPT1CR_TE1SET /*!< Capture is triggered by TE1 output inactive to active transition */
759 #define LL_HRTIM_CAPTURETRIG_TE1_RESET HRTIM_CPT1CR_TE1RST /*!< Capture is triggered by TE1 output active to inactive transition */
760 #define LL_HRTIM_CAPTURETRIG_TIME_CMP1 HRTIM_CPT1CR_TIMECMP1 /*!< Timer E Compare 1 triggers Capture */
761 #define LL_HRTIM_CAPTURETRIG_TIME_CMP2 HRTIM_CPT1CR_TIMECMP2 /*!< Timer E Compare 2 triggers Capture */
762 /**
763 * @}
764 */
766 /** @defgroup HRTIM_LL_EC_DLYPRT DELAYED PROTECTION (DLYPRT) MODE
767 * @{
768 * @brief Constants defining all possible delayed protection modes for a timer (also define the source and outputs on which the delayed protection schemes are applied).
769 */
770 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV6 0x00000000U /*!< Timers A, B, C: Output 1 delayed Idle on external Event 6 */
771 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV6 (HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Output 2 delayed Idle on external Event 6 */
772 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV6 (HRTIM_OUTR_DLYPRT_1) /*!< Timers A, B, C: Output 1 and output 2 delayed Idle on external Event 6 */
773 #define LL_HRTIM_DLYPRT_BALANCED_EEV6 (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Balanced Idle on external Event 6 */
774 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV7 (HRTIM_OUTR_DLYPRT_2) /*!< Timers A, B, C: Output 1 delayed Idle on external Event 7 */
775 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Output 2 delayed Idle on external Event 7 */
776 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1) /*!< Timers A, B, C: Output 1 and output2 delayed Idle on external Event 7 */
777 #define LL_HRTIM_DLYPRT_BALANCED_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Balanced Idle on external Event 7 */
779 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV8 0x00000000U /*!< Timers D, E: Output 1 delayed Idle on external Event 8 */
780 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV8 (HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Output 2 delayed Idle on external Event 8 */
781 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV8 (HRTIM_OUTR_DLYPRT_1) /*!< Timers D, E: Output 1 and output 2 delayed Idle on external Event 8 */
782 #define LL_HRTIM_DLYPRT_BALANCED_EEV8 (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Balanced Idle on external Event 8 */
783 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV9 (HRTIM_OUTR_DLYPRT_2) /*!< Timers D, E: Output 1 delayed Idle on external Event 9 */
784 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Output 2 delayed Idle on external Event 9 */
785 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1) /*!< Timers D, E: Output 1 and output2 delayed Idle on external Event 9 */
786 #define LL_HRTIM_DLYPRT_BALANCED_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Balanced Idle on external Event 9 */
787 /**
788 * @}
789 */
791 /** @defgroup HRTIM_LL_EC_BURSTMODE BURST MODE
792 * @{
793 * @brief Constants defining how the timer behaves during a burst mode operation.
794 */
795 #define LL_HRTIM_BURSTMODE_MAINTAINCLOCK (uint32_t)0x000000 /*!< Timer counter clock is maintained and the timer operates normally */
796 #define LL_HRTIM_BURSTMODE_RESETCOUNTER (HRTIM_BMCR_MTBM) /*!< Timer counter clock is stopped and the counter is reset */
797 /**
798 * @}
799 */
801 /** @defgroup HRTIM_LL_EC_BURSTDMA BURST DMA
802 * @{
803 * @brief Constants defining the registers that can be written during a burst DMA operation.
804 */
806 #define LL_HRTIM_BURSTDMA_MCR (HRTIM_BDMUPR_MCR) /*!< MCR register is updated by Burst DMA accesses */
807 #define LL_HRTIM_BURSTDMA_MICR (HRTIM_BDMUPR_MICR) /*!< MICR register is updated by Burst DMA accesses */
808 #define LL_HRTIM_BURSTDMA_MDIER (HRTIM_BDMUPR_MDIER) /*!< MDIER register is updated by Burst DMA accesses */
809 #define LL_HRTIM_BURSTDMA_MCNT (HRTIM_BDMUPR_MCNT) /*!< MCNTR register is updated by Burst DMA accesses */
810 #define LL_HRTIM_BURSTDMA_MPER (HRTIM_BDMUPR_MPER) /*!< MPER register is updated by Burst DMA accesses */
811 #define LL_HRTIM_BURSTDMA_MREP (HRTIM_BDMUPR_MREP) /*!< MREPR register is updated by Burst DMA accesses */
812 #define LL_HRTIM_BURSTDMA_MCMP1 (HRTIM_BDMUPR_MCMP1) /*!< MCMP1R register is updated by Burst DMA accesses */
813 #define LL_HRTIM_BURSTDMA_MCMP2 (HRTIM_BDMUPR_MCMP2) /*!< MCMP2R register is updated by Burst DMA accesses */
814 #define LL_HRTIM_BURSTDMA_MCMP3 (HRTIM_BDMUPR_MCMP3) /*!< MCMP3R register is updated by Burst DMA accesses */
815 #define LL_HRTIM_BURSTDMA_MCMP4 (HRTIM_BDMUPR_MCMP4) /*!< MCMP4R register is updated by Burst DMA accesses */
816 #define LL_HRTIM_BURSTDMA_TIMMCR (HRTIM_BDTUPR_TIMCR) /*!< TIMxCR register is updated by Burst DMA accesses */
817 #define LL_HRTIM_BURSTDMA_TIMICR (HRTIM_BDTUPR_TIMICR) /*!< TIMxICR register is updated by Burst DMA accesses */
818 #define LL_HRTIM_BURSTDMA_TIMDIER (HRTIM_BDTUPR_TIMDIER) /*!< TIMxDIER register is updated by Burst DMA accesses */
819 #define LL_HRTIM_BURSTDMA_TIMCNT (HRTIM_BDTUPR_TIMCNT) /*!< CNTxCR register is updated by Burst DMA accesses */
820 #define LL_HRTIM_BURSTDMA_TIMPER (HRTIM_BDTUPR_TIMPER) /*!< PERxR register is updated by Burst DMA accesses */
821 #define LL_HRTIM_BURSTDMA_TIMREP (HRTIM_BDTUPR_TIMREP) /*!< REPxR register is updated by Burst DMA accesses */
822 #define LL_HRTIM_BURSTDMA_TIMCMP1 (HRTIM_BDTUPR_TIMCMP1) /*!< CMP1xR register is updated by Burst DMA accesses */
823 #define LL_HRTIM_BURSTDMA_TIMCMP2 (HRTIM_BDTUPR_TIMCMP2) /*!< CMP2xR register is updated by Burst DMA accesses */
824 #define LL_HRTIM_BURSTDMA_TIMCMP3 (HRTIM_BDTUPR_TIMCMP3) /*!< CMP3xR register is updated by Burst DMA accesses */
825 #define LL_HRTIM_BURSTDMA_TIMCMP4 (HRTIM_BDTUPR_TIMCMP4) /*!< CMP4xR register is updated by Burst DMA accesses */
826 #define LL_HRTIM_BURSTDMA_TIMDTR (HRTIM_BDTUPR_TIMDTR) /*!< DTxR register is updated by Burst DMA accesses */
827 #define LL_HRTIM_BURSTDMA_TIMSET1R (HRTIM_BDTUPR_TIMSET1R) /*!< SET1R register is updated by Burst DMA accesses */
828 #define LL_HRTIM_BURSTDMA_TIMRST1R (HRTIM_BDTUPR_TIMRST1R) /*!< RST1R register is updated by Burst DMA accesses */
829 #define LL_HRTIM_BURSTDMA_TIMSET2R (HRTIM_BDTUPR_TIMSET2R) /*!< SET2R register is updated by Burst DMA accesses */
830 #define LL_HRTIM_BURSTDMA_TIMRST2R (HRTIM_BDTUPR_TIMRST2R) /*!< RST1R register is updated by Burst DMA accesses */
831 #define LL_HRTIM_BURSTDMA_TIMEEFR1 (HRTIM_BDTUPR_TIMEEFR1) /*!< EEFxR1 register is updated by Burst DMA accesses */
832 #define LL_HRTIM_BURSTDMA_TIMEEFR2 (HRTIM_BDTUPR_TIMEEFR2) /*!< EEFxR2 register is updated by Burst DMA accesses */
833 #define LL_HRTIM_BURSTDMA_TIMRSTR (HRTIM_BDTUPR_TIMRSTR) /*!< RSTxR register is updated by Burst DMA accesses */
834 #define LL_HRTIM_BURSTDMA_TIMCHPR (HRTIM_BDTUPR_TIMCHPR) /*!< CHPxR register is updated by Burst DMA accesses */
835 #define LL_HRTIM_BURSTDMA_TIMOUTR (HRTIM_BDTUPR_TIMOUTR) /*!< OUTxR register is updated by Burst DMA accesses */
836 #define LL_HRTIM_BURSTDMA_TIMFLTR (HRTIM_BDTUPR_TIMFLTR) /*!< FLTxR register is updated by Burst DMA accesses */
837 /**
838 * @}
839 */
841 /** @defgroup HRTIM_LL_EC_CPPSTAT CURRENT PUSH-PULL STATUS
842 * @{
843 * @brief Constants defining on which output the signal is currently applied in push-pull mode.
844 */
845 #define LL_HRTIM_CPPSTAT_OUTPUT1 ((uint32_t) 0x00000000U) /*!< Signal applied on output 1 and output 2 forced inactive */
846 #define LL_HRTIM_CPPSTAT_OUTPUT2 (HRTIM_TIMISR_CPPSTAT) /*!< Signal applied on output 2 and output 1 forced inactive */
847 /**
848 * @}
849 */
851 /** @defgroup HRTIM_LL_EC_IPPSTAT IDLE PUSH-PULL STATUS
852 * @{
853 * @brief Constants defining on which output the signal was applied, in push-pull mode balanced fault mode or delayed idle mode, when the protection was triggered.
854 */
855 #define LL_HRTIM_IPPSTAT_OUTPUT1 ((uint32_t) 0x00000000U) /*!< Protection occurred when the output 1 was active and output 2 forced inactive */
856 #define LL_HRTIM_IPPSTAT_OUTPUT2 (HRTIM_TIMISR_IPPSTAT) /*!< Protection occurred when the output 2 was active and output 1 forced inactive */
857 /**
858 * @}
859 */
861 /** @defgroup HRTIM_LL_EC_TIM_EEFLTR TIMER EXTERNAL EVENT FILTER
862 * @{
863 * @brief Constants defining the event filtering applied to external events by a timer.
864 */
865 #define LL_HRTIM_EEFLTR_NONE (0x00000000U)
866 #define LL_HRTIM_EEFLTR_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from counter reset/roll-over to Compare 1 */
867 #define LL_HRTIM_EEFLTR_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from counter reset/roll-over to Compare 2 */
868 #define LL_HRTIM_EEFLTR_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from counter reset/roll-over to Compare 3 */
869 #define LL_HRTIM_EEFLTR_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) /*!< Blanking from counter reset/roll-over to Compare 4 */
870 #define LL_HRTIM_EEFLTR_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR1 source */
871 #define LL_HRTIM_EEFLTR_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from another timing unit: TIMFLTR2 source */
872 #define LL_HRTIM_EEFLTR_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR3 source */
873 #define LL_HRTIM_EEFLTR_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) /*!< Blanking from another timing unit: TIMFLTR4 source */
874 #define LL_HRTIM_EEFLTR_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR5 source */
875 #define LL_HRTIM_EEFLTR_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from another timing unit: TIMFLTR6 source */
876 #define LL_HRTIM_EEFLTR_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR7 source */
877 #define LL_HRTIM_EEFLTR_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) /*!< Blanking from another timing unit: TIMFLTR8 source */
878 #define LL_HRTIM_EEFLTR_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) /*!< Windowing from counter reset/roll-over to Compare 2 */
879 #define LL_HRTIM_EEFLTR_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) /*!< Windowing from counter reset/roll-over to Compare 3 */
880 #define LL_HRTIM_EEFLTR_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Windowing from another timing unit: TIMWIN source */
881 /**
882 * @}
883 */
885 /** @defgroup HRTIM_LL_EC_TIM_LATCHSTATUS TIMER EXTERNAL EVENT LATCH STATUS
886 * @{
887 * @brief Constants defining whether or not the external event is memorized (latched) and generated as soon as the blanking period is completed or the window ends.
888 */
889 #define LL_HRTIM_EELATCH_DISABLED 0x00000000U /*!< Event is ignored if it happens during a blank, or passed through during a window */
890 #define LL_HRTIM_EELATCH_ENABLED HRTIM_EEFR1_EE1LTCH /*!< Event is latched and delayed till the end of the blanking or windowing period */
891 /**
892 * @}
893 */
895 /** @defgroup HRTIM_LL_EC_DT_PRESCALER DEADTIME PRESCALER
896 * @{
897 * @brief Constants defining division ratio between the timer clock frequency (fHRTIM) and the deadtime generator clock (fDTG).
898 */
902 #define LL_HRTIM_DT_PRESCALER_DIV1 (HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM */
904 #define LL_HRTIM_DT_PRESCALER_DIV4 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM / 4 */
905 #define LL_HRTIM_DT_PRESCALER_DIV8 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1) /*!< fDTG = fHRTIM / 8 */
906 #define LL_HRTIM_DT_PRESCALER_DIV16 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM / 16 */
907 /**
908 * @}
909 */
911 /** @defgroup HRTIM_LL_EC_DT_RISING_SIGN DEADTIME RISING SIGN
912 * @{
913 * @brief Constants defining whether the deadtime is positive or negative (overlapping signal) on rising edge.
914 */
917 /**
918 * @}
919 */
921 /** @defgroup HRTIM_LL_EC_DT_FALLING_SIGN DEADTIME FALLING SIGN
922 * @{
923 * @brief Constants defining whether the deadtime is positive or negative (overlapping signal) on falling edge.
924 */
927 /**
928 * @}
929 */
931 /** @defgroup HRTIM_LL_EC_CHP_PRESCALER CHOPPER MODE PRESCALER
932 * @{
933 * @brief Constants defining the frequency of the generated high frequency carrier (fCHPFRQ).
934 */
938 #define LL_HRTIM_CHP_PRESCALER_DIV64 (HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 64 */
940 #define LL_HRTIM_CHP_PRESCALER_DIV96 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 96 */
941 #define LL_HRTIM_CHP_PRESCALER_DIV112 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 112 */
942 #define LL_HRTIM_CHP_PRESCALER_DIV128 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 128 */
944 #define LL_HRTIM_CHP_PRESCALER_DIV160 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 160 */
945 #define LL_HRTIM_CHP_PRESCALER_DIV176 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 176 */
946 #define LL_HRTIM_CHP_PRESCALER_DIV192 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 192 */
947 #define LL_HRTIM_CHP_PRESCALER_DIV208 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2) /*!< fCHPFRQ = fHRTIM / 208 */
948 #define LL_HRTIM_CHP_PRESCALER_DIV224 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 224 */
949 #define LL_HRTIM_CHP_PRESCALER_DIV240 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 240 */
950 #define LL_HRTIM_CHP_PRESCALER_DIV256 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 256 */
951 /**
952 * @}
953 */
955 /** @defgroup HRTIM_LL_EC_CHP_DUTYCYCLE CHOPPER MODE DUTY CYCLE
956 * @{
957 * @brief Constants defining the duty cycle of the generated high frequency carrier. Duty cycle can be adjusted by 1/8 step (from 0/8 up to 7/8).
958 */
960 #define LL_HRTIM_CHP_DUTYCYCLE_125 (HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 12.5 % */
961 #define LL_HRTIM_CHP_DUTYCYCLE_250 (HRTIM_CHPR_CARDTY_1) /*!< Duty cycle of the carrier signal is 25 % */
962 #define LL_HRTIM_CHP_DUTYCYCLE_375 (HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 37.5 % */
963 #define LL_HRTIM_CHP_DUTYCYCLE_500 (HRTIM_CHPR_CARDTY_2) /*!< Duty cycle of the carrier signal is 50 % */
964 #define LL_HRTIM_CHP_DUTYCYCLE_625 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 62.5 % */
965 #define LL_HRTIM_CHP_DUTYCYCLE_750 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1) /*!< Duty cycle of the carrier signal is 75 % */
966 #define LL_HRTIM_CHP_DUTYCYCLE_875 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 87.5 % */
967 /**
968 * @}
969 */
971 /** @defgroup HRTIM_LL_EC_CHP_PULSEWIDTH CHOPPER MODE PULSE WIDTH
972 * @{
973 * @brief Constants defining the pulse width of the first pulse of the generated high frequency carrier.
974 */
978 #define LL_HRTIM_CHP_PULSEWIDTH_64 (HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 64 */
980 #define LL_HRTIM_CHP_PULSEWIDTH_96 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 96 */
981 #define LL_HRTIM_CHP_PULSEWIDTH_112 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 112 */
982 #define LL_HRTIM_CHP_PULSEWIDTH_128 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 128 */
984 #define LL_HRTIM_CHP_PULSEWIDTH_160 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 160 */
985 #define LL_HRTIM_CHP_PULSEWIDTH_176 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 176 */
986 #define LL_HRTIM_CHP_PULSEWIDTH_192 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 192 */
987 #define LL_HRTIM_CHP_PULSEWIDTH_208 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2) /*!< tSTPW = tHRTIM x 208 */
988 #define LL_HRTIM_CHP_PULSEWIDTH_224 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 224 */
989 #define LL_HRTIM_CHP_PULSEWIDTH_240 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 240 */
990 #define LL_HRTIM_CHP_PULSEWIDTH_256 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 256 */
991 /**
992 * @}
993 */
995 /** @defgroup HRTIM_LL_EC_CROSSBAR_INPUT CROSSBAR INPUT
996 * @{
997 * @brief Constants defining the events that can be selected to configure the set/reset crossbar of a timer output.
998 */
1000 #define LL_HRTIM_CROSSBAR_RESYNC (HRTIM_SET1R_RESYNC) /*!< Timer reset event coming solely from software or SYNC input forces an output level transision */
1001 #define LL_HRTIM_CROSSBAR_TIMPER (HRTIM_SET1R_PER) /*!< Timer period event forces an output level transision */
1002 #define LL_HRTIM_CROSSBAR_TIMCMP1 (HRTIM_SET1R_CMP1) /*!< Timer compare 1 event forces an output level transision */
1003 #define LL_HRTIM_CROSSBAR_TIMCMP2 (HRTIM_SET1R_CMP2) /*!< Timer compare 2 event forces an output level transision */
1004 #define LL_HRTIM_CROSSBAR_TIMCMP3 (HRTIM_SET1R_CMP3) /*!< Timer compare 3 event forces an output level transision */
1005 #define LL_HRTIM_CROSSBAR_TIMCMP4 (HRTIM_SET1R_CMP4) /*!< Timer compare 4 event forces an output level transision */
1006 #define LL_HRTIM_CROSSBAR_MASTERPER (HRTIM_SET1R_MSTPER) /*!< The master timer period event forces an output level transision */
1007 #define LL_HRTIM_CROSSBAR_MASTERCMP1 (HRTIM_SET1R_MSTCMP1) /*!< Master Timer compare 1 event forces an output level transision */
1008 #define LL_HRTIM_CROSSBAR_MASTERCMP2 (HRTIM_SET1R_MSTCMP2) /*!< Master Timer compare 2 event forces an output level transision */
1009 #define LL_HRTIM_CROSSBAR_MASTERCMP3 (HRTIM_SET1R_MSTCMP3) /*!< Master Timer compare 3 event forces an output level transision */
1010 #define LL_HRTIM_CROSSBAR_MASTERCMP4 (HRTIM_SET1R_MSTCMP4) /*!< Master Timer compare 4 event forces an output level transision */
1011 #define LL_HRTIM_CROSSBAR_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) /*!< Timer event 1 forces an output level transision */
1012 #define LL_HRTIM_CROSSBAR_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) /*!< Timer event 2 forces an output level transision */
1013 #define LL_HRTIM_CROSSBAR_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) /*!< Timer event 3 forces an output level transision */
1014 #define LL_HRTIM_CROSSBAR_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) /*!< Timer event 4 forces an output level transision */
1015 #define LL_HRTIM_CROSSBAR_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) /*!< Timer event 5 forces an output level transision */
1016 #define LL_HRTIM_CROSSBAR_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) /*!< Timer event 6 forces an output level transision */
1017 #define LL_HRTIM_CROSSBAR_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) /*!< Timer event 7 forces an output level transision */
1018 #define LL_HRTIM_CROSSBAR_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) /*!< Timer event 8 forces an output level transision */
1019 #define LL_HRTIM_CROSSBAR_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) /*!< Timer event 9 forces an output level transision */
1020 #define LL_HRTIM_CROSSBAR_EEV_1 (HRTIM_SET1R_EXTVNT1) /*!< External event 1 forces an output level transision */
1021 #define LL_HRTIM_CROSSBAR_EEV_2 (HRTIM_SET1R_EXTVNT2) /*!< External event 2 forces an output level transision */
1022 #define LL_HRTIM_CROSSBAR_EEV_3 (HRTIM_SET1R_EXTVNT3) /*!< External event 3 forces an output level transision */
1023 #define LL_HRTIM_CROSSBAR_EEV_4 (HRTIM_SET1R_EXTVNT4) /*!< External event 4 forces an output level transision */
1024 #define LL_HRTIM_CROSSBAR_EEV_5 (HRTIM_SET1R_EXTVNT5) /*!< External event 5 forces an output level transision */
1025 #define LL_HRTIM_CROSSBAR_EEV_6 (HRTIM_SET1R_EXTVNT6) /*!< External event 6 forces an output level transision */
1026 #define LL_HRTIM_CROSSBAR_EEV_7 (HRTIM_SET1R_EXTVNT7) /*!< External event 7 forces an output level transision */
1027 #define LL_HRTIM_CROSSBAR_EEV_8 (HRTIM_SET1R_EXTVNT8) /*!< External event 8 forces an output level transision */
1028 #define LL_HRTIM_CROSSBAR_EEV_9 (HRTIM_SET1R_EXTVNT9) /*!< External event 9 forces an output level transision */
1029 #define LL_HRTIM_CROSSBAR_EEV_10 (HRTIM_SET1R_EXTVNT10) /*!< External event 10 forces an output level transision */
1030 #define LL_HRTIM_CROSSBAR_UPDATE (HRTIM_SET1R_UPDATE) /*!< Timer register update event forces an output level transision */
1031 /**
1032 * @}
1033 */
1035 /** @defgroup HRTIM_LL_EC_OUT_POLARITY OUPUT_POLARITY
1036 * @{
1037 * @brief Constants defining the polarity of a timer output.
1038 */
1041 /**
1042 * @}
1043 */
1045 /** @defgroup HRTIM_LL_EC_OUT_IDLEMODE OUTPUT IDLE MODE
1046 * @{
1047 * @brief Constants defining whether or not the timer output transition to its IDLE state when burst mode is entered.
1048 */
1049 #define LL_HRTIM_OUT_NO_IDLE 0x00000000U /*!< The output is not affected by the burst mode operation */
1050 #define LL_HRTIM_OUT_IDLE_WHEN_BURST (HRTIM_OUTR_IDLM1) /*!< The output is in idle state when requested by the burst mode controller */
1051 /**
1052 * @}
1053 */
1055 /** @defgroup HRTIM_LL_EC_HALF_MODE HALF MODE
1056 * @{
1057 * @brief Constants defining the half mode of an HRTIM Timer instance.
1058 */
1061 /**
1062 * @}
1063 */
1065 /** @defgroup HRTIM_LL_EC_OUT_IDLELEVEL OUTPUT IDLE LEVEL
1066 * @{
1067 * @brief Constants defining the output level when output is in IDLE state
1068 */
1069 #define LL_HRTIM_OUT_IDLELEVEL_INACTIVE 0x00000000U /*!< Output at inactive level when in IDLE state */
1070 #define LL_HRTIM_OUT_IDLELEVEL_ACTIVE (HRTIM_OUTR_IDLES1) /*!< Output at active level when in IDLE state */
1071 /**
1072 * @}
1073 */
1075 /** @defgroup HRTIM_LL_EC_OUT_FAULTSTATE OUTPUT FAULT STATE
1076 * @{
1077 * @brief Constants defining the output level when output is in FAULT state.
1078 */
1079 #define LL_HRTIM_OUT_FAULTSTATE_NO_ACTION 0x00000000U /*!< The output is not affected by the fault input */
1080 #define LL_HRTIM_OUT_FAULTSTATE_ACTIVE (HRTIM_OUTR_FAULT1_0) /*!< Output at active level when in FAULT state */
1081 #define LL_HRTIM_OUT_FAULTSTATE_INACTIVE (HRTIM_OUTR_FAULT1_1) /*!< Output at inactive level when in FAULT state */
1082 #define LL_HRTIM_OUT_FAULTSTATE_HIGHZ (HRTIM_OUTR_FAULT1_1 | HRTIM_OUTR_FAULT1_0) /*!< Output is tri-stated when in FAULT state */
1083 /**
1084 * @}
1085 */
1087 /** @defgroup HRTIM_LL_EC_OUT_CHOPPERMODE OUTPUT CHOPPER MODE
1088 * @{
1089 * @brief Constants defining whether or not chopper mode is enabled for a timer output.
1090 */
1092 #define LL_HRTIM_OUT_CHOPPERMODE_ENABLED (HRTIM_OUTR_CHP1) /*!< Output signal is chopped by a carrier signal */
1093 /**
1094 * @}
1095 */
1097 /** @defgroup HRTIM_LL_EC_OUT_BM_ENTRYMODE OUTPUT BURST MODE ENTRY MODE
1098 * @{
1099 * @brief Constants defining the idle state entry mode during a burst mode operation. It is possible to delay the burst mode entry and force the output to an inactive state
1100 during a programmable period before the output takes its idle state.
1101 */
1102 #define LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR 0x00000000U /*!< The programmed Idle state is applied immediately to the Output */
1103 #define LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED (HRTIM_OUTR_DIDL1) /*!< Deadtime is inserted on output before entering the idle mode */
1104 /**
1105 * @}
1106 */
1107 /** @defgroup HRTIM_LL_EC_OUT_LEVEL OUTPUT LEVEL
1108 * @{
1109 * @brief Constants defining the level of a timer output.
1110 */
1111 #define LL_HRTIM_OUT_LEVEL_INACTIVE 0x00000000U /*!< Corresponds to a logic level 0 for a positive polarity (High) and to a logic level 1 for a negative polarity (Low) */
1112 #define LL_HRTIM_OUT_LEVEL_ACTIVE ((uint32_t)0x00000001) /*!< Corresponds to a logic level 1 for a positive polarity (High) and to a logic level 0 for a negative polarity (Low) */
1113 /**
1114 * @}
1115 */
1117 /** @defgroup HRTIM_LL_EC_EE_SRC EXTERNAL EVENT SOURCE
1118 * @{
1119 * @brief Constants defining available sources associated to external events.
1120 */
1124 #define LL_HRTIM_EE_SRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) /*!< External event source 4 (EExSrc4) */
1125 /**
1126 * @}
1127 */
1128 /** @defgroup HRTIM_LL_EC_EE_POLARITY EXTERNAL EVENT POLARITY
1129 * @{
1130 * @brief Constants defining the polarity of an external event.
1131 */
1134 /**
1135 * @}
1136 */
1138 /** @defgroup HRTIM_LL_EC_EE_SENSITIVITY EXTERNAL EVENT SENSITIVITY
1139 * @{
1140 * @brief Constants defining the sensitivity (level-sensitive or edge-sensitive) of an external event.
1141 */
1143 #define LL_HRTIM_EE_SENSITIVITY_RISINGEDGE (HRTIM_EECR1_EE1SNS_0) /*!< External event is active on Rising edge */
1144 #define LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE (HRTIM_EECR1_EE1SNS_1) /*!< External event is active on Falling edge */
1145 #define LL_HRTIM_EE_SENSITIVITY_BOTHEDGES (HRTIM_EECR1_EE1SNS_1 | HRTIM_EECR1_EE1SNS_0) /*!< External event is active on Rising and Falling edges */
1146 /**
1147 * @}
1148 */
1150 /** @defgroup HRTIM_LL_EC_EE_FASTMODE EXTERNAL EVENT FAST MODE
1151 * @{
1152 * @brief Constants defining whether or not an external event is programmed in fast mode.
1153 */
1154 #define LL_HRTIM_EE_FASTMODE_DISABLE 0x00000000U /*!< External Event is re-synchronized by the HRTIM logic before acting on outputs */
1155 #define LL_HRTIM_EE_FASTMODE_ENABLE (HRTIM_EECR1_EE1FAST) /*!< External Event is acting asynchronously on outputs (low latency mode) */
1156 /**
1157 * @}
1158 */
1160 /** @defgroup HRTIM_LL_EC_EE_FILTER EXTERNAL EVENT DIGITAL FILTER
1161 * @{
1162 * @brief Constants defining the frequency used to sample an external event input (fSAMPLING) and the length (N) of the digital filter applied.
1163 */
1167 #define LL_HRTIM_EE_FILTER_3 (HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fHRTIM, N=8 */
1169 #define LL_HRTIM_EE_FILTER_5 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/2, N=8 */
1170 #define LL_HRTIM_EE_FILTER_6 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/4, N=6 */
1171 #define LL_HRTIM_EE_FILTER_7 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/4, N=8 */
1173 #define LL_HRTIM_EE_FILTER_9 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/8, N=8 */
1174 #define LL_HRTIM_EE_FILTER_10 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/16, N=5 */
1175 #define LL_HRTIM_EE_FILTER_11 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/16, N=6 */
1176 #define LL_HRTIM_EE_FILTER_12 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2) /*!< fSAMPLING = fEEVS/16, N=8 */
1177 #define LL_HRTIM_EE_FILTER_13 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/32, N=5 */
1178 #define LL_HRTIM_EE_FILTER_14 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/32, N=6 */
1179 #define LL_HRTIM_EE_FILTER_15 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/32, N=8 */
1180 /**
1181 * @}
1182 */
1184 /** @defgroup HRTIM_LL_EC_EE_PRESCALER EXTERNAL EVENT PRESCALER
1185 * @{
1186 * @brief Constants defining division ratio between the timer clock frequency (fHRTIM) and the external event signal sampling clock (fEEVS) used by the digital filters.
1187 */
1191 #define LL_HRTIM_EE_PRESCALER_DIV8 (HRTIM_EECR3_EEVSD_1 | HRTIM_EECR3_EEVSD_0) /*!< fEEVS = fHRTIM / 8 */
1192 /**
1193 * @}
1194 */
1196 /** @defgroup HRTIM_LL_EC_FLT_SRC FAULT SOURCE
1197 * @{
1198 * @brief Constants defining whether a faults is be triggered by any external or internal fault source.
1199 */
1201 #define LL_HRTIM_FLT_SRC_INTERNAL HRTIM_FLTINR1_FLT1SRC /*!< Fault input is FLT_Int signal (e.g. internal comparator) */
1202 /**
1203 * @}
1204 */
1206 /** @defgroup HRTIM_LL_EC_FLT_POLARITY FAULT POLARITY
1207 * @{
1208 * @brief Constants defining the polarity of a fault event.
1209 */
1212 /**
1213 * @}
1214 */
1216 /** @defgroup HRTIM_LL_EC_FLT_FILTER FAULT DIGITAL FILTER
1217 * @{
1218 * @brief Constants defining the frequency used to sample the fault input (fSAMPLING) and the length (N) of the digital filter applied.
1219 */
1223 #define LL_HRTIM_FLT_FILTER_3 (HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fHRTIM, N=8 */
1225 #define LL_HRTIM_FLT_FILTER_5 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/2, N=8 */
1226 #define LL_HRTIM_FLT_FILTER_6 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/4, N=6 */
1227 #define LL_HRTIM_FLT_FILTER_7 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/4, N=8 */
1229 #define LL_HRTIM_FLT_FILTER_9 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/8, N=8 */
1230 #define LL_HRTIM_FLT_FILTER_10 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/16, N=5 */
1231 #define LL_HRTIM_FLT_FILTER_11 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/16, N=6 */
1232 #define LL_HRTIM_FLT_FILTER_12 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2) /*!< fSAMPLING= fFLTS/16, N=8 */
1233 #define LL_HRTIM_FLT_FILTER_13 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/32, N=5 */
1234 #define LL_HRTIM_FLT_FILTER_14 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/32, N=6 */
1235 #define LL_HRTIM_FLT_FILTER_15 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/32, N=8 */
1236 /**
1237 * @}
1238 */
1240 /** @defgroup HRTIM_LL_EC_FLT_PRESCALER BURST FAULT PRESCALER
1241 * @{
1242 * @brief Constants defining the division ratio between the timer clock frequency (fHRTIM) and the fault signal sampling clock (fFLTS) used by the digital filters.
1243 */
1247 #define LL_HRTIM_FLT_PRESCALER_DIV8 (HRTIM_FLTINR2_FLTSD_1 | HRTIM_FLTINR2_FLTSD_0) /*!< fFLTS = fHRTIM / 8 */
1248 /**
1249 * @}
1250 */
1252 /** @defgroup HRTIM_LL_EC_BM_MODE BURST MODE OPERATING MODE
1253 * @{
1254 * @brief Constants defining if the burst mode is entered once or if it is continuously operating.
1255 */
1256 #define LL_HRTIM_BM_MODE_SINGLESHOT 0x00000000U /*!< Burst mode operates in single shot mode */
1257 #define LL_HRTIM_BM_MODE_CONTINOUS (HRTIM_BMCR_BMOM) /*!< Burst mode operates in continuous mode */
1258 /**
1259 * @}
1260 */
1262 /** @defgroup HRTIM_LL_EC_BM_CLKSRC BURST MODE CLOCK SOURCE
1263 * @{
1264 * @brief Constants defining the clock source for the burst mode counter.
1265 */
1266 #define LL_HRTIM_BM_CLKSRC_MASTER 0x00000000U /*!< Master timer counter reset/roll-over is used as clock source for the burst mode counter */
1267 #define LL_HRTIM_BM_CLKSRC_TIMER_A (HRTIM_BMCR_BMCLK_0) /*!< Timer A counter reset/roll-over is used as clock source for the burst mode counter */
1268 #define LL_HRTIM_BM_CLKSRC_TIMER_B (HRTIM_BMCR_BMCLK_1) /*!< Timer B counter reset/roll-over is used as clock source for the burst mode counter */
1269 #define LL_HRTIM_BM_CLKSRC_TIMER_C (HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0) /*!< Timer C counter reset/roll-over is used as clock source for the burst mode counter */
1270 #define LL_HRTIM_BM_CLKSRC_TIMER_D (HRTIM_BMCR_BMCLK_2) /*!< Timer D counter reset/roll-over is used as clock source for the burst mode counter */
1271 #define LL_HRTIM_BM_CLKSRC_TIMER_E (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_0) /*!< Timer E counter reset/roll-over is used as clock source for the burst mode counter */
1272 #define LL_HRTIM_BM_CLKSRC_TIM16_OC (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1) /*!< On-chip Event 1 (BMClk[1]), acting as a burst mode counter clock */
1273 #define LL_HRTIM_BM_CLKSRC_TIM17_OC (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0) /*!< On-chip Event 2 (BMClk[2]), acting as a burst mode counter clock */
1274 #define LL_HRTIM_BM_CLKSRC_TIM7_TRGO (HRTIM_BMCR_BMCLK_3) /*!< On-chip Event 3 (BMClk[3]), acting as a burst mode counter clock */
1275 #define LL_HRTIM_BM_CLKSRC_FHRTIM (HRTIM_BMCR_BMCLK_3 | HRTIM_BMCR_BMCLK_1) /*!< Prescaled fHRTIM clock is used as clock source for the burst mode counter */
1276 /**
1277 * @}
1278 */
1280 /** @defgroup HRTIM_LL_EC_BM_PRESCALER BURST MODE PRESCALER
1281 * @{
1282 * @brief Constants defining the prescaling ratio of the fHRTIM clock for the burst mode controller (fBRST).
1283 */
1287 #define LL_HRTIM_BM_PRESCALER_DIV8 (HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/8 */
1289 #define LL_HRTIM_BM_PRESCALER_DIV32 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/32 */
1290 #define LL_HRTIM_BM_PRESCALER_DIV64 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/64 */
1291 #define LL_HRTIM_BM_PRESCALER_DIV128 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/128 */
1293 #define LL_HRTIM_BM_PRESCALER_DIV512 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/512 */
1294 #define LL_HRTIM_BM_PRESCALER_DIV1024 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/1024 */
1295 #define LL_HRTIM_BM_PRESCALER_DIV2048 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/2048*/
1296 #define LL_HRTIM_BM_PRESCALER_DIV4096 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2) /*!< fBRST = fHRTIM/4096 */
1297 #define LL_HRTIM_BM_PRESCALER_DIV8192 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/8192 */
1298 #define LL_HRTIM_BM_PRESCALER_DIV16384 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/16384 */
1299 #define LL_HRTIM_BM_PRESCALER_DIV32768 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/32768 */
1300 /**
1301 * @}
1302 */
1304 /** @defgroup HRTIM_LL_EC_BM_TRIG HRTIM BURST MODE TRIGGER
1305 * @{
1306 * @brief Constants defining the events that can be used to trig the burst mode operation.
1307 */
1309 #define LL_HRTIM_BM_TRIG_MASTER_RESET (HRTIM_BMTRGR_MSTRST) /*!< Master timer reset event is starting the burst mode operation */
1310 #define LL_HRTIM_BM_TRIG_MASTER_REPETITION (HRTIM_BMTRGR_MSTREP) /*!< Master timer repetition event is starting the burst mode operation */
1311 #define LL_HRTIM_BM_TRIG_MASTER_CMP1 (HRTIM_BMTRGR_MSTCMP1) /*!< Master timer compare 1 event is starting the burst mode operation */
1312 #define LL_HRTIM_BM_TRIG_MASTER_CMP2 (HRTIM_BMTRGR_MSTCMP2) /*!< Master timer compare 2 event is starting the burst mode operation */
1313 #define LL_HRTIM_BM_TRIG_MASTER_CMP3 (HRTIM_BMTRGR_MSTCMP3) /*!< Master timer compare 3 event is starting the burst mode operation */
1314 #define LL_HRTIM_BM_TRIG_MASTER_CMP4 (HRTIM_BMTRGR_MSTCMP4) /*!< Master timer compare 4 event is starting the burst mode operation */
1315 #define LL_HRTIM_BM_TRIG_TIMA_RESET (HRTIM_BMTRGR_TARST) /*!< Timer A reset event is starting the burst mode operation */
1316 #define LL_HRTIM_BM_TRIG_TIMA_REPETITION (HRTIM_BMTRGR_TAREP) /*!< Timer A repetition event is starting the burst mode operation */
1317 #define LL_HRTIM_BM_TRIG_TIMA_CMP1 (HRTIM_BMTRGR_TACMP1) /*!< Timer A compare 1 event is starting the burst mode operation */
1318 #define LL_HRTIM_BM_TRIG_TIMA_CMP2 (HRTIM_BMTRGR_TACMP2) /*!< Timer A compare 2 event is starting the burst mode operation */
1319 #define LL_HRTIM_BM_TRIG_TIMB_RESET (HRTIM_BMTRGR_TBRST) /*!< Timer B reset event is starting the burst mode operation */
1320 #define LL_HRTIM_BM_TRIG_TIMB_REPETITION (HRTIM_BMTRGR_TBREP) /*!< Timer B repetition event is starting the burst mode operation */
1321 #define LL_HRTIM_BM_TRIG_TIMB_CMP1 (HRTIM_BMTRGR_TBCMP1) /*!< Timer B compare 1 event is starting the burst mode operation */
1322 #define LL_HRTIM_BM_TRIG_TIMB_CMP2 (HRTIM_BMTRGR_TBCMP2) /*!< Timer B compare 2 event is starting the burst mode operation */
1323 #define LL_HRTIM_BM_TRIG_TIMC_RESET (HRTIM_BMTRGR_TCRST) /*!< Timer C resetevent is starting the burst mode operation */
1324 #define LL_HRTIM_BM_TRIG_TIMC_REPETITION (HRTIM_BMTRGR_TCREP) /*!< Timer C repetition event is starting the burst mode operation */
1325 #define LL_HRTIM_BM_TRIG_TIMC_CMP1 (HRTIM_BMTRGR_TCCMP1) /*!< Timer C compare 1 event is starting the burst mode operation */
1326 #define LL_HRTIM_BM_TRIG_TIMC_CMP2 (HRTIM_BMTRGR_TCCMP2) /*!< Timer C compare 2 event is starting the burst mode operation */
1327 #define LL_HRTIM_BM_TRIG_TIMD_RESET (HRTIM_BMTRGR_TDRST) /*!< Timer D reset event is starting the burst mode operation */
1328 #define LL_HRTIM_BM_TRIG_TIMD_REPETITION (HRTIM_BMTRGR_TDREP) /*!< Timer D repetition event is starting the burst mode operation */
1329 #define LL_HRTIM_BM_TRIG_TIMD_CMP1 (HRTIM_BMTRGR_TDCMP1) /*!< Timer D compare 1 event is starting the burst mode operation */
1330 #define LL_HRTIM_BM_TRIG_TIMD_CMP2 (HRTIM_BMTRGR_TDCMP2) /*!< Timer D compare 2 event is starting the burst mode operation */
1331 #define LL_HRTIM_BM_TRIG_TIME_RESET (HRTIM_BMTRGR_TERST) /*!< Timer E reset event is starting the burst mode operation */
1332 #define LL_HRTIM_BM_TRIG_TIME_REPETITION (HRTIM_BMTRGR_TEREP) /*!< Timer E repetition event is starting the burst mode operation */
1333 #define LL_HRTIM_BM_TRIG_TIME_CMP1 (HRTIM_BMTRGR_TECMP1) /*!< Timer E compare 1 event is starting the burst mode operation */
1334 #define LL_HRTIM_BM_TRIG_TIME_CMP2 (HRTIM_BMTRGR_TECMP2) /*!< Timer E compare 2 event is starting the burst mode operation */
1335 #define LL_HRTIM_BM_TRIG_TIMA_EVENT7 (HRTIM_BMTRGR_TAEEV7) /*!< Timer A period following an external event 7 (conditioned by TIMA filters) is starting the burst mode operation */
1336 #define LL_HRTIM_BM_TRIG_TIMD_EVENT8 (HRTIM_BMTRGR_TDEEV8) /*!< Timer D period following an external event 8 (conditioned by TIMD filters) is starting the burst mode operation */
1337 #define LL_HRTIM_BM_TRIG_EVENT_7 (HRTIM_BMTRGR_EEV7) /*!< External event 7 conditioned by TIMA filters is starting the burst mode operation */
1338 #define LL_HRTIM_BM_TRIG_EVENT_8 (HRTIM_BMTRGR_EEV8) /*!< External event 8 conditioned by TIMD filters is starting the burst mode operation */
1339 #define LL_HRTIM_BM_TRIG_EVENT_ONCHIP (HRTIM_BMTRGR_OCHPEV) /*!< A rising edge on an on-chip Event (for instance from GP timer or comparator) triggers the burst mode operation */
1340 /**
1341 * @}
1342 */
1344 /** @defgroup HRTIM_LL_EC_BM_STATUS HRTIM BURST MODE STATUS
1345 * @{
1346 * @brief Constants defining the operating state of the burst mode controller.
1347 */
1350 /**
1351 * @}
1352 */
1354 /**
1355 * @}
1356 */
1358 /* Exported macro ------------------------------------------------------------*/
1359 /** @defgroup HRTIM_LL_Exported_Macros HRTIM Exported Macros
1360 * @{
1361 */
1363 /** @defgroup HRTIM_LL_EM_WRITE_READ Common Write and read registers Macros
1364 * @{
1365 */
1367 /**
1368 * @brief Write a value in HRTIM register
1369 * @param __INSTANCE__ HRTIM Instance
1370 * @param __REG__ Register to be written
1371 * @param __VALUE__ Value to be written in the register
1372 * @retval None
1373 */
1374 #define LL_HRTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
1376 /**
1377 * @brief Read a value in HRTIM register
1378 * @param __INSTANCE__ HRTIM Instance
1379 * @param __REG__ Register to be read
1380 * @retval Register value
1381 */
1382 #define LL_HRTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
1383 /**
1384 * @}
1385 */
1387 /** @defgroup HRTIM_LL_EM_Exported_Macros Exported_Macros
1388 * @{
1389 */
1390 /**
1391 * @brief HELPER macro returning the output state from output enable/disable status
1392 * @param __OUTPUT_STATUS_EN__ output enable status
1393 * @param __OUTPUT_STATUS_DIS__ output Disable status
1394 * @retval Returned value can be one of the following values:
1395 * @arg @ref LL_HRTIM_OUTPUTSTATE_IDLE
1396 * @arg @ref LL_HRTIM_OUTPUTSTATE_RUN
1397 * @arg @ref LL_HRTIM_OUTPUTSTATE_FAULT
1398 */
1399 #define __LL_HRTIM_GET_OUTPUT_STATE(__OUTPUT_STATUS_EN__, __OUTPUT_STATUS_DIS__)\
1400 (((__OUTPUT_STATUS_EN__) == 1) ? LL_HRTIM_OUTPUTSTATE_RUN :\
1401 ((__OUTPUT_STATUS_DIS__) == 0) ? LL_HRTIM_OUTPUTSTATE_IDLE : LL_HRTIM_OUTPUTSTATE_FAULT)
1402 /**
1403 * @}
1404 */
1406 /**
1407 * @}
1408 */
1410 /* Exported functions --------------------------------------------------------*/
1411 /** @defgroup HRTIM_LL_Exported_Functions HRTIM Exported Functions
1412 * @{
1413 */
1414 /** @defgroup HRTIM_LL_EF_HRTIM_Control HRTIM_Control
1415 * @{
1416 */
1418 /**
1419 * @brief Select the HRTIM synchronization input source.
1420 * @note This function must not be called when the concerned timer(s) is (are) enabled .
1421 * @rmtoll MCR SYNCIN LL_HRTIM_SetSyncInSrc
1422 * @param HRTIMx High Resolution Timer instance
1423 * @param SyncInSrc This parameter can be one of the following values:
1424 * @arg @ref LL_HRTIM_SYNCIN_SRC_NONE
1425 * @arg @ref LL_HRTIM_SYNCIN_SRC_TIM_EVENT
1426 * @arg @ref LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT
1427 * @retval None
1428 */
1430 {
1432 }
1434 /**
1435 * @brief Get actual HRTIM synchronization input source.
1436 * @rmtoll MCR SYNCIN LL_HRTIM_SetSyncInSrc
1437 * @param HRTIMx High Resolution Timer instance
1438 * @retval SyncInSrc Returned value can be one of the following values:
1439 * @arg @ref LL_HRTIM_SYNCIN_SRC_NONE
1440 * @arg @ref LL_HRTIM_SYNCIN_SRC_TIM_EVENT
1441 * @arg @ref LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT
1442 */
1444 {
1446 }
1448 /**
1449 * @brief Configure the HRTIM synchronization output.
1450 * @rmtoll MCR SYNCSRC LL_HRTIM_ConfigSyncOut\n
1451 * MCR SYNCOUT LL_HRTIM_ConfigSyncOut
1452 * @param HRTIMx High Resolution Timer instance
1453 * @param Config This parameter can be one of the following values:
1454 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1455 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1456 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1457 * @param Src This parameter can be one of the following values:
1458 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1459 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1460 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1461 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1462 * @retval None
1463 */
1464 __STATIC_INLINE void LL_HRTIM_ConfigSyncOut(HRTIM_TypeDef *HRTIMx, uint32_t Config, uint32_t Src)
1465 {
1466 MODIFY_REG(HRTIMx->sMasterRegs.MCR, (HRTIM_MCR_SYNC_OUT | HRTIM_MCR_SYNC_SRC), (Config | Src));
1467 }
1469 /**
1470 * @brief Set the routing and conditioning of the synchronization output event.
1471 * @rmtoll MCR SYNCOUT LL_HRTIM_SetSyncOutConfig
1472 * @note This function can be called only when the master timer is enabled.
1473 * @param HRTIMx High Resolution Timer instance
1474 * @param SyncOutConfig This parameter can be one of the following values:
1475 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1476 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1477 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1478 * @retval None
1479 */
1481 {
1483 }
1485 /**
1486 * @brief Get actual routing and conditioning of the synchronization output event.
1487 * @rmtoll MCR SYNCOUT LL_HRTIM_GetSyncOutConfig
1488 * @param HRTIMx High Resolution Timer instance
1489 * @retval SyncOutConfig Returned value can be one of the following values:
1490 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1491 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1492 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1493 */
1495 {
1497 }
1499 /**
1500 * @brief Set the source and event to be sent on the HRTIM synchronization output.
1501 * @rmtoll MCR SYNCSRC LL_HRTIM_SetSyncOutSrc
1502 * @param HRTIMx High Resolution Timer instance
1503 * @param SyncOutSrc This parameter can be one of the following values:
1504 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1505 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1506 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1507 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1508 * @retval None
1509 */
1511 {
1513 }
1515 /**
1516 * @brief Get actual source and event sent on the HRTIM synchronization output.
1517 * @rmtoll MCR SYNCSRC LL_HRTIM_GetSyncOutSrc
1518 * @param HRTIMx High Resolution Timer instance
1519 * @retval SyncOutSrc Returned value can be one of the following values:
1520 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1521 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1522 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1523 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1524 */
1526 {
1528 }
1530 /**
1531 * @brief Disable (temporarily) update event generation.
1532 * @rmtoll CR1 MUDIS LL_HRTIM_SuspendUpdate\n
1533 * CR1 TAUDIS LL_HRTIM_SuspendUpdate\n
1534 * CR1 TBUDIS LL_HRTIM_SuspendUpdate\n
1535 * CR1 TCUDIS LL_HRTIM_SuspendUpdate\n
1536 * CR1 TDUDIS LL_HRTIM_SuspendUpdate\n
1537 * CR1 TEUDIS LL_HRTIM_SuspendUpdate
1538 * @note Allow to temporarily disable the transfer from preload to active
1539 * registers, whatever the selected update event. This allows to modify
1540 * several registers in multiple timers.
1541 * @param HRTIMx High Resolution Timer instance
1542 * @param Timers This parameter can be a combination of the following values:
1543 * @arg @ref LL_HRTIM_TIMER_MASTER
1544 * @arg @ref LL_HRTIM_TIMER_A
1545 * @arg @ref LL_HRTIM_TIMER_B
1546 * @arg @ref LL_HRTIM_TIMER_C
1547 * @arg @ref LL_HRTIM_TIMER_D
1548 * @arg @ref LL_HRTIM_TIMER_E
1549 * @retval None
1550 */
1552 {
1554 }
1556 /**
1557 * @brief Enable update event generation.
1558 * @rmtoll CR1 MUDIS LL_HRTIM_ResumeUpdate\n
1559 * CR1 TAUDIS LL_HRTIM_ResumeUpdate\n
1560 * CR1 TBUDIS LL_HRTIM_ResumeUpdate\n
1561 * CR1 TCUDIS LL_HRTIM_ResumeUpdate\n
1562 * CR1 TDUDIS LL_HRTIM_ResumeUpdate\n
1563 * CR1 TEUDIS LL_HRTIM_ResumeUpdate
1564 * @note The regular update event takes place.
1565 * @param HRTIMx High Resolution Timer instance
1566 * @param Timers This parameter can be a combination of the following values:
1567 * @arg @ref LL_HRTIM_TIMER_MASTER
1568 * @arg @ref LL_HRTIM_TIMER_A
1569 * @arg @ref LL_HRTIM_TIMER_B
1570 * @arg @ref LL_HRTIM_TIMER_C
1571 * @arg @ref LL_HRTIM_TIMER_D
1572 * @arg @ref LL_HRTIM_TIMER_E
1573 * @retval None
1574 */
1576 {
1578 }
1580 /**
1581 * @brief Force an immediate transfer from the preload to the active register .
1582 * @rmtoll CR2 MSWU LL_HRTIM_ForceUpdate\n
1583 * CR2 TASWU LL_HRTIM_ForceUpdate\n
1584 * CR2 TBSWU LL_HRTIM_ForceUpdate\n
1585 * CR2 TCSWU LL_HRTIM_ForceUpdate\n
1586 * CR2 TDSWU LL_HRTIM_ForceUpdate\n
1587 * CR2 TESWU LL_HRTIM_ForceUpdate
1588 * @note Any pending update request is cancelled.
1589 * @param HRTIMx High Resolution Timer instance
1590 * @param Timers This parameter can be a combination of the following values:
1591 * @arg @ref LL_HRTIM_TIMER_MASTER
1592 * @arg @ref LL_HRTIM_TIMER_A
1593 * @arg @ref LL_HRTIM_TIMER_B
1594 * @arg @ref LL_HRTIM_TIMER_C
1595 * @arg @ref LL_HRTIM_TIMER_D
1596 * @arg @ref LL_HRTIM_TIMER_E
1597 * @retval None
1598 */
1600 {
1602 }
1604 /**
1605 * @brief Reset the HRTIM timer(s) counter.
1606 * @rmtoll CR2 MRST LL_HRTIM_CounterReset\n
1607 * CR2 TARST LL_HRTIM_CounterReset\n
1608 * CR2 TBRST LL_HRTIM_CounterReset\n
1609 * CR2 TCRST LL_HRTIM_CounterReset\n
1610 * CR2 TDRST LL_HRTIM_CounterReset\n
1611 * CR2 TERST LL_HRTIM_CounterReset
1612 * @param HRTIMx High Resolution Timer instance
1613 * @param Timers This parameter can be a combination of the following values:
1614 * @arg @ref LL_HRTIM_TIMER_MASTER
1615 * @arg @ref LL_HRTIM_TIMER_A
1616 * @arg @ref LL_HRTIM_TIMER_B
1617 * @arg @ref LL_HRTIM_TIMER_C
1618 * @arg @ref LL_HRTIM_TIMER_D
1619 * @arg @ref LL_HRTIM_TIMER_E
1620 * @retval None
1621 */
1623 {
1624 SET_BIT(HRTIMx->sCommonRegs.CR2, (((Timers >> HRTIM_MCR_MCEN_Pos) << HRTIM_CR2_MRST_Pos) & HRTIM_CR2_SWRST_MASK));
1625 }
1627 /**
1628 * @brief Enable the HRTIM timer(s) output(s) .
1629 * @rmtoll OENR TA1OEN LL_HRTIM_EnableOutput\n
1630 * OENR TA2OEN LL_HRTIM_EnableOutput\n
1631 * OENR TB1OEN LL_HRTIM_EnableOutput\n
1632 * OENR TB2OEN LL_HRTIM_EnableOutput\n
1633 * OENR TC1OEN LL_HRTIM_EnableOutput\n
1634 * OENR TC2OEN LL_HRTIM_EnableOutput\n
1635 * OENR TD1OEN LL_HRTIM_EnableOutput\n
1636 * OENR TD2OEN LL_HRTIM_EnableOutput\n
1637 * OENR TE1OEN LL_HRTIM_EnableOutput\n
1638 * OENR TE2OEN LL_HRTIM_EnableOutput
1639 * @param HRTIMx High Resolution Timer instance
1640 * @param Outputs This parameter can be a combination of the following values:
1641 * @arg @ref LL_HRTIM_OUTPUT_TA1
1642 * @arg @ref LL_HRTIM_OUTPUT_TA2
1643 * @arg @ref LL_HRTIM_OUTPUT_TB1
1644 * @arg @ref LL_HRTIM_OUTPUT_TB2
1645 * @arg @ref LL_HRTIM_OUTPUT_TC1
1646 * @arg @ref LL_HRTIM_OUTPUT_TC2
1647 * @arg @ref LL_HRTIM_OUTPUT_TD1
1648 * @arg @ref LL_HRTIM_OUTPUT_TD2
1649 * @arg @ref LL_HRTIM_OUTPUT_TE1
1650 * @arg @ref LL_HRTIM_OUTPUT_TE2
1651 * @retval None
1652 */
1654 {
1656 }
1658 /**
1659 * @brief Disable the HRTIM timer(s) output(s) .
1660 * @rmtoll OENR TA1OEN LL_HRTIM_DisableOutput\n
1661 * OENR TA2OEN LL_HRTIM_DisableOutput\n
1662 * OENR TB1OEN LL_HRTIM_DisableOutput\n
1663 * OENR TB2OEN LL_HRTIM_DisableOutput\n
1664 * OENR TC1OEN LL_HRTIM_DisableOutput\n
1665 * OENR TC2OEN LL_HRTIM_DisableOutput\n
1666 * OENR TD1OEN LL_HRTIM_DisableOutput\n
1667 * OENR TD2OEN LL_HRTIM_DisableOutput\n
1668 * OENR TE1OEN LL_HRTIM_DisableOutput\n
1669 * OENR TE2OEN LL_HRTIM_DisableOutput
1670 * @param HRTIMx High Resolution Timer instance
1671 * @param Outputs This parameter can be a combination of the following values:
1672 * @arg @ref LL_HRTIM_OUTPUT_TA1
1673 * @arg @ref LL_HRTIM_OUTPUT_TA2
1674 * @arg @ref LL_HRTIM_OUTPUT_TB1
1675 * @arg @ref LL_HRTIM_OUTPUT_TB2
1676 * @arg @ref LL_HRTIM_OUTPUT_TC1
1677 * @arg @ref LL_HRTIM_OUTPUT_TC2
1678 * @arg @ref LL_HRTIM_OUTPUT_TD1
1679 * @arg @ref LL_HRTIM_OUTPUT_TD2
1680 * @arg @ref LL_HRTIM_OUTPUT_TE1
1681 * @arg @ref LL_HRTIM_OUTPUT_TE2
1682 * @retval None
1683 */
1685 {
1687 }
1689 /**
1690 * @brief Indicates whether the HRTIM timer output is enabled.
1691 * @rmtoll OENR TA1OEN LL_HRTIM_IsEnabledOutput\n
1692 * OENR TA2OEN LL_HRTIM_IsEnabledOutput\n
1693 * OENR TB1OEN LL_HRTIM_IsEnabledOutput\n
1694 * OENR TB2OEN LL_HRTIM_IsEnabledOutput\n
1695 * OENR TC1OEN LL_HRTIM_IsEnabledOutput\n
1696 * OENR TC2OEN LL_HRTIM_IsEnabledOutput\n
1697 * OENR TD1OEN LL_HRTIM_IsEnabledOutput\n
1698 * OENR TD2OEN LL_HRTIM_IsEnabledOutput\n
1699 * OENR TE1OEN LL_HRTIM_IsEnabledOutput\n
1700 * OENR TE2OEN LL_HRTIM_IsEnabledOutput
1701 * @param HRTIMx High Resolution Timer instance
1702 * @param Output This parameter can be one of the following values:
1703 * @arg @ref LL_HRTIM_OUTPUT_TA1
1704 * @arg @ref LL_HRTIM_OUTPUT_TA2
1705 * @arg @ref LL_HRTIM_OUTPUT_TB1
1706 * @arg @ref LL_HRTIM_OUTPUT_TB2
1707 * @arg @ref LL_HRTIM_OUTPUT_TC1
1708 * @arg @ref LL_HRTIM_OUTPUT_TC2
1709 * @arg @ref LL_HRTIM_OUTPUT_TD1
1710 * @arg @ref LL_HRTIM_OUTPUT_TD2
1711 * @arg @ref LL_HRTIM_OUTPUT_TE1
1712 * @arg @ref LL_HRTIM_OUTPUT_TE2
1713 * @retval State of TxyOEN bit in HRTIM_OENR register (1 or 0).
1714 */
1716 {
1718 }
1720 /**
1721 * @brief Indicates whether the HRTIM timer output is disabled.
1722 * @rmtoll ODISR TA1ODIS LL_HRTIM_IsDisabledOutput\n
1723 * ODISR TA2ODIS LL_HRTIM_IsDisabledOutput\n
1724 * ODISR TB1ODIS LL_HRTIM_IsDisabledOutput\n
1725 * ODISR TB2ODIS LL_HRTIM_IsDisabledOutput\n
1726 * ODISR TC1ODIS LL_HRTIM_IsDisabledOutput\n
1727 * ODISR TC2ODIS LL_HRTIM_IsDisabledOutput\n
1728 * ODISR TD1ODIS LL_HRTIM_IsDisabledOutput\n
1729 * ODISR TD2ODIS LL_HRTIM_IsDisabledOutput\n
1730 * ODISR TE1ODIS LL_HRTIM_IsDisabledOutput\n
1731 * ODISR TE2ODIS LL_HRTIM_IsDisabledOutput
1732 * @param HRTIMx High Resolution Timer instance
1733 * @param Output This parameter can be one of the following values:
1734 * @arg @ref LL_HRTIM_OUTPUT_TA1
1735 * @arg @ref LL_HRTIM_OUTPUT_TA2
1736 * @arg @ref LL_HRTIM_OUTPUT_TB1
1737 * @arg @ref LL_HRTIM_OUTPUT_TB2
1738 * @arg @ref LL_HRTIM_OUTPUT_TC1
1739 * @arg @ref LL_HRTIM_OUTPUT_TC2
1740 * @arg @ref LL_HRTIM_OUTPUT_TD1
1741 * @arg @ref LL_HRTIM_OUTPUT_TD2
1742 * @arg @ref LL_HRTIM_OUTPUT_TE1
1743 * @arg @ref LL_HRTIM_OUTPUT_TE2
1744 * @retval State of TxyODS bit in HRTIM_OENR register (1 or 0).
1745 */
1747 {
1749 }
1751 /**
1752 * @brief Configure an ADC trigger.
1753 * @rmtoll CR1 ADC1USRC LL_HRTIM_ConfigADCTrig\n
1754 * CR1 ADC2USRC LL_HRTIM_ConfigADCTrig\n
1755 * CR1 ADC3USRC LL_HRTIM_ConfigADCTrig\n
1756 * CR1 ADC4USRC LL_HRTIM_ConfigADCTrig\n
1757 * ADC1R ADC1MC1 LL_HRTIM_ConfigADCTrig\n
1758 * ADC1R ADC1MC2 LL_HRTIM_ConfigADCTrig\n
1759 * ADC1R ADC1MC3 LL_HRTIM_ConfigADCTrig\n
1760 * ADC1R ADC1MC4 LL_HRTIM_ConfigADCTrig\n
1761 * ADC1R ADC1MPER LL_HRTIM_ConfigADCTrig\n
1762 * ADC1R ADC1EEV1 LL_HRTIM_ConfigADCTrig\n
1763 * ADC1R ADC1EEV2 LL_HRTIM_ConfigADCTrig\n
1764 * ADC1R ADC1EEV3 LL_HRTIM_ConfigADCTrig\n
1765 * ADC1R ADC1EEV4 LL_HRTIM_ConfigADCTrig\n
1766 * ADC1R ADC1EEV5 LL_HRTIM_ConfigADCTrig\n
1767 * ADC1R ADC1TAC2 LL_HRTIM_ConfigADCTrig\n
1768 * ADC1R ADC1TAC3 LL_HRTIM_ConfigADCTrig\n
1769 * ADC1R ADC1TAC4 LL_HRTIM_ConfigADCTrig\n
1770 * ADC1R ADC1TAPER LL_HRTIM_ConfigADCTrig\n
1771 * ADC1R ADC1TARST LL_HRTIM_ConfigADCTrig\n
1772 * ADC1R ADC1TBC2 LL_HRTIM_ConfigADCTrig\n
1773 * ADC1R ADC1TBC3 LL_HRTIM_ConfigADCTrig\n
1774 * ADC1R ADC1TBC4 LL_HRTIM_ConfigADCTrig\n
1775 * ADC1R ADC1TBPER LL_HRTIM_ConfigADCTrig\n
1776 * ADC1R ADC1TBRST LL_HRTIM_ConfigADCTrig\n
1777 * ADC1R ADC1TCC2 LL_HRTIM_ConfigADCTrig\n
1778 * ADC1R ADC1TCC3 LL_HRTIM_ConfigADCTrig\n
1779 * ADC1R ADC1TCC4 LL_HRTIM_ConfigADCTrig\n
1780 * ADC1R ADC1TCPER LL_HRTIM_ConfigADCTrig\n
1781 * ADC1R ADC1TDC2 LL_HRTIM_ConfigADCTrig\n
1782 * ADC1R ADC1TDC3 LL_HRTIM_ConfigADCTrig\n
1783 * ADC1R ADC1TDC4 LL_HRTIM_ConfigADCTrig\n
1784 * ADC1R ADC1TDPER LL_HRTIM_ConfigADCTrig\n
1785 * ADC1R ADC1TEC2 LL_HRTIM_ConfigADCTrig\n
1786 * ADC1R ADC1TEC3 LL_HRTIM_ConfigADCTrig\n
1787 * ADC1R ADC1TEC4 LL_HRTIM_ConfigADCTrig\n
1788 * ADC1R ADC1TEPER LL_HRTIM_ConfigADCTrig\n
1789 * ADC2R ADC2MC1 LL_HRTIM_ConfigADCTrig\n
1790 * ADC2R ADC2MC2 LL_HRTIM_ConfigADCTrig\n
1791 * ADC2R ADC2MC3 LL_HRTIM_ConfigADCTrig\n
1792 * ADC2R ADC2MC4 LL_HRTIM_ConfigADCTrig\n
1793 * ADC2R ADC2MPER LL_HRTIM_ConfigADCTrig\n
1794 * ADC2R ADC2EEV6 LL_HRTIM_ConfigADCTrig\n
1795 * ADC2R ADC2EEV7 LL_HRTIM_ConfigADCTrig\n
1796 * ADC2R ADC2EEV8 LL_HRTIM_ConfigADCTrig\n
1797 * ADC2R ADC2EEV9 LL_HRTIM_ConfigADCTrig\n
1798 * ADC2R ADC2EEV10 LL_HRTIM_ConfigADCTrig\n
1799 * ADC2R ADC2TAC2 LL_HRTIM_ConfigADCTrig\n
1800 * ADC2R ADC2TAC3 LL_HRTIM_ConfigADCTrig\n
1801 * ADC2R ADC2TAC4 LL_HRTIM_ConfigADCTrig\n
1802 * ADC2R ADC2TAPER LL_HRTIM_ConfigADCTrig\n
1803 * ADC2R ADC2TBC2 LL_HRTIM_ConfigADCTrig\n
1804 * ADC2R ADC2TBC3 LL_HRTIM_ConfigADCTrig\n
1805 * ADC2R ADC2TBC4 LL_HRTIM_ConfigADCTrig\n
1806 * ADC2R ADC2TBPER LL_HRTIM_ConfigADCTrig\n
1807 * ADC2R ADC2TCC2 LL_HRTIM_ConfigADCTrig\n
1808 * ADC2R ADC2TCC3 LL_HRTIM_ConfigADCTrig\n
1809 * ADC2R ADC2TCC4 LL_HRTIM_ConfigADCTrig\n
1810 * ADC2R ADC2TCPER LL_HRTIM_ConfigADCTrig\n
1811 * ADC2R ADC2TCRST LL_HRTIM_ConfigADCTrig\n
1812 * ADC2R ADC2TDC2 LL_HRTIM_ConfigADCTrig\n
1813 * ADC2R ADC2TDC3 LL_HRTIM_ConfigADCTrig\n
1814 * ADC2R ADC2TDC4 LL_HRTIM_ConfigADCTrig\n
1815 * ADC2R ADC2TDPER LL_HRTIM_ConfigADCTrig\n
1816 * ADC2R ADC2TDRST LL_HRTIM_ConfigADCTrig\n
1817 * ADC2R ADC2TEC2 LL_HRTIM_ConfigADCTrig\n
1818 * ADC2R ADC2TEC3 LL_HRTIM_ConfigADCTrig\n
1819 * ADC2R ADC2TEC4 LL_HRTIM_ConfigADCTrig\n
1820 * ADC2R ADC2TERST LL_HRTIM_ConfigADCTrig\n
1821 * ADC3R ADC3MC1 LL_HRTIM_ConfigADCTrig\n
1822 * ADC3R ADC3MC2 LL_HRTIM_ConfigADCTrig\n
1823 * ADC3R ADC3MC3 LL_HRTIM_ConfigADCTrig\n
1824 * ADC3R ADC3MC4 LL_HRTIM_ConfigADCTrig\n
1825 * ADC3R ADC3MPER LL_HRTIM_ConfigADCTrig\n
1826 * ADC3R ADC3EEV1 LL_HRTIM_ConfigADCTrig\n
1827 * ADC3R ADC3EEV2 LL_HRTIM_ConfigADCTrig\n
1828 * ADC3R ADC3EEV3 LL_HRTIM_ConfigADCTrig\n
1829 * ADC3R ADC3EEV4 LL_HRTIM_ConfigADCTrig\n
1830 * ADC3R ADC3EEV5 LL_HRTIM_ConfigADCTrig\n
1831 * ADC3R ADC3TAC2 LL_HRTIM_ConfigADCTrig\n
1832 * ADC3R ADC3TAC3 LL_HRTIM_ConfigADCTrig\n
1833 * ADC3R ADC3TAC4 LL_HRTIM_ConfigADCTrig\n
1834 * ADC3R ADC3TAPER LL_HRTIM_ConfigADCTrig\n
1835 * ADC3R ADC3TARST LL_HRTIM_ConfigADCTrig\n
1836 * ADC3R ADC3TBC2 LL_HRTIM_ConfigADCTrig\n
1837 * ADC3R ADC3TBC3 LL_HRTIM_ConfigADCTrig\n
1838 * ADC3R ADC3TBC4 LL_HRTIM_ConfigADCTrig\n
1839 * ADC3R ADC3TBPER LL_HRTIM_ConfigADCTrig\n
1840 * ADC3R ADC3TBRST LL_HRTIM_ConfigADCTrig\n
1841 * ADC3R ADC3TCC2 LL_HRTIM_ConfigADCTrig\n
1842 * ADC3R ADC3TCC3 LL_HRTIM_ConfigADCTrig\n
1843 * ADC3R ADC3TCC4 LL_HRTIM_ConfigADCTrig\n
1844 * ADC3R ADC3TCPER LL_HRTIM_ConfigADCTrig\n
1845 * ADC3R ADC3TDC2 LL_HRTIM_ConfigADCTrig\n
1846 * ADC3R ADC3TDC3 LL_HRTIM_ConfigADCTrig\n
1847 * ADC3R ADC3TDC4 LL_HRTIM_ConfigADCTrig\n
1848 * ADC3R ADC3TDPER LL_HRTIM_ConfigADCTrig\n
1849 * ADC3R ADC3TEC2 LL_HRTIM_ConfigADCTrig\n
1850 * ADC3R ADC3TEC3 LL_HRTIM_ConfigADCTrig\n
1851 * ADC3R ADC3TEC4 LL_HRTIM_ConfigADCTrig\n
1852 * ADC3R ADC3TEPER LL_HRTIM_ConfigADCTrig\n
1853 * ADC4R ADC4MC1 LL_HRTIM_ConfigADCTrig\n
1854 * ADC4R ADC4MC2 LL_HRTIM_ConfigADCTrig\n
1855 * ADC4R ADC4MC3 LL_HRTIM_ConfigADCTrig\n
1856 * ADC4R ADC4MC4 LL_HRTIM_ConfigADCTrig\n
1857 * ADC4R ADC4MPER LL_HRTIM_ConfigADCTrig\n
1858 * ADC4R ADC4EEV6 LL_HRTIM_ConfigADCTrig\n
1859 * ADC4R ADC4EEV7 LL_HRTIM_ConfigADCTrig\n
1860 * ADC4R ADC4EEV8 LL_HRTIM_ConfigADCTrig\n
1861 * ADC4R ADC4EEV9 LL_HRTIM_ConfigADCTrig\n
1862 * ADC4R ADC4EEV10 LL_HRTIM_ConfigADCTrig\n
1863 * ADC4R ADC4TAC2 LL_HRTIM_ConfigADCTrig\n
1864 * ADC4R ADC4TAC3 LL_HRTIM_ConfigADCTrig\n
1865 * ADC4R ADC4TAC4 LL_HRTIM_ConfigADCTrig\n
1866 * ADC4R ADC4TAPER LL_HRTIM_ConfigADCTrig\n
1867 * ADC4R ADC4TBC2 LL_HRTIM_ConfigADCTrig\n
1868 * ADC4R ADC4TBC3 LL_HRTIM_ConfigADCTrig\n
1869 * ADC4R ADC4TBC4 LL_HRTIM_ConfigADCTrig\n
1870 * ADC4R ADC4TBPER LL_HRTIM_ConfigADCTrig\n
1871 * ADC4R ADC4TCC2 LL_HRTIM_ConfigADCTrig\n
1872 * ADC4R ADC4TCC3 LL_HRTIM_ConfigADCTrig\n
1873 * ADC4R ADC4TCC4 LL_HRTIM_ConfigADCTrig\n
1874 * ADC4R ADC4TCPER LL_HRTIM_ConfigADCTrig\n
1875 * ADC4R ADC4TCRST LL_HRTIM_ConfigADCTrig\n
1876 * ADC4R ADC4TDC2 LL_HRTIM_ConfigADCTrig\n
1877 * ADC4R ADC4TDC3 LL_HRTIM_ConfigADCTrig\n
1878 * ADC4R ADC4TDC4 LL_HRTIM_ConfigADCTrig\n
1879 * ADC4R ADC4TDPER LL_HRTIM_ConfigADCTrig\n
1880 * ADC4R ADC4TDRST LL_HRTIM_ConfigADCTrig\n
1881 * ADC4R ADC4TEC2 LL_HRTIM_ConfigADCTrig\n
1882 * ADC4R ADC4TEC3 LL_HRTIM_ConfigADCTrig\n
1883 * ADC4R ADC4TEC4 LL_HRTIM_ConfigADCTrig\n
1884 * ADC4R ADC4TERST LL_HRTIM_ConfigADCTrig
1885 * @param HRTIMx High Resolution Timer instance
1886 * @param ADCTrig This parameter can be one of the following values:
1887 * @arg @ref LL_HRTIM_ADCTRIG_1
1888 * @arg @ref LL_HRTIM_ADCTRIG_2
1889 * @arg @ref LL_HRTIM_ADCTRIG_3
1890 * @arg @ref LL_HRTIM_ADCTRIG_4
1891 * @param Update This parameter can be one of the following values:
1892 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
1893 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
1894 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
1895 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
1896 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
1897 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
1898 * @param Src This parameter can be a combination of the following values:
1899 *
1900 * For ADC trigger 1 and ADC trigger 3:
1901 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
1902 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
1903 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
1904 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
1905 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
1906 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
1907 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
1908 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
1909 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
1910 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
1911 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
1912 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
1913 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
1914 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
1915 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
1916 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
1917 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
1918 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
1919 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
1920 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
1921 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
1922 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
1923 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
1924 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
1925 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
1926 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
1927 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
1928 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
1929 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
1930 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
1931 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
1932 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
1933 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
1934 *
1935 * For ADC trigger 2 and ADC trigger 4:
1936 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
1937 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
1938 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
1939 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
1940 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
1941 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
1942 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
1943 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
1944 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
1945 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
1946 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
1947 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
1948 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
1949 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
1950 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
1951 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
1952 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
1953 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
1954 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
1955 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
1956 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
1957 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
1958 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
1959 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
1960 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
1961 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
1962 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
1963 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
1964 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
1965 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
1966 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
1967 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
1968 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
1969 *
1970 * @retval None
1971 */
1972 __STATIC_INLINE void LL_HRTIM_ConfigADCTrig(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Update, uint32_t Src)
1973 {
1979 }
1981 /**
1982 * @brief Associate the ADCx trigger to a timer triggering the update of the HRTIM_ADCxR register.
1983 * @rmtoll CR1 ADC1USRC LL_HRTIM_SetADCTrigUpdate\n
1984 * CR1 ADC2USRC LL_HRTIM_SetADCTrigUpdate\n
1985 * CR1 ADC3USRC LL_HRTIM_SetADCTrigUpdate\n
1986 * CR1 ADC4USRC LL_HRTIM_SetADCTrigUpdate\n
1987 * @note When the preload is disabled in the source timer, the HRTIM_ADCxR
1988 * registers are not preloaded either: a write access will result in an
1989 * immediate update of the trigger source.
1990 * @param HRTIMx High Resolution Timer instance
1991 * @param ADCTrig This parameter can be one of the following values:
1992 * @arg @ref LL_HRTIM_ADCTRIG_1
1993 * @arg @ref LL_HRTIM_ADCTRIG_2
1994 * @arg @ref LL_HRTIM_ADCTRIG_3
1995 * @arg @ref LL_HRTIM_ADCTRIG_4
1996 * @param Update This parameter can be one of the following values:
1997 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
1998 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
1999 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
2000 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
2001 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
2002 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
2003 * @retval None
2004 */
2005 __STATIC_INLINE void LL_HRTIM_SetADCTrigUpdate(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Update)
2006 {
2009 }
2011 /**
2012 * @brief Get the source timer triggering the update of the HRTIM_ADCxR register.
2013 * @rmtoll CR1 ADC1USRC LL_HRTIM_GetADCTrigUpdate\n
2014 * CR1 ADC2USRC LL_HRTIM_GetADCTrigUpdate\n
2015 * CR1 ADC3USRC LL_HRTIM_GetADCTrigUpdate\n
2016 * CR1 ADC4USRC LL_HRTIM_GetADCTrigUpdate\n
2017 * @param HRTIMx High Resolution Timer instance
2018 * @param ADCTrig This parameter can be one of the following values:
2019 * @arg @ref LL_HRTIM_ADCTRIG_1
2020 * @arg @ref LL_HRTIM_ADCTRIG_2
2021 * @arg @ref LL_HRTIM_ADCTRIG_3
2022 * @arg @ref LL_HRTIM_ADCTRIG_4
2023 * @retval Update Returned value can be one of the following values:
2024 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
2025 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
2026 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
2027 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
2028 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
2029 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
2030 */
2032 {
2035 }
2037 /**
2038 * @brief Specify which events (timer events and/or external events) are used as triggers for ADC conversion.
2039 * @rmtoll ADC1R ADC1MC1 LL_HRTIM_SetADCTrigSrc\n
2040 * ADC1R ADC1MC2 LL_HRTIM_SetADCTrigSrc\n
2041 * ADC1R ADC1MC3 LL_HRTIM_SetADCTrigSrc\n
2042 * ADC1R ADC1MC4 LL_HRTIM_SetADCTrigSrc\n
2043 * ADC1R ADC1MPER LL_HRTIM_SetADCTrigSrc\n
2044 * ADC1R ADC1EEV1 LL_HRTIM_SetADCTrigSrc\n
2045 * ADC1R ADC1EEV2 LL_HRTIM_SetADCTrigSrc\n
2046 * ADC1R ADC1EEV3 LL_HRTIM_SetADCTrigSrc\n
2047 * ADC1R ADC1EEV4 LL_HRTIM_SetADCTrigSrc\n
2048 * ADC1R ADC1EEV5 LL_HRTIM_SetADCTrigSrc\n
2049 * ADC1R ADC1TAC2 LL_HRTIM_SetADCTrigSrc\n
2050 * ADC1R ADC1TAC3 LL_HRTIM_SetADCTrigSrc\n
2051 * ADC1R ADC1TAC4 LL_HRTIM_SetADCTrigSrc\n
2052 * ADC1R ADC1TAPER LL_HRTIM_SetADCTrigSrc\n
2053 * ADC1R ADC1TARST LL_HRTIM_SetADCTrigSrc\n
2054 * ADC1R ADC1TBC2 LL_HRTIM_SetADCTrigSrc\n
2055 * ADC1R ADC1TBC3 LL_HRTIM_SetADCTrigSrc\n
2056 * ADC1R ADC1TBC4 LL_HRTIM_SetADCTrigSrc\n
2057 * ADC1R ADC1TBPER LL_HRTIM_SetADCTrigSrc\n
2058 * ADC1R ADC1TBRST LL_HRTIM_SetADCTrigSrc\n
2059 * ADC1R ADC1TCC2 LL_HRTIM_SetADCTrigSrc\n
2060 * ADC1R ADC1TCC3 LL_HRTIM_SetADCTrigSrc\n
2061 * ADC1R ADC1TCC4 LL_HRTIM_SetADCTrigSrc\n
2062 * ADC1R ADC1TCPER LL_HRTIM_SetADCTrigSrc\n
2063 * ADC1R ADC1TDC2 LL_HRTIM_SetADCTrigSrc\n
2064 * ADC1R ADC1TDC3 LL_HRTIM_SetADCTrigSrc\n
2065 * ADC1R ADC1TDC4 LL_HRTIM_SetADCTrigSrc\n
2066 * ADC1R ADC1TDPER LL_HRTIM_SetADCTrigSrc\n
2067 * ADC1R ADC1TEC2 LL_HRTIM_SetADCTrigSrc\n
2068 * ADC1R ADC1TEC3 LL_HRTIM_SetADCTrigSrc\n
2069 * ADC1R ADC1TEC4 LL_HRTIM_SetADCTrigSrc\n
2070 * ADC1R ADC1TEPER LL_HRTIM_SetADCTrigSrc\n
2071 * ADC2R ADC2MC1 LL_HRTIM_SetADCTrigSrc\n
2072 * ADC2R ADC2MC2 LL_HRTIM_SetADCTrigSrc\n
2073 * ADC2R ADC2MC3 LL_HRTIM_SetADCTrigSrc\n
2074 * ADC2R ADC2MC4 LL_HRTIM_SetADCTrigSrc\n
2075 * ADC2R ADC2MPER LL_HRTIM_SetADCTrigSrc\n
2076 * ADC2R ADC2EEV6 LL_HRTIM_SetADCTrigSrc\n
2077 * ADC2R ADC2EEV7 LL_HRTIM_SetADCTrigSrc\n
2078 * ADC2R ADC2EEV8 LL_HRTIM_SetADCTrigSrc\n
2079 * ADC2R ADC2EEV9 LL_HRTIM_SetADCTrigSrc\n
2080 * ADC2R ADC2EEV10 LL_HRTIM_SetADCTrigSrc\n
2081 * ADC2R ADC2TAC2 LL_HRTIM_SetADCTrigSrc\n
2082 * ADC2R ADC2TAC3 LL_HRTIM_SetADCTrigSrc\n
2083 * ADC2R ADC2TAC4 LL_HRTIM_SetADCTrigSrc\n
2084 * ADC2R ADC2TAPER LL_HRTIM_SetADCTrigSrc\n
2085 * ADC2R ADC2TBC2 LL_HRTIM_SetADCTrigSrc\n
2086 * ADC2R ADC2TBC3 LL_HRTIM_SetADCTrigSrc\n
2087 * ADC2R ADC2TBC4 LL_HRTIM_SetADCTrigSrc\n
2088 * ADC2R ADC2TBPER LL_HRTIM_SetADCTrigSrc\n
2089 * ADC2R ADC2TCC2 LL_HRTIM_SetADCTrigSrc\n
2090 * ADC2R ADC2TCC3 LL_HRTIM_SetADCTrigSrc\n
2091 * ADC2R ADC2TCC4 LL_HRTIM_SetADCTrigSrc\n
2092 * ADC2R ADC2TCPER LL_HRTIM_SetADCTrigSrc\n
2093 * ADC2R ADC2TCRST LL_HRTIM_SetADCTrigSrc\n
2094 * ADC2R ADC2TDC2 LL_HRTIM_SetADCTrigSrc\n
2095 * ADC2R ADC2TDC3 LL_HRTIM_SetADCTrigSrc\n
2096 * ADC2R ADC2TDC4 LL_HRTIM_SetADCTrigSrc\n
2097 * ADC2R ADC2TDPER LL_HRTIM_SetADCTrigSrc\n
2098 * ADC2R ADC2TDRST LL_HRTIM_SetADCTrigSrc\n
2099 * ADC2R ADC2TEC2 LL_HRTIM_SetADCTrigSrc\n
2100 * ADC2R ADC2TEC3 LL_HRTIM_SetADCTrigSrc\n
2101 * ADC2R ADC2TEC4 LL_HRTIM_SetADCTrigSrc\n
2102 * ADC2R ADC2TERST LL_HRTIM_SetADCTrigSrc\n
2103 * ADC3R ADC3MC1 LL_HRTIM_SetADCTrigSrc\n
2104 * ADC3R ADC3MC2 LL_HRTIM_SetADCTrigSrc\n
2105 * ADC3R ADC3MC3 LL_HRTIM_SetADCTrigSrc\n
2106 * ADC3R ADC3MC4 LL_HRTIM_SetADCTrigSrc\n
2107 * ADC3R ADC3MPER LL_HRTIM_SetADCTrigSrc\n
2108 * ADC3R ADC3EEV1 LL_HRTIM_SetADCTrigSrc\n
2109 * ADC3R ADC3EEV2 LL_HRTIM_SetADCTrigSrc\n
2110 * ADC3R ADC3EEV3 LL_HRTIM_SetADCTrigSrc\n
2111 * ADC3R ADC3EEV4 LL_HRTIM_SetADCTrigSrc\n
2112 * ADC3R ADC3EEV5 LL_HRTIM_SetADCTrigSrc\n
2113 * ADC3R ADC3TAC2 LL_HRTIM_SetADCTrigSrc\n
2114 * ADC3R ADC3TAC3 LL_HRTIM_SetADCTrigSrc\n
2115 * ADC3R ADC3TAC4 LL_HRTIM_SetADCTrigSrc\n
2116 * ADC3R ADC3TAPER LL_HRTIM_SetADCTrigSrc\n
2117 * ADC3R ADC3TARST LL_HRTIM_SetADCTrigSrc\n
2118 * ADC3R ADC3TBC2 LL_HRTIM_SetADCTrigSrc\n
2119 * ADC3R ADC3TBC3 LL_HRTIM_SetADCTrigSrc\n
2120 * ADC3R ADC3TBC4 LL_HRTIM_SetADCTrigSrc\n
2121 * ADC3R ADC3TBPER LL_HRTIM_SetADCTrigSrc\n
2122 * ADC3R ADC3TBRST LL_HRTIM_SetADCTrigSrc\n
2123 * ADC3R ADC3TCC2 LL_HRTIM_SetADCTrigSrc\n
2124 * ADC3R ADC3TCC3 LL_HRTIM_SetADCTrigSrc\n
2125 * ADC3R ADC3TCC4 LL_HRTIM_SetADCTrigSrc\n
2126 * ADC3R ADC3TCPER LL_HRTIM_SetADCTrigSrc\n
2127 * ADC3R ADC3TDC2 LL_HRTIM_SetADCTrigSrc\n
2128 * ADC3R ADC3TDC3 LL_HRTIM_SetADCTrigSrc\n
2129 * ADC3R ADC3TDC4 LL_HRTIM_SetADCTrigSrc\n
2130 * ADC3R ADC3TDPER LL_HRTIM_SetADCTrigSrc\n
2131 * ADC3R ADC3TEC2 LL_HRTIM_SetADCTrigSrc\n
2132 * ADC3R ADC3TEC3 LL_HRTIM_SetADCTrigSrc\n
2133 * ADC3R ADC3TEC4 LL_HRTIM_SetADCTrigSrc\n
2134 * ADC3R ADC3TEPER LL_HRTIM_SetADCTrigSrc\n
2135 * ADC4R ADC4MC1 LL_HRTIM_SetADCTrigSrc\n
2136 * ADC4R ADC4MC2 LL_HRTIM_SetADCTrigSrc\n
2137 * ADC4R ADC4MC3 LL_HRTIM_SetADCTrigSrc\n
2138 * ADC4R ADC4MC4 LL_HRTIM_SetADCTrigSrc\n
2139 * ADC4R ADC4MPER LL_HRTIM_SetADCTrigSrc\n
2140 * ADC4R ADC4EEV6 LL_HRTIM_SetADCTrigSrc\n
2141 * ADC4R ADC4EEV7 LL_HRTIM_SetADCTrigSrc\n
2142 * ADC4R ADC4EEV8 LL_HRTIM_SetADCTrigSrc\n
2143 * ADC4R ADC4EEV9 LL_HRTIM_SetADCTrigSrc\n
2144 * ADC4R ADC4EEV10 LL_HRTIM_SetADCTrigSrc\n
2145 * ADC4R ADC4TAC2 LL_HRTIM_SetADCTrigSrc\n
2146 * ADC4R ADC4TAC3 LL_HRTIM_SetADCTrigSrc\n
2147 * ADC4R ADC4TAC4 LL_HRTIM_SetADCTrigSrc\n
2148 * ADC4R ADC4TAPER LL_HRTIM_SetADCTrigSrc\n
2149 * ADC4R ADC4TBC2 LL_HRTIM_SetADCTrigSrc\n
2150 * ADC4R ADC4TBC3 LL_HRTIM_SetADCTrigSrc\n
2151 * ADC4R ADC4TBC4 LL_HRTIM_SetADCTrigSrc\n
2152 * ADC4R ADC4TBPER LL_HRTIM_SetADCTrigSrc\n
2153 * ADC4R ADC4TCC2 LL_HRTIM_SetADCTrigSrc\n
2154 * ADC4R ADC4TCC3 LL_HRTIM_SetADCTrigSrc\n
2155 * ADC4R ADC4TCC4 LL_HRTIM_SetADCTrigSrc\n
2156 * ADC4R ADC4TCPER LL_HRTIM_SetADCTrigSrc\n
2157 * ADC4R ADC4TCRST LL_HRTIM_SetADCTrigSrc\n
2158 * ADC4R ADC4TDC2 LL_HRTIM_SetADCTrigSrc\n
2159 * ADC4R ADC4TDC3 LL_HRTIM_SetADCTrigSrc\n
2160 * ADC4R ADC4TDC4 LL_HRTIM_SetADCTrigSrc\n
2161 * ADC4R ADC4TDPER LL_HRTIM_SetADCTrigSrc\n
2162 * ADC4R ADC4TDRST LL_HRTIM_SetADCTrigSrc\n
2163 * ADC4R ADC4TEC2 LL_HRTIM_SetADCTrigSrc\n
2164 * ADC4R ADC4TEC3 LL_HRTIM_SetADCTrigSrc\n
2165 * ADC4R ADC4TEC4 LL_HRTIM_SetADCTrigSrc\n
2166 * ADC4R ADC4TERST LL_HRTIM_SetADCTrigSrc\n
2167 * @param HRTIMx High Resolution Timer instance
2168 * @param ADCTrig This parameter can be one of the following values:
2169 * @arg @ref LL_HRTIM_ADCTRIG_1
2170 * @arg @ref LL_HRTIM_ADCTRIG_2
2171 * @arg @ref LL_HRTIM_ADCTRIG_3
2172 * @arg @ref LL_HRTIM_ADCTRIG_4
2173 * @param Src
2174 * For ADC trigger 1 and ADC trigger 3 this parameter can be a
2175 * combination of the following values:
2176 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
2177 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
2178 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
2179 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
2180 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
2181 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
2182 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
2183 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
2184 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
2185 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
2186 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
2187 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
2188 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
2189 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
2190 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
2191 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
2192 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
2193 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
2194 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
2195 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
2196 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
2197 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
2198 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
2199 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
2200 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
2201 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
2202 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
2203 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
2204 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
2205 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
2206 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
2207 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
2208 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
2209 *
2210 * For ADC trigger 2 and ADC trigger 4 this parameter can be a
2211 * combination of the following values:
2212 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
2213 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
2214 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
2215 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
2216 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
2217 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
2218 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
2219 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
2220 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
2221 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
2222 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
2223 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
2224 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
2225 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
2226 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
2227 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
2228 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
2229 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
2230 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
2231 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
2232 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
2233 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
2234 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
2235 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
2236 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
2237 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
2238 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
2239 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
2240 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
2241 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
2242 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
2243 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
2244 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
2245 *
2246 * @retval None
2247 */
2248 __STATIC_INLINE void LL_HRTIM_SetADCTrigSrc(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Src)
2249 {
2253 }
2255 /**
2256 * @brief Indicate which events (timer events and/or external events) are currently used as triggers for ADC conversion.
2257 * @rmtoll ADC1R ADC1MC1 LL_HRTIM_GetADCTrigSrc\n
2258 * ADC1R ADC1MC2 LL_HRTIM_GetADCTrigSrc\n
2259 * ADC1R ADC1MC3 LL_HRTIM_GetADCTrigSrc\n
2260 * ADC1R ADC1MC4 LL_HRTIM_GetADCTrigSrc\n
2261 * ADC1R ADC1MPER LL_HRTIM_GetADCTrigSrc\n
2262 * ADC1R ADC1EEV1 LL_HRTIM_GetADCTrigSrc\n
2263 * ADC1R ADC1EEV2 LL_HRTIM_GetADCTrigSrc\n
2264 * ADC1R ADC1EEV3 LL_HRTIM_GetADCTrigSrc\n
2265 * ADC1R ADC1EEV4 LL_HRTIM_GetADCTrigSrc\n
2266 * ADC1R ADC1EEV5 LL_HRTIM_GetADCTrigSrc\n
2267 * ADC1R ADC1TAC2 LL_HRTIM_GetADCTrigSrc\n
2268 * ADC1R ADC1TAC3 LL_HRTIM_GetADCTrigSrc\n
2269 * ADC1R ADC1TAC4 LL_HRTIM_GetADCTrigSrc\n
2270 * ADC1R ADC1TAPER LL_HRTIM_GetADCTrigSrc\n
2271 * ADC1R ADC1TARST LL_HRTIM_GetADCTrigSrc\n
2272 * ADC1R ADC1TBC2 LL_HRTIM_GetADCTrigSrc\n
2273 * ADC1R ADC1TBC3 LL_HRTIM_GetADCTrigSrc\n
2274 * ADC1R ADC1TBC4 LL_HRTIM_GetADCTrigSrc\n
2275 * ADC1R ADC1TBPER LL_HRTIM_GetADCTrigSrc\n
2276 * ADC1R ADC1TBRST LL_HRTIM_GetADCTrigSrc\n
2277 * ADC1R ADC1TCC2 LL_HRTIM_GetADCTrigSrc\n
2278 * ADC1R ADC1TCC3 LL_HRTIM_GetADCTrigSrc\n
2279 * ADC1R ADC1TCC4 LL_HRTIM_GetADCTrigSrc\n
2280 * ADC1R ADC1TCPER LL_HRTIM_GetADCTrigSrc\n
2281 * ADC1R ADC1TDC2 LL_HRTIM_GetADCTrigSrc\n
2282 * ADC1R ADC1TDC3 LL_HRTIM_GetADCTrigSrc\n
2283 * ADC1R ADC1TDC4 LL_HRTIM_GetADCTrigSrc\n
2284 * ADC1R ADC1TDPER LL_HRTIM_GetADCTrigSrc\n
2285 * ADC1R ADC1TEC2 LL_HRTIM_GetADCTrigSrc\n
2286 * ADC1R ADC1TEC3 LL_HRTIM_GetADCTrigSrc\n
2287 * ADC1R ADC1TEC4 LL_HRTIM_GetADCTrigSrc\n
2288 * ADC1R ADC1TEPER LL_HRTIM_GetADCTrigSrc\n
2289 * ADC2R ADC2MC1 LL_HRTIM_GetADCTrigSrc\n
2290 * ADC2R ADC2MC2 LL_HRTIM_GetADCTrigSrc\n
2291 * ADC2R ADC2MC3 LL_HRTIM_GetADCTrigSrc\n
2292 * ADC2R ADC2MC4 LL_HRTIM_GetADCTrigSrc\n
2293 * ADC2R ADC2MPER LL_HRTIM_GetADCTrigSrc\n
2294 * ADC2R ADC2EEV6 LL_HRTIM_GetADCTrigSrc\n
2295 * ADC2R ADC2EEV7 LL_HRTIM_GetADCTrigSrc\n
2296 * ADC2R ADC2EEV8 LL_HRTIM_GetADCTrigSrc\n
2297 * ADC2R ADC2EEV9 LL_HRTIM_GetADCTrigSrc\n
2298 * ADC2R ADC2EEV10 LL_HRTIM_GetADCTrigSrc\n
2299 * ADC2R ADC2TAC2 LL_HRTIM_GetADCTrigSrc\n
2300 * ADC2R ADC2TAC3 LL_HRTIM_GetADCTrigSrc\n
2301 * ADC2R ADC2TAC4 LL_HRTIM_GetADCTrigSrc\n
2302 * ADC2R ADC2TAPER LL_HRTIM_GetADCTrigSrc\n
2303 * ADC2R ADC2TBC2 LL_HRTIM_GetADCTrigSrc\n
2304 * ADC2R ADC2TBC3 LL_HRTIM_GetADCTrigSrc\n
2305 * ADC2R ADC2TBC4 LL_HRTIM_GetADCTrigSrc\n
2306 * ADC2R ADC2TBPER LL_HRTIM_GetADCTrigSrc\n
2307 * ADC2R ADC2TCC2 LL_HRTIM_GetADCTrigSrc\n
2308 * ADC2R ADC2TCC3 LL_HRTIM_GetADCTrigSrc\n
2309 * ADC2R ADC2TCC4 LL_HRTIM_GetADCTrigSrc\n
2310 * ADC2R ADC2TCPER LL_HRTIM_GetADCTrigSrc\n
2311 * ADC2R ADC2TCRST LL_HRTIM_GetADCTrigSrc\n
2312 * ADC2R ADC2TDC2 LL_HRTIM_GetADCTrigSrc\n
2313 * ADC2R ADC2TDC3 LL_HRTIM_GetADCTrigSrc\n
2314 * ADC2R ADC2TDC4 LL_HRTIM_GetADCTrigSrc\n
2315 * ADC2R ADC2TDPER LL_HRTIM_GetADCTrigSrc\n
2316 * ADC2R ADC2TDRST LL_HRTIM_GetADCTrigSrc\n
2317 * ADC2R ADC2TEC2 LL_HRTIM_GetADCTrigSrc\n
2318 * ADC2R ADC2TEC3 LL_HRTIM_GetADCTrigSrc\n
2319 * ADC2R ADC2TEC4 LL_HRTIM_GetADCTrigSrc\n
2320 * ADC2R ADC2TERST LL_HRTIM_GetADCTrigSrc\n
2321 * ADC3R ADC3MC1 LL_HRTIM_GetADCTrigSrc\n
2322 * ADC3R ADC3MC2 LL_HRTIM_GetADCTrigSrc\n
2323 * ADC3R ADC3MC3 LL_HRTIM_GetADCTrigSrc\n
2324 * ADC3R ADC3MC4 LL_HRTIM_GetADCTrigSrc\n
2325 * ADC3R ADC3MPER LL_HRTIM_GetADCTrigSrc\n
2326 * ADC3R ADC3EEV1 LL_HRTIM_GetADCTrigSrc\n
2327 * ADC3R ADC3EEV2 LL_HRTIM_GetADCTrigSrc\n
2328 * ADC3R ADC3EEV3 LL_HRTIM_GetADCTrigSrc\n
2329 * ADC3R ADC3EEV4 LL_HRTIM_GetADCTrigSrc\n
2330 * ADC3R ADC3EEV5 LL_HRTIM_GetADCTrigSrc\n
2331 * ADC3R ADC3TAC2 LL_HRTIM_GetADCTrigSrc\n
2332 * ADC3R ADC3TAC3 LL_HRTIM_GetADCTrigSrc\n
2333 * ADC3R ADC3TAC4 LL_HRTIM_GetADCTrigSrc\n
2334 * ADC3R ADC3TAPER LL_HRTIM_GetADCTrigSrc\n
2335 * ADC3R ADC3TARST LL_HRTIM_GetADCTrigSrc\n
2336 * ADC3R ADC3TBC2 LL_HRTIM_GetADCTrigSrc\n
2337 * ADC3R ADC3TBC3 LL_HRTIM_GetADCTrigSrc\n
2338 * ADC3R ADC3TBC4 LL_HRTIM_GetADCTrigSrc\n
2339 * ADC3R ADC3TBPER LL_HRTIM_GetADCTrigSrc\n
2340 * ADC3R ADC3TBRST LL_HRTIM_GetADCTrigSrc\n
2341 * ADC3R ADC3TCC2 LL_HRTIM_GetADCTrigSrc\n
2342 * ADC3R ADC3TCC3 LL_HRTIM_GetADCTrigSrc\n
2343 * ADC3R ADC3TCC4 LL_HRTIM_GetADCTrigSrc\n
2344 * ADC3R ADC3TCPER LL_HRTIM_GetADCTrigSrc\n
2345 * ADC3R ADC3TDC2 LL_HRTIM_GetADCTrigSrc\n
2346 * ADC3R ADC3TDC3 LL_HRTIM_GetADCTrigSrc\n
2347 * ADC3R ADC3TDC4 LL_HRTIM_GetADCTrigSrc\n
2348 * ADC3R ADC3TDPER LL_HRTIM_GetADCTrigSrc\n
2349 * ADC3R ADC3TEC2 LL_HRTIM_GetADCTrigSrc\n
2350 * ADC3R ADC3TEC3 LL_HRTIM_GetADCTrigSrc\n
2351 * ADC3R ADC3TEC4 LL_HRTIM_GetADCTrigSrc\n
2352 * ADC3R ADC3TEPER LL_HRTIM_GetADCTrigSrc\n
2353 * ADC4R ADC4MC1 LL_HRTIM_GetADCTrigSrc\n
2354 * ADC4R ADC4MC2 LL_HRTIM_GetADCTrigSrc\n
2355 * ADC4R ADC4MC3 LL_HRTIM_GetADCTrigSrc\n
2356 * ADC4R ADC4MC4 LL_HRTIM_GetADCTrigSrc\n
2357 * ADC4R ADC4MPER LL_HRTIM_GetADCTrigSrc\n
2358 * ADC4R ADC4EEV6 LL_HRTIM_GetADCTrigSrc\n
2359 * ADC4R ADC4EEV7 LL_HRTIM_GetADCTrigSrc\n
2360 * ADC4R ADC4EEV8 LL_HRTIM_GetADCTrigSrc\n
2361 * ADC4R ADC4EEV9 LL_HRTIM_GetADCTrigSrc\n
2362 * ADC4R ADC4EEV10 LL_HRTIM_GetADCTrigSrc\n
2363 * ADC4R ADC4TAC2 LL_HRTIM_GetADCTrigSrc\n
2364 * ADC4R ADC4TAC3 LL_HRTIM_GetADCTrigSrc\n
2365 * ADC4R ADC4TAC4 LL_HRTIM_GetADCTrigSrc\n
2366 * ADC4R ADC4TAPER LL_HRTIM_GetADCTrigSrc\n
2367 * ADC4R ADC4TBC2 LL_HRTIM_GetADCTrigSrc\n
2368 * ADC4R ADC4TBC3 LL_HRTIM_GetADCTrigSrc\n
2369 * ADC4R ADC4TBC4 LL_HRTIM_GetADCTrigSrc\n
2370 * ADC4R ADC4TBPER LL_HRTIM_GetADCTrigSrc\n
2371 * ADC4R ADC4TCC2 LL_HRTIM_GetADCTrigSrc\n
2372 * ADC4R ADC4TCC3 LL_HRTIM_GetADCTrigSrc\n
2373 * ADC4R ADC4TCC4 LL_HRTIM_GetADCTrigSrc\n
2374 * ADC4R ADC4TCPER LL_HRTIM_GetADCTrigSrc\n
2375 * ADC4R ADC4TCRST LL_HRTIM_GetADCTrigSrc\n
2376 * ADC4R ADC4TDC2 LL_HRTIM_GetADCTrigSrc\n
2377 * ADC4R ADC4TDC3 LL_HRTIM_GetADCTrigSrc\n
2378 * ADC4R ADC4TDC4 LL_HRTIM_GetADCTrigSrc\n
2379 * ADC4R ADC4TDPER LL_HRTIM_GetADCTrigSrc\n
2380 * ADC4R ADC4TDRST LL_HRTIM_GetADCTrigSrc\n
2381 * ADC4R ADC4TEC2 LL_HRTIM_GetADCTrigSrc\n
2382 * ADC4R ADC4TEC3 LL_HRTIM_GetADCTrigSrc\n
2383 * ADC4R ADC4TEC4 LL_HRTIM_GetADCTrigSrc\n
2384 * ADC4R ADC4TERST LL_HRTIM_GetADCTrigSrc
2385 * @param HRTIMx High Resolution Timer instance
2386 * @param ADCTrig This parameter can be one of the following values:
2387 * @arg @ref LL_HRTIM_ADCTRIG_1
2388 * @arg @ref LL_HRTIM_ADCTRIG_2
2389 * @arg @ref LL_HRTIM_ADCTRIG_3
2390 * @arg @ref LL_HRTIM_ADCTRIG_4
2391 * @retval Src This parameter can be a combination of the following values:
2392 *
2393 * For ADC trigger 1 and ADC trigger 3 this parameter can be a
2394 * combination of the following values:
2395 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
2396 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
2397 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
2398 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
2399 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
2400 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
2401 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
2402 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
2403 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
2404 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
2405 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
2406 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
2407 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
2408 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
2409 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
2410 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
2411 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
2412 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
2413 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
2414 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
2415 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
2416 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
2417 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
2418 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
2419 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
2420 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
2421 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
2422 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
2423 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
2424 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
2425 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
2426 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
2427 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
2428 *
2429 * For ADC trigger 2 and ADC trigger 4 this parameter can be a
2430 * combination of the following values:
2431 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
2432 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
2433 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
2434 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
2435 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
2436 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
2437 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
2438 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
2439 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
2440 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
2441 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
2442 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
2443 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
2444 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
2445 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
2446 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
2447 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
2448 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
2449 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
2450 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
2451 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
2452 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
2453 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
2454 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
2455 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
2456 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
2457 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
2458 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
2459 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
2460 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
2461 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
2462 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
2463 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
2464 */
2466 {
2467 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.ADC1R) +
2471 }
2474 /**
2475 * @}
2476 */
2478 /** @defgroup HRTIM_LL_EF_HRTIM_Timer_Control HRTIM_Timer_Control
2479 * @{
2480 */
2482 /**
2483 * @brief Enable timer(s) counter.
2484 * @rmtoll MDIER TECEN LL_HRTIM_TIM_CounterEnable\n
2485 * MDIER TDCEN LL_HRTIM_TIM_CounterEnable\n
2486 * MDIER TCCEN LL_HRTIM_TIM_CounterEnable\n
2487 * MDIER TBCEN LL_HRTIM_TIM_CounterEnable\n
2488 * MDIER TACEN LL_HRTIM_TIM_CounterEnable\n
2489 * MDIER MCEN LL_HRTIM_TIM_CounterEnable
2490 * @param HRTIMx High Resolution Timer instance
2491 * @param Timers This parameter can be a combination of the following values:
2492 * @arg @ref LL_HRTIM_TIMER_MASTER
2493 * @arg @ref LL_HRTIM_TIMER_A
2494 * @arg @ref LL_HRTIM_TIMER_B
2495 * @arg @ref LL_HRTIM_TIMER_C
2496 * @arg @ref LL_HRTIM_TIMER_D
2497 * @arg @ref LL_HRTIM_TIMER_E
2498 * @retval None
2499 */
2501 {
2503 }
2505 /**
2506 * @brief Disable timer(s) counter.
2507 * @rmtoll MDIER TECEN LL_HRTIM_TIM_CounterDisable\n
2508 * MDIER TDCEN LL_HRTIM_TIM_CounterDisable\n
2509 * MDIER TCCEN LL_HRTIM_TIM_CounterDisable\n
2510 * MDIER TBCEN LL_HRTIM_TIM_CounterDisable\n
2511 * MDIER TACEN LL_HRTIM_TIM_CounterDisable\n
2512 * MDIER MCEN LL_HRTIM_TIM_CounterDisable
2513 * @param HRTIMx High Resolution Timer instance
2514 * @param Timers This parameter can be a combination of the following values:
2515 * @arg @ref LL_HRTIM_TIMER_MASTER
2516 * @arg @ref LL_HRTIM_TIMER_A
2517 * @arg @ref LL_HRTIM_TIMER_B
2518 * @arg @ref LL_HRTIM_TIMER_C
2519 * @arg @ref LL_HRTIM_TIMER_D
2520 * @arg @ref LL_HRTIM_TIMER_E
2521 * @retval None
2522 */
2524 {
2526 }
2528 /**
2529 * @brief Indicate whether the timer counter is enabled.
2530 * @rmtoll MDIER TECEN LL_HRTIM_TIM_IsCounterEnabled\n
2531 * MDIER TDCEN LL_HRTIM_TIM_IsCounterEnabled\n
2532 * MDIER TCCEN LL_HRTIM_TIM_IsCounterEnabled\n
2533 * MDIER TBCEN LL_HRTIM_TIM_IsCounterEnabled\n
2534 * MDIER TACEN LL_HRTIM_TIM_IsCounterEnabled\n
2535 * MDIER MCEN LL_HRTIM_TIM_IsCounterEnabled
2536 * @param HRTIMx High Resolution Timer instance
2537 * @param Timer This parameter can be one of the following values:
2538 * @arg @ref LL_HRTIM_TIMER_MASTER
2539 * @arg @ref LL_HRTIM_TIMER_A
2540 * @arg @ref LL_HRTIM_TIMER_B
2541 * @arg @ref LL_HRTIM_TIMER_C
2542 * @arg @ref LL_HRTIM_TIMER_D
2543 * @arg @ref LL_HRTIM_TIMER_E
2544 * @retval State of MCEN or TxCEN bit HRTIM_MCR register (1 or 0).
2545 */
2547 {
2549 }
2551 /**
2552 * @brief Set the timer clock prescaler ratio.
2553 * @rmtoll MCR CKPSC LL_HRTIM_TIM_SetPrescaler\n
2554 * TIMxCR CKPSC LL_HRTIM_TIM_SetPrescaler
2555 * @note The counter clock equivalent frequency (CK_CNT) is equal to fHRCK / 2^CKPSC[2:0].
2556 * @note The prescaling ratio cannot be modified once the timer counter is enabled.
2557 * @param HRTIMx High Resolution Timer instance
2558 * @param Timer This parameter can be one of the following values:
2559 * @arg @ref LL_HRTIM_TIMER_MASTER
2560 * @arg @ref LL_HRTIM_TIMER_A
2561 * @arg @ref LL_HRTIM_TIMER_B
2562 * @arg @ref LL_HRTIM_TIMER_C
2563 * @arg @ref LL_HRTIM_TIMER_D
2564 * @arg @ref LL_HRTIM_TIMER_E
2565 * @param Prescaler This parameter can be one of the following values:
2566 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV1
2567 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV2
2568 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV4
2569 * @retval None
2570 */
2571 __STATIC_INLINE void LL_HRTIM_TIM_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
2572 {
2574 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2576 }
2578 /**
2579 * @brief Get the timer clock prescaler ratio
2580 * @rmtoll MCR CKPSC LL_HRTIM_TIM_GetPrescaler\n
2581 * TIMxCR CKPSC LL_HRTIM_TIM_GetPrescaler
2582 * @param HRTIMx High Resolution Timer instance
2583 * @param Timer This parameter can be one of the following values:
2584 * @arg @ref LL_HRTIM_TIMER_MASTER
2585 * @arg @ref LL_HRTIM_TIMER_A
2586 * @arg @ref LL_HRTIM_TIMER_B
2587 * @arg @ref LL_HRTIM_TIMER_C
2588 * @arg @ref LL_HRTIM_TIMER_D
2589 * @arg @ref LL_HRTIM_TIMER_E
2590 * @retval Prescaler Returned value can be one of the following values:
2591 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV1
2592 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV2
2593 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV4
2594 */
2596 {
2598 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2600 }
2602 /**
2603 * @brief Set the counter operating mode mode (single-shot, continuous or re-triggerable).
2604 * @rmtoll MCR CONT LL_HRTIM_TIM_SetCounterMode\n
2605 * MCR RETRIG LL_HRTIM_TIM_SetCounterMode\n
2606 * TIMxCR CONT LL_HRTIM_TIM_SetCounterMode\n
2607 * TIMxCR RETRIG LL_HRTIM_TIM_SetCounterMode
2608 * @param HRTIMx High Resolution Timer instance
2609 * @param Timer This parameter can be one of the following values:
2610 * @arg @ref LL_HRTIM_TIMER_MASTER
2611 * @arg @ref LL_HRTIM_TIMER_A
2612 * @arg @ref LL_HRTIM_TIMER_B
2613 * @arg @ref LL_HRTIM_TIMER_C
2614 * @arg @ref LL_HRTIM_TIMER_D
2615 * @arg @ref LL_HRTIM_TIMER_E
2616 * @param Mode This parameter can be one of the following values:
2617 * @arg @ref LL_HRTIM_MODE_CONTINUOUS
2618 * @arg @ref LL_HRTIM_MODE_SINGLESHOT
2619 * @arg @ref LL_HRTIM_MODE_RETRIGGERABLE
2620 * @retval None
2621 */
2622 __STATIC_INLINE void LL_HRTIM_TIM_SetCounterMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Mode)
2623 {
2625 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2627 }
2629 /**
2630 * @brief Get the counter operating mode mode
2631 * @rmtoll MCR CONT LL_HRTIM_TIM_GetCounterMode\n
2632 * MCR RETRIG LL_HRTIM_TIM_GetCounterMode\n
2633 * TIMxCR CONT LL_HRTIM_TIM_GetCounterMode\n
2634 * TIMxCR RETRIG LL_HRTIM_TIM_GetCounterMode
2635 * @param HRTIMx High Resolution Timer instance
2636 * @param Timer This parameter can be one of the following values:
2637 * @arg @ref LL_HRTIM_TIMER_MASTER
2638 * @arg @ref LL_HRTIM_TIMER_A
2639 * @arg @ref LL_HRTIM_TIMER_B
2640 * @arg @ref LL_HRTIM_TIMER_C
2641 * @arg @ref LL_HRTIM_TIMER_D
2642 * @arg @ref LL_HRTIM_TIMER_E
2643 * @retval Mode Returned value can be one of the following values:
2644 * @arg @ref LL_HRTIM_MODE_CONTINUOUS
2645 * @arg @ref LL_HRTIM_MODE_SINGLESHOT
2646 * @arg @ref LL_HRTIM_MODE_RETRIGGERABLE
2647 */
2649 {
2651 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2653 }
2655 /**
2656 * @brief Enable the half duty-cycle mode.
2657 * @rmtoll MCR HALF LL_HRTIM_TIM_EnableHalfMode\n
2658 * TIMxCR HALF LL_HRTIM_TIM_EnableHalfMode
2659 * @note When the half mode is enabled, HRTIM_MCMP1R (or HRTIM_CMP1xR)
2660 * active register is automatically updated with HRTIM_MPER/2
2661 * (or HRTIM_PERxR/2) value when HRTIM_MPER (or HRTIM_PERxR) register is written.
2662 * @param HRTIMx High Resolution Timer instance
2663 * @param Timer This parameter can be one of the following values:
2664 * @arg @ref LL_HRTIM_TIMER_MASTER
2665 * @arg @ref LL_HRTIM_TIMER_A
2666 * @arg @ref LL_HRTIM_TIMER_B
2667 * @arg @ref LL_HRTIM_TIMER_C
2668 * @arg @ref LL_HRTIM_TIMER_D
2669 * @arg @ref LL_HRTIM_TIMER_E
2670 * @retval None
2671 */
2673 {
2675 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2677 }
2679 /**
2680 * @brief Disable the half duty-cycle mode.
2681 * @rmtoll MCR HALF LL_HRTIM_TIM_DisableHalfMode\n
2682 * TIMxCR HALF LL_HRTIM_TIM_DisableHalfMode
2683 * @param HRTIMx High Resolution Timer instance
2684 * @param Timer This parameter can be one of the following values:
2685 * @arg @ref LL_HRTIM_TIMER_MASTER
2686 * @arg @ref LL_HRTIM_TIMER_A
2687 * @arg @ref LL_HRTIM_TIMER_B
2688 * @arg @ref LL_HRTIM_TIMER_C
2689 * @arg @ref LL_HRTIM_TIMER_D
2690 * @arg @ref LL_HRTIM_TIMER_E
2691 * @retval None
2692 */
2694 {
2696 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2698 }
2700 /**
2701 * @brief Indicate whether half duty-cycle mode is enabled for a given timer.
2702 * @rmtoll MCR HALF LL_HRTIM_TIM_IsEnabledHalfMode\n
2703 * TIMxCR HALF LL_HRTIM_TIM_IsEnabledHalfMode
2704 * @param HRTIMx High Resolution Timer instance
2705 * @param Timer This parameter can be one of the following values:
2706 * @arg @ref LL_HRTIM_TIMER_MASTER
2707 * @arg @ref LL_HRTIM_TIMER_A
2708 * @arg @ref LL_HRTIM_TIMER_B
2709 * @arg @ref LL_HRTIM_TIMER_C
2710 * @arg @ref LL_HRTIM_TIMER_D
2711 * @arg @ref LL_HRTIM_TIMER_E
2712 * @retval State of HALF bit to 1 in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
2713 */
2715 {
2717 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2720 }
2721 /**
2722 * @brief Enable the timer start when receiving a synchronization input event.
2723 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_EnableStartOnSync\n
2724 * TIMxCR SYNSTRTA LL_HRTIM_TIM_EnableStartOnSync
2725 * @param HRTIMx High Resolution Timer instance
2726 * @param Timer This parameter can be one of the following values:
2727 * @arg @ref LL_HRTIM_TIMER_MASTER
2728 * @arg @ref LL_HRTIM_TIMER_A
2729 * @arg @ref LL_HRTIM_TIMER_B
2730 * @arg @ref LL_HRTIM_TIMER_C
2731 * @arg @ref LL_HRTIM_TIMER_D
2732 * @arg @ref LL_HRTIM_TIMER_E
2733 * @retval None
2734 */
2736 {
2738 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2740 }
2742 /**
2743 * @brief Disable the timer start when receiving a synchronization input event.
2744 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_DisableStartOnSync\n
2745 * TIMxCR SYNSTRTA LL_HRTIM_TIM_DisableStartOnSync
2746 * @param HRTIMx High Resolution Timer instance
2747 * @param Timer This parameter can be one of the following values:
2748 * @arg @ref LL_HRTIM_TIMER_MASTER
2749 * @arg @ref LL_HRTIM_TIMER_A
2750 * @arg @ref LL_HRTIM_TIMER_B
2751 * @arg @ref LL_HRTIM_TIMER_C
2752 * @arg @ref LL_HRTIM_TIMER_D
2753 * @arg @ref LL_HRTIM_TIMER_E
2754 * @retval None
2755 */
2757 {
2759 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2761 }
2763 /**
2764 * @brief Indicate whether the timer start when receiving a synchronization input event.
2765 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_IsEnabledStartOnSync\n
2766 * TIMxCR SYNSTRTA LL_HRTIM_TIM_IsEnabledStartOnSync
2767 * @param HRTIMx High Resolution Timer instance
2768 * @param Timer This parameter can be one of the following values:
2769 * @arg @ref LL_HRTIM_TIMER_MASTER
2770 * @arg @ref LL_HRTIM_TIMER_A
2771 * @arg @ref LL_HRTIM_TIMER_B
2772 * @arg @ref LL_HRTIM_TIMER_C
2773 * @arg @ref LL_HRTIM_TIMER_D
2774 * @arg @ref LL_HRTIM_TIMER_E
2775 * @retval State of SYNCSTRTx bit in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
2776 */
2777 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledStartOnSync(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
2778 {
2780 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2783 }
2785 /**
2786 * @brief Enable the timer reset when receiving a synchronization input event.
2787 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_EnableResetOnSync\n
2788 * TIMxCR SYNCRSTA LL_HRTIM_TIM_EnableResetOnSync
2789 * @param HRTIMx High Resolution Timer instance
2790 * @param Timer This parameter can be one of the following values:
2791 * @arg @ref LL_HRTIM_TIMER_MASTER
2792 * @arg @ref LL_HRTIM_TIMER_A
2793 * @arg @ref LL_HRTIM_TIMER_B
2794 * @arg @ref LL_HRTIM_TIMER_C
2795 * @arg @ref LL_HRTIM_TIMER_D
2796 * @arg @ref LL_HRTIM_TIMER_E
2797 * @retval None
2798 */
2800 {
2802 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2804 }
2806 /**
2807 * @brief Disable the timer reset when receiving a synchronization input event.
2808 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_DisableResetOnSync\n
2809 * TIMxCR SYNCRSTA LL_HRTIM_TIM_DisableResetOnSync
2810 * @param HRTIMx High Resolution Timer instance
2811 * @param Timer This parameter can be one of the following values:
2812 * @arg @ref LL_HRTIM_TIMER_MASTER
2813 * @arg @ref LL_HRTIM_TIMER_A
2814 * @arg @ref LL_HRTIM_TIMER_B
2815 * @arg @ref LL_HRTIM_TIMER_C
2816 * @arg @ref LL_HRTIM_TIMER_D
2817 * @arg @ref LL_HRTIM_TIMER_E
2818 * @retval None
2819 */
2821 {
2823 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2825 }
2827 /**
2828 * @brief Indicate whether the timer reset when receiving a synchronization input event.
2829 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_IsEnabledResetOnSync\n
2830 * TIMxCR SYNCRSTA LL_HRTIM_TIM_IsEnabledResetOnSync
2831 * @param HRTIMx High Resolution Timer instance
2832 * @param Timer This parameter can be one of the following values:
2833 * @arg @ref LL_HRTIM_TIMER_MASTER
2834 * @arg @ref LL_HRTIM_TIMER_A
2835 * @arg @ref LL_HRTIM_TIMER_B
2836 * @arg @ref LL_HRTIM_TIMER_C
2837 * @arg @ref LL_HRTIM_TIMER_D
2838 * @arg @ref LL_HRTIM_TIMER_E
2839 * @retval None
2840 */
2841 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledResetOnSync(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
2842 {
2844 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2847 }
2849 /**
2850 * @brief Set the HRTIM output the DAC synchronization event is generated on (DACtrigOutx).
2851 * @rmtoll MCR DACSYNC LL_HRTIM_TIM_SetDACTrig\n
2852 * TIMxCR DACSYNC LL_HRTIM_TIM_SetDACTrig
2853 * @param HRTIMx High Resolution Timer instance
2854 * @param Timer This parameter can be one of the following values:
2855 * @arg @ref LL_HRTIM_TIMER_MASTER
2856 * @arg @ref LL_HRTIM_TIMER_A
2857 * @arg @ref LL_HRTIM_TIMER_B
2858 * @arg @ref LL_HRTIM_TIMER_C
2859 * @arg @ref LL_HRTIM_TIMER_D
2860 * @arg @ref LL_HRTIM_TIMER_E
2861 * @param DACTrig This parameter can be one of the following values:
2862 * @arg @ref LL_HRTIM_DACTRIG_NONE
2863 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_1
2864 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_2
2865 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_3
2866 * @retval None
2867 */
2868 __STATIC_INLINE void LL_HRTIM_TIM_SetDACTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DACTrig)
2869 {
2871 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2873 }
2875 /**
2876 * @brief Get the HRTIM output the DAC synchronization event is generated on (DACtrigOutx).
2877 * @rmtoll MCR DACSYNC LL_HRTIM_TIM_GetDACTrig\n
2878 * TIMxCR DACSYNC LL_HRTIM_TIM_GetDACTrig
2879 * @param HRTIMx High Resolution Timer instance
2880 * @param Timer This parameter can be one of the following values:
2881 * @arg @ref LL_HRTIM_TIMER_MASTER
2882 * @arg @ref LL_HRTIM_TIMER_A
2883 * @arg @ref LL_HRTIM_TIMER_B
2884 * @arg @ref LL_HRTIM_TIMER_C
2885 * @arg @ref LL_HRTIM_TIMER_D
2886 * @arg @ref LL_HRTIM_TIMER_E
2887 * @retval DACTrig Returned value can be one of the following values:
2888 * @arg @ref LL_HRTIM_DACTRIG_NONE
2889 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_1
2890 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_2
2891 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_3
2892 */
2894 {
2896 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2898 }
2900 /**
2901 * @brief Enable the timer registers preload mechanism.
2902 * @rmtoll MCR PREEN LL_HRTIM_TIM_EnablePreload\n
2903 * TIMxCR PREEN LL_HRTIM_TIM_EnablePreload
2904 * @note When the preload mode is enabled, accessed registers are shadow registers.
2905 * Their content is transferred into the active register after an update request,
2906 * either software or synchronized with an event.
2907 * @param HRTIMx High Resolution Timer instance
2908 * @param Timer This parameter can be one of the following values:
2909 * @arg @ref LL_HRTIM_TIMER_MASTER
2910 * @arg @ref LL_HRTIM_TIMER_A
2911 * @arg @ref LL_HRTIM_TIMER_B
2912 * @arg @ref LL_HRTIM_TIMER_C
2913 * @arg @ref LL_HRTIM_TIMER_D
2914 * @arg @ref LL_HRTIM_TIMER_E
2915 * @retval None
2916 */
2918 {
2920 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2922 }
2924 /**
2925 * @brief Disable the timer registers preload mechanism.
2926 * @rmtoll MCR PREEN LL_HRTIM_TIM_DisablePreload\n
2927 * TIMxCR PREEN LL_HRTIM_TIM_DisablePreload
2928 * @param HRTIMx High Resolution Timer instance
2929 * @param Timer This parameter can be one of the following values:
2930 * @arg @ref LL_HRTIM_TIMER_MASTER
2931 * @arg @ref LL_HRTIM_TIMER_A
2932 * @arg @ref LL_HRTIM_TIMER_B
2933 * @arg @ref LL_HRTIM_TIMER_C
2934 * @arg @ref LL_HRTIM_TIMER_D
2935 * @arg @ref LL_HRTIM_TIMER_E
2936 * @retval None
2937 */
2939 {
2941 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2943 }
2945 /**
2946 * @brief Indicate whether the timer registers preload mechanism is enabled.
2947 * @rmtoll MCR PREEN LL_HRTIM_TIM_IsEnabledPreload\n
2948 * TIMxCR PREEN LL_HRTIM_TIM_IsEnabledPreload
2949 * @param HRTIMx High Resolution Timer instance
2950 * @param Timer This parameter can be one of the following values:
2951 * @arg @ref LL_HRTIM_TIMER_MASTER
2952 * @arg @ref LL_HRTIM_TIMER_A
2953 * @arg @ref LL_HRTIM_TIMER_B
2954 * @arg @ref LL_HRTIM_TIMER_C
2955 * @arg @ref LL_HRTIM_TIMER_D
2956 * @arg @ref LL_HRTIM_TIMER_E
2957 * @retval State of PREEN bit in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
2958 */
2960 {
2962 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2965 }
2967 /**
2968 * @brief Set the timer register update trigger.
2969 * @rmtoll MCR MREPU LL_HRTIM_TIM_SetUpdateTrig\n
2970 * TIMxCR TAU LL_HRTIM_TIM_SetUpdateTrig\n
2971 * TIMxCR TBU LL_HRTIM_TIM_SetUpdateTrig\n
2972 * TIMxCR TCU LL_HRTIM_TIM_SetUpdateTrig\n
2973 * TIMxCR TDU LL_HRTIM_TIM_SetUpdateTrig\n
2974 * TIMxCR TEU LL_HRTIM_TIM_SetUpdateTrig\n
2975 * TIMxCR MSTU LL_HRTIM_TIM_SetUpdateTrig
2976 * @param HRTIMx High Resolution Timer instance
2977 * @param Timer This parameter can be one of the following values:
2978 * @arg @ref LL_HRTIM_TIMER_MASTER
2979 * @arg @ref LL_HRTIM_TIMER_A
2980 * @arg @ref LL_HRTIM_TIMER_B
2981 * @arg @ref LL_HRTIM_TIMER_C
2982 * @arg @ref LL_HRTIM_TIMER_D
2983 * @arg @ref LL_HRTIM_TIMER_E
2984 * @param UpdateTrig This parameter can be one of the following values:
2985 *
2986 * For the master timer this parameter can be one of the following values:
2987 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
2988 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
2989 *
2990 * For timer A..E this parameter can be:
2991 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
2992 * or a combination of the following values:
2993 * @arg @ref LL_HRTIM_UPDATETRIG_MASTER
2994 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_A
2995 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_B
2996 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_C
2997 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_D
2998 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_E
2999 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3000 * @arg @ref LL_HRTIM_UPDATETRIG_RESET
3001 * @retval None
3002 */
3003 __STATIC_INLINE void LL_HRTIM_TIM_SetUpdateTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t UpdateTrig)
3004 {
3006 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3007 MODIFY_REG(*pReg, REG_MASK_TAB_UPDATETRIG[iTimer], UpdateTrig << REG_SHIFT_TAB_UPDATETRIG[iTimer]);
3008 }
3010 /**
3011 * @brief Get the timer register update trigger.
3012 * @rmtoll MCR MREPU LL_HRTIM_TIM_GetUpdateTrig\n
3013 * TIMxCR TBU LL_HRTIM_TIM_GetUpdateTrig\n
3014 * TIMxCR TCU LL_HRTIM_TIM_GetUpdateTrig\n
3015 * TIMxCR TDU LL_HRTIM_TIM_GetUpdateTrig\n
3016 * TIMxCR TEU LL_HRTIM_TIM_GetUpdateTrig\n
3017 * TIMxCR MSTU LL_HRTIM_TIM_GetUpdateTrig
3018 * @param HRTIMx High Resolution Timer instance
3019 * @param Timer This parameter can be one of the following values:
3020 * @arg @ref LL_HRTIM_TIMER_MASTER
3021 * @arg @ref LL_HRTIM_TIMER_A
3022 * @arg @ref LL_HRTIM_TIMER_B
3023 * @arg @ref LL_HRTIM_TIMER_C
3024 * @arg @ref LL_HRTIM_TIMER_D
3025 * @arg @ref LL_HRTIM_TIMER_E
3026 * @retval UpdateTrig Returned value can be one of the following values:
3027 *
3028 * For the master timer this parameter can be one of the following values:
3029 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3030 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3031 *
3032 * For timer A..E this parameter can be:
3033 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3034 * or a combination of the following values:
3035 * @arg @ref LL_HRTIM_UPDATETRIG_MASTER
3036 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_A
3037 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_B
3038 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_C
3039 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_D
3040 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_E
3041 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3042 * @arg @ref LL_HRTIM_UPDATETRIG_RESET
3043 */
3045 {
3047 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3049 }
3051 /**
3052 * @brief Set the timer registers update condition (how the registers update occurs relatively to the burst DMA transaction or an external update request received on one of the update enable inputs (UPD_EN[3:1])).
3053 * @rmtoll MCR BRSTDMA LL_HRTIM_TIM_SetUpdateGating\n
3054 * TIMxCR UPDGAT LL_HRTIM_TIM_SetUpdateGating
3055 * @param HRTIMx High Resolution Timer instance
3056 * @param Timer This parameter can be one of the following values:
3057 * @arg @ref LL_HRTIM_TIMER_MASTER
3058 * @arg @ref LL_HRTIM_TIMER_A
3059 * @arg @ref LL_HRTIM_TIMER_B
3060 * @arg @ref LL_HRTIM_TIMER_C
3061 * @arg @ref LL_HRTIM_TIMER_D
3062 * @arg @ref LL_HRTIM_TIMER_E
3063 * @param UpdateGating This parameter can be one of the following values:
3064 *
3065 * For the master timer this parameter can be one of the following values:
3066 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3067 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3068 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3069 *
3070 * For the timer A..E this parameter can be one of the following values:
3071 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3072 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3073 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3074 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1
3075 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2
3076 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3
3077 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE
3078 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE
3079 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE
3080 * @retval None
3081 */
3082 __STATIC_INLINE void LL_HRTIM_TIM_SetUpdateGating(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t UpdateGating)
3083 {
3085 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3086 MODIFY_REG(*pReg, REG_MASK_TAB_UPDATEGATING[iTimer], (UpdateGating << REG_SHIFT_TAB_UPDATEGATING[iTimer]));
3087 }
3089 /**
3090 * @brief Get the timer registers update condition.
3091 * @rmtoll MCR BRSTDMA LL_HRTIM_TIM_GetUpdateGating\n
3092 * TIMxCR UPDGAT LL_HRTIM_TIM_GetUpdateGating
3093 * @param HRTIMx High Resolution Timer instance
3094 * @param Timer This parameter can be one of the following values:
3095 * @arg @ref LL_HRTIM_TIMER_MASTER
3096 * @arg @ref LL_HRTIM_TIMER_A
3097 * @arg @ref LL_HRTIM_TIMER_B
3098 * @arg @ref LL_HRTIM_TIMER_C
3099 * @arg @ref LL_HRTIM_TIMER_D
3100 * @arg @ref LL_HRTIM_TIMER_E
3101 * @retval UpdateGating Returned value can be one of the following values:
3102 *
3103 * For the master timer this parameter can be one of the following values:
3104 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3105 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3106 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3107 *
3108 * For the timer A..E this parameter can be one of the following values:
3109 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3110 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3111 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3112 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1
3113 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2
3114 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3
3115 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE
3116 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE
3117 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE
3118 */
3120 {
3122 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3123 return (READ_BIT(*pReg, REG_MASK_TAB_UPDATEGATING[iTimer]) >> REG_SHIFT_TAB_UPDATEGATING[iTimer]);
3124 }
3126 /**
3127 * @brief Enable the push-pull mode.
3128 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_EnablePushPullMode
3129 * @param HRTIMx High Resolution Timer instance
3130 * @param Timer This parameter can be one of the following values:
3131 * @arg @ref LL_HRTIM_TIMER_A
3132 * @arg @ref LL_HRTIM_TIMER_B
3133 * @arg @ref LL_HRTIM_TIMER_C
3134 * @arg @ref LL_HRTIM_TIMER_D
3135 * @arg @ref LL_HRTIM_TIMER_E
3136 * @retval None
3137 */
3139 {
3141 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxCR) +
3144 }
3146 /**
3147 * @brief Disable the push-pull mode.
3148 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_DisablePushPullMode
3149 * @param HRTIMx High Resolution Timer instance
3150 * @param Timer This parameter can be one of the following values:
3151 * @arg @ref LL_HRTIM_TIMER_A
3152 * @arg @ref LL_HRTIM_TIMER_B
3153 * @arg @ref LL_HRTIM_TIMER_C
3154 * @arg @ref LL_HRTIM_TIMER_D
3155 * @arg @ref LL_HRTIM_TIMER_E
3156 * @retval None
3157 */
3159 {
3161 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxCR) +
3164 }
3166 /**
3167 * @brief Indicate whether the push-pull mode is enabled.
3168 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_IsEnabledPushPullMode\n
3169 * @param HRTIMx High Resolution Timer instance
3170 * @param Timer This parameter can be one of the following values:
3171 * @arg @ref LL_HRTIM_TIMER_A
3172 * @arg @ref LL_HRTIM_TIMER_B
3173 * @arg @ref LL_HRTIM_TIMER_C
3174 * @arg @ref LL_HRTIM_TIMER_D
3175 * @arg @ref LL_HRTIM_TIMER_E
3176 * @retval State of PSHPLL bit in HRTIM_TIMxCR register (1 or 0).
3177 */
3178 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledPushPullMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
3179 {
3181 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxCR) +
3184 }
3186 /**
3187 * @brief Set the functioning mode of the compare unit (CMP2 or CMP4 can operate in standard mode or in auto delayed mode).
3188 * @rmtoll TIMxCR DELCMP2 LL_HRTIM_TIM_SetCompareMode\n
3189 * TIMxCR DELCMP4 LL_HRTIM_TIM_SetCompareMode
3190 * @note In auto-delayed mode the compare match occurs independently from the timer counter value.
3191 * @param HRTIMx High Resolution Timer instance
3192 * @param Timer This parameter can be one of the following values:
3193 * @arg @ref LL_HRTIM_TIMER_A
3194 * @arg @ref LL_HRTIM_TIMER_B
3195 * @arg @ref LL_HRTIM_TIMER_C
3196 * @arg @ref LL_HRTIM_TIMER_D
3197 * @arg @ref LL_HRTIM_TIMER_E
3198 * @param CompareUnit This parameter can be one of the following values:
3199 * @arg @ref LL_HRTIM_COMPAREUNIT_2
3200 * @arg @ref LL_HRTIM_COMPAREUNIT_4
3201 * @param Mode This parameter can be one of the following values:
3202 * @arg @ref LL_HRTIM_COMPAREMODE_REGULAR
3203 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT
3204 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP1
3205 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP3
3206 * @retval None
3207 */
3208 __STATIC_INLINE void LL_HRTIM_TIM_SetCompareMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareUnit,
3210 {
3212 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxCR) +
3214 uint32_t shift = (((uint32_t)POSITION_VAL(CompareUnit) - (uint32_t)POSITION_VAL(LL_HRTIM_COMPAREUNIT_2)) & 0x1FU);
3216 }
3218 /**
3219 * @brief Get the functioning mode of the compare unit.
3220 * @rmtoll TIMxCR DELCMP2 LL_HRTIM_TIM_GetCompareMode\n
3221 * TIMxCR DELCMP4 LL_HRTIM_TIM_GetCompareMode
3222 * @param HRTIMx High Resolution Timer instance
3223 * @param Timer This parameter can be one of the following values:
3224 * @arg @ref LL_HRTIM_TIMER_A
3225 * @arg @ref LL_HRTIM_TIMER_B
3226 * @arg @ref LL_HRTIM_TIMER_C
3227 * @arg @ref LL_HRTIM_TIMER_D
3228 * @arg @ref LL_HRTIM_TIMER_E
3229 * @param CompareUnit This parameter can be one of the following values:
3230 * @arg @ref LL_HRTIM_COMPAREUNIT_2
3231 * @arg @ref LL_HRTIM_COMPAREUNIT_4
3232 * @retval Mode Returned value can be one of the following values:
3233 * @arg @ref LL_HRTIM_COMPAREMODE_REGULAR
3234 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT
3235 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP1
3236 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP3
3237 */
3238 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCompareMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareUnit)
3239 {
3241 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxCR) +
3243 uint32_t shift = (((uint32_t)POSITION_VAL(CompareUnit) - (uint32_t)POSITION_VAL(LL_HRTIM_COMPAREUNIT_2)) & 0x1FU);
3245 }
3247 /**
3248 * @brief Set the timer counter value.
3249 * @rmtoll MCNTR MCNT LL_HRTIM_TIM_SetCounter\n
3250 * CNTxR CNTx LL_HRTIM_TIM_SetCounter
3251 * @note This function can only be called when the timer is stopped.
3252 * @note For HR clock prescaling ratio below 32 (CKPSC[2:0] < 5), the least
3253 * significant bits of the counter are not significant. They cannot be
3254 * written and return 0 when read.
3255 * @note The timer behavior is not guaranteed if the counter value is set above
3256 * the period.
3257 * @param HRTIMx High Resolution Timer instance
3258 * @param Timer This parameter can be one of the following values:
3259 * @arg @ref LL_HRTIM_TIMER_MASTER
3260 * @arg @ref LL_HRTIM_TIMER_A
3261 * @arg @ref LL_HRTIM_TIMER_B
3262 * @arg @ref LL_HRTIM_TIMER_C
3263 * @arg @ref LL_HRTIM_TIMER_D
3264 * @arg @ref LL_HRTIM_TIMER_E
3265 * @param Counter Value between 0 and 0xFFFF
3266 * @retval None
3267 */
3268 __STATIC_INLINE void LL_HRTIM_TIM_SetCounter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Counter)
3269 {
3274 }
3276 /**
3277 * @brief Get actual timer counter value.
3278 * @rmtoll MCNTR MCNT LL_HRTIM_TIM_GetCounter\n
3279 * CNTxR CNTx LL_HRTIM_TIM_GetCounter
3280 * @param HRTIMx High Resolution Timer instance
3281 * @param Timer This parameter can be one of the following values:
3282 * @arg @ref LL_HRTIM_TIMER_MASTER
3283 * @arg @ref LL_HRTIM_TIMER_A
3284 * @arg @ref LL_HRTIM_TIMER_B
3285 * @arg @ref LL_HRTIM_TIMER_C
3286 * @arg @ref LL_HRTIM_TIMER_D
3287 * @arg @ref LL_HRTIM_TIMER_E
3288 * @retval Counter Value between 0 and 0xFFFF
3289 */
3291 {
3293 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCNTR) +
3296 }
3298 /**
3299 * @brief Set the timer period value.
3300 * @rmtoll MPER MPER LL_HRTIM_TIM_SetPeriod\n
3301 * PERxR PERx LL_HRTIM_TIM_SetPeriod
3302 * @param HRTIMx High Resolution Timer instance
3303 * @param Timer This parameter can be one of the following values:
3304 * @arg @ref LL_HRTIM_TIMER_MASTER
3305 * @arg @ref LL_HRTIM_TIMER_A
3306 * @arg @ref LL_HRTIM_TIMER_B
3307 * @arg @ref LL_HRTIM_TIMER_C
3308 * @arg @ref LL_HRTIM_TIMER_D
3309 * @arg @ref LL_HRTIM_TIMER_E
3310 * @param Period Value between 0 and 0xFFFF
3311 * @retval None
3312 */
3313 __STATIC_INLINE void LL_HRTIM_TIM_SetPeriod(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Period)
3314 {
3319 }
3321 /**
3322 * @brief Get actual timer period value.
3323 * @rmtoll MPER MPER LL_HRTIM_TIM_GetPeriod\n
3324 * PERxR PERx LL_HRTIM_TIM_GetPeriod
3325 * @param HRTIMx High Resolution Timer instance
3326 * @param Timer This parameter can be one of the following values:
3327 * @arg @ref LL_HRTIM_TIMER_MASTER
3328 * @arg @ref LL_HRTIM_TIMER_A
3329 * @arg @ref LL_HRTIM_TIMER_B
3330 * @arg @ref LL_HRTIM_TIMER_C
3331 * @arg @ref LL_HRTIM_TIMER_D
3332 * @arg @ref LL_HRTIM_TIMER_E
3333 * @retval Period Value between 0 and 0xFFFF
3334 */
3336 {
3338 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MPER) +
3341 }
3343 /**
3344 * @brief Set the timer repetition period value.
3345 * @rmtoll MREP MREP LL_HRTIM_TIM_SetRepetition\n
3346 * REPxR REPx LL_HRTIM_TIM_SetRepetition
3347 * @param HRTIMx High Resolution Timer instance
3348 * @param Timer This parameter can be one of the following values:
3349 * @arg @ref LL_HRTIM_TIMER_MASTER
3350 * @arg @ref LL_HRTIM_TIMER_A
3351 * @arg @ref LL_HRTIM_TIMER_B
3352 * @arg @ref LL_HRTIM_TIMER_C
3353 * @arg @ref LL_HRTIM_TIMER_D
3354 * @arg @ref LL_HRTIM_TIMER_E
3355 * @param Repetition Value between 0 and 0xFF
3356 * @retval None
3357 */
3358 __STATIC_INLINE void LL_HRTIM_TIM_SetRepetition(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Repetition)
3359 {
3364 }
3366 /**
3367 * @brief Get actual timer repetition period value.
3368 * @rmtoll MREP MREP LL_HRTIM_TIM_GetRepetition\n
3369 * REPxR REPx LL_HRTIM_TIM_GetRepetition
3370 * @param HRTIMx High Resolution Timer instance
3371 * @param Timer This parameter can be one of the following values:
3372 * @arg @ref LL_HRTIM_TIMER_MASTER
3373 * @arg @ref LL_HRTIM_TIMER_A
3374 * @arg @ref LL_HRTIM_TIMER_B
3375 * @arg @ref LL_HRTIM_TIMER_C
3376 * @arg @ref LL_HRTIM_TIMER_D
3377 * @arg @ref LL_HRTIM_TIMER_E
3378 * @retval Repetition Value between 0 and 0xFF
3379 */
3381 {
3383 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MREP) +
3386 }
3388 /**
3389 * @brief Set the compare value of the compare unit 1.
3390 * @rmtoll MCMP1R MCMP1 LL_HRTIM_TIM_SetCompare1\n
3391 * CMP1xR CMP1x LL_HRTIM_TIM_SetCompare1
3392 * @param HRTIMx High Resolution Timer instance
3393 * @param Timer This parameter can be one of the following values:
3394 * @arg @ref LL_HRTIM_TIMER_MASTER
3395 * @arg @ref LL_HRTIM_TIMER_A
3396 * @arg @ref LL_HRTIM_TIMER_B
3397 * @arg @ref LL_HRTIM_TIMER_C
3398 * @arg @ref LL_HRTIM_TIMER_D
3399 * @arg @ref LL_HRTIM_TIMER_E
3400 * @param CompareValue Compare value must be above or equal to 3
3401 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3402 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3403 * @retval None
3404 */
3405 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare1(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3406 {
3411 }
3413 /**
3414 * @brief Get actual compare value of the compare unit 1.
3415 * @rmtoll MCMP1R MCMP1 LL_HRTIM_TIM_GetCompare1\n
3416 * CMP1xR CMP1x LL_HRTIM_TIM_GetCompare1
3417 * @param HRTIMx High Resolution Timer instance
3418 * @param Timer This parameter can be one of the following values:
3419 * @arg @ref LL_HRTIM_TIMER_MASTER
3420 * @arg @ref LL_HRTIM_TIMER_A
3421 * @arg @ref LL_HRTIM_TIMER_B
3422 * @arg @ref LL_HRTIM_TIMER_C
3423 * @arg @ref LL_HRTIM_TIMER_D
3424 * @arg @ref LL_HRTIM_TIMER_E
3425 * @retval CompareValue Compare value must be above or equal to 3
3426 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3427 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3428 */
3430 {
3432 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCMP1R) +
3435 }
3437 /**
3438 * @brief Set the compare value of the compare unit 2.
3439 * @rmtoll MCMP2R MCMP2 LL_HRTIM_TIM_SetCompare2\n
3440 * CMP2xR CMP2x LL_HRTIM_TIM_SetCompare2
3441 * @param HRTIMx High Resolution Timer instance
3442 * @param Timer This parameter can be one of the following values:
3443 * @arg @ref LL_HRTIM_TIMER_MASTER
3444 * @arg @ref LL_HRTIM_TIMER_A
3445 * @arg @ref LL_HRTIM_TIMER_B
3446 * @arg @ref LL_HRTIM_TIMER_C
3447 * @arg @ref LL_HRTIM_TIMER_D
3448 * @arg @ref LL_HRTIM_TIMER_E
3449 * @param CompareValue Compare value must be above or equal to 3
3450 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3451 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3452 * @retval None
3453 */
3454 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare2(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3455 {
3460 }
3462 /**
3463 * @brief Get actual compare value of the compare unit 2.
3464 * @rmtoll MCMP2R MCMP2 LL_HRTIM_TIM_GetCompare2\n
3465 * CMP2xR CMP2x LL_HRTIM_TIM_GetCompare2\n
3466 * @param HRTIMx High Resolution Timer instance
3467 * @param Timer This parameter can be one of the following values:
3468 * @arg @ref LL_HRTIM_TIMER_MASTER
3469 * @arg @ref LL_HRTIM_TIMER_A
3470 * @arg @ref LL_HRTIM_TIMER_B
3471 * @arg @ref LL_HRTIM_TIMER_C
3472 * @arg @ref LL_HRTIM_TIMER_D
3473 * @arg @ref LL_HRTIM_TIMER_E
3474 * @retval CompareValue Compare value must be above or equal to 3
3475 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3476 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3477 */
3479 {
3481 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCMP2R) +
3484 }
3486 /**
3487 * @brief Set the compare value of the compare unit 3.
3488 * @rmtoll MCMP3R MCMP3 LL_HRTIM_TIM_SetCompare3\n
3489 * CMP3xR CMP3x LL_HRTIM_TIM_SetCompare3
3490 * @param HRTIMx High Resolution Timer instance
3491 * @param Timer This parameter can be one of the following values:
3492 * @arg @ref LL_HRTIM_TIMER_MASTER
3493 * @arg @ref LL_HRTIM_TIMER_A
3494 * @arg @ref LL_HRTIM_TIMER_B
3495 * @arg @ref LL_HRTIM_TIMER_C
3496 * @arg @ref LL_HRTIM_TIMER_D
3497 * @arg @ref LL_HRTIM_TIMER_E
3498 * @param CompareValue Compare value must be above or equal to 3
3499 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3500 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3501 * @retval None
3502 */
3503 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare3(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3504 {
3509 }
3511 /**
3512 * @brief Get actual compare value of the compare unit 3.
3513 * @rmtoll MCMP3R MCMP3 LL_HRTIM_TIM_GetCompare3\n
3514 * CMP3xR CMP3x LL_HRTIM_TIM_GetCompare3
3515 * @param HRTIMx High Resolution Timer instance
3516 * @param Timer This parameter can be one of the following values:
3517 * @arg @ref LL_HRTIM_TIMER_MASTER
3518 * @arg @ref LL_HRTIM_TIMER_A
3519 * @arg @ref LL_HRTIM_TIMER_B
3520 * @arg @ref LL_HRTIM_TIMER_C
3521 * @arg @ref LL_HRTIM_TIMER_D
3522 * @arg @ref LL_HRTIM_TIMER_E
3523 * @retval CompareValue Compare value must be above or equal to 3
3524 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3525 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3526 */
3528 {
3530 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCMP3R) +
3533 }
3535 /**
3536 * @brief Set the compare value of the compare unit 4.
3537 * @rmtoll MCMP4R MCMP4 LL_HRTIM_TIM_SetCompare4\n
3538 * CMP4xR CMP4x LL_HRTIM_TIM_SetCompare4
3539 * @param HRTIMx High Resolution Timer instance
3540 * @param Timer This parameter can be one of the following values:
3541 * @arg @ref LL_HRTIM_TIMER_MASTER
3542 * @arg @ref LL_HRTIM_TIMER_A
3543 * @arg @ref LL_HRTIM_TIMER_B
3544 * @arg @ref LL_HRTIM_TIMER_C
3545 * @arg @ref LL_HRTIM_TIMER_D
3546 * @arg @ref LL_HRTIM_TIMER_E
3547 * @param CompareValue Compare value must be above or equal to 3
3548 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3549 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3550 * @retval None
3551 */
3552 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare4(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3553 {
3558 }
3560 /**
3561 * @brief Get actual compare value of the compare unit 4.
3562 * @rmtoll MCMP4R MCMP4 LL_HRTIM_TIM_GetCompare4\n
3563 * CMP4xR CMP4x LL_HRTIM_TIM_GetCompare4
3564 * @param HRTIMx High Resolution Timer instance
3565 * @param Timer This parameter can be one of the following values:
3566 * @arg @ref LL_HRTIM_TIMER_MASTER
3567 * @arg @ref LL_HRTIM_TIMER_A
3568 * @arg @ref LL_HRTIM_TIMER_B
3569 * @arg @ref LL_HRTIM_TIMER_C
3570 * @arg @ref LL_HRTIM_TIMER_D
3571 * @arg @ref LL_HRTIM_TIMER_E
3572 * @retval CompareValue Compare value must be above or equal to 3
3573 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3574 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3575 */
3577 {
3579 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCMP4R) +
3582 }
3584 /**
3585 * @brief Set the reset trigger of a timer counter.
3586 * @rmtoll RSTxR UPDT LL_HRTIM_TIM_SetResetTrig\n
3587 * RSTxR CMP2 LL_HRTIM_TIM_SetResetTrig\n
3588 * RSTxR CMP4 LL_HRTIM_TIM_SetResetTrig\n
3589 * RSTxR MSTPER LL_HRTIM_TIM_SetResetTrig\n
3590 * RSTxR MSTCMP1 LL_HRTIM_TIM_SetResetTrig\n
3591 * RSTxR MSTCMP2 LL_HRTIM_TIM_SetResetTrig\n
3592 * RSTxR MSTCMP3 LL_HRTIM_TIM_SetResetTrig\n
3593 * RSTxR MSTCMP4 LL_HRTIM_TIM_SetResetTrig\n
3594 * RSTxR EXTEVNT1 LL_HRTIM_TIM_SetResetTrig\n
3595 * RSTxR EXTEVNT2 LL_HRTIM_TIM_SetResetTrig\n
3596 * RSTxR EXTEVNT3 LL_HRTIM_TIM_SetResetTrig\n
3597 * RSTxR EXTEVNT4 LL_HRTIM_TIM_SetResetTrig\n
3598 * RSTxR EXTEVNT5 LL_HRTIM_TIM_SetResetTrig\n
3599 * RSTxR EXTEVNT6 LL_HRTIM_TIM_SetResetTrig\n
3600 * RSTxR EXTEVNT7 LL_HRTIM_TIM_SetResetTrig\n
3601 * RSTxR EXTEVNT8 LL_HRTIM_TIM_SetResetTrig\n
3602 * RSTxR EXTEVNT9 LL_HRTIM_TIM_SetResetTrig\n
3603 * RSTxR EXTEVNT10 LL_HRTIM_TIM_SetResetTrig\n
3604 * RSTxR TIMBCMP1 LL_HRTIM_TIM_SetResetTrig\n
3605 * RSTxR TIMBCMP2 LL_HRTIM_TIM_SetResetTrig\n
3606 * RSTxR TIMBCMP4 LL_HRTIM_TIM_SetResetTrig\n
3607 * RSTxR TIMCCMP1 LL_HRTIM_TIM_SetResetTrig\n
3608 * RSTxR TIMCCMP2 LL_HRTIM_TIM_SetResetTrig\n
3609 * RSTxR TIMCCMP4 LL_HRTIM_TIM_SetResetTrig\n
3610 * RSTxR TIMDCMP1 LL_HRTIM_TIM_SetResetTrig\n
3611 * RSTxR TIMDCMP2 LL_HRTIM_TIM_SetResetTrig\n
3612 * RSTxR TIMDCMP4 LL_HRTIM_TIM_SetResetTrig\n
3613 * RSTxR TIMECMP1 LL_HRTIM_TIM_SetResetTrig\n
3614 * RSTxR TIMECMP2 LL_HRTIM_TIM_SetResetTrig\n
3615 * RSTxR TIMECMP4 LL_HRTIM_TIM_SetResetTrig
3616 * @note The reset of the timer counter can be triggered by up to 30 events
3617 * that can be selected among the following sources:
3618 * @arg The timing unit: Compare 2, Compare 4 and Update (3 events).
3619 * @arg The master timer: Reset and Compare 1..4 (5 events).
3620 * @arg The external events EXTEVNT1..10 (10 events).
3621 * @arg All other timing units (e.g. Timer B..E for timer A): Compare 1, 2 and 4 (12 events).
3622 * @param HRTIMx High Resolution Timer instance
3623 * @param Timer This parameter can be one of the following values:
3624 * @arg @ref LL_HRTIM_TIMER_A
3625 * @arg @ref LL_HRTIM_TIMER_B
3626 * @arg @ref LL_HRTIM_TIMER_C
3627 * @arg @ref LL_HRTIM_TIMER_D
3628 * @arg @ref LL_HRTIM_TIMER_E
3629 * @param ResetTrig This parameter can be a combination of the following values:
3630 * @arg @ref LL_HRTIM_RESETTRIG_NONE
3631 * @arg @ref LL_HRTIM_RESETTRIG_UPDATE
3632 * @arg @ref LL_HRTIM_RESETTRIG_CMP2
3633 * @arg @ref LL_HRTIM_RESETTRIG_CMP4
3634 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_PER
3635 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP1
3636 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP2
3637 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP3
3638 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP4
3639 * @arg @ref LL_HRTIM_RESETTRIG_EEV_1
3640 * @arg @ref LL_HRTIM_RESETTRIG_EEV_2
3641 * @arg @ref LL_HRTIM_RESETTRIG_EEV_3
3642 * @arg @ref LL_HRTIM_RESETTRIG_EEV_4
3643 * @arg @ref LL_HRTIM_RESETTRIG_EEV_5
3644 * @arg @ref LL_HRTIM_RESETTRIG_EEV_6
3645 * @arg @ref LL_HRTIM_RESETTRIG_EEV_7
3646 * @arg @ref LL_HRTIM_RESETTRIG_EEV_8
3647 * @arg @ref LL_HRTIM_RESETTRIG_EEV_9
3648 * @arg @ref LL_HRTIM_RESETTRIG_EEV_10
3649 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP1
3650 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP2
3651 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP4
3652 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP1
3653 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP2
3654 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP4
3655 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP1
3656 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP2
3657 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP4
3658 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP1
3659 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP2
3660 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP4
3661 * @retval None
3662 */
3663 __STATIC_INLINE void LL_HRTIM_TIM_SetResetTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t ResetTrig)
3664 {
3669 }
3671 /**
3672 * @brief Get actual reset trigger of a timer counter.
3673 * @rmtoll RSTxR UPDT LL_HRTIM_TIM_GetResetTrig\n
3674 * RSTxR CMP2 LL_HRTIM_TIM_GetResetTrig\n
3675 * RSTxR CMP4 LL_HRTIM_TIM_GetResetTrig\n
3676 * RSTxR MSTPER LL_HRTIM_TIM_GetResetTrig\n
3677 * RSTxR MSTCMP1 LL_HRTIM_TIM_GetResetTrig\n
3678 * RSTxR MSTCMP2 LL_HRTIM_TIM_GetResetTrig\n
3679 * RSTxR MSTCMP3 LL_HRTIM_TIM_GetResetTrig\n
3680 * RSTxR MSTCMP4 LL_HRTIM_TIM_GetResetTrig\n
3681 * RSTxR EXTEVNT1 LL_HRTIM_TIM_GetResetTrig\n
3682 * RSTxR EXTEVNT2 LL_HRTIM_TIM_GetResetTrig\n
3683 * RSTxR EXTEVNT3 LL_HRTIM_TIM_GetResetTrig\n
3684 * RSTxR EXTEVNT4 LL_HRTIM_TIM_GetResetTrig\n
3685 * RSTxR EXTEVNT5 LL_HRTIM_TIM_GetResetTrig\n
3686 * RSTxR EXTEVNT6 LL_HRTIM_TIM_GetResetTrig\n
3687 * RSTxR EXTEVNT7 LL_HRTIM_TIM_GetResetTrig\n
3688 * RSTxR EXTEVNT8 LL_HRTIM_TIM_GetResetTrig\n
3689 * RSTxR EXTEVNT9 LL_HRTIM_TIM_GetResetTrig\n
3690 * RSTxR EXTEVNT10 LL_HRTIM_TIM_GetResetTrig\n
3691 * RSTxR TIMBCMP1 LL_HRTIM_TIM_GetResetTrig\n
3692 * RSTxR TIMBCMP2 LL_HRTIM_TIM_GetResetTrig\n
3693 * RSTxR TIMBCMP4 LL_HRTIM_TIM_GetResetTrig\n
3694 * RSTxR TIMCCMP1 LL_HRTIM_TIM_GetResetTrig\n
3695 * RSTxR TIMCCMP2 LL_HRTIM_TIM_GetResetTrig\n
3696 * RSTxR TIMCCMP4 LL_HRTIM_TIM_GetResetTrig\n
3697 * RSTxR TIMDCMP1 LL_HRTIM_TIM_GetResetTrig\n
3698 * RSTxR TIMDCMP2 LL_HRTIM_TIM_GetResetTrig\n
3699 * RSTxR TIMDCMP4 LL_HRTIM_TIM_GetResetTrig\n
3700 * RSTxR TIMECMP1 LL_HRTIM_TIM_GetResetTrig\n
3701 * RSTxR TIMECMP2 LL_HRTIM_TIM_GetResetTrig\n
3702 * RSTxR TIMECMP4 LL_HRTIM_TIM_GetResetTrig
3703 * @param HRTIMx High Resolution Timer instance
3704 * @param Timer This parameter can be one of the following values:
3705 * @arg @ref LL_HRTIM_TIMER_A
3706 * @arg @ref LL_HRTIM_TIMER_B
3707 * @arg @ref LL_HRTIM_TIMER_C
3708 * @arg @ref LL_HRTIM_TIMER_D
3709 * @arg @ref LL_HRTIM_TIMER_E
3710 * @retval ResetTrig Returned value can be one of the following values:
3711 * @arg @ref LL_HRTIM_RESETTRIG_NONE
3712 * @arg @ref LL_HRTIM_RESETTRIG_UPDATE
3713 * @arg @ref LL_HRTIM_RESETTRIG_CMP2
3714 * @arg @ref LL_HRTIM_RESETTRIG_CMP4
3715 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_PER
3716 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP1
3717 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP2
3718 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP3
3719 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP4
3720 * @arg @ref LL_HRTIM_RESETTRIG_EEV_1
3721 * @arg @ref LL_HRTIM_RESETTRIG_EEV_2
3722 * @arg @ref LL_HRTIM_RESETTRIG_EEV_3
3723 * @arg @ref LL_HRTIM_RESETTRIG_EEV_4
3724 * @arg @ref LL_HRTIM_RESETTRIG_EEV_5
3725 * @arg @ref LL_HRTIM_RESETTRIG_EEV_6
3726 * @arg @ref LL_HRTIM_RESETTRIG_EEV_7
3727 * @arg @ref LL_HRTIM_RESETTRIG_EEV_8
3728 * @arg @ref LL_HRTIM_RESETTRIG_EEV_9
3729 * @arg @ref LL_HRTIM_RESETTRIG_EEV_10
3730 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP1
3731 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP2
3732 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP4
3733 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP1
3734 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP2
3735 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP4
3736 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP1
3737 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP2
3738 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP4
3739 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP1
3740 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP2
3741 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP4
3742 */
3744 {
3746 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].RSTxR) +
3749 }
3751 /**
3752 * @brief Get captured value for capture unit 1.
3753 * @rmtoll CPT1xR CPT1x LL_HRTIM_TIM_GetCapture1
3754 * @param HRTIMx High Resolution Timer instance
3755 * @param Timer This parameter can be one of the following values:
3756 * @arg @ref LL_HRTIM_TIMER_A
3757 * @arg @ref LL_HRTIM_TIMER_B
3758 * @arg @ref LL_HRTIM_TIMER_C
3759 * @arg @ref LL_HRTIM_TIMER_D
3760 * @arg @ref LL_HRTIM_TIMER_E
3761 * @retval Captured value
3762 */
3764 {
3766 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CPT1xR) +
3769 }
3771 /**
3772 * @brief Get captured value for capture unit 2.
3773 * @rmtoll CPT2xR CPT2x LL_HRTIM_TIM_GetCapture2
3774 * @param HRTIMx High Resolution Timer instance
3775 * @param Timer This parameter can be one of the following values:
3776 * @arg @ref LL_HRTIM_TIMER_A
3777 * @arg @ref LL_HRTIM_TIMER_B
3778 * @arg @ref LL_HRTIM_TIMER_C
3779 * @arg @ref LL_HRTIM_TIMER_D
3780 * @arg @ref LL_HRTIM_TIMER_E
3781 * @retval Captured value
3782 */
3784 {
3786 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CPT2xR) +
3789 }
3791 /**
3792 * @brief Set the trigger of a capture unit for a given timer.
3793 * @rmtoll CPT1xCR SWCPT LL_HRTIM_TIM_SetCaptureTrig\n
3794 * CPT1xCR UPDCPT LL_HRTIM_TIM_SetCaptureTrig\n
3795 * CPT1xCR EXEV1CPT LL_HRTIM_TIM_SetCaptureTrig\n
3796 * CPT1xCR EXEV2CPT LL_HRTIM_TIM_SetCaptureTrig\n
3797 * CPT1xCR EXEV3CPT LL_HRTIM_TIM_SetCaptureTrig\n
3798 * CPT1xCR EXEV4CPT LL_HRTIM_TIM_SetCaptureTrig\n
3799 * CPT1xCR EXEV5CPT LL_HRTIM_TIM_SetCaptureTrig\n
3800 * CPT1xCR EXEV6CPT LL_HRTIM_TIM_SetCaptureTrig\n
3801 * CPT1xCR EXEV7CPT LL_HRTIM_TIM_SetCaptureTrig\n
3802 * CPT1xCR EXEV8CPT LL_HRTIM_TIM_SetCaptureTrig\n
3803 * CPT1xCR EXEV9CPT LL_HRTIM_TIM_SetCaptureTrig\n
3804 * CPT1xCR EXEV10CPT LL_HRTIM_TIM_SetCaptureTrig\n
3805 * CPT1xCR TA1SET LL_HRTIM_TIM_SetCaptureTrig\n
3806 * CPT1xCR TA1RST LL_HRTIM_TIM_SetCaptureTrig\n
3807 * CPT1xCR TACMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3808 * CPT1xCR TACMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3809 * CPT1xCR TB1SET LL_HRTIM_TIM_SetCaptureTrig\n
3810 * CPT1xCR TB1RST LL_HRTIM_TIM_SetCaptureTrig\n
3811 * CPT1xCR TBCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3812 * CPT1xCR TBCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3813 * CPT1xCR TC1SET LL_HRTIM_TIM_SetCaptureTrig\n
3814 * CPT1xCR TC1RST LL_HRTIM_TIM_SetCaptureTrig\n
3815 * CPT1xCR TCCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3816 * CPT1xCR TCCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3817 * CPT1xCR TD1SET LL_HRTIM_TIM_SetCaptureTrig\n
3818 * CPT1xCR TD1RST LL_HRTIM_TIM_SetCaptureTrig\n
3819 * CPT1xCR TDCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3820 * CPT1xCR TDCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3821 * CPT1xCR TE1SET LL_HRTIM_TIM_SetCaptureTrig\n
3822 * CPT1xCR TE1RST LL_HRTIM_TIM_SetCaptureTrig\n
3823 * CPT1xCR TECMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3824 * CPT1xCR TECMP2 LL_HRTIM_TIM_SetCaptureTrig
3825 * @param HRTIMx High Resolution Timer instance
3826 * @param Timer This parameter can be one of the following values:
3827 * @arg @ref LL_HRTIM_TIMER_A
3828 * @arg @ref LL_HRTIM_TIMER_B
3829 * @arg @ref LL_HRTIM_TIMER_C
3830 * @arg @ref LL_HRTIM_TIMER_D
3831 * @arg @ref LL_HRTIM_TIMER_E
3832 * @param CaptureUnit This parameter can be one of the following values:
3833 * @arg @ref LL_HRTIM_CAPTUREUNIT_1
3834 * @arg @ref LL_HRTIM_CAPTUREUNIT_2
3835 * @param CaptureTrig This parameter can be a combination of the following values:
3836 * @arg @ref LL_HRTIM_CAPTURETRIG_NONE
3837 * @arg @ref LL_HRTIM_CAPTURETRIG_UPDATE
3838 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_1
3839 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_2
3840 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_3
3841 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_4
3842 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_5
3843 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_6
3844 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_7
3845 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_8
3846 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_9
3847 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_10
3848 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_SET
3849 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_RESET
3850 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP1
3851 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP2
3852 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_SET
3853 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_RESET
3854 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP1
3855 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP2
3856 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_SET
3857 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_RESET
3858 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP1
3859 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP2
3860 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_SET
3861 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_RESET
3862 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP1
3863 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP2
3864 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_SET
3865 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_RESET
3866 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP1
3867 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP2
3868 * @retval None
3869 */
3870 __STATIC_INLINE void LL_HRTIM_TIM_SetCaptureTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CaptureUnit,
3872 {
3874 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0U].CPT1xCR) +
3877 }
3879 /**
3880 * @brief Get actual trigger of a capture unit for a given timer.
3881 * @rmtoll CPT1xCR SWCPT LL_HRTIM_TIM_GetCaptureTrig\n
3882 * CPT1xCR UPDCPT LL_HRTIM_TIM_GetCaptureTrig\n
3883 * CPT1xCR EXEV1CPT LL_HRTIM_TIM_GetCaptureTrig\n
3884 * CPT1xCR EXEV2CPT LL_HRTIM_TIM_GetCaptureTrig\n
3885 * CPT1xCR EXEV3CPT LL_HRTIM_TIM_GetCaptureTrig\n
3886 * CPT1xCR EXEV4CPT LL_HRTIM_TIM_GetCaptureTrig\n
3887 * CPT1xCR EXEV5CPT LL_HRTIM_TIM_GetCaptureTrig\n
3888 * CPT1xCR EXEV6CPT LL_HRTIM_TIM_GetCaptureTrig\n
3889 * CPT1xCR EXEV7CPT LL_HRTIM_TIM_GetCaptureTrig\n
3890 * CPT1xCR EXEV8CPT LL_HRTIM_TIM_GetCaptureTrig\n
3891 * CPT1xCR EXEV9CPT LL_HRTIM_TIM_GetCaptureTrig\n
3892 * CPT1xCR EXEV10CPT LL_HRTIM_TIM_GetCaptureTrig\n
3893 * CPT1xCR TA1SET LL_HRTIM_TIM_GetCaptureTrig\n
3894 * CPT1xCR TA1RST LL_HRTIM_TIM_GetCaptureTrig\n
3895 * CPT1xCR TACMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3896 * CPT1xCR TACMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3897 * CPT1xCR TB1SET LL_HRTIM_TIM_GetCaptureTrig\n
3898 * CPT1xCR TB1RST LL_HRTIM_TIM_GetCaptureTrig\n
3899 * CPT1xCR TBCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3900 * CPT1xCR TBCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3901 * CPT1xCR TC1SET LL_HRTIM_TIM_GetCaptureTrig\n
3902 * CPT1xCR TC1RST LL_HRTIM_TIM_GetCaptureTrig\n
3903 * CPT1xCR TCCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3904 * CPT1xCR TCCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3905 * CPT1xCR TD1SET LL_HRTIM_TIM_GetCaptureTrig\n
3906 * CPT1xCR TD1RST LL_HRTIM_TIM_GetCaptureTrig\n
3907 * CPT1xCR TDCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3908 * CPT1xCR TDCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3909 * CPT1xCR TE1SET LL_HRTIM_TIM_GetCaptureTrig\n
3910 * CPT1xCR TE1RST LL_HRTIM_TIM_GetCaptureTrig\n
3911 * CPT1xCR TECMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3912 * CPT1xCR TECMP2 LL_HRTIM_TIM_GetCaptureTrig
3913 * @param HRTIMx High Resolution Timer instance
3914 * @param Timer This parameter can be one of the following values:
3915 * @arg @ref LL_HRTIM_TIMER_A
3916 * @arg @ref LL_HRTIM_TIMER_B
3917 * @arg @ref LL_HRTIM_TIMER_C
3918 * @arg @ref LL_HRTIM_TIMER_D
3919 * @arg @ref LL_HRTIM_TIMER_E
3920 * @param CaptureUnit This parameter can be one of the following values:
3921 * @arg @ref LL_HRTIM_CAPTUREUNIT_1
3922 * @arg @ref LL_HRTIM_CAPTUREUNIT_2
3923 * @retval CaptureTrig This parameter can be a combination of the following values:
3924 * @arg @ref LL_HRTIM_CAPTURETRIG_NONE
3925 * @arg @ref LL_HRTIM_CAPTURETRIG_UPDATE
3926 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_1
3927 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_2
3928 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_3
3929 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_4
3930 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_5
3931 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_6
3932 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_7
3933 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_8
3934 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_9
3935 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_10
3936 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_SET
3937 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_RESET
3938 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP1
3939 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP2
3940 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_SET
3941 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_RESET
3942 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP1
3943 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP2
3944 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_SET
3945 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_RESET
3946 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP1
3947 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP2
3948 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_SET
3949 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_RESET
3950 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP1
3951 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP2
3952 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_SET
3953 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_RESET
3954 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP1
3955 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP2
3956 */
3957 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCaptureTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CaptureUnit)
3958 {
3960 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0U].CPT1xCR) +
3963 }
3965 /**
3966 * @brief Enable deadtime insertion for a given timer.
3967 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_EnableDeadTime
3968 * @param HRTIMx High Resolution Timer instance
3969 * @param Timer This parameter can be one of the following values:
3970 * @arg @ref LL_HRTIM_TIMER_A
3971 * @arg @ref LL_HRTIM_TIMER_B
3972 * @arg @ref LL_HRTIM_TIMER_C
3973 * @arg @ref LL_HRTIM_TIMER_D
3974 * @arg @ref LL_HRTIM_TIMER_E
3975 * @retval None
3976 */
3978 {
3983 }
3985 /**
3986 * @brief Disable deadtime insertion for a given timer.
3987 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_DisableDeadTime
3988 * @param HRTIMx High Resolution Timer instance
3989 * @param Timer This parameter can be one of the following values:
3990 * @arg @ref LL_HRTIM_TIMER_A
3991 * @arg @ref LL_HRTIM_TIMER_B
3992 * @arg @ref LL_HRTIM_TIMER_C
3993 * @arg @ref LL_HRTIM_TIMER_D
3994 * @arg @ref LL_HRTIM_TIMER_E
3995 * @retval None
3996 */
3998 {
4003 }
4005 /**
4006 * @brief Indicate whether deadtime insertion is enabled for a given timer.
4007 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_IsEnabledDeadTime
4008 * @param HRTIMx High Resolution Timer instance
4009 * @param Timer This parameter can be one of the following values:
4010 * @arg @ref LL_HRTIM_TIMER_A
4011 * @arg @ref LL_HRTIM_TIMER_B
4012 * @arg @ref LL_HRTIM_TIMER_C
4013 * @arg @ref LL_HRTIM_TIMER_D
4014 * @arg @ref LL_HRTIM_TIMER_E
4015 * @retval State of DTEN bit in HRTIM_OUTxR register (1 or 0).
4016 */
4018 {
4020 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
4024 }
4026 /**
4027 * @brief Set the delayed protection (DLYPRT) mode.
4028 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_SetDLYPRTMode\n
4029 * OUTxR DLYPRT LL_HRTIM_TIM_SetDLYPRTMode
4030 * @note This function must be called prior enabling the delayed protection
4031 * @note Balanced Idle mode is only available in push-pull mode
4032 * @param HRTIMx High Resolution Timer instance
4033 * @param Timer This parameter can be one of the following values:
4034 * @arg @ref LL_HRTIM_TIMER_A
4035 * @arg @ref LL_HRTIM_TIMER_B
4036 * @arg @ref LL_HRTIM_TIMER_C
4037 * @arg @ref LL_HRTIM_TIMER_D
4038 * @arg @ref LL_HRTIM_TIMER_E
4039 * @param DLYPRTMode Delayed protection (DLYPRT) mode
4040 *
4041 * For timers A, B and C this parameter can be one of the following values:
4042 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV6
4043 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV6
4044 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV6
4045 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV6
4046 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV7
4047 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV7
4048 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV7
4049 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV7
4050 *
4051 * For timers D and E this parameter can be one of the following values:
4052 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV8
4053 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV8
4054 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV8
4055 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV8
4056 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV9
4057 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV9
4058 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV9
4059 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV9
4060 * @retval None
4061 */
4062 __STATIC_INLINE void LL_HRTIM_TIM_SetDLYPRTMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DLYPRTMode)
4063 {
4068 }
4070 /**
4071 * @brief Get the delayed protection (DLYPRT) mode.
4072 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_GetDLYPRTMode\n
4073 * OUTxR DLYPRT LL_HRTIM_TIM_GetDLYPRTMode
4074 * @param HRTIMx High Resolution Timer instance
4075 * @param Timer This parameter can be one of the following values:
4076 * @arg @ref LL_HRTIM_TIMER_A
4077 * @arg @ref LL_HRTIM_TIMER_B
4078 * @arg @ref LL_HRTIM_TIMER_C
4079 * @arg @ref LL_HRTIM_TIMER_D
4080 * @arg @ref LL_HRTIM_TIMER_E
4081 * @retval DLYPRTMode Delayed protection (DLYPRT) mode
4082 *
4083 * For timers A, B and C this parameter can be one of the following values:
4084 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV6
4085 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV6
4086 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV6
4087 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV6
4088 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV7
4089 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV7
4090 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV7
4091 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV7
4092 *
4093 * For timers D and E this parameter can be one of the following values:
4094 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV8
4095 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV8
4096 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV8
4097 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV8
4098 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV9
4099 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV9
4100 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV9
4101 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV9
4102 */
4104 {
4106 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
4109 }
4111 /**
4112 * @brief Enable delayed protection (DLYPRT) for a given timer.
4113 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_EnableDLYPRT
4114 * @note This function must not be called once the concerned timer is enabled
4115 * @param HRTIMx High Resolution Timer instance
4116 * @param Timer This parameter can be one of the following values:
4117 * @arg @ref LL_HRTIM_TIMER_A
4118 * @arg @ref LL_HRTIM_TIMER_B
4119 * @arg @ref LL_HRTIM_TIMER_C
4120 * @arg @ref LL_HRTIM_TIMER_D
4121 * @arg @ref LL_HRTIM_TIMER_E
4122 * @retval None
4123 */
4125 {
4130 }
4132 /**
4133 * @brief Disable delayed protection (DLYPRT) for a given timer.
4134 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_DisableDLYPRT
4135 * @note This function must not be called once the concerned timer is enabled
4136 * @param HRTIMx High Resolution Timer instance
4137 * @param Timer This parameter can be one of the following values:
4138 * @arg @ref LL_HRTIM_TIMER_A
4139 * @arg @ref LL_HRTIM_TIMER_B
4140 * @arg @ref LL_HRTIM_TIMER_C
4141 * @arg @ref LL_HRTIM_TIMER_D
4142 * @arg @ref LL_HRTIM_TIMER_E
4143 * @retval None
4144 */
4146 {
4151 }
4153 /**
4154 * @brief Indicate whether delayed protection (DLYPRT) is enabled for a given timer.
4155 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_IsEnabledDLYPRT
4156 * @param HRTIMx High Resolution Timer instance
4157 * @param Timer This parameter can be one of the following values:
4158 * @arg @ref LL_HRTIM_TIMER_A
4159 * @arg @ref LL_HRTIM_TIMER_B
4160 * @arg @ref LL_HRTIM_TIMER_C
4161 * @arg @ref LL_HRTIM_TIMER_D
4162 * @arg @ref LL_HRTIM_TIMER_E
4163 * @retval State of DLYPRTEN bit in HRTIM_OUTxR register (1 or 0).
4164 */
4166 {
4168 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
4171 }
4173 /**
4174 * @brief Enable the fault channel(s) for a given timer.
4175 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_EnableFault\n
4176 * FLTxR FLT2EN LL_HRTIM_TIM_EnableFault\n
4177 * FLTxR FLT3EN LL_HRTIM_TIM_EnableFault\n
4178 * FLTxR FLT4EN LL_HRTIM_TIM_EnableFault\n
4179 * FLTxR FLT5EN LL_HRTIM_TIM_EnableFault
4180 * @param HRTIMx High Resolution Timer instance
4181 * @param Timer This parameter can be one of the following values:
4182 * @arg @ref LL_HRTIM_TIMER_A
4183 * @arg @ref LL_HRTIM_TIMER_B
4184 * @arg @ref LL_HRTIM_TIMER_C
4185 * @arg @ref LL_HRTIM_TIMER_D
4186 * @arg @ref LL_HRTIM_TIMER_E
4187 * @param Faults This parameter can be a combination of the following values:
4188 * @arg @ref LL_HRTIM_FAULT_1
4189 * @arg @ref LL_HRTIM_FAULT_2
4190 * @arg @ref LL_HRTIM_FAULT_3
4191 * @arg @ref LL_HRTIM_FAULT_4
4192 * @arg @ref LL_HRTIM_FAULT_5
4193 * @retval None
4194 */
4195 __STATIC_INLINE void LL_HRTIM_TIM_EnableFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Faults)
4196 {
4201 }
4203 /**
4204 * @brief Disable the fault channel(s) for a given timer.
4205 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_DisableFault\n
4206 * FLTxR FLT2EN LL_HRTIM_TIM_DisableFault\n
4207 * FLTxR FLT3EN LL_HRTIM_TIM_DisableFault\n
4208 * FLTxR FLT4EN LL_HRTIM_TIM_DisableFault\n
4209 * FLTxR FLT5EN LL_HRTIM_TIM_DisableFault
4210 * @param HRTIMx High Resolution Timer instance
4211 * @param Timer This parameter can be one of the following values:
4212 * @arg @ref LL_HRTIM_TIMER_A
4213 * @arg @ref LL_HRTIM_TIMER_B
4214 * @arg @ref LL_HRTIM_TIMER_C
4215 * @arg @ref LL_HRTIM_TIMER_D
4216 * @arg @ref LL_HRTIM_TIMER_E
4217 * @param Faults This parameter can be a combination of the following values:
4218 * @arg @ref LL_HRTIM_FAULT_1
4219 * @arg @ref LL_HRTIM_FAULT_2
4220 * @arg @ref LL_HRTIM_FAULT_3
4221 * @arg @ref LL_HRTIM_FAULT_4
4222 * @arg @ref LL_HRTIM_FAULT_5
4223 * @retval None
4224 */
4225 __STATIC_INLINE void LL_HRTIM_TIM_DisableFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Faults)
4226 {
4231 }
4233 /**
4234 * @brief Indicate whether the fault channel is enabled for a given timer.
4235 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_IsEnabledFault\n
4236 * FLTxR FLT2EN LL_HRTIM_TIM_IsEnabledFault\n
4237 * FLTxR FLT3EN LL_HRTIM_TIM_IsEnabledFault\n
4238 * FLTxR FLT4EN LL_HRTIM_TIM_IsEnabledFault\n
4239 * FLTxR FLT5EN LL_HRTIM_TIM_IsEnabledFault
4240 * @param HRTIMx High Resolution Timer instance
4241 * @param Timer This parameter can be one of the following values:
4242 * @arg @ref LL_HRTIM_TIMER_A
4243 * @arg @ref LL_HRTIM_TIMER_B
4244 * @arg @ref LL_HRTIM_TIMER_C
4245 * @arg @ref LL_HRTIM_TIMER_D
4246 * @arg @ref LL_HRTIM_TIMER_E
4247 * @param Fault This parameter can be one of the following values:
4248 * @arg @ref LL_HRTIM_FAULT_1
4249 * @arg @ref LL_HRTIM_FAULT_2
4250 * @arg @ref LL_HRTIM_FAULT_3
4251 * @arg @ref LL_HRTIM_FAULT_4
4252 * @arg @ref LL_HRTIM_FAULT_5
4253 * @retval State of FLTxEN bit in HRTIM_FLTxR register (1 or 0).
4254 */
4255 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Fault)
4256 {
4258 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].FLTxR) +
4262 }
4264 /**
4265 * @brief Lock the fault conditioning set-up for a given timer.
4266 * @rmtoll FLTxR FLTLCK LL_HRTIM_TIM_LockFault
4267 * @note Timer fault-related set-up is frozen until the next HRTIM or system reset
4268 * @param HRTIMx High Resolution Timer instance
4269 * @param Timer This parameter can be one of the following values:
4270 * @arg @ref LL_HRTIM_TIMER_A
4271 * @arg @ref LL_HRTIM_TIMER_B
4272 * @arg @ref LL_HRTIM_TIMER_C
4273 * @arg @ref LL_HRTIM_TIMER_D
4274 * @arg @ref LL_HRTIM_TIMER_E
4275 * @retval None
4276 */
4278 {
4283 }
4285 /**
4286 * @brief Define how the timer behaves during a burst mode operation.
4287 * @rmtoll BMCR MTBM LL_HRTIM_TIM_SetBurstModeOption\n
4288 * BMCR TABM LL_HRTIM_TIM_SetBurstModeOption\n
4289 * BMCR TBBM LL_HRTIM_TIM_SetBurstModeOption\n
4290 * BMCR TCBM LL_HRTIM_TIM_SetBurstModeOption\n
4291 * BMCR TDBM LL_HRTIM_TIM_SetBurstModeOption\n
4292 * BMCR TEBM LL_HRTIM_TIM_SetBurstModeOption
4293 * @note This function must not be called when the burst mode is enabled
4294 * @param HRTIMx High Resolution Timer instance
4295 * @param Timer This parameter can be one of the following values:
4296 * @arg @ref LL_HRTIM_TIMER_MASTER
4297 * @arg @ref LL_HRTIM_TIMER_A
4298 * @arg @ref LL_HRTIM_TIMER_B
4299 * @arg @ref LL_HRTIM_TIMER_C
4300 * @arg @ref LL_HRTIM_TIMER_D
4301 * @arg @ref LL_HRTIM_TIMER_E
4302 * @param BurtsModeOption This parameter can be one of the following values:
4303 * @arg @ref LL_HRTIM_BURSTMODE_MAINTAINCLOCK
4304 * @arg @ref LL_HRTIM_BURSTMODE_RESETCOUNTER
4305 * @retval None
4306 */
4307 __STATIC_INLINE void LL_HRTIM_TIM_SetBurstModeOption(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t BurtsModeOption)
4308 {
4311 }
4313 /**
4314 * @brief Retrieve how the timer behaves during a burst mode operation.
4315 * @rmtoll BMCR MCR LL_HRTIM_TIM_GetBurstModeOption\n
4316 * BMCR TABM LL_HRTIM_TIM_GetBurstModeOption\n
4317 * BMCR TBBM LL_HRTIM_TIM_GetBurstModeOption\n
4318 * BMCR TCBM LL_HRTIM_TIM_GetBurstModeOption\n
4319 * BMCR TDBM LL_HRTIM_TIM_GetBurstModeOption\n
4320 * BMCR TEBM LL_HRTIM_TIM_GetBurstModeOption
4321 * @param HRTIMx High Resolution Timer instance
4322 * @param Timer This parameter can be one of the following values:
4323 * @arg @ref LL_HRTIM_TIMER_MASTER
4324 * @arg @ref LL_HRTIM_TIMER_A
4325 * @arg @ref LL_HRTIM_TIMER_B
4326 * @arg @ref LL_HRTIM_TIMER_C
4327 * @arg @ref LL_HRTIM_TIMER_D
4328 * @arg @ref LL_HRTIM_TIMER_E
4329 * @retval BurtsMode This parameter can be one of the following values:
4330 * @arg @ref LL_HRTIM_BURSTMODE_MAINTAINCLOCK
4331 * @arg @ref LL_HRTIM_BURSTMODE_RESETCOUNTER
4332 */
4333 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetBurstModeOption(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4334 {
4337 }
4339 /**
4340 * @brief Program which registers are to be written by Burst DMA transfers.
4341 * @rmtoll BDMUPDR MTBM LL_HRTIM_TIM_ConfigBurstDMA\n
4342 * BDMUPDR MICR LL_HRTIM_TIM_ConfigBurstDMA\n
4343 * BDMUPDR MDIER LL_HRTIM_TIM_ConfigBurstDMA\n
4344 * BDMUPDR MCNT LL_HRTIM_TIM_ConfigBurstDMA\n
4345 * BDMUPDR MPER LL_HRTIM_TIM_ConfigBurstDMA\n
4346 * BDMUPDR MREP LL_HRTIM_TIM_ConfigBurstDMA\n
4347 * BDMUPDR MCMP1 LL_HRTIM_TIM_ConfigBurstDMA\n
4348 * BDMUPDR MCMP2 LL_HRTIM_TIM_ConfigBurstDMA\n
4349 * BDMUPDR MCMP3 LL_HRTIM_TIM_ConfigBurstDMA\n
4350 * BDMUPDR MCMP4 LL_HRTIM_TIM_ConfigBurstDMA\n
4351 * BDTxUPDR TIMxCR LL_HRTIM_TIM_ConfigBurstDMA\n
4352 * BDTxUPDR TIMxICR LL_HRTIM_TIM_ConfigBurstDMA\n
4353 * BDTxUPDR TIMxDIER LL_HRTIM_TIM_ConfigBurstDMA\n
4354 * BDTxUPDR TIMxCNT LL_HRTIM_TIM_ConfigBurstDMA\n
4355 * BDTxUPDR TIMxPER LL_HRTIM_TIM_ConfigBurstDMA\n
4356 * BDTxUPDR TIMxREP LL_HRTIM_TIM_ConfigBurstDMA\n
4357 * BDTxUPDR TIMxCMP1 LL_HRTIM_TIM_ConfigBurstDMA\n
4358 * BDTxUPDR TIMxCMP2 LL_HRTIM_TIM_ConfigBurstDMA\n
4359 * BDTxUPDR TIMxCMP3 LL_HRTIM_TIM_ConfigBurstDMA\n
4360 * BDTxUPDR TIMxCMP4 LL_HRTIM_TIM_ConfigBurstDMA\n
4361 * BDTxUPDR TIMxDTR LL_HRTIM_TIM_ConfigBurstDMA\n
4362 * BDTxUPDR TIMxSET1R LL_HRTIM_TIM_ConfigBurstDMA\n
4363 * BDTxUPDR TIMxRST1R LL_HRTIM_TIM_ConfigBurstDMA\n
4364 * BDTxUPDR TIMxSET2R LL_HRTIM_TIM_ConfigBurstDMA\n
4365 * BDTxUPDR TIMxRST2R LL_HRTIM_TIM_ConfigBurstDMA\n
4366 * BDTxUPDR TIMxEEFR1 LL_HRTIM_TIM_ConfigBurstDMA\n
4367 * BDTxUPDR TIMxEEFR2 LL_HRTIM_TIM_ConfigBurstDMA\n
4368 * BDTxUPDR TIMxRSTR LL_HRTIM_TIM_ConfigBurstDMA\n
4369 * BDTxUPDR TIMxOUTR LL_HRTIM_TIM_ConfigBurstDMA\n
4370 * BDTxUPDR TIMxLTCH LL_HRTIM_TIM_ConfigBurstDMA
4371 * @param HRTIMx High Resolution Timer instance
4372 * @param Timer This parameter can be one of the following values:
4373 * @arg @ref LL_HRTIM_TIMER_MASTER
4374 * @arg @ref LL_HRTIM_TIMER_A
4375 * @arg @ref LL_HRTIM_TIMER_B
4376 * @arg @ref LL_HRTIM_TIMER_C
4377 * @arg @ref LL_HRTIM_TIMER_D
4378 * @arg @ref LL_HRTIM_TIMER_E
4379 * @param Registers Registers to be updated by the DMA request
4380 *
4381 * For Master timer this parameter can be can be a combination of the following values:
4382 * @arg @ref LL_HRTIM_BURSTDMA_NONE
4383 * @arg @ref LL_HRTIM_BURSTDMA_MCR
4384 * @arg @ref LL_HRTIM_BURSTDMA_MICR
4385 * @arg @ref LL_HRTIM_BURSTDMA_MDIER
4386 * @arg @ref LL_HRTIM_BURSTDMA_MCNT
4387 * @arg @ref LL_HRTIM_BURSTDMA_MPER
4388 * @arg @ref LL_HRTIM_BURSTDMA_MREP
4389 * @arg @ref LL_HRTIM_BURSTDMA_MCMP1
4390 * @arg @ref LL_HRTIM_BURSTDMA_MCMP2
4391 * @arg @ref LL_HRTIM_BURSTDMA_MCMP3
4392 * @arg @ref LL_HRTIM_BURSTDMA_MCMP4
4393 *
4394 * For Timers A..E this parameter can be can be a combination of the following values:
4395 * @arg @ref LL_HRTIM_BURSTDMA_NONE
4396 * @arg @ref LL_HRTIM_BURSTDMA_TIMMCR
4397 * @arg @ref LL_HRTIM_BURSTDMA_TIMICR
4398 * @arg @ref LL_HRTIM_BURSTDMA_TIMDIER
4399 * @arg @ref LL_HRTIM_BURSTDMA_TIMCNT
4400 * @arg @ref LL_HRTIM_BURSTDMA_TIMPER
4401 * @arg @ref LL_HRTIM_BURSTDMA_TIMREP
4402 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP1
4403 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP2
4404 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP3
4405 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP4
4406 * @arg @ref LL_HRTIM_BURSTDMA_TIMDTR
4407 * @arg @ref LL_HRTIM_BURSTDMA_TIMSET1R
4408 * @arg @ref LL_HRTIM_BURSTDMA_TIMRST1R
4409 * @arg @ref LL_HRTIM_BURSTDMA_TIMSET2R
4410 * @arg @ref LL_HRTIM_BURSTDMA_TIMRST2R
4411 * @arg @ref LL_HRTIM_BURSTDMA_TIMEEFR1
4412 * @arg @ref LL_HRTIM_BURSTDMA_TIMEEFR2
4413 * @arg @ref LL_HRTIM_BURSTDMA_TIMRSTR
4414 * @arg @ref LL_HRTIM_BURSTDMA_TIMCHPR
4415 * @arg @ref LL_HRTIM_BURSTDMA_TIMOUTR
4416 * @arg @ref LL_HRTIM_BURSTDMA_TIMFLTR
4417 * @retval None
4418 */
4419 __STATIC_INLINE void LL_HRTIM_TIM_ConfigBurstDMA(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Registers)
4420 {
4423 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.BDMUPR) + (4U * iTimer)));
4425 }
4427 /**
4428 * @brief Indicate on which output the signal is currently applied.
4429 * @rmtoll TIMxISR CPPSTAT LL_HRTIM_TIM_GetCurrentPushPullStatus
4430 * @note Only significant when the timer operates in push-pull mode.
4431 * @param HRTIMx High Resolution Timer instance
4432 * @param Timer This parameter can be one of the following values:
4433 * @arg @ref LL_HRTIM_TIMER_A
4434 * @arg @ref LL_HRTIM_TIMER_B
4435 * @arg @ref LL_HRTIM_TIMER_C
4436 * @arg @ref LL_HRTIM_TIMER_D
4437 * @arg @ref LL_HRTIM_TIMER_E
4438 * @retval CPPSTAT This parameter can be one of the following values:
4439 * @arg @ref LL_HRTIM_CPPSTAT_OUTPUT1
4440 * @arg @ref LL_HRTIM_CPPSTAT_OUTPUT2
4441 */
4442 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCurrentPushPullStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4443 {
4445 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
4448 }
4450 /**
4451 * @brief Indicate on which output the signal was applied, in push-pull mode, balanced fault mode or delayed idle mode, when the protection was triggered.
4452 * @rmtoll TIMxISR IPPSTAT LL_HRTIM_TIM_GetIdlePushPullStatus
4453 * @param HRTIMx High Resolution Timer instance
4454 * @param Timer This parameter can be one of the following values:
4455 * @arg @ref LL_HRTIM_TIMER_A
4456 * @arg @ref LL_HRTIM_TIMER_B
4457 * @arg @ref LL_HRTIM_TIMER_C
4458 * @arg @ref LL_HRTIM_TIMER_D
4459 * @arg @ref LL_HRTIM_TIMER_E
4460 * @retval IPPSTAT This parameter can be one of the following values:
4461 * @arg @ref LL_HRTIM_IPPSTAT_OUTPUT1
4462 * @arg @ref LL_HRTIM_IPPSTAT_OUTPUT2
4463 */
4464 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetIdlePushPullStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4465 {
4467 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
4470 }
4472 /**
4473 * @brief Set the event filter for a given timer.
4474 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_SetEventFilter\n
4475 * EEFxR1 EE2LTCH LL_HRTIM_TIM_SetEventFilter\n
4476 * EEFxR1 EE3LTCH LL_HRTIM_TIM_SetEventFilter\n
4477 * EEFxR1 EE4LTCH LL_HRTIM_TIM_SetEventFilter\n
4478 * EEFxR1 EE5LTCH LL_HRTIM_TIM_SetEventFilter\n
4479 * EEFxR2 EE6LTCH LL_HRTIM_TIM_SetEventFilter\n
4480 * EEFxR2 EE7LTCH LL_HRTIM_TIM_SetEventFilter\n
4481 * EEFxR2 EE8LTCH LL_HRTIM_TIM_SetEventFilter\n
4482 * EEFxR2 EE9LTCH LL_HRTIM_TIM_SetEventFilter\n
4483 * EEFxR2 EE10LTCH LL_HRTIM_TIM_SetEventFilter
4484 * @note This function must not be called when the timer counter is enabled.
4485 * @param HRTIMx High Resolution Timer instance
4486 * @param Timer This parameter can be one of the following values:
4487 * @arg @ref LL_HRTIM_TIMER_A
4488 * @arg @ref LL_HRTIM_TIMER_B
4489 * @arg @ref LL_HRTIM_TIMER_C
4490 * @arg @ref LL_HRTIM_TIMER_D
4491 * @arg @ref LL_HRTIM_TIMER_E
4492 * @param Event This parameter can be one of the following values:
4493 * @arg @ref LL_HRTIM_EVENT_1
4494 * @arg @ref LL_HRTIM_EVENT_2
4495 * @arg @ref LL_HRTIM_EVENT_3
4496 * @arg @ref LL_HRTIM_EVENT_4
4497 * @arg @ref LL_HRTIM_EVENT_5
4498 * @arg @ref LL_HRTIM_EVENT_6
4499 * @arg @ref LL_HRTIM_EVENT_7
4500 * @arg @ref LL_HRTIM_EVENT_8
4501 * @arg @ref LL_HRTIM_EVENT_9
4502 * @arg @ref LL_HRTIM_EVENT_10
4503 * @param Filter This parameter can be one of the following values:
4504 * @arg @ref LL_HRTIM_EEFLTR_NONE
4505 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP1
4506 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP2
4507 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP3
4508 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP4
4509 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR1
4510 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR2
4511 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR3
4512 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR4
4513 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR5
4514 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR6
4515 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR7
4516 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR8
4517 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP2
4518 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP3
4519 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGTIM
4521 * @retval None
4522 */
4523 __STATIC_INLINE void LL_HRTIM_TIM_SetEventFilter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event, uint32_t Filter)
4524 {
4527 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].EEFxR1) +
4529 MODIFY_REG(*pReg, (HRTIM_EEFR1_EE1FLTR << REG_SHIFT_TAB_EExSRC[iEvent]), (Filter << REG_SHIFT_TAB_EExSRC[iEvent]));
4530 }
4532 /**
4533 * @brief Get actual event filter settings for a given timer.
4534 * @rmtoll EEFxR1 EE1FLTR LL_HRTIM_TIM_GetEventFilter\n
4535 * EEFxR1 EE2FLTR LL_HRTIM_TIM_GetEventFilter\n
4536 * EEFxR1 EE3FLTR LL_HRTIM_TIM_GetEventFilter\n
4537 * EEFxR1 EE4FLTR LL_HRTIM_TIM_GetEventFilter\n
4538 * EEFxR1 EE5FLTR LL_HRTIM_TIM_GetEventFilter\n
4539 * EEFxR2 EE6FLTR LL_HRTIM_TIM_GetEventFilter\n
4540 * EEFxR2 EE7FLTR LL_HRTIM_TIM_GetEventFilter\n
4541 * EEFxR2 EE8FLTR LL_HRTIM_TIM_GetEventFilter\n
4542 * EEFxR2 EE9FLTR LL_HRTIM_TIM_GetEventFilter\n
4543 * EEFxR2 EE10FLTR LL_HRTIM_TIM_GetEventFilter
4544 * @param HRTIMx High Resolution Timer instance
4545 * @param Timer This parameter can be one of the following values:
4546 * @arg @ref LL_HRTIM_TIMER_A
4547 * @arg @ref LL_HRTIM_TIMER_B
4548 * @arg @ref LL_HRTIM_TIMER_C
4549 * @arg @ref LL_HRTIM_TIMER_D
4550 * @arg @ref LL_HRTIM_TIMER_E
4551 * @param Event This parameter can be one of the following values:
4552 * @arg @ref LL_HRTIM_EVENT_1
4553 * @arg @ref LL_HRTIM_EVENT_2
4554 * @arg @ref LL_HRTIM_EVENT_3
4555 * @arg @ref LL_HRTIM_EVENT_4
4556 * @arg @ref LL_HRTIM_EVENT_5
4557 * @arg @ref LL_HRTIM_EVENT_6
4558 * @arg @ref LL_HRTIM_EVENT_7
4559 * @arg @ref LL_HRTIM_EVENT_8
4560 * @arg @ref LL_HRTIM_EVENT_9
4561 * @arg @ref LL_HRTIM_EVENT_10
4562 * @retval Filter This parameter can be one of the following values:
4563 * @arg @ref LL_HRTIM_EEFLTR_NONE
4564 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP1
4565 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP2
4566 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP3
4567 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP4
4568 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR1
4569 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR2
4570 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR3
4571 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR4
4572 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR5
4573 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR6
4574 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR7
4575 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR8
4576 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP2
4577 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP3
4578 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGTIM
4579 */
4580 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetEventFilter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event)
4581 {
4584 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].EEFxR1) +
4586 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EEFR1_EE1FLTR) << (REG_SHIFT_TAB_EExSRC[iEvent])) >> (REG_SHIFT_TAB_EExSRC[iEvent]));
4587 }
4589 /**
4590 * @brief Enable or disable event latch mechanism for a given timer.
4591 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4592 * EEFxR1 EE2LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4593 * EEFxR1 EE3LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4594 * EEFxR1 EE4LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4595 * EEFxR1 EE5LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4596 * EEFxR2 EE6LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4597 * EEFxR2 EE7LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4598 * EEFxR2 EE8LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4599 * EEFxR2 EE9LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4600 * EEFxR2 EE10LTCH LL_HRTIM_TIM_SetEventLatchStatus
4601 * @note This function must not be called when the timer counter is enabled.
4602 * @param HRTIMx High Resolution Timer instance
4603 * @param Timer This parameter can be one of the following values:
4604 * @arg @ref LL_HRTIM_TIMER_A
4605 * @arg @ref LL_HRTIM_TIMER_B
4606 * @arg @ref LL_HRTIM_TIMER_C
4607 * @arg @ref LL_HRTIM_TIMER_D
4608 * @arg @ref LL_HRTIM_TIMER_E
4609 * @param Event This parameter can be one of the following values:
4610 * @arg @ref LL_HRTIM_EVENT_1
4611 * @arg @ref LL_HRTIM_EVENT_2
4612 * @arg @ref LL_HRTIM_EVENT_3
4613 * @arg @ref LL_HRTIM_EVENT_4
4614 * @arg @ref LL_HRTIM_EVENT_5
4615 * @arg @ref LL_HRTIM_EVENT_6
4616 * @arg @ref LL_HRTIM_EVENT_7
4617 * @arg @ref LL_HRTIM_EVENT_8
4618 * @arg @ref LL_HRTIM_EVENT_9
4619 * @arg @ref LL_HRTIM_EVENT_10
4620 * @param LatchStatus This parameter can be one of the following values:
4621 * @arg @ref LL_HRTIM_EELATCH_DISABLED
4622 * @arg @ref LL_HRTIM_EELATCH_ENABLED
4623 * @retval None
4624 */
4625 __STATIC_INLINE void LL_HRTIM_TIM_SetEventLatchStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event,
4627 {
4630 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].EEFxR1) +
4632 MODIFY_REG(*pReg, (HRTIM_EEFR1_EE1LTCH << REG_SHIFT_TAB_EExSRC[iEvent]), (LatchStatus << REG_SHIFT_TAB_EExSRC[iEvent]));
4633 }
4635 /**
4636 * @brief Get actual event latch status for a given timer.
4637 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4638 * EEFxR1 EE2LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4639 * EEFxR1 EE3LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4640 * EEFxR1 EE4LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4641 * EEFxR1 EE5LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4642 * EEFxR2 EE6LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4643 * EEFxR2 EE7LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4644 * EEFxR2 EE8LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4645 * EEFxR2 EE9LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4646 * EEFxR2 EE10LTCH LL_HRTIM_TIM_GetEventLatchStatus
4647 * @param HRTIMx High Resolution Timer instance
4648 * @param Timer This parameter can be one of the following values:
4649 * @arg @ref LL_HRTIM_TIMER_A
4650 * @arg @ref LL_HRTIM_TIMER_B
4651 * @arg @ref LL_HRTIM_TIMER_C
4652 * @arg @ref LL_HRTIM_TIMER_D
4653 * @arg @ref LL_HRTIM_TIMER_E
4654 * @param Event This parameter can be one of the following values:
4655 * @arg @ref LL_HRTIM_EVENT_1
4656 * @arg @ref LL_HRTIM_EVENT_2
4657 * @arg @ref LL_HRTIM_EVENT_3
4658 * @arg @ref LL_HRTIM_EVENT_4
4659 * @arg @ref LL_HRTIM_EVENT_5
4660 * @arg @ref LL_HRTIM_EVENT_6
4661 * @arg @ref LL_HRTIM_EVENT_7
4662 * @arg @ref LL_HRTIM_EVENT_8
4663 * @arg @ref LL_HRTIM_EVENT_9
4664 * @arg @ref LL_HRTIM_EVENT_10
4665 * @retval LatchStatus This parameter can be one of the following values:
4666 * @arg @ref LL_HRTIM_EELATCH_DISABLED
4667 * @arg @ref LL_HRTIM_EELATCH_ENABLED
4668 */
4669 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetEventLatchStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event)
4670 {
4673 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].EEFxR1) +
4675 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EEFR1_EE1LTCH) << REG_SHIFT_TAB_EExSRC[iEvent]) >> (REG_SHIFT_TAB_EExSRC[iEvent]));
4676 }
4678 /**
4679 * @}
4680 */
4682 /** @defgroup HRTIM_LL_EF_Dead_Time_Configuration Dead_Time_Configuration
4683 * @{
4684 */
4686 /**
4687 * @brief Configure the dead time insertion feature for a given timer.
4688 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_Config\n
4689 * DTxR SDTF LL_HRTIM_DT_Config\n
4690 * DTxR SDRT LL_HRTIM_DT_Config
4691 * @param HRTIMx High Resolution Timer instance
4692 * @param Timer This parameter can be one of the following values:
4693 * @arg @ref LL_HRTIM_TIMER_A
4694 * @arg @ref LL_HRTIM_TIMER_B
4695 * @arg @ref LL_HRTIM_TIMER_C
4696 * @arg @ref LL_HRTIM_TIMER_D
4697 * @arg @ref LL_HRTIM_TIMER_E
4698 * @param Configuration This parameter must be a combination of all the following values:
4699 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8 or ... or @ref LL_HRTIM_DT_PRESCALER_DIV16
4700 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE or @ref LL_HRTIM_DT_RISING_NEGATIVE
4701 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE or @ref LL_HRTIM_DT_FALLING_NEGATIVE
4702 * @retval None
4703 */
4704 __STATIC_INLINE void LL_HRTIM_DT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Configuration)
4705 {
4710 }
4712 /**
4713 * @brief Set the deadtime prescaler value.
4714 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_SetPrescaler
4715 * @param HRTIMx High Resolution Timer instance
4716 * @param Timer This parameter can be one of the following values:
4717 * @arg @ref LL_HRTIM_TIMER_A
4718 * @arg @ref LL_HRTIM_TIMER_B
4719 * @arg @ref LL_HRTIM_TIMER_C
4720 * @arg @ref LL_HRTIM_TIMER_D
4721 * @arg @ref LL_HRTIM_TIMER_E
4722 * @param Prescaler This parameter can be one of the following values:
4723 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8
4724 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL4
4725 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL2
4726 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV1
4727 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV2
4728 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV4
4729 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV8
4730 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV16
4731 * @retval None
4732 */
4733 __STATIC_INLINE void LL_HRTIM_DT_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
4734 {
4739 }
4741 /**
4742 * @brief Get actual deadtime prescaler value.
4743 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_GetPrescaler
4744 * @param HRTIMx High Resolution Timer instance
4745 * @param Timer This parameter can be one of the following values:
4746 * @arg @ref LL_HRTIM_TIMER_A
4747 * @arg @ref LL_HRTIM_TIMER_B
4748 * @arg @ref LL_HRTIM_TIMER_C
4749 * @arg @ref LL_HRTIM_TIMER_D
4750 * @arg @ref LL_HRTIM_TIMER_E
4751 * @retval Prescaler This parameter can be one of the following values:
4752 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8
4753 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL4
4754 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL2
4755 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV1
4756 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV2
4757 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV4
4758 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV8
4759 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV16
4760 */
4762 {
4764 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].DTxR) +
4767 }
4769 /**
4770 * @brief Set the deadtime rising value.
4771 * @rmtoll DTxR DTR LL_HRTIM_DT_SetRisingValue
4772 * @param HRTIMx High Resolution Timer instance
4773 * @param Timer This parameter can be one of the following values:
4774 * @arg @ref LL_HRTIM_TIMER_A
4775 * @arg @ref LL_HRTIM_TIMER_B
4776 * @arg @ref LL_HRTIM_TIMER_C
4777 * @arg @ref LL_HRTIM_TIMER_D
4778 * @arg @ref LL_HRTIM_TIMER_E
4779 * @param RisingValue Value between 0 and 0x1FF
4780 * @retval None
4781 */
4782 __STATIC_INLINE void LL_HRTIM_DT_SetRisingValue(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t RisingValue)
4783 {
4788 }
4790 /**
4791 * @brief Get actual deadtime rising value.
4792 * @rmtoll DTxR DTR LL_HRTIM_DT_GetRisingValue
4793 * @param HRTIMx High Resolution Timer instance
4794 * @param Timer This parameter can be one of the following values:
4795 * @arg @ref LL_HRTIM_TIMER_A
4796 * @arg @ref LL_HRTIM_TIMER_B
4797 * @arg @ref LL_HRTIM_TIMER_C
4798 * @arg @ref LL_HRTIM_TIMER_D
4799 * @arg @ref LL_HRTIM_TIMER_E
4800 * @retval RisingValue Value between 0 and 0x1FF
4801 */
4803 {
4805 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].DTxR) +
4808 }
4810 /**
4811 * @brief Set the deadtime sign on rising edge.
4812 * @rmtoll DTxR SDTR LL_HRTIM_DT_SetRisingSign
4813 * @param HRTIMx High Resolution Timer instance
4814 * @param Timer This parameter can be one of the following values:
4815 * @arg @ref LL_HRTIM_TIMER_A
4816 * @arg @ref LL_HRTIM_TIMER_B
4817 * @arg @ref LL_HRTIM_TIMER_C
4818 * @arg @ref LL_HRTIM_TIMER_D
4819 * @arg @ref LL_HRTIM_TIMER_E
4820 * @param RisingSign This parameter can be one of the following values:
4821 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE
4822 * @arg @ref LL_HRTIM_DT_RISING_NEGATIVE
4823 * @retval None
4824 */
4825 __STATIC_INLINE void LL_HRTIM_DT_SetRisingSign(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t RisingSign)
4826 {
4831 }
4833 /**
4834 * @brief Get actual deadtime sign on rising edge.
4835 * @rmtoll DTxR SDTR LL_HRTIM_DT_GetRisingSign
4836 * @param HRTIMx High Resolution Timer instance
4837 * @param Timer This parameter can be one of the following values:
4838 * @arg @ref LL_HRTIM_TIMER_A
4839 * @arg @ref LL_HRTIM_TIMER_B
4840 * @arg @ref LL_HRTIM_TIMER_C
4841 * @arg @ref LL_HRTIM_TIMER_D
4842 * @arg @ref LL_HRTIM_TIMER_E
4843 * @retval RisingSign This parameter can be one of the following values:
4844 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE
4845 * @arg @ref LL_HRTIM_DT_RISING_NEGATIVE
4846 */
4848 {
4850 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].DTxR) +
4853 }
4855 /**
4856 * @brief Set the deadime falling value.
4857 * @rmtoll DTxR DTF LL_HRTIM_DT_SetFallingValue
4858 * @param HRTIMx High Resolution Timer instance
4859 * @param Timer This parameter can be one of the following values:
4860 * @arg @ref LL_HRTIM_TIMER_A
4861 * @arg @ref LL_HRTIM_TIMER_B
4862 * @arg @ref LL_HRTIM_TIMER_C
4863 * @arg @ref LL_HRTIM_TIMER_D
4864 * @arg @ref LL_HRTIM_TIMER_E
4865 * @param FallingValue Value between 0 and 0x1FF
4866 * @retval None
4867 */
4868 __STATIC_INLINE void LL_HRTIM_DT_SetFallingValue(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t FallingValue)
4869 {
4874 }
4876 /**
4877 * @brief Get actual deadtime falling value
4878 * @rmtoll DTxR DTF LL_HRTIM_DT_GetFallingValue
4879 * @param HRTIMx High Resolution Timer instance
4880 * @param Timer This parameter can be one of the following values:
4881 * @arg @ref LL_HRTIM_TIMER_A
4882 * @arg @ref LL_HRTIM_TIMER_B
4883 * @arg @ref LL_HRTIM_TIMER_C
4884 * @arg @ref LL_HRTIM_TIMER_D
4885 * @arg @ref LL_HRTIM_TIMER_E
4886 * @retval FallingValue Value between 0 and 0x1FF
4887 */
4889 {
4891 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].DTxR) +
4894 }
4896 /**
4897 * @brief Set the deadtime sign on falling edge.
4898 * @rmtoll DTxR SDTF LL_HRTIM_DT_SetFallingSign
4899 * @param HRTIMx High Resolution Timer instance
4900 * @param Timer This parameter can be one of the following values:
4901 * @arg @ref LL_HRTIM_TIMER_A
4902 * @arg @ref LL_HRTIM_TIMER_B
4903 * @arg @ref LL_HRTIM_TIMER_C
4904 * @arg @ref LL_HRTIM_TIMER_D
4905 * @arg @ref LL_HRTIM_TIMER_E
4906 * @param FallingSign This parameter can be one of the following values:
4907 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE
4908 * @arg @ref LL_HRTIM_DT_FALLING_NEGATIVE
4909 * @retval None
4910 */
4911 __STATIC_INLINE void LL_HRTIM_DT_SetFallingSign(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t FallingSign)
4912 {
4917 }
4919 /**
4920 * @brief Get actual deadtime sign on falling edge.
4921 * @rmtoll DTxR SDTF LL_HRTIM_DT_GetFallingSign
4922 * @param HRTIMx High Resolution Timer instance
4923 * @param Timer This parameter can be one of the following values:
4924 * @arg @ref LL_HRTIM_TIMER_A
4925 * @arg @ref LL_HRTIM_TIMER_B
4926 * @arg @ref LL_HRTIM_TIMER_C
4927 * @arg @ref LL_HRTIM_TIMER_D
4928 * @arg @ref LL_HRTIM_TIMER_E
4929 * @retval FallingSign This parameter can be one of the following values:
4930 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE
4931 * @arg @ref LL_HRTIM_DT_FALLING_NEGATIVE
4932 */
4934 {
4936 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].DTxR) +
4939 }
4941 /**
4942 * @brief Lock the deadtime value and sign on rising edge.
4943 * @rmtoll DTxR DTRLK LL_HRTIM_DT_LockRising
4944 * @param HRTIMx High Resolution Timer instance
4945 * @param Timer This parameter can be one of the following values:
4946 * @arg @ref LL_HRTIM_TIMER_A
4947 * @arg @ref LL_HRTIM_TIMER_B
4948 * @arg @ref LL_HRTIM_TIMER_C
4949 * @arg @ref LL_HRTIM_TIMER_D
4950 * @arg @ref LL_HRTIM_TIMER_E
4951 * @retval None
4952 */
4954 {
4959 }
4961 /**
4962 * @brief Lock the deadtime sign on rising edge.
4963 * @rmtoll DTxR DTRSLK LL_HRTIM_DT_LockRisingSign
4964 * @param HRTIMx High Resolution Timer instance
4965 * @param Timer This parameter can be one of the following values:
4966 * @arg @ref LL_HRTIM_TIMER_A
4967 * @arg @ref LL_HRTIM_TIMER_B
4968 * @arg @ref LL_HRTIM_TIMER_C
4969 * @arg @ref LL_HRTIM_TIMER_D
4970 * @arg @ref LL_HRTIM_TIMER_E
4971 * @retval None
4972 */
4974 {
4979 }
4981 /**
4982 * @brief Lock the deadtime value and sign on falling edge.
4983 * @rmtoll DTxR DTFLK LL_HRTIM_DT_LockFalling
4984 * @param HRTIMx High Resolution Timer instance
4985 * @param Timer This parameter can be one of the following values:
4986 * @arg @ref LL_HRTIM_TIMER_A
4987 * @arg @ref LL_HRTIM_TIMER_B
4988 * @arg @ref LL_HRTIM_TIMER_C
4989 * @arg @ref LL_HRTIM_TIMER_D
4990 * @arg @ref LL_HRTIM_TIMER_E
4991 * @retval None
4992 */
4994 {
4999 }
5001 /**
5002 * @brief Lock the deadtime sign on falling edge.
5003 * @rmtoll DTxR DTFSLK LL_HRTIM_DT_LockFallingSign
5004 * @param HRTIMx High Resolution Timer instance
5005 * @param Timer This parameter can be one of the following values:
5006 * @arg @ref LL_HRTIM_TIMER_A
5007 * @arg @ref LL_HRTIM_TIMER_B
5008 * @arg @ref LL_HRTIM_TIMER_C
5009 * @arg @ref LL_HRTIM_TIMER_D
5010 * @arg @ref LL_HRTIM_TIMER_E
5011 * @retval None
5012 */
5014 {
5019 }
5021 /**
5022 * @}
5023 */
5025 /** @defgroup HRTIM_LL_EF_Chopper_Mode_Configuration Chopper_Mode_Configuration
5026 * @{
5027 */
5029 /**
5030 * @brief Configure the chopper stage for a given timer.
5031 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_Config\n
5032 * CHPxR CARDTY LL_HRTIM_CHP_Config\n
5033 * CHPxR STRTPW LL_HRTIM_CHP_Config
5034 * @note This function must not be called if the chopper mode is already
5035 * enabled for one of the timer outputs.
5036 * @param HRTIMx High Resolution Timer instance
5037 * @param Timer This parameter can be one of the following values:
5038 * @arg @ref LL_HRTIM_TIMER_A
5039 * @arg @ref LL_HRTIM_TIMER_B
5040 * @arg @ref LL_HRTIM_TIMER_C
5041 * @arg @ref LL_HRTIM_TIMER_D
5042 * @arg @ref LL_HRTIM_TIMER_E
5043 * @param Configuration This parameter must be a combination of all the following values:
5044 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16 or ... or @ref LL_HRTIM_CHP_PRESCALER_DIV256
5045 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0 or ... or @ref LL_HRTIM_CHP_DUTYCYCLE_875
5046 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16 or ... or @ref LL_HRTIM_CHP_PULSEWIDTH_256
5047 * @retval None
5048 */
5049 __STATIC_INLINE void LL_HRTIM_CHP_Config(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Configuration)
5050 {
5055 }
5057 /**
5058 * @brief Set prescaler determining the carrier frequency to be added on top
5059 * of the timer output signals when chopper mode is enabled.
5060 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_SetPrescaler
5061 * @note This function must not be called if the chopper mode is already
5062 * enabled for one of the timer outputs.
5063 * @param HRTIMx High Resolution Timer instance
5064 * @param Timer This parameter can be one of the following values:
5065 * @arg @ref LL_HRTIM_TIMER_A
5066 * @arg @ref LL_HRTIM_TIMER_B
5067 * @arg @ref LL_HRTIM_TIMER_C
5068 * @arg @ref LL_HRTIM_TIMER_D
5069 * @arg @ref LL_HRTIM_TIMER_E
5070 * @param Prescaler This parameter can be one of the following values:
5071 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16
5072 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV32
5073 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV48
5074 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV64
5075 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV80
5076 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV96
5077 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV112
5078 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV128
5079 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV144
5080 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV160
5081 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV176
5082 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV192
5083 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV208
5084 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV224
5085 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV240
5086 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV256
5087 * @retval None
5088 */
5089 __STATIC_INLINE void LL_HRTIM_CHP_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
5090 {
5095 }
5097 /**
5098 * @brief Get actual chopper stage prescaler value.
5099 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_GetPrescaler
5100 * @param HRTIMx High Resolution Timer instance
5101 * @param Timer This parameter can be one of the following values:
5102 * @arg @ref LL_HRTIM_TIMER_A
5103 * @arg @ref LL_HRTIM_TIMER_B
5104 * @arg @ref LL_HRTIM_TIMER_C
5105 * @arg @ref LL_HRTIM_TIMER_D
5106 * @arg @ref LL_HRTIM_TIMER_E
5107 * @retval Prescaler This parameter can be one of the following values:
5108 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16
5109 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV32
5110 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV48
5111 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV64
5112 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV80
5113 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV96
5114 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV112
5115 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV128
5116 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV144
5117 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV160
5118 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV176
5119 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV192
5120 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV208
5121 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV224
5122 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV240
5123 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV256
5124 */
5126 {
5128 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CHPxR) +
5131 }
5133 /**
5134 * @brief Set the chopper duty cycle.
5135 * @rmtoll CHPxR CARDTY LL_HRTIM_CHP_SetDutyCycle
5136 * @note Duty cycle can be adjusted by 1/8 step (from 0/8 up to 7/8)
5137 * @note This function must not be called if the chopper mode is already
5138 * enabled for one of the timer outputs.
5139 * @param HRTIMx High Resolution Timer instance
5140 * @param Timer This parameter can be one of the following values:
5141 * @arg @ref LL_HRTIM_TIMER_A
5142 * @arg @ref LL_HRTIM_TIMER_B
5143 * @arg @ref LL_HRTIM_TIMER_C
5144 * @arg @ref LL_HRTIM_TIMER_D
5145 * @arg @ref LL_HRTIM_TIMER_E
5146 * @param DutyCycle This parameter can be one of the following values:
5147 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0
5148 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_125
5149 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_250
5150 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_375
5151 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_500
5152 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_625
5153 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_750
5154 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_875
5155 * @retval None
5156 */
5157 __STATIC_INLINE void LL_HRTIM_CHP_SetDutyCycle(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DutyCycle)
5158 {
5163 }
5165 /**
5166 * @brief Get actual chopper duty cycle.
5167 * @rmtoll CHPxR CARDTY LL_HRTIM_CHP_GetDutyCycle
5168 * @param HRTIMx High Resolution Timer instance
5169 * @param Timer This parameter can be one of the following values:
5170 * @arg @ref LL_HRTIM_TIMER_A
5171 * @arg @ref LL_HRTIM_TIMER_B
5172 * @arg @ref LL_HRTIM_TIMER_C
5173 * @arg @ref LL_HRTIM_TIMER_D
5174 * @arg @ref LL_HRTIM_TIMER_E
5175 * @retval DutyCycle This parameter can be one of the following values:
5176 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0
5177 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_125
5178 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_250
5179 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_375
5180 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_500
5181 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_625
5182 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_750
5183 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_875
5184 */
5186 {
5188 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CHPxR) +
5191 }
5193 /**
5194 * @brief Set the start pulse width.
5195 * @rmtoll CHPxR STRPW LL_HRTIM_CHP_SetPulseWidth
5196 * @note This function must not be called if the chopper mode is already
5197 * enabled for one of the timer outputs.
5198 * @param HRTIMx High Resolution Timer instance
5199 * @param Timer This parameter can be one of the following values:
5200 * @arg @ref LL_HRTIM_TIMER_A
5201 * @arg @ref LL_HRTIM_TIMER_B
5202 * @arg @ref LL_HRTIM_TIMER_C
5203 * @arg @ref LL_HRTIM_TIMER_D
5204 * @arg @ref LL_HRTIM_TIMER_E
5205 * @param PulseWidth This parameter can be one of the following values:
5206 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16
5207 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_32
5208 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_48
5209 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_64
5210 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_80
5211 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_96
5212 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_112
5213 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_128
5214 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_144
5215 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_160
5216 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_176
5217 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_192
5218 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_208
5219 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_224
5220 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_240
5221 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_256
5222 * @retval None
5223 */
5224 __STATIC_INLINE void LL_HRTIM_CHP_SetPulseWidth(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t PulseWidth)
5225 {
5230 }
5232 /**
5233 * @brief Get actual start pulse width.
5234 * @rmtoll CHPxR STRPW LL_HRTIM_CHP_GetPulseWidth
5235 * @param HRTIMx High Resolution Timer instance
5236 * @param Timer This parameter can be one of the following values:
5237 * @arg @ref LL_HRTIM_TIMER_A
5238 * @arg @ref LL_HRTIM_TIMER_B
5239 * @arg @ref LL_HRTIM_TIMER_C
5240 * @arg @ref LL_HRTIM_TIMER_D
5241 * @arg @ref LL_HRTIM_TIMER_E
5242 * @retval PulseWidth This parameter can be one of the following values:
5243 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16
5244 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_32
5245 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_48
5246 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_64
5247 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_80
5248 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_96
5249 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_112
5250 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_128
5251 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_144
5252 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_160
5253 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_176
5254 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_192
5255 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_208
5256 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_224
5257 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_240
5258 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_256
5259 */
5261 {
5263 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CHPxR) +
5266 }
5268 /**
5269 * @}
5270 */
5272 /** @defgroup HRTIM_LL_EF_Output_Management Output_Management
5273 * @{
5274 */
5276 /**
5277 * @brief Set the timer output set source.
5278 * @rmtoll SETx1R SST LL_HRTIM_OUT_SetOutputSetSrc\n
5279 * SETx1R RESYNC LL_HRTIM_OUT_SetOutputSetSrc\n
5280 * SETx1R PER LL_HRTIM_OUT_SetOutputSetSrc\n
5281 * SETx1R CMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5282 * SETx1R CMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5283 * SETx1R CMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5284 * SETx1R CMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5285 * SETx1R MSTPER LL_HRTIM_OUT_SetOutputSetSrc\n
5286 * SETx1R MSTCMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5287 * SETx1R MSTCMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5288 * SETx1R MSTCMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5289 * SETx1R MSTCMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5290 * SETx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5291 * SETx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5292 * SETx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5293 * SETx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5294 * SETx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5295 * SETx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5296 * SETx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5297 * SETx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5298 * SETx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5299 * SETx1R EXEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5300 * SETx1R EXEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5301 * SETx1R EXEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5302 * SETx1R EXEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5303 * SETx1R EXEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5304 * SETx1R EXEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5305 * SETx1R EXEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5306 * SETx1R EXEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5307 * SETx1R EXEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5308 * SETx1R EXEVNT10 LL_HRTIM_OUT_SetOutputSetSrc\n
5309 * SETx1R UPDATE LL_HRTIM_OUT_SetOutputSetSrc\n
5310 * SETx1R SST LL_HRTIM_OUT_SetOutputSetSrc\n
5311 * SETx1R RESYNC LL_HRTIM_OUT_SetOutputSetSrc\n
5312 * SETx1R PER LL_HRTIM_OUT_SetOutputSetSrc\n
5313 * SETx1R CMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5314 * SETx1R CMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5315 * SETx1R CMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5316 * SETx1R CMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5317 * SETx1R MSTPER LL_HRTIM_OUT_SetOutputSetSrc\n
5318 * SETx1R MSTCMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5319 * SETx1R MSTCMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5320 * SETx1R MSTCMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5321 * SETx1R MSTCMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5322 * SETx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5323 * SETx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5324 * SETx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5325 * SETx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5326 * SETx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5327 * SETx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5328 * SETx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5329 * SETx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5330 * SETx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5331 * SETx1R EXEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5332 * SETx1R EXEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5333 * SETx1R EXEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5334 * SETx1R EXEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5335 * SETx1R EXEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5336 * SETx1R EXEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5337 * SETx1R EXEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5338 * SETx1R EXEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5339 * SETx1R EXEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5340 * SETx1R EXEVNT10 LL_HRTIM_OUT_SetOutputSetSrc\n
5341 * SETx1R UPDATE LL_HRTIM_OUT_SetOutputSetSrc
5342 * @param HRTIMx High Resolution Timer instance
5343 * @param Output This parameter can be one of the following values:
5344 * @arg @ref LL_HRTIM_OUTPUT_TA1
5345 * @arg @ref LL_HRTIM_OUTPUT_TA2
5346 * @arg @ref LL_HRTIM_OUTPUT_TB1
5347 * @arg @ref LL_HRTIM_OUTPUT_TB2
5348 * @arg @ref LL_HRTIM_OUTPUT_TC1
5349 * @arg @ref LL_HRTIM_OUTPUT_TC2
5350 * @arg @ref LL_HRTIM_OUTPUT_TD1
5351 * @arg @ref LL_HRTIM_OUTPUT_TD2
5352 * @arg @ref LL_HRTIM_OUTPUT_TE1
5353 * @arg @ref LL_HRTIM_OUTPUT_TE2
5354 * @param SetSrc This parameter can be a combination of the following values:
5355 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5356 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5357 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5358 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5359 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5360 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5361 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5362 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5363 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5364 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5365 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5366 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5367 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5368 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5369 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5370 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5371 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5372 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5373 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5374 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5375 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5376 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5377 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5378 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5379 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5380 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5381 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5382 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5383 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5384 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5385 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5386 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5387 * @retval None
5388 */
5389 __STATIC_INLINE void LL_HRTIM_OUT_SetOutputSetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t SetSrc)
5390 {
5392 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].SETx1R) +
5395 }
5397 /**
5398 * @brief Get the timer output set source.
5399 * @rmtoll SETx1R SST LL_HRTIM_OUT_GetOutputSetSrc\n
5400 * SETx1R RESYNC LL_HRTIM_OUT_GetOutputSetSrc\n
5401 * SETx1R PER LL_HRTIM_OUT_GetOutputSetSrc\n
5402 * SETx1R CMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5403 * SETx1R CMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5404 * SETx1R CMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5405 * SETx1R CMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5406 * SETx1R MSTPER LL_HRTIM_OUT_GetOutputSetSrc\n
5407 * SETx1R MSTCMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5408 * SETx1R MSTCMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5409 * SETx1R MSTCMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5410 * SETx1R MSTCMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5411 * SETx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5412 * SETx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5413 * SETx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5414 * SETx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5415 * SETx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5416 * SETx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5417 * SETx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5418 * SETx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5419 * SETx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5420 * SETx1R EXEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5421 * SETx1R EXEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5422 * SETx1R EXEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5423 * SETx1R EXEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5424 * SETx1R EXEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5425 * SETx1R EXEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5426 * SETx1R EXEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5427 * SETx1R EXEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5428 * SETx1R EXEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5429 * SETx1R EXEVNT10 LL_HRTIM_OUT_GetOutputSetSrc\n
5430 * SETx1R UPDATE LL_HRTIM_OUT_GetOutputSetSrc\n
5431 * SETx1R SST LL_HRTIM_OUT_GetOutputSetSrc\n
5432 * SETx1R RESYNC LL_HRTIM_OUT_GetOutputSetSrc\n
5433 * SETx1R PER LL_HRTIM_OUT_GetOutputSetSrc\n
5434 * SETx1R CMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5435 * SETx1R CMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5436 * SETx1R CMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5437 * SETx1R CMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5438 * SETx1R MSTPER LL_HRTIM_OUT_GetOutputSetSrc\n
5439 * SETx1R MSTCMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5440 * SETx1R MSTCMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5441 * SETx1R MSTCMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5442 * SETx1R MSTCMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5443 * SETx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5444 * SETx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5445 * SETx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5446 * SETx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5447 * SETx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5448 * SETx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5449 * SETx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5450 * SETx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5451 * SETx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5452 * SETx1R EXEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5453 * SETx1R EXEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5454 * SETx1R EXEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5455 * SETx1R EXEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5456 * SETx1R EXEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5457 * SETx1R EXEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5458 * SETx1R EXEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5459 * SETx1R EXEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5460 * SETx1R EXEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5461 * SETx1R EXEVNT10 LL_HRTIM_OUT_GetOutputSetSrc\n
5462 * SETx1R UPDATE LL_HRTIM_OUT_GetOutputSetSrc
5463 * @param HRTIMx High Resolution Timer instance
5464 * @param Output This parameter can be one of the following values:
5465 * @arg @ref LL_HRTIM_OUTPUT_TA1
5466 * @arg @ref LL_HRTIM_OUTPUT_TA2
5467 * @arg @ref LL_HRTIM_OUTPUT_TB1
5468 * @arg @ref LL_HRTIM_OUTPUT_TB2
5469 * @arg @ref LL_HRTIM_OUTPUT_TC1
5470 * @arg @ref LL_HRTIM_OUTPUT_TC2
5471 * @arg @ref LL_HRTIM_OUTPUT_TD1
5472 * @arg @ref LL_HRTIM_OUTPUT_TD2
5473 * @arg @ref LL_HRTIM_OUTPUT_TE1
5474 * @arg @ref LL_HRTIM_OUTPUT_TE2
5475 * @retval SetSrc This parameter can be a combination of the following values:
5476 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5477 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5478 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5479 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5480 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5481 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5482 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5483 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5484 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5485 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5486 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5487 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5488 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5489 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5490 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5491 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5492 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5493 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5494 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5495 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5496 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5497 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5498 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5499 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5500 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5501 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5502 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5503 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5504 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5505 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5506 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5507 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5508 */
5510 {
5512 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].SETx1R) +
5515 }
5517 /**
5518 * @brief Set the timer output reset source.
5519 * @rmtoll RSTx1R RST LL_HRTIM_OUT_SetOutputResetSrc\n
5520 * RSTx1R RESYNC LL_HRTIM_OUT_SetOutputResetSrc\n
5521 * RSTx1R PER LL_HRTIM_OUT_SetOutputResetSrc\n
5522 * RSTx1R CMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5523 * RSTx1R CMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5524 * RSTx1R CMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5525 * RSTx1R CMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5526 * RSTx1R MSTPER LL_HRTIM_OUT_SetOutputResetSrc\n
5527 * RSTx1R MSTCMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5528 * RSTx1R MSTCMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5529 * RSTx1R MSTCMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5530 * RSTx1R MSTCMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5531 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5532 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5533 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5534 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5535 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5536 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5537 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5538 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5539 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5540 * RSTx1R EXEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5541 * RSTx1R EXEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5542 * RSTx1R EXEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5543 * RSTx1R EXEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5544 * RSTx1R EXEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5545 * RSTx1R EXEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5546 * RSTx1R EXEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5547 * RSTx1R EXEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5548 * RSTx1R EXEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5549 * RSTx1R EXEVNT10 LL_HRTIM_OUT_SetOutputResetSrc\n
5550 * RSTx1R UPDATE LL_HRTIM_OUT_SetOutputResetSrc\n
5551 * RSTx1R RST LL_HRTIM_OUT_SetOutputResetSrc\n
5552 * RSTx1R RESYNC LL_HRTIM_OUT_SetOutputResetSrc\n
5553 * RSTx1R PER LL_HRTIM_OUT_SetOutputResetSrc\n
5554 * RSTx1R CMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5555 * RSTx1R CMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5556 * RSTx1R CMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5557 * RSTx1R CMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5558 * RSTx1R MSTPER LL_HRTIM_OUT_SetOutputResetSrc\n
5559 * RSTx1R MSTCMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5560 * RSTx1R MSTCMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5561 * RSTx1R MSTCMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5562 * RSTx1R MSTCMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5563 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5564 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5565 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5566 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5567 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5568 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5569 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5570 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5571 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5572 * RSTx1R EXEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5573 * RSTx1R EXEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5574 * RSTx1R EXEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5575 * RSTx1R EXEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5576 * RSTx1R EXEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5577 * RSTx1R EXEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5578 * RSTx1R EXEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5579 * RSTx1R EXEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5580 * RSTx1R EXEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5581 * RSTx1R EXEVNT10 LL_HRTIM_OUT_SetOutputResetSrc\n
5582 * RSTx1R UPDATE LL_HRTIM_OUT_SetOutputResetSrc
5583 * @param HRTIMx High Resolution Timer instance
5584 * @param Output This parameter can be one of the following values:
5585 * @arg @ref LL_HRTIM_OUTPUT_TA1
5586 * @arg @ref LL_HRTIM_OUTPUT_TA2
5587 * @arg @ref LL_HRTIM_OUTPUT_TB1
5588 * @arg @ref LL_HRTIM_OUTPUT_TB2
5589 * @arg @ref LL_HRTIM_OUTPUT_TC1
5590 * @arg @ref LL_HRTIM_OUTPUT_TC2
5591 * @arg @ref LL_HRTIM_OUTPUT_TD1
5592 * @arg @ref LL_HRTIM_OUTPUT_TD2
5593 * @arg @ref LL_HRTIM_OUTPUT_TE1
5594 * @arg @ref LL_HRTIM_OUTPUT_TE2
5595 * @param ResetSrc This parameter can be a combination of the following values:
5596 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5597 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5598 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5599 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5600 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5601 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5602 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5603 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5604 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5605 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5606 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5607 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5608 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5609 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5610 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5611 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5612 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5613 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5614 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5615 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5616 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5617 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5618 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5619 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5620 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5621 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5622 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5623 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5624 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5625 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5626 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5627 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5628 * @retval None
5629 */
5630 __STATIC_INLINE void LL_HRTIM_OUT_SetOutputResetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t ResetSrc)
5631 {
5633 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].RSTx1R) +
5636 }
5638 /**
5639 * @brief Get the timer output set source.
5640 * @rmtoll RSTx1R RST LL_HRTIM_OUT_GetOutputResetSrc\n
5641 * RSTx1R RESYNC LL_HRTIM_OUT_GetOutputResetSrc\n
5642 * RSTx1R PER LL_HRTIM_OUT_GetOutputResetSrc\n
5643 * RSTx1R CMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5644 * RSTx1R CMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5645 * RSTx1R CMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5646 * RSTx1R CMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5647 * RSTx1R MSTPER LL_HRTIM_OUT_GetOutputResetSrc\n
5648 * RSTx1R MSTCMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5649 * RSTx1R MSTCMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5650 * RSTx1R MSTCMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5651 * RSTx1R MSTCMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5652 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5653 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5654 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5655 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5656 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5657 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5658 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5659 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5660 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5661 * RSTx1R EXEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5662 * RSTx1R EXEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5663 * RSTx1R EXEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5664 * RSTx1R EXEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5665 * RSTx1R EXEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5666 * RSTx1R EXEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5667 * RSTx1R EXEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5668 * RSTx1R EXEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5669 * RSTx1R EXEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5670 * RSTx1R EXEVNT10 LL_HRTIM_OUT_GetOutputResetSrc\n
5671 * RSTx1R UPDATE LL_HRTIM_OUT_GetOutputResetSrc\n
5672 * RSTx1R RST LL_HRTIM_OUT_GetOutputResetSrc\n
5673 * RSTx1R RESYNC LL_HRTIM_OUT_GetOutputResetSrc\n
5674 * RSTx1R PER LL_HRTIM_OUT_GetOutputResetSrc\n
5675 * RSTx1R CMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5676 * RSTx1R CMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5677 * RSTx1R CMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5678 * RSTx1R CMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5679 * RSTx1R MSTPER LL_HRTIM_OUT_GetOutputResetSrc\n
5680 * RSTx1R MSTCMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5681 * RSTx1R MSTCMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5682 * RSTx1R MSTCMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5683 * RSTx1R MSTCMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5684 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5685 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5686 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5687 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5688 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5689 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5690 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5691 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5692 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5693 * RSTx1R EXEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5694 * RSTx1R EXEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5695 * RSTx1R EXEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5696 * RSTx1R EXEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5697 * RSTx1R EXEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5698 * RSTx1R EXEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5699 * RSTx1R EXEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5700 * RSTx1R EXEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5701 * RSTx1R EXEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5702 * RSTx1R EXEVNT10 LL_HRTIM_OUT_GetOutputResetSrc\n
5703 * RSTx1R UPDATE LL_HRTIM_OUT_GetOutputResetSrc
5704 * @param HRTIMx High Resolution Timer instance
5705 * @param Output This parameter can be one of the following values:
5706 * @arg @ref LL_HRTIM_OUTPUT_TA1
5707 * @arg @ref LL_HRTIM_OUTPUT_TA2
5708 * @arg @ref LL_HRTIM_OUTPUT_TB1
5709 * @arg @ref LL_HRTIM_OUTPUT_TB2
5710 * @arg @ref LL_HRTIM_OUTPUT_TC1
5711 * @arg @ref LL_HRTIM_OUTPUT_TC2
5712 * @arg @ref LL_HRTIM_OUTPUT_TD1
5713 * @arg @ref LL_HRTIM_OUTPUT_TD2
5714 * @arg @ref LL_HRTIM_OUTPUT_TE1
5715 * @arg @ref LL_HRTIM_OUTPUT_TE2
5716 * @retval ResetSrc This parameter can be a combination of the following values:
5717 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5718 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5719 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5720 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5721 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5722 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5723 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5724 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5725 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5726 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5727 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5728 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5729 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5730 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5731 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5732 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5733 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5734 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5735 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5736 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5737 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5738 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5739 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5740 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5741 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5742 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5743 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5744 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5745 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5746 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5747 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5748 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5749 */
5750 __STATIC_INLINE uint32_t LL_HRTIM_OUT_GetOutputResetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output)
5751 {
5753 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].RSTx1R) +
5756 }
5758 /**
5759 * @brief Configure a timer output.
5760 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_Config\n
5761 * OUTxR IDLEM1 LL_HRTIM_OUT_Config\n
5762 * OUTxR IDLES1 LL_HRTIM_OUT_Config\n
5763 * OUTxR FAULT1 LL_HRTIM_OUT_Config\n
5764 * OUTxR CHP1 LL_HRTIM_OUT_Config\n
5765 * OUTxR DIDL1 LL_HRTIM_OUT_Config\n
5766 * OUTxR POL2 LL_HRTIM_OUT_Config\n
5767 * OUTxR IDLEM2 LL_HRTIM_OUT_Config\n
5768 * OUTxR IDLES2 LL_HRTIM_OUT_Config\n
5769 * OUTxR FAULT2 LL_HRTIM_OUT_Config\n
5770 * OUTxR CHP2 LL_HRTIM_OUT_Config\n
5771 * OUTxR DIDL2 LL_HRTIM_OUT_Config
5772 * @param HRTIMx High Resolution Timer instance
5773 * @param Output This parameter can be one of the following values:
5774 * @arg @ref LL_HRTIM_OUTPUT_TA1
5775 * @arg @ref LL_HRTIM_OUTPUT_TA2
5776 * @arg @ref LL_HRTIM_OUTPUT_TB1
5777 * @arg @ref LL_HRTIM_OUTPUT_TB2
5778 * @arg @ref LL_HRTIM_OUTPUT_TC1
5779 * @arg @ref LL_HRTIM_OUTPUT_TC2
5780 * @arg @ref LL_HRTIM_OUTPUT_TD1
5781 * @arg @ref LL_HRTIM_OUTPUT_TD2
5782 * @arg @ref LL_HRTIM_OUTPUT_TE1
5783 * @arg @ref LL_HRTIM_OUTPUT_TE2
5784 * @param Configuration This parameter must be a combination of all the following values:
5785 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY or @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5786 * @arg @ref LL_HRTIM_OUT_NO_IDLE or @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5787 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE or @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
5788 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION or @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE or @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE or @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
5789 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED or @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
5790 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR or @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
5791 * @retval None
5792 */
5793 __STATIC_INLINE void LL_HRTIM_OUT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t Configuration)
5794 {
5800 }
5802 /**
5803 * @brief Set the polarity of a timer output.
5804 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_SetPolarity\n
5805 * OUTxR POL2 LL_HRTIM_OUT_SetPolarity
5806 * @param HRTIMx High Resolution Timer instance
5807 * @param Output This parameter can be one of the following values:
5808 * @arg @ref LL_HRTIM_OUTPUT_TA1
5809 * @arg @ref LL_HRTIM_OUTPUT_TA2
5810 * @arg @ref LL_HRTIM_OUTPUT_TB1
5811 * @arg @ref LL_HRTIM_OUTPUT_TB2
5812 * @arg @ref LL_HRTIM_OUTPUT_TC1
5813 * @arg @ref LL_HRTIM_OUTPUT_TC2
5814 * @arg @ref LL_HRTIM_OUTPUT_TD1
5815 * @arg @ref LL_HRTIM_OUTPUT_TD2
5816 * @arg @ref LL_HRTIM_OUTPUT_TE1
5817 * @arg @ref LL_HRTIM_OUTPUT_TE2
5818 * @param Polarity This parameter can be one of the following values:
5819 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY
5820 * @arg @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5821 * @retval None
5822 */
5823 __STATIC_INLINE void LL_HRTIM_OUT_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t Polarity)
5824 {
5828 MODIFY_REG(*pReg, (HRTIM_OUTR_POL1 << REG_SHIFT_TAB_OUTxR[iOutput]), (Polarity << REG_SHIFT_TAB_OUTxR[iOutput]));
5829 }
5831 /**
5832 * @brief Get actual polarity of the timer output.
5833 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_GetPolarity\n
5834 * OUTxR POL2 LL_HRTIM_OUT_GetPolarity
5835 * @param HRTIMx High Resolution Timer instance
5836 * @param Output This parameter can be one of the following values:
5837 * @arg @ref LL_HRTIM_OUTPUT_TA1
5838 * @arg @ref LL_HRTIM_OUTPUT_TA2
5839 * @arg @ref LL_HRTIM_OUTPUT_TB1
5840 * @arg @ref LL_HRTIM_OUTPUT_TB2
5841 * @arg @ref LL_HRTIM_OUTPUT_TC1
5842 * @arg @ref LL_HRTIM_OUTPUT_TC2
5843 * @arg @ref LL_HRTIM_OUTPUT_TD1
5844 * @arg @ref LL_HRTIM_OUTPUT_TD2
5845 * @arg @ref LL_HRTIM_OUTPUT_TE1
5846 * @arg @ref LL_HRTIM_OUTPUT_TE2
5847 * @retval Polarity This parameter can be one of the following values:
5848 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY
5849 * @arg @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5850 */
5852 {
5854 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
5856 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_POL1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
5857 }
5859 /**
5860 * @brief Set the output IDLE mode.
5861 * @rmtoll OUTxR IDLEM1 LL_HRTIM_OUT_SetIdleMode\n
5862 * OUTxR IDLEM2 LL_HRTIM_OUT_SetIdleMode
5863 * @note This function must not be called when the burst mode is active
5864 * @param HRTIMx High Resolution Timer instance
5865 * @param Output This parameter can be one of the following values:
5866 * @arg @ref LL_HRTIM_OUTPUT_TA1
5867 * @arg @ref LL_HRTIM_OUTPUT_TA2
5868 * @arg @ref LL_HRTIM_OUTPUT_TB1
5869 * @arg @ref LL_HRTIM_OUTPUT_TB2
5870 * @arg @ref LL_HRTIM_OUTPUT_TC1
5871 * @arg @ref LL_HRTIM_OUTPUT_TC2
5872 * @arg @ref LL_HRTIM_OUTPUT_TD1
5873 * @arg @ref LL_HRTIM_OUTPUT_TD2
5874 * @arg @ref LL_HRTIM_OUTPUT_TE1
5875 * @arg @ref LL_HRTIM_OUTPUT_TE2
5876 * @param IdleMode This parameter can be one of the following values:
5877 * @arg @ref LL_HRTIM_OUT_NO_IDLE
5878 * @arg @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5879 * @retval None
5880 */
5881 __STATIC_INLINE void LL_HRTIM_OUT_SetIdleMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t IdleMode)
5882 {
5886 MODIFY_REG(*pReg, (HRTIM_OUTR_IDLM1 << (REG_SHIFT_TAB_OUTxR[iOutput])), (IdleMode << (REG_SHIFT_TAB_OUTxR[iOutput])));
5887 }
5889 /**
5890 * @brief Get actual output IDLE mode.
5891 * @rmtoll OUTxR IDLEM1 LL_HRTIM_OUT_GetIdleMode\n
5892 * OUTxR IDLEM2 LL_HRTIM_OUT_GetIdleMode
5893 * @param HRTIMx High Resolution Timer instance
5894 * @param Output This parameter can be one of the following values:
5895 * @arg @ref LL_HRTIM_OUTPUT_TA1
5896 * @arg @ref LL_HRTIM_OUTPUT_TA2
5897 * @arg @ref LL_HRTIM_OUTPUT_TB1
5898 * @arg @ref LL_HRTIM_OUTPUT_TB2
5899 * @arg @ref LL_HRTIM_OUTPUT_TC1
5900 * @arg @ref LL_HRTIM_OUTPUT_TC2
5901 * @arg @ref LL_HRTIM_OUTPUT_TD1
5902 * @arg @ref LL_HRTIM_OUTPUT_TD2
5903 * @arg @ref LL_HRTIM_OUTPUT_TE1
5904 * @arg @ref LL_HRTIM_OUTPUT_TE2
5905 * @retval IdleMode This parameter can be one of the following values:
5906 * @arg @ref LL_HRTIM_OUT_NO_IDLE
5907 * @arg @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5908 */
5910 {
5912 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
5914 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_IDLM1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
5915 }
5917 /**
5918 * @brief Set the output IDLE level.
5919 * @rmtoll OUTxR IDLES1 LL_HRTIM_OUT_SetIdleLevel\n
5920 * OUTxR IDLES2 LL_HRTIM_OUT_SetIdleLevel
5921 * @note This function must be called prior enabling the timer.
5922 * @note Idle level isn't relevant when the output idle mode is set to LL_HRTIM_OUT_NO_IDLE.
5923 * @param HRTIMx High Resolution Timer instance
5924 * @param Output This parameter can be one of the following values:
5925 * @arg @ref LL_HRTIM_OUTPUT_TA1
5926 * @arg @ref LL_HRTIM_OUTPUT_TA2
5927 * @arg @ref LL_HRTIM_OUTPUT_TB1
5928 * @arg @ref LL_HRTIM_OUTPUT_TB2
5929 * @arg @ref LL_HRTIM_OUTPUT_TC1
5930 * @arg @ref LL_HRTIM_OUTPUT_TC2
5931 * @arg @ref LL_HRTIM_OUTPUT_TD1
5932 * @arg @ref LL_HRTIM_OUTPUT_TD2
5933 * @arg @ref LL_HRTIM_OUTPUT_TE1
5934 * @arg @ref LL_HRTIM_OUTPUT_TE2
5935 * @param IdleLevel This parameter can be one of the following values:
5936 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE
5937 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
5938 * @retval None
5939 */
5940 __STATIC_INLINE void LL_HRTIM_OUT_SetIdleLevel(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t IdleLevel)
5941 {
5945 MODIFY_REG(*pReg, (HRTIM_OUTR_IDLES1 << REG_SHIFT_TAB_OUTxR[iOutput]), (IdleLevel << REG_SHIFT_TAB_OUTxR[iOutput]));
5946 }
5948 /**
5949 * @brief Get actual output IDLE level.
5950 * @rmtoll OUTxR IDLES1 LL_HRTIM_OUT_GetIdleLevel\n
5951 * OUTxR IDLES2 LL_HRTIM_OUT_GetIdleLevel
5952 * @param HRTIMx High Resolution Timer instance
5953 * @param Output This parameter can be one of the following values:
5954 * @arg @ref LL_HRTIM_OUTPUT_TA1
5955 * @arg @ref LL_HRTIM_OUTPUT_TA2
5956 * @arg @ref LL_HRTIM_OUTPUT_TB1
5957 * @arg @ref LL_HRTIM_OUTPUT_TB2
5958 * @arg @ref LL_HRTIM_OUTPUT_TC1
5959 * @arg @ref LL_HRTIM_OUTPUT_TC2
5960 * @arg @ref LL_HRTIM_OUTPUT_TD1
5961 * @arg @ref LL_HRTIM_OUTPUT_TD2
5962 * @arg @ref LL_HRTIM_OUTPUT_TE1
5963 * @arg @ref LL_HRTIM_OUTPUT_TE2
5964 * @retval IdleLevel This parameter can be one of the following values:
5965 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE
5966 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
5967 */
5969 {
5971 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
5973 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_IDLES1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
5974 }
5976 /**
5977 * @brief Set the output FAULT state.
5978 * @rmtoll OUTxR FAULT1 LL_HRTIM_OUT_SetFaultState\n
5979 * OUTxR FAULT2 LL_HRTIM_OUT_SetFaultState
5980 * @note This function must not called when the timer is enabled and a fault
5981 * channel is enabled at timer level.
5982 * @param HRTIMx High Resolution Timer instance
5983 * @param Output This parameter can be one of the following values:
5984 * @arg @ref LL_HRTIM_OUTPUT_TA1
5985 * @arg @ref LL_HRTIM_OUTPUT_TA2
5986 * @arg @ref LL_HRTIM_OUTPUT_TB1
5987 * @arg @ref LL_HRTIM_OUTPUT_TB2
5988 * @arg @ref LL_HRTIM_OUTPUT_TC1
5989 * @arg @ref LL_HRTIM_OUTPUT_TC2
5990 * @arg @ref LL_HRTIM_OUTPUT_TD1
5991 * @arg @ref LL_HRTIM_OUTPUT_TD2
5992 * @arg @ref LL_HRTIM_OUTPUT_TE1
5993 * @arg @ref LL_HRTIM_OUTPUT_TE2
5994 * @param FaultState This parameter can be one of the following values:
5995 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION
5996 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE
5997 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE
5998 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
5999 * @retval None
6000 */
6001 __STATIC_INLINE void LL_HRTIM_OUT_SetFaultState(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t FaultState)
6002 {
6006 MODIFY_REG(*pReg, (HRTIM_OUTR_FAULT1 << REG_SHIFT_TAB_OUTxR[iOutput]), (FaultState << REG_SHIFT_TAB_OUTxR[iOutput]));
6007 }
6009 /**
6010 * @brief Get actual FAULT state.
6011 * @rmtoll OUTxR FAULT1 LL_HRTIM_OUT_GetFaultState\n
6012 * OUTxR FAULT2 LL_HRTIM_OUT_GetFaultState
6013 * @param HRTIMx High Resolution Timer instance
6014 * @param Output This parameter can be one of the following values:
6015 * @arg @ref LL_HRTIM_OUTPUT_TA1
6016 * @arg @ref LL_HRTIM_OUTPUT_TA2
6017 * @arg @ref LL_HRTIM_OUTPUT_TB1
6018 * @arg @ref LL_HRTIM_OUTPUT_TB2
6019 * @arg @ref LL_HRTIM_OUTPUT_TC1
6020 * @arg @ref LL_HRTIM_OUTPUT_TC2
6021 * @arg @ref LL_HRTIM_OUTPUT_TD1
6022 * @arg @ref LL_HRTIM_OUTPUT_TD2
6023 * @arg @ref LL_HRTIM_OUTPUT_TE1
6024 * @arg @ref LL_HRTIM_OUTPUT_TE2
6025 * @retval FaultState This parameter can be one of the following values:
6026 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION
6027 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE
6028 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE
6029 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
6030 */
6032 {
6034 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
6036 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_FAULT1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6037 }
6039 /**
6040 * @brief Set the output chopper mode.
6041 * @rmtoll OUTxR CHP1 LL_HRTIM_OUT_SetChopperMode\n
6042 * OUTxR CHP2 LL_HRTIM_OUT_SetChopperMode
6043 * @note This function must not called when the timer is enabled.
6044 * @param HRTIMx High Resolution Timer instance
6045 * @param Output This parameter can be one of the following values:
6046 * @arg @ref LL_HRTIM_OUTPUT_TA1
6047 * @arg @ref LL_HRTIM_OUTPUT_TA2
6048 * @arg @ref LL_HRTIM_OUTPUT_TB1
6049 * @arg @ref LL_HRTIM_OUTPUT_TB2
6050 * @arg @ref LL_HRTIM_OUTPUT_TC1
6051 * @arg @ref LL_HRTIM_OUTPUT_TC2
6052 * @arg @ref LL_HRTIM_OUTPUT_TD1
6053 * @arg @ref LL_HRTIM_OUTPUT_TD2
6054 * @arg @ref LL_HRTIM_OUTPUT_TE1
6055 * @arg @ref LL_HRTIM_OUTPUT_TE2
6056 * @param ChopperMode This parameter can be one of the following values:
6057 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED
6058 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
6059 * @retval None
6060 */
6061 __STATIC_INLINE void LL_HRTIM_OUT_SetChopperMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t ChopperMode)
6062 {
6066 MODIFY_REG(*pReg, (HRTIM_OUTR_CHP1 << REG_SHIFT_TAB_OUTxR[iOutput]), (ChopperMode << REG_SHIFT_TAB_OUTxR[iOutput]));
6067 }
6069 /**
6070 * @brief Get actual output chopper mode
6071 * @rmtoll OUTxR CHP1 LL_HRTIM_OUT_GetChopperMode\n
6072 * OUTxR CHP2 LL_HRTIM_OUT_GetChopperMode
6073 * @param HRTIMx High Resolution Timer instance
6074 * @param Output This parameter can be one of the following values:
6075 * @arg @ref LL_HRTIM_OUTPUT_TA1
6076 * @arg @ref LL_HRTIM_OUTPUT_TA2
6077 * @arg @ref LL_HRTIM_OUTPUT_TB1
6078 * @arg @ref LL_HRTIM_OUTPUT_TB2
6079 * @arg @ref LL_HRTIM_OUTPUT_TC1
6080 * @arg @ref LL_HRTIM_OUTPUT_TC2
6081 * @arg @ref LL_HRTIM_OUTPUT_TD1
6082 * @arg @ref LL_HRTIM_OUTPUT_TD2
6083 * @arg @ref LL_HRTIM_OUTPUT_TE1
6084 * @arg @ref LL_HRTIM_OUTPUT_TE2
6085 * @retval ChopperMode This parameter can be one of the following values:
6086 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED
6087 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
6088 */
6090 {
6092 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
6094 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_CHP1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6095 }
6097 /**
6098 * @brief Set the output burst mode entry mode.
6099 * @rmtoll OUTxR DIDL1 LL_HRTIM_OUT_SetBMEntryMode\n
6100 * OUTxR DIDL2 LL_HRTIM_OUT_SetBMEntryMode
6101 * @note This function must not called when the timer is enabled.
6102 * @param HRTIMx High Resolution Timer instance
6103 * @param Output This parameter can be one of the following values:
6104 * @arg @ref LL_HRTIM_OUTPUT_TA1
6105 * @arg @ref LL_HRTIM_OUTPUT_TA2
6106 * @arg @ref LL_HRTIM_OUTPUT_TB1
6107 * @arg @ref LL_HRTIM_OUTPUT_TB2
6108 * @arg @ref LL_HRTIM_OUTPUT_TC1
6109 * @arg @ref LL_HRTIM_OUTPUT_TC2
6110 * @arg @ref LL_HRTIM_OUTPUT_TD1
6111 * @arg @ref LL_HRTIM_OUTPUT_TD2
6112 * @arg @ref LL_HRTIM_OUTPUT_TE1
6113 * @arg @ref LL_HRTIM_OUTPUT_TE2
6114 * @param BMEntryMode This parameter can be one of the following values:
6115 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR
6116 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
6117 * @retval None
6118 */
6119 __STATIC_INLINE void LL_HRTIM_OUT_SetBMEntryMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t BMEntryMode)
6120 {
6124 MODIFY_REG(*pReg, (HRTIM_OUTR_DIDL1 << REG_SHIFT_TAB_OUTxR[iOutput]), (BMEntryMode << REG_SHIFT_TAB_OUTxR[iOutput]));
6125 }
6127 /**
6128 * @brief Get actual output burst mode entry mode.
6129 * @rmtoll OUTxR DIDL1 LL_HRTIM_OUT_GetBMEntryMode\n
6130 * OUTxR DIDL2 LL_HRTIM_OUT_GetBMEntryMode
6131 * @param HRTIMx High Resolution Timer instance
6132 * @param Output This parameter can be one of the following values:
6133 * @arg @ref LL_HRTIM_OUTPUT_TA1
6134 * @arg @ref LL_HRTIM_OUTPUT_TA2
6135 * @arg @ref LL_HRTIM_OUTPUT_TB1
6136 * @arg @ref LL_HRTIM_OUTPUT_TB2
6137 * @arg @ref LL_HRTIM_OUTPUT_TC1
6138 * @arg @ref LL_HRTIM_OUTPUT_TC2
6139 * @arg @ref LL_HRTIM_OUTPUT_TD1
6140 * @arg @ref LL_HRTIM_OUTPUT_TD2
6141 * @arg @ref LL_HRTIM_OUTPUT_TE1
6142 * @arg @ref LL_HRTIM_OUTPUT_TE2
6143 * @retval BMEntryMode This parameter can be one of the following values:
6144 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR
6145 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
6146 */
6148 {
6150 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].OUTxR) +
6152 return (READ_BIT(*pReg, (uint32_t)(HRTIM_OUTR_DIDL1) << REG_SHIFT_TAB_OUTxR[iOutput]) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6153 }
6155 /**
6156 * @brief Get the level (active or inactive) of the designated output when the
6157 * delayed protection was triggered.
6158 * @rmtoll TIMxISR O1SRSR LL_HRTIM_OUT_GetDLYPRTOutStatus\n
6159 * TIMxISR O2SRSR LL_HRTIM_OUT_GetDLYPRTOutStatus
6160 * @param HRTIMx High Resolution Timer instance
6161 * @param Output This parameter can be one of the following values:
6162 * @arg @ref LL_HRTIM_OUTPUT_TA1
6163 * @arg @ref LL_HRTIM_OUTPUT_TA2
6164 * @arg @ref LL_HRTIM_OUTPUT_TB1
6165 * @arg @ref LL_HRTIM_OUTPUT_TB2
6166 * @arg @ref LL_HRTIM_OUTPUT_TC1
6167 * @arg @ref LL_HRTIM_OUTPUT_TC2
6168 * @arg @ref LL_HRTIM_OUTPUT_TD1
6169 * @arg @ref LL_HRTIM_OUTPUT_TD2
6170 * @arg @ref LL_HRTIM_OUTPUT_TE1
6171 * @arg @ref LL_HRTIM_OUTPUT_TE2
6172 * @retval OutputLevel This parameter can be one of the following values:
6173 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6174 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6175 */
6176 __STATIC_INLINE uint32_t LL_HRTIM_OUT_GetDLYPRTOutStatus(HRTIM_TypeDef *HRTIMx, uint32_t Output)
6177 {
6179 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxISR) +
6181 return ((READ_BIT(*pReg, (uint32_t)(HRTIM_TIMISR_O1STAT) << REG_SHIFT_TAB_OxSTAT[iOutput]) >> REG_SHIFT_TAB_OxSTAT[iOutput]) >>
6182 HRTIM_TIMISR_O1STAT_Pos);
6183 }
6185 /**
6186 * @brief Force the timer output to its active or inactive level.
6187 * @rmtoll SETx1R SST LL_HRTIM_OUT_ForceLevel\n
6188 * RSTx1R SRT LL_HRTIM_OUT_ForceLevel\n
6189 * SETx2R SST LL_HRTIM_OUT_ForceLevel\n
6190 * RSTx2R SRT LL_HRTIM_OUT_ForceLevel
6191 * @param HRTIMx High Resolution Timer instance
6192 * @param Output This parameter can be one of the following values:
6193 * @arg @ref LL_HRTIM_OUTPUT_TA1
6194 * @arg @ref LL_HRTIM_OUTPUT_TA2
6195 * @arg @ref LL_HRTIM_OUTPUT_TB1
6196 * @arg @ref LL_HRTIM_OUTPUT_TB2
6197 * @arg @ref LL_HRTIM_OUTPUT_TC1
6198 * @arg @ref LL_HRTIM_OUTPUT_TC2
6199 * @arg @ref LL_HRTIM_OUTPUT_TD1
6200 * @arg @ref LL_HRTIM_OUTPUT_TD2
6201 * @arg @ref LL_HRTIM_OUTPUT_TE1
6202 * @arg @ref LL_HRTIM_OUTPUT_TE2
6203 * @param OutputLevel This parameter can be one of the following values:
6204 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6205 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6206 * @retval None
6207 */
6208 __STATIC_INLINE void LL_HRTIM_OUT_ForceLevel(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t OutputLevel)
6209 {
6211 {
6214 };
6217 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].SETx1R) +
6220 }
6222 /**
6223 * @brief Get actual output level, before the output stage (chopper, polarity).
6224 * @rmtoll TIMxISR O1CPY LL_HRTIM_OUT_GetLevel\n
6225 * TIMxISR O2CPY LL_HRTIM_OUT_GetLevel
6226 * @param HRTIMx High Resolution Timer instance
6227 * @param Output This parameter can be one of the following values:
6228 * @arg @ref LL_HRTIM_OUTPUT_TA1
6229 * @arg @ref LL_HRTIM_OUTPUT_TA2
6230 * @arg @ref LL_HRTIM_OUTPUT_TB1
6231 * @arg @ref LL_HRTIM_OUTPUT_TB2
6232 * @arg @ref LL_HRTIM_OUTPUT_TC1
6233 * @arg @ref LL_HRTIM_OUTPUT_TC2
6234 * @arg @ref LL_HRTIM_OUTPUT_TD1
6235 * @arg @ref LL_HRTIM_OUTPUT_TD2
6236 * @arg @ref LL_HRTIM_OUTPUT_TE1
6237 * @arg @ref LL_HRTIM_OUTPUT_TE2
6238 * @retval OutputLevel This parameter can be one of the following values:
6239 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6240 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6241 */
6243 {
6245 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxISR) +
6247 return ((READ_BIT(*pReg, (uint32_t)(HRTIM_TIMISR_O1CPY) << REG_SHIFT_TAB_OxSTAT[iOutput]) >> REG_SHIFT_TAB_OxSTAT[iOutput]) >>
6248 HRTIM_TIMISR_O1CPY_Pos);
6249 }
6251 /**
6252 * @}
6253 */
6255 /** @defgroup HRTIM_LL_EF_External_Event_management External_Event_management
6256 * @{
6257 */
6259 /**
6260 * @brief Configure external event conditioning.
6261 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_Config\n
6262 * EECR1 EE1POL LL_HRTIM_EE_Config\n
6263 * EECR1 EE1SNS LL_HRTIM_EE_Config\n
6264 * EECR1 EE1FAST LL_HRTIM_EE_Config\n
6265 * EECR1 EE2SRC LL_HRTIM_EE_Config\n
6266 * EECR1 EE2POL LL_HRTIM_EE_Config\n
6267 * EECR1 EE2SNS LL_HRTIM_EE_Config\n
6268 * EECR1 EE2FAST LL_HRTIM_EE_Config\n
6269 * EECR1 EE3SRC LL_HRTIM_EE_Config\n
6270 * EECR1 EE3POL LL_HRTIM_EE_Config\n
6271 * EECR1 EE3SNS LL_HRTIM_EE_Config\n
6272 * EECR1 EE3FAST LL_HRTIM_EE_Config\n
6273 * EECR1 EE4SRC LL_HRTIM_EE_Config\n
6274 * EECR1 EE4POL LL_HRTIM_EE_Config\n
6275 * EECR1 EE4SNS LL_HRTIM_EE_Config\n
6276 * EECR1 EE4FAST LL_HRTIM_EE_Config\n
6277 * EECR1 EE5SRC LL_HRTIM_EE_Config\n
6278 * EECR1 EE5POL LL_HRTIM_EE_Config\n
6279 * EECR1 EE5SNS LL_HRTIM_EE_Config\n
6280 * EECR1 EE5FAST LL_HRTIM_EE_Config\n
6281 * EECR2 EE6SRC LL_HRTIM_EE_Config\n
6282 * EECR2 EE6POL LL_HRTIM_EE_Config\n
6283 * EECR2 EE6SNS LL_HRTIM_EE_Config\n
6284 * EECR2 EE6FAST LL_HRTIM_EE_Config\n
6285 * EECR2 EE7SRC LL_HRTIM_EE_Config\n
6286 * EECR2 EE7POL LL_HRTIM_EE_Config\n
6287 * EECR2 EE7SNS LL_HRTIM_EE_Config\n
6288 * EECR2 EE7FAST LL_HRTIM_EE_Config\n
6289 * EECR2 EE8SRC LL_HRTIM_EE_Config\n
6290 * EECR2 EE8POL LL_HRTIM_EE_Config\n
6291 * EECR2 EE8SNS LL_HRTIM_EE_Config\n
6292 * EECR2 EE8FAST LL_HRTIM_EE_Config\n
6293 * EECR2 EE9SRC LL_HRTIM_EE_Config\n
6294 * EECR2 EE9POL LL_HRTIM_EE_Config\n
6295 * EECR2 EE9SNS LL_HRTIM_EE_Config\n
6296 * EECR2 EE9FAST LL_HRTIM_EE_Config\n
6297 * EECR2 EE10SRC LL_HRTIM_EE_Config\n
6298 * EECR2 EE10POL LL_HRTIM_EE_Config\n
6299 * EECR2 EE10SNS LL_HRTIM_EE_Config\n
6300 * EECR2 EE10FAST LL_HRTIM_EE_Config
6301 * @note This function must not be called when the timer counter is enabled.
6302 * @note Event source (EExSrc1..EExSRC4) mapping depends on configured event channel.
6303 * @note Fast mode is available only for LL_HRTIM_EVENT_1..5.
6304 * @param HRTIMx High Resolution Timer instance
6305 * @param Event This parameter can be one of the following values:
6306 * @arg @ref LL_HRTIM_EVENT_1
6307 * @arg @ref LL_HRTIM_EVENT_2
6308 * @arg @ref LL_HRTIM_EVENT_3
6309 * @arg @ref LL_HRTIM_EVENT_4
6310 * @arg @ref LL_HRTIM_EVENT_5
6311 * @arg @ref LL_HRTIM_EVENT_6
6312 * @arg @ref LL_HRTIM_EVENT_7
6313 * @arg @ref LL_HRTIM_EVENT_8
6314 * @arg @ref LL_HRTIM_EVENT_9
6315 * @arg @ref LL_HRTIM_EVENT_10
6316 * @param Configuration This parameter must be a combination of all the following values:
6317 * @arg External event source 1 or External event source 2 or External event source 3 or External event source 4
6318 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH or @ref LL_HRTIM_EE_POLARITY_LOW
6319 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL or @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE or @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE or @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6320 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE or @ref LL_HRTIM_EE_FASTMODE_ENABLE
6321 * @retval None
6322 */
6323 __STATIC_INLINE void LL_HRTIM_EE_Config(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Configuration)
6324 {
6330 }
6332 /**
6333 * @brief Set the external event source.
6334 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_SetSrc\n
6335 * EECR1 EE2SRC LL_HRTIM_EE_SetSrc\n
6336 * EECR1 EE3SRC LL_HRTIM_EE_SetSrc\n
6337 * EECR1 EE4SRC LL_HRTIM_EE_SetSrc\n
6338 * EECR1 EE5SRC LL_HRTIM_EE_SetSrc\n
6339 * EECR2 EE6SRC LL_HRTIM_EE_SetSrc\n
6340 * EECR2 EE7SRC LL_HRTIM_EE_SetSrc\n
6341 * EECR2 EE8SRC LL_HRTIM_EE_SetSrc\n
6342 * EECR2 EE9SRC LL_HRTIM_EE_SetSrc\n
6343 * EECR2 EE10SRC LL_HRTIM_EE_SetSrc
6344 * @param HRTIMx High Resolution Timer instance
6345 * @param Event This parameter can be one of the following values:
6346 * @arg @ref LL_HRTIM_EVENT_1
6347 * @arg @ref LL_HRTIM_EVENT_2
6348 * @arg @ref LL_HRTIM_EVENT_3
6349 * @arg @ref LL_HRTIM_EVENT_4
6350 * @arg @ref LL_HRTIM_EVENT_5
6351 * @arg @ref LL_HRTIM_EVENT_6
6352 * @arg @ref LL_HRTIM_EVENT_7
6353 * @arg @ref LL_HRTIM_EVENT_8
6354 * @arg @ref LL_HRTIM_EVENT_9
6355 * @arg @ref LL_HRTIM_EVENT_10
6356 * @param Src This parameter can be one of the following values:
6357 * @arg External event source 1
6358 * @arg External event source 2
6359 * @arg External event source 3
6360 * @arg External event source 4
6361 * @retval None
6362 */
6364 {
6368 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1SRC << REG_SHIFT_TAB_EExSRC[iEvent]), (Src << REG_SHIFT_TAB_EExSRC[iEvent]));
6369 }
6371 /**
6372 * @brief Get actual external event source.
6373 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_GetSrc\n
6374 * EECR1 EE2SRC LL_HRTIM_EE_GetSrc\n
6375 * EECR1 EE3SRC LL_HRTIM_EE_GetSrc\n
6376 * EECR1 EE4SRC LL_HRTIM_EE_GetSrc\n
6377 * EECR1 EE5SRC LL_HRTIM_EE_GetSrc\n
6378 * EECR2 EE6SRC LL_HRTIM_EE_GetSrc\n
6379 * EECR2 EE7SRC LL_HRTIM_EE_GetSrc\n
6380 * EECR2 EE8SRC LL_HRTIM_EE_GetSrc\n
6381 * EECR2 EE9SRC LL_HRTIM_EE_GetSrc\n
6382 * EECR2 EE10SRC LL_HRTIM_EE_GetSrc
6383 * @param HRTIMx High Resolution Timer instance
6384 * @param Event This parameter can be one of the following values:
6385 * @arg @ref LL_HRTIM_EVENT_1
6386 * @arg @ref LL_HRTIM_EVENT_2
6387 * @arg @ref LL_HRTIM_EVENT_3
6388 * @arg @ref LL_HRTIM_EVENT_4
6389 * @arg @ref LL_HRTIM_EVENT_5
6390 * @arg @ref LL_HRTIM_EVENT_6
6391 * @arg @ref LL_HRTIM_EVENT_7
6392 * @arg @ref LL_HRTIM_EVENT_8
6393 * @arg @ref LL_HRTIM_EVENT_9
6394 * @arg @ref LL_HRTIM_EVENT_10
6395 * @retval EventSrc This parameter can be one of the following values:
6396 * @arg External event source 1
6397 * @arg External event source 2
6398 * @arg External event source 3
6399 * @arg External event source 4
6400 */
6402 {
6404 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.EECR1) +
6406 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EECR1_EE1SRC) << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6407 }
6409 /**
6410 * @brief Set the polarity of an external event.
6411 * @rmtoll EECR1 EE1POL LL_HRTIM_EE_SetPolarity\n
6412 * EECR1 EE2POL LL_HRTIM_EE_SetPolarity\n
6413 * EECR1 EE3POL LL_HRTIM_EE_SetPolarity\n
6414 * EECR1 EE4POL LL_HRTIM_EE_SetPolarity\n
6415 * EECR1 EE5POL LL_HRTIM_EE_SetPolarity\n
6416 * EECR2 EE6POL LL_HRTIM_EE_SetPolarity\n
6417 * EECR2 EE7POL LL_HRTIM_EE_SetPolarity\n
6418 * EECR2 EE8POL LL_HRTIM_EE_SetPolarity\n
6419 * EECR2 EE9POL LL_HRTIM_EE_SetPolarity\n
6420 * EECR2 EE10POL LL_HRTIM_EE_SetPolarity
6421 * @note This function must not be called when the timer counter is enabled.
6422 * @note Event polarity is only significant when event detection is level-sensitive.
6423 * @param HRTIMx High Resolution Timer instance
6424 * @param Event This parameter can be one of the following values:
6425 * @arg @ref LL_HRTIM_EVENT_1
6426 * @arg @ref LL_HRTIM_EVENT_2
6427 * @arg @ref LL_HRTIM_EVENT_3
6428 * @arg @ref LL_HRTIM_EVENT_4
6429 * @arg @ref LL_HRTIM_EVENT_5
6430 * @arg @ref LL_HRTIM_EVENT_6
6431 * @arg @ref LL_HRTIM_EVENT_7
6432 * @arg @ref LL_HRTIM_EVENT_8
6433 * @arg @ref LL_HRTIM_EVENT_9
6434 * @arg @ref LL_HRTIM_EVENT_10
6435 * @param Polarity This parameter can be one of the following values:
6436 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH
6437 * @arg @ref LL_HRTIM_EE_POLARITY_LOW
6438 * @retval None
6439 */
6440 __STATIC_INLINE void LL_HRTIM_EE_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Polarity)
6441 {
6445 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1POL << REG_SHIFT_TAB_EExSRC[iEvent]), (Polarity << REG_SHIFT_TAB_EExSRC[iEvent]));
6446 }
6448 /**
6449 * @brief Get actual polarity setting of an external event.
6450 * @rmtoll EECR1 EE1POL LL_HRTIM_EE_GetPolarity\n
6451 * EECR1 EE2POL LL_HRTIM_EE_GetPolarity\n
6452 * EECR1 EE3POL LL_HRTIM_EE_GetPolarity\n
6453 * EECR1 EE4POL LL_HRTIM_EE_GetPolarity\n
6454 * EECR1 EE5POL LL_HRTIM_EE_GetPolarity\n
6455 * EECR2 EE6POL LL_HRTIM_EE_GetPolarity\n
6456 * EECR2 EE7POL LL_HRTIM_EE_GetPolarity\n
6457 * EECR2 EE8POL LL_HRTIM_EE_GetPolarity\n
6458 * EECR2 EE9POL LL_HRTIM_EE_GetPolarity\n
6459 * EECR2 EE10POL LL_HRTIM_EE_GetPolarity
6460 * @param HRTIMx High Resolution Timer instance
6461 * @param Event This parameter can be one of the following values:
6462 * @arg @ref LL_HRTIM_EVENT_1
6463 * @arg @ref LL_HRTIM_EVENT_2
6464 * @arg @ref LL_HRTIM_EVENT_3
6465 * @arg @ref LL_HRTIM_EVENT_4
6466 * @arg @ref LL_HRTIM_EVENT_5
6467 * @arg @ref LL_HRTIM_EVENT_6
6468 * @arg @ref LL_HRTIM_EVENT_7
6469 * @arg @ref LL_HRTIM_EVENT_8
6470 * @arg @ref LL_HRTIM_EVENT_9
6471 * @arg @ref LL_HRTIM_EVENT_10
6472 * @retval Polarity This parameter can be one of the following values:
6473 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH
6474 * @arg @ref LL_HRTIM_EE_POLARITY_LOW
6475 */
6477 {
6479 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.EECR1) +
6481 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EECR1_EE1POL) << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6482 }
6484 /**
6485 * @brief Set the sensitivity of an external event.
6486 * @rmtoll EECR1 EE1SNS LL_HRTIM_EE_SetSensitivity\n
6487 * EECR1 EE2SNS LL_HRTIM_EE_SetSensitivity\n
6488 * EECR1 EE3SNS LL_HRTIM_EE_SetSensitivity\n
6489 * EECR1 EE4SNS LL_HRTIM_EE_SetSensitivity\n
6490 * EECR1 EE5SNS LL_HRTIM_EE_SetSensitivity\n
6491 * EECR2 EE6SNS LL_HRTIM_EE_SetSensitivity\n
6492 * EECR2 EE7SNS LL_HRTIM_EE_SetSensitivity\n
6493 * EECR2 EE8SNS LL_HRTIM_EE_SetSensitivity\n
6494 * EECR2 EE9SNS LL_HRTIM_EE_SetSensitivity\n
6495 * EECR2 EE10SNS LL_HRTIM_EE_SetSensitivity
6496 * @param HRTIMx High Resolution Timer instance
6497 * @param Event This parameter can be one of the following values:
6498 * @arg @ref LL_HRTIM_EVENT_1
6499 * @arg @ref LL_HRTIM_EVENT_2
6500 * @arg @ref LL_HRTIM_EVENT_3
6501 * @arg @ref LL_HRTIM_EVENT_4
6502 * @arg @ref LL_HRTIM_EVENT_5
6503 * @arg @ref LL_HRTIM_EVENT_6
6504 * @arg @ref LL_HRTIM_EVENT_7
6505 * @arg @ref LL_HRTIM_EVENT_8
6506 * @arg @ref LL_HRTIM_EVENT_9
6507 * @arg @ref LL_HRTIM_EVENT_10
6508 * @param Sensitivity This parameter can be one of the following values:
6509 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL
6510 * @arg @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE
6511 * @arg @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE
6512 * @arg @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6513 * @retval None
6514 */
6516 __STATIC_INLINE void LL_HRTIM_EE_SetSensitivity(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Sensitivity)
6517 {
6521 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1SNS << REG_SHIFT_TAB_EExSRC[iEvent]), (Sensitivity << REG_SHIFT_TAB_EExSRC[iEvent]));
6522 }
6524 /**
6525 * @brief Get actual sensitivity setting of an external event.
6526 * @rmtoll EECR1 EE1SNS LL_HRTIM_EE_GetSensitivity\n
6527 * EECR1 EE2SNS LL_HRTIM_EE_GetSensitivity\n
6528 * EECR1 EE3SNS LL_HRTIM_EE_GetSensitivity\n
6529 * EECR1 EE4SNS LL_HRTIM_EE_GetSensitivity\n
6530 * EECR1 EE5SNS LL_HRTIM_EE_GetSensitivity\n
6531 * EECR2 EE6SNS LL_HRTIM_EE_GetSensitivity\n
6532 * EECR2 EE7SNS LL_HRTIM_EE_GetSensitivity\n
6533 * EECR2 EE8SNS LL_HRTIM_EE_GetSensitivity\n
6534 * EECR2 EE9SNS LL_HRTIM_EE_GetSensitivity\n
6535 * EECR2 EE10SNS LL_HRTIM_EE_GetSensitivity
6536 * @param HRTIMx High Resolution Timer instance
6537 * @param Event This parameter can be one of the following values:
6538 * @arg @ref LL_HRTIM_EVENT_1
6539 * @arg @ref LL_HRTIM_EVENT_2
6540 * @arg @ref LL_HRTIM_EVENT_3
6541 * @arg @ref LL_HRTIM_EVENT_4
6542 * @arg @ref LL_HRTIM_EVENT_5
6543 * @arg @ref LL_HRTIM_EVENT_6
6544 * @arg @ref LL_HRTIM_EVENT_7
6545 * @arg @ref LL_HRTIM_EVENT_8
6546 * @arg @ref LL_HRTIM_EVENT_9
6547 * @arg @ref LL_HRTIM_EVENT_10
6548 * @retval Polarity This parameter can be one of the following values:
6549 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL
6550 * @arg @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE
6551 * @arg @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE
6552 * @arg @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6553 */
6555 {
6557 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.EECR1) +
6559 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EECR1_EE1SNS) << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6560 }
6562 /**
6563 * @brief Set the fast mode of an external event.
6564 * @rmtoll EECR1 EE1FAST LL_HRTIM_EE_SetFastMode\n
6565 * EECR1 EE2FAST LL_HRTIM_EE_SetFastMode\n
6566 * EECR1 EE3FAST LL_HRTIM_EE_SetFastMode\n
6567 * EECR1 EE4FAST LL_HRTIM_EE_SetFastMode\n
6568 * EECR1 EE5FAST LL_HRTIM_EE_SetFastMode\n
6569 * EECR2 EE6FAST LL_HRTIM_EE_SetFastMode\n
6570 * EECR2 EE7FAST LL_HRTIM_EE_SetFastMode\n
6571 * EECR2 EE8FAST LL_HRTIM_EE_SetFastMode\n
6572 * EECR2 EE9FAST LL_HRTIM_EE_SetFastMode\n
6573 * EECR2 EE10FAST LL_HRTIM_EE_SetFastMode
6574 * @note This function must not be called when the timer counter is enabled.
6575 * @param HRTIMx High Resolution Timer instance
6576 * @param Event This parameter can be one of the following values:
6577 * @arg @ref LL_HRTIM_EVENT_1
6578 * @arg @ref LL_HRTIM_EVENT_2
6579 * @arg @ref LL_HRTIM_EVENT_3
6580 * @arg @ref LL_HRTIM_EVENT_4
6581 * @arg @ref LL_HRTIM_EVENT_5
6582 * @param FastMode This parameter can be one of the following values:
6583 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE
6584 * @arg @ref LL_HRTIM_EE_FASTMODE_ENABLE
6585 * @retval None
6586 */
6587 __STATIC_INLINE void LL_HRTIM_EE_SetFastMode(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t FastMode)
6588 {
6592 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1FAST << REG_SHIFT_TAB_EExSRC[iEvent]), (FastMode << REG_SHIFT_TAB_EExSRC[iEvent]));
6593 }
6595 /**
6596 * @brief Get actual fast mode setting of an external event.
6597 * @rmtoll EECR1 EE1FAST LL_HRTIM_EE_GetFastMode\n
6598 * EECR1 EE2FAST LL_HRTIM_EE_GetFastMode\n
6599 * EECR1 EE3FAST LL_HRTIM_EE_GetFastMode\n
6600 * EECR1 EE4FAST LL_HRTIM_EE_GetFastMode\n
6601 * EECR1 EE5FAST LL_HRTIM_EE_GetFastMode\n
6602 * EECR2 EE6FAST LL_HRTIM_EE_GetFastMode\n
6603 * EECR2 EE7FAST LL_HRTIM_EE_GetFastMode\n
6604 * EECR2 EE8FAST LL_HRTIM_EE_GetFastMode\n
6605 * EECR2 EE9FAST LL_HRTIM_EE_GetFastMode\n
6606 * EECR2 EE10FAST LL_HRTIM_EE_GetFastMode
6607 * @param HRTIMx High Resolution Timer instance
6608 * @param Event This parameter can be one of the following values:
6609 * @arg @ref LL_HRTIM_EVENT_1
6610 * @arg @ref LL_HRTIM_EVENT_2
6611 * @arg @ref LL_HRTIM_EVENT_3
6612 * @arg @ref LL_HRTIM_EVENT_4
6613 * @arg @ref LL_HRTIM_EVENT_5
6614 * @retval FastMode This parameter can be one of the following values:
6615 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE
6616 * @arg @ref LL_HRTIM_EE_FASTMODE_ENABLE
6617 */
6619 {
6621 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.EECR1) +
6623 return (READ_BIT(*pReg, (uint32_t)(HRTIM_EECR1_EE1FAST) << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6624 }
6626 /**
6627 * @brief Set the digital noise filter of a external event.
6628 * @rmtoll EECR3 EE6F LL_HRTIM_EE_SetFilter\n
6629 * EECR3 EE7F LL_HRTIM_EE_SetFilter\n
6630 * EECR3 EE8F LL_HRTIM_EE_SetFilter\n
6631 * EECR3 EE9F LL_HRTIM_EE_SetFilter\n
6632 * EECR3 EE10F LL_HRTIM_EE_SetFilter
6633 * @param HRTIMx High Resolution Timer instance
6634 * @param Event This parameter can be one of the following values:
6635 * @arg @ref LL_HRTIM_EVENT_6
6636 * @arg @ref LL_HRTIM_EVENT_7
6637 * @arg @ref LL_HRTIM_EVENT_8
6638 * @arg @ref LL_HRTIM_EVENT_9
6639 * @arg @ref LL_HRTIM_EVENT_10
6640 * @param Filter This parameter can be one of the following values:
6641 * @arg @ref LL_HRTIM_EE_FILTER_NONE
6642 * @arg @ref LL_HRTIM_EE_FILTER_1
6643 * @arg @ref LL_HRTIM_EE_FILTER_2
6644 * @arg @ref LL_HRTIM_EE_FILTER_3
6645 * @arg @ref LL_HRTIM_EE_FILTER_4
6646 * @arg @ref LL_HRTIM_EE_FILTER_5
6647 * @arg @ref LL_HRTIM_EE_FILTER_6
6648 * @arg @ref LL_HRTIM_EE_FILTER_7
6649 * @arg @ref LL_HRTIM_EE_FILTER_8
6650 * @arg @ref LL_HRTIM_EE_FILTER_9
6651 * @arg @ref LL_HRTIM_EE_FILTER_10
6652 * @arg @ref LL_HRTIM_EE_FILTER_11
6653 * @arg @ref LL_HRTIM_EE_FILTER_12
6654 * @arg @ref LL_HRTIM_EE_FILTER_13
6655 * @arg @ref LL_HRTIM_EE_FILTER_14
6656 * @arg @ref LL_HRTIM_EE_FILTER_15
6657 * @retval None
6658 */
6659 __STATIC_INLINE void LL_HRTIM_EE_SetFilter(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Filter)
6660 {
6664 }
6666 /**
6667 * @brief Get actual digital noise filter setting of a external event.
6668 * @rmtoll EECR3 EE6F LL_HRTIM_EE_GetFilter\n
6669 * EECR3 EE7F LL_HRTIM_EE_GetFilter\n
6670 * EECR3 EE8F LL_HRTIM_EE_GetFilter\n
6671 * EECR3 EE9F LL_HRTIM_EE_GetFilter\n
6672 * EECR3 EE10F LL_HRTIM_EE_GetFilter
6673 * @param HRTIMx High Resolution Timer instance
6674 * @param Event This parameter can be one of the following values:
6675 * @arg @ref LL_HRTIM_EVENT_6
6676 * @arg @ref LL_HRTIM_EVENT_7
6677 * @arg @ref LL_HRTIM_EVENT_8
6678 * @arg @ref LL_HRTIM_EVENT_9
6679 * @arg @ref LL_HRTIM_EVENT_10
6680 * @retval Filter This parameter can be one of the following values:
6681 * @arg @ref LL_HRTIM_EE_FILTER_NONE
6682 * @arg @ref LL_HRTIM_EE_FILTER_1
6683 * @arg @ref LL_HRTIM_EE_FILTER_2
6684 * @arg @ref LL_HRTIM_EE_FILTER_3
6685 * @arg @ref LL_HRTIM_EE_FILTER_4
6686 * @arg @ref LL_HRTIM_EE_FILTER_5
6687 * @arg @ref LL_HRTIM_EE_FILTER_6
6688 * @arg @ref LL_HRTIM_EE_FILTER_7
6689 * @arg @ref LL_HRTIM_EE_FILTER_8
6690 * @arg @ref LL_HRTIM_EE_FILTER_9
6691 * @arg @ref LL_HRTIM_EE_FILTER_10
6692 * @arg @ref LL_HRTIM_EE_FILTER_11
6693 * @arg @ref LL_HRTIM_EE_FILTER_12
6694 * @arg @ref LL_HRTIM_EE_FILTER_13
6695 * @arg @ref LL_HRTIM_EE_FILTER_14
6696 * @arg @ref LL_HRTIM_EE_FILTER_15
6697 */
6699 {
6702 (uint32_t)(HRTIM_EECR3_EE6F) << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6703 }
6705 /**
6706 * @brief Set the external event prescaler.
6707 * @rmtoll EECR3 EEVSD LL_HRTIM_EE_SetPrescaler
6708 * @param HRTIMx High Resolution Timer instance
6709 * @param Prescaler This parameter can be one of the following values:
6710 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV1
6711 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV2
6712 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV4
6713 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV8
6714 * @retval None
6715 */
6718 {
6720 }
6722 /**
6723 * @brief Get actual external event prescaler setting.
6724 * @rmtoll EECR3 EEVSD LL_HRTIM_EE_GetPrescaler
6725 * @param HRTIMx High Resolution Timer instance
6726 * @retval Prescaler This parameter can be one of the following values:
6727 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV1
6728 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV2
6729 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV4
6730 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV8
6731 */
6734 {
6736 }
6738 /**
6739 * @}
6740 */
6742 /** @defgroup HRTIM_LL_EF_Fault_management Fault_management
6743 * @{
6744 */
6745 /**
6746 * @brief Configure fault signal conditioning Polarity and Source.
6747 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_Config\n
6748 * FLTINR1 FLT1SRC LL_HRTIM_FLT_Config\n
6749 * FLTINR1 FLT2P LL_HRTIM_FLT_Config\n
6750 * FLTINR1 FLT2SRC LL_HRTIM_FLT_Config\n
6751 * FLTINR1 FLT3P LL_HRTIM_FLT_Config\n
6752 * FLTINR1 FLT3SRC LL_HRTIM_FLT_Config\n
6753 * FLTINR1 FLT4P LL_HRTIM_FLT_Config\n
6754 * FLTINR1 FLT4SRC LL_HRTIM_FLT_Config\n
6755 * FLTINR2 FLT5P LL_HRTIM_FLT_Config\n
6756 * FLTINR2 FLT5SRC LL_HRTIM_FLT_Config
6757 * @note This function must not be called when the fault channel is enabled.
6758 * @param HRTIMx High Resolution Timer instance
6759 * @param Fault This parameter can be one of the following values:
6760 * @arg @ref LL_HRTIM_FAULT_1
6761 * @arg @ref LL_HRTIM_FAULT_2
6762 * @arg @ref LL_HRTIM_FAULT_3
6763 * @arg @ref LL_HRTIM_FAULT_4
6764 * @arg @ref LL_HRTIM_FAULT_5
6765 * @param Configuration This parameter must be a combination of all the following values:
6766 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT..LL_HRTIM_FLT_SRC_INTERNAL
6767 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW..LL_HRTIM_FLT_POLARITY_HIGH
6768 * @retval None
6769 */
6770 __STATIC_INLINE void LL_HRTIM_FLT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Configuration)
6771 {
6777 }
6779 /**
6780 * @brief Set the source of a fault signal.
6781 * @rmtoll FLTINR1 FLT1SRC LL_HRTIM_FLT_SetSrc\n
6782 * FLTINR1 FLT2SRC LL_HRTIM_FLT_SetSrc\n
6783 * FLTINR1 FLT3SRC LL_HRTIM_FLT_SetSrc\n
6784 * FLTINR1 FLT4SRC LL_HRTIM_FLT_SetSrc\n
6785 * FLTINR2 FLT5SRC LL_HRTIM_FLT_SetSrc
6786 * @note This function must not be called when the fault channel is enabled.
6787 * @param HRTIMx High Resolution Timer instance
6788 * @param Fault This parameter can be one of the following values:
6789 * @arg @ref LL_HRTIM_FAULT_1
6790 * @arg @ref LL_HRTIM_FAULT_2
6791 * @arg @ref LL_HRTIM_FAULT_3
6792 * @arg @ref LL_HRTIM_FAULT_4
6793 * @arg @ref LL_HRTIM_FAULT_5
6794 * @param Src This parameter can be one of the following values:
6795 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT
6796 * @arg @ref LL_HRTIM_FLT_SRC_INTERNAL
6797 * @retval None
6798 */
6800 {
6804 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1SRC << REG_SHIFT_TAB_FLTxE[iFault]), (Src << REG_SHIFT_TAB_FLTxE[iFault]));
6805 }
6807 /**
6808 * @brief Get actual source of a fault signal.
6809 * @rmtoll FLTINR1 FLT1SRC LL_HRTIM_FLT_GetSrc\n
6810 * FLTINR1 FLT2SRC LL_HRTIM_FLT_GetSrc\n
6811 * FLTINR1 FLT3SRC LL_HRTIM_FLT_GetSrc\n
6812 * FLTINR1 FLT4SRC LL_HRTIM_FLT_GetSrc\n
6813 * FLTINR2 FLT5SRC LL_HRTIM_FLT_GetSrc
6814 * @param HRTIMx High Resolution Timer instance
6815 * @param Fault This parameter can be one of the following values:
6816 * @arg @ref LL_HRTIM_FAULT_1
6817 * @arg @ref LL_HRTIM_FAULT_2
6818 * @arg @ref LL_HRTIM_FAULT_3
6819 * @arg @ref LL_HRTIM_FAULT_4
6820 * @arg @ref LL_HRTIM_FAULT_5
6821 * @retval Source This parameter can be one of the following values:
6822 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT
6823 * @arg @ref LL_HRTIM_FLT_SRC_INTERNAL
6824 */
6826 {
6830 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1SRC << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
6831 }
6833 /**
6834 * @brief Set the polarity of a fault signal.
6835 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_SetPolarity\n
6836 * FLTINR1 FLT2P LL_HRTIM_FLT_SetPolarity\n
6837 * FLTINR1 FLT3P LL_HRTIM_FLT_SetPolarity\n
6838 * FLTINR1 FLT4P LL_HRTIM_FLT_SetPolarity\n
6839 * FLTINR2 FLT5P LL_HRTIM_FLT_SetPolarity
6840 * @note This function must not be called when the fault channel is enabled.
6841 * @param HRTIMx High Resolution Timer instance
6842 * @param Fault This parameter can be one of the following values:
6843 * @arg @ref LL_HRTIM_FAULT_1
6844 * @arg @ref LL_HRTIM_FAULT_2
6845 * @arg @ref LL_HRTIM_FAULT_3
6846 * @arg @ref LL_HRTIM_FAULT_4
6847 * @arg @ref LL_HRTIM_FAULT_5
6848 * @param Polarity This parameter can be one of the following values:
6849 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW
6850 * @arg @ref LL_HRTIM_FLT_POLARITY_HIGH
6851 * @retval None
6852 */
6853 __STATIC_INLINE void LL_HRTIM_FLT_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Polarity)
6854 {
6858 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1P << REG_SHIFT_TAB_FLTxE[iFault]), (Polarity << REG_SHIFT_TAB_FLTxE[iFault]));
6859 }
6861 /**
6862 * @brief Get actual polarity of a fault signal.
6863 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_GetPolarity\n
6864 * FLTINR1 FLT2P LL_HRTIM_FLT_GetPolarity\n
6865 * FLTINR1 FLT3P LL_HRTIM_FLT_GetPolarity\n
6866 * FLTINR1 FLT4P LL_HRTIM_FLT_GetPolarity\n
6867 * FLTINR2 FLT5P LL_HRTIM_FLT_GetPolarity
6868 * @param HRTIMx High Resolution Timer instance
6869 * @param Fault This parameter can be one of the following values:
6870 * @arg @ref LL_HRTIM_FAULT_1
6871 * @arg @ref LL_HRTIM_FAULT_2
6872 * @arg @ref LL_HRTIM_FAULT_3
6873 * @arg @ref LL_HRTIM_FAULT_4
6874 * @arg @ref LL_HRTIM_FAULT_5
6875 * @retval Polarity This parameter can be one of the following values:
6876 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW
6877 * @arg @ref LL_HRTIM_FLT_POLARITY_HIGH
6878 */
6880 {
6884 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1P << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
6885 }
6887 /**
6888 * @brief Set the digital noise filter of a fault signal.
6889 * @rmtoll FLTINR1 FLT1F LL_HRTIM_FLT_SetFilter\n
6890 * FLTINR1 FLT2F LL_HRTIM_FLT_SetFilter\n
6891 * FLTINR1 FLT3F LL_HRTIM_FLT_SetFilter\n
6892 * FLTINR1 FLT4F LL_HRTIM_FLT_SetFilter\n
6893 * FLTINR2 FLT5F LL_HRTIM_FLT_SetFilter
6894 * @note This function must not be called when the fault channel is enabled.
6895 * @param HRTIMx High Resolution Timer instance
6896 * @param Fault This parameter can be one of the following values:
6897 * @arg @ref LL_HRTIM_FAULT_1
6898 * @arg @ref LL_HRTIM_FAULT_2
6899 * @arg @ref LL_HRTIM_FAULT_3
6900 * @arg @ref LL_HRTIM_FAULT_4
6901 * @arg @ref LL_HRTIM_FAULT_5
6902 * @param Filter This parameter can be one of the following values:
6903 * @arg @ref LL_HRTIM_FLT_FILTER_NONE
6904 * @arg @ref LL_HRTIM_FLT_FILTER_1
6905 * @arg @ref LL_HRTIM_FLT_FILTER_2
6906 * @arg @ref LL_HRTIM_FLT_FILTER_3
6907 * @arg @ref LL_HRTIM_FLT_FILTER_4
6908 * @arg @ref LL_HRTIM_FLT_FILTER_5
6909 * @arg @ref LL_HRTIM_FLT_FILTER_6
6910 * @arg @ref LL_HRTIM_FLT_FILTER_7
6911 * @arg @ref LL_HRTIM_FLT_FILTER_8
6912 * @arg @ref LL_HRTIM_FLT_FILTER_9
6913 * @arg @ref LL_HRTIM_FLT_FILTER_10
6914 * @arg @ref LL_HRTIM_FLT_FILTER_11
6915 * @arg @ref LL_HRTIM_FLT_FILTER_12
6916 * @arg @ref LL_HRTIM_FLT_FILTER_13
6917 * @arg @ref LL_HRTIM_FLT_FILTER_14
6918 * @arg @ref LL_HRTIM_FLT_FILTER_15
6919 * @retval None
6920 */
6921 __STATIC_INLINE void LL_HRTIM_FLT_SetFilter(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Filter)
6922 {
6926 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1F << REG_SHIFT_TAB_FLTxE[iFault]), (Filter << REG_SHIFT_TAB_FLTxE[iFault]));
6927 }
6929 /**
6930 * @brief Get actual digital noise filter setting of a fault signal.
6931 * @rmtoll FLTINR1 FLT1F LL_HRTIM_FLT_GetFilter\n
6932 * FLTINR1 FLT2F LL_HRTIM_FLT_GetFilter\n
6933 * FLTINR1 FLT3F LL_HRTIM_FLT_GetFilter\n
6934 * FLTINR1 FLT4F LL_HRTIM_FLT_GetFilter\n
6935 * FLTINR2 FLT5F LL_HRTIM_FLT_GetFilter
6936 * @param HRTIMx High Resolution Timer instance
6937 * @param Fault This parameter can be one of the following values:
6938 * @arg @ref LL_HRTIM_FAULT_1
6939 * @arg @ref LL_HRTIM_FAULT_2
6940 * @arg @ref LL_HRTIM_FAULT_3
6941 * @arg @ref LL_HRTIM_FAULT_4
6942 * @arg @ref LL_HRTIM_FAULT_5
6943 * @retval Filter This parameter can be one of the following values:
6944 * @arg @ref LL_HRTIM_FLT_FILTER_NONE
6945 * @arg @ref LL_HRTIM_FLT_FILTER_1
6946 * @arg @ref LL_HRTIM_FLT_FILTER_2
6947 * @arg @ref LL_HRTIM_FLT_FILTER_3
6948 * @arg @ref LL_HRTIM_FLT_FILTER_4
6949 * @arg @ref LL_HRTIM_FLT_FILTER_5
6950 * @arg @ref LL_HRTIM_FLT_FILTER_6
6951 * @arg @ref LL_HRTIM_FLT_FILTER_7
6952 * @arg @ref LL_HRTIM_FLT_FILTER_8
6953 * @arg @ref LL_HRTIM_FLT_FILTER_9
6954 * @arg @ref LL_HRTIM_FLT_FILTER_10
6955 * @arg @ref LL_HRTIM_FLT_FILTER_11
6956 * @arg @ref LL_HRTIM_FLT_FILTER_12
6957 * @arg @ref LL_HRTIM_FLT_FILTER_13
6958 * @arg @ref LL_HRTIM_FLT_FILTER_14
6959 * @arg @ref LL_HRTIM_FLT_FILTER_15
6960 */
6962 {
6966 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1F << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
6968 }
6970 /**
6971 * @brief Set the fault circuitry prescaler.
6972 * @rmtoll FLTINR2 FLTSD LL_HRTIM_FLT_SetPrescaler
6973 * @param HRTIMx High Resolution Timer instance
6974 * @param Prescaler This parameter can be one of the following values:
6975 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV1
6976 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV2
6977 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV4
6978 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV8
6979 * @retval None
6980 */
6982 {
6984 }
6986 /**
6987 * @brief Get actual fault circuitry prescaler setting.
6988 * @rmtoll FLTINR2 FLTSD LL_HRTIM_FLT_GetPrescaler
6989 * @param HRTIMx High Resolution Timer instance
6990 * @retval Prescaler This parameter can be one of the following values:
6991 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV1
6992 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV2
6993 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV4
6994 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV8
6995 */
6997 {
6999 }
7001 /**
7002 * @brief Lock the fault signal conditioning settings.
7003 * @rmtoll FLTINR1 FLT1LCK LL_HRTIM_FLT_Lock\n
7004 * FLTINR1 FLT2LCK LL_HRTIM_FLT_Lock\n
7005 * FLTINR1 FLT3LCK LL_HRTIM_FLT_Lock\n
7006 * FLTINR1 FLT4LCK LL_HRTIM_FLT_Lock\n
7007 * FLTINR2 FLT5LCK LL_HRTIM_FLT_Lock
7008 * @param HRTIMx High Resolution Timer instance
7009 * @param Fault This parameter can be one of the following values:
7010 * @arg @ref LL_HRTIM_FAULT_1
7011 * @arg @ref LL_HRTIM_FAULT_2
7012 * @arg @ref LL_HRTIM_FAULT_3
7013 * @arg @ref LL_HRTIM_FAULT_4
7014 * @arg @ref LL_HRTIM_FAULT_5
7015 * @retval None
7016 */
7018 {
7023 }
7025 /**
7026 * @brief Enable the fault circuitry for the designated fault input.
7027 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_Enable\n
7028 * FLTINR1 FLT2E LL_HRTIM_FLT_Enable\n
7029 * FLTINR1 FLT3E LL_HRTIM_FLT_Enable\n
7030 * FLTINR1 FLT4E LL_HRTIM_FLT_Enable\n
7031 * FLTINR2 FLT5E LL_HRTIM_FLT_Enable
7032 * @param HRTIMx High Resolution Timer instance
7033 * @param Fault This parameter can be one of the following values:
7034 * @arg @ref LL_HRTIM_FAULT_1
7035 * @arg @ref LL_HRTIM_FAULT_2
7036 * @arg @ref LL_HRTIM_FAULT_3
7037 * @arg @ref LL_HRTIM_FAULT_4
7038 * @arg @ref LL_HRTIM_FAULT_5
7039 * @retval None
7040 */
7042 {
7047 }
7049 /**
7050 * @brief Disable the fault circuitry for for the designated fault input.
7051 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_Disable\n
7052 * FLTINR1 FLT2E LL_HRTIM_FLT_Disable\n
7053 * FLTINR1 FLT3E LL_HRTIM_FLT_Disable\n
7054 * FLTINR1 FLT4E LL_HRTIM_FLT_Disable\n
7055 * FLTINR2 FLT5E LL_HRTIM_FLT_Disable
7056 * @param HRTIMx High Resolution Timer instance
7057 * @param Fault This parameter can be one of the following values:
7058 * @arg @ref LL_HRTIM_FAULT_1
7059 * @arg @ref LL_HRTIM_FAULT_2
7060 * @arg @ref LL_HRTIM_FAULT_3
7061 * @arg @ref LL_HRTIM_FAULT_4
7062 * @arg @ref LL_HRTIM_FAULT_5
7063 * @retval None
7064 */
7066 {
7071 }
7073 /**
7074 * @brief Indicate whether the fault circuitry is enabled for a given fault input.
7075 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_IsEnabled\n
7076 * FLTINR1 FLT2E LL_HRTIM_FLT_IsEnabled\n
7077 * FLTINR1 FLT3E LL_HRTIM_FLT_IsEnabled\n
7078 * FLTINR1 FLT4E LL_HRTIM_FLT_IsEnabled\n
7079 * FLTINR2 FLT5E LL_HRTIM_FLT_IsEnabled
7080 * @param HRTIMx High Resolution Timer instance
7081 * @param Fault This parameter can be one of the following values:
7082 * @arg @ref LL_HRTIM_FAULT_1
7083 * @arg @ref LL_HRTIM_FAULT_2
7084 * @arg @ref LL_HRTIM_FAULT_3
7085 * @arg @ref LL_HRTIM_FAULT_4
7086 * @arg @ref LL_HRTIM_FAULT_5
7087 * @retval State of FLTxEN bit in HRTIM_FLTINRx register (1 or 0).
7088 */
7090 {
7092 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.FLTINR1) +
7094 return (((READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1E << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]) ==
7096 }
7098 /**
7099 * @}
7100 */
7102 /** @defgroup HRTIM_LL_EF_Burst_Mode_management Burst_Mode_management
7103 * @{
7104 */
7106 /**
7107 * @brief Configure the burst mode controller.
7108 * @rmtoll BMCR BMOM LL_HRTIM_BM_Config\n
7109 * BMCR BMCLK LL_HRTIM_BM_Config\n
7110 * BMCR BMPRSC LL_HRTIM_BM_Config
7111 * @param HRTIMx High Resolution Timer instance
7112 * @param Configuration This parameter must be a combination of all the following values:
7113 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT or @ref LL_HRTIM_BM_MODE_CONTINOUS
7114 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER or ... or @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7115 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1 or ... @ref LL_HRTIM_BM_PRESCALER_DIV32768
7116 * @retval None
7117 */
7119 {
7121 }
7123 /**
7124 * @brief Set the burst mode controller operating mode.
7125 * @rmtoll BMCR BMOM LL_HRTIM_BM_SetMode
7126 * @param HRTIMx High Resolution Timer instance
7127 * @param Mode This parameter can be one of the following values:
7128 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT
7129 * @arg @ref LL_HRTIM_BM_MODE_CONTINOUS
7130 * @retval None
7131 */
7133 {
7135 }
7137 /**
7138 * @brief Get actual burst mode controller operating mode.
7139 * @rmtoll BMCR BMOM LL_HRTIM_BM_GetMode
7140 * @param HRTIMx High Resolution Timer instance
7141 * @retval Mode This parameter can be one of the following values:
7142 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT
7143 * @arg @ref LL_HRTIM_BM_MODE_CONTINOUS
7144 */
7146 {
7148 }
7150 /**
7151 * @brief Set the burst mode controller clock source.
7152 * @rmtoll BMCR BMCLK LL_HRTIM_BM_SetClockSrc
7153 * @param HRTIMx High Resolution Timer instance
7154 * @param ClockSrc This parameter can be one of the following values:
7155 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER
7156 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_A
7157 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_B
7158 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_C
7159 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_D
7160 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_E
7161 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM16_OC
7162 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM17_OC
7163 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM7_TRGO
7164 * @arg @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7165 * @retval None
7166 */
7168 {
7170 }
7172 /**
7173 * @brief Get actual burst mode controller clock source.
7174 * @rmtoll BMCR BMCLK LL_HRTIM_BM_GetClockSrc
7175 * @param HRTIMx High Resolution Timer instance
7176 * @retval ClockSrc This parameter can be one of the following values:
7177 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER
7178 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_A
7179 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_B
7180 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_C
7181 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_D
7182 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_E
7183 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM16_OC
7184 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM17_OC
7185 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM7_TRGO
7186 * @arg @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7187 * @retval ClockSrc This parameter can be one of the following values:
7188 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER
7189 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_A
7190 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_B
7191 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_C
7192 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_D
7193 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_E
7194 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM16_OC
7195 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM17_OC
7196 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM7_TRGO
7197 * @arg @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7198 */
7200 {
7202 }
7204 /**
7205 * @brief Set the burst mode controller prescaler.
7206 * @rmtoll BMCR BMPRSC LL_HRTIM_BM_SetPrescaler
7207 * @param HRTIMx High Resolution Timer instance
7208 * @param Prescaler This parameter can be one of the following values:
7209 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1
7210 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2
7211 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4
7212 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8
7213 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16
7214 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32
7215 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV64
7216 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV128
7217 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV256
7218 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV512
7219 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1024
7220 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2048
7221 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4096
7222 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8192
7223 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16384
7224 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32768
7225 * @retval None
7226 */
7228 {
7230 }
7232 /**
7233 * @brief Get actual burst mode controller prescaler setting.
7234 * @rmtoll BMCR BMPRSC LL_HRTIM_BM_GetPrescaler
7235 * @param HRTIMx High Resolution Timer instance
7236 * @retval Prescaler This parameter can be one of the following values:
7237 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1
7238 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2
7239 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4
7240 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8
7241 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16
7242 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32
7243 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV64
7244 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV128
7245 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV256
7246 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV512
7247 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1024
7248 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2048
7249 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4096
7250 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8192
7251 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16384
7252 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32768
7253 */
7255 {
7257 }
7259 /**
7260 * @brief Enable burst mode compare and period registers preload.
7261 * @rmtoll BMCR BMPREN LL_HRTIM_BM_EnablePreload
7262 * @param HRTIMx High Resolution Timer instance
7263 * @retval None
7264 */
7266 {
7268 }
7270 /**
7271 * @brief Disable burst mode compare and period registers preload.
7272 * @rmtoll BMCR BMPREN LL_HRTIM_BM_DisablePreload
7273 * @param HRTIMx High Resolution Timer instance
7274 * @retval None
7275 */
7277 {
7279 }
7281 /**
7282 * @brief Indicate whether burst mode compare and period registers are preloaded.
7283 * @rmtoll BMCR BMPREN LL_HRTIM_BM_IsEnabledPreload
7284 * @param HRTIMx High Resolution Timer instance
7285 * @retval State of BMPREN bit in HRTIM_BMCR register (1 or 0).
7286 */
7288 {
7293 }
7295 /**
7296 * @brief Set the burst mode controller trigger
7297 * @rmtoll BMTRGR SW LL_HRTIM_BM_SetTrig\n
7298 * BMTRGR MSTRST LL_HRTIM_BM_SetTrig\n
7299 * BMTRGR MSTREP LL_HRTIM_BM_SetTrig\n
7300 * BMTRGR MSTCMP1 LL_HRTIM_BM_SetTrig\n
7301 * BMTRGR MSTCMP2 LL_HRTIM_BM_SetTrig\n
7302 * BMTRGR MSTCMP3 LL_HRTIM_BM_SetTrig\n
7303 * BMTRGR MSTCMP4 LL_HRTIM_BM_SetTrig\n
7304 * BMTRGR TARST LL_HRTIM_BM_SetTrig\n
7305 * BMTRGR TAREP LL_HRTIM_BM_SetTrig\n
7306 * BMTRGR TACMP1 LL_HRTIM_BM_SetTrig\n
7307 * BMTRGR TACMP2 LL_HRTIM_BM_SetTrig\n
7308 * BMTRGR TBRST LL_HRTIM_BM_SetTrig\n
7309 * BMTRGR TBREP LL_HRTIM_BM_SetTrig\n
7310 * BMTRGR TBCMP1 LL_HRTIM_BM_SetTrig\n
7311 * BMTRGR TBCMP2 LL_HRTIM_BM_SetTrig\n
7312 * BMTRGR TCRST LL_HRTIM_BM_SetTrig\n
7313 * BMTRGR TCREP LL_HRTIM_BM_SetTrig\n
7314 * BMTRGR TCCMP1 LL_HRTIM_BM_SetTrig\n
7315 * BMTRGR TCCMP2 LL_HRTIM_BM_SetTrig\n
7316 * BMTRGR TDRST LL_HRTIM_BM_SetTrig\n
7317 * BMTRGR TDREP LL_HRTIM_BM_SetTrig\n
7318 * BMTRGR TDCMP1 LL_HRTIM_BM_SetTrig\n
7319 * BMTRGR TDCMP2 LL_HRTIM_BM_SetTrig\n
7320 * BMTRGR TERST LL_HRTIM_BM_SetTrig\n
7321 * BMTRGR TEREP LL_HRTIM_BM_SetTrig\n
7322 * BMTRGR TECMP1 LL_HRTIM_BM_SetTrig\n
7323 * BMTRGR TECMP2 LL_HRTIM_BM_SetTrig\n
7324 * BMTRGR TAEEV7 LL_HRTIM_BM_SetTrig\n
7325 * BMTRGR TAEEV8 LL_HRTIM_BM_SetTrig\n
7326 * BMTRGR EEV7 LL_HRTIM_BM_SetTrig\n
7327 * BMTRGR EEV8 LL_HRTIM_BM_SetTrig\n
7328 * BMTRGR OCHIPEV LL_HRTIM_BM_SetTrig
7329 * @param HRTIMx High Resolution Timer instance
7330 * @param Trig This parameter can be a combination of the following values:
7331 * @arg @ref LL_HRTIM_BM_TRIG_NONE
7332 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_RESET
7333 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_REPETITION
7334 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP1
7335 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP2
7336 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP3
7337 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP4
7338 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_RESET
7339 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_REPETITION
7340 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP1
7341 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP2
7342 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_RESET
7343 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_REPETITION
7344 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP1
7345 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP2
7346 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_RESET
7347 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_REPETITION
7348 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP1
7349 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP2
7350 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_RESET
7351 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_REPETITION
7352 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP1
7353 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP2
7354 * @arg @ref LL_HRTIM_BM_TRIG_TIME_RESET
7355 * @arg @ref LL_HRTIM_BM_TRIG_TIME_REPETITION
7356 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP1
7357 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP2
7358 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_EVENT7
7359 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_EVENT8
7360 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_7
7361 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_8
7362 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_ONCHIP
7363 * @retval None
7364 */
7366 {
7368 }
7370 /**
7371 * @brief Get actual burst mode controller trigger.
7372 * @rmtoll BMTRGR SW LL_HRTIM_BM_GetTrig\n
7373 * BMTRGR MSTRST LL_HRTIM_BM_GetTrig\n
7374 * BMTRGR MSTREP LL_HRTIM_BM_GetTrig\n
7375 * BMTRGR MSTCMP1 LL_HRTIM_BM_GetTrig\n
7376 * BMTRGR MSTCMP2 LL_HRTIM_BM_GetTrig\n
7377 * BMTRGR MSTCMP3 LL_HRTIM_BM_GetTrig\n
7378 * BMTRGR MSTCMP4 LL_HRTIM_BM_GetTrig\n
7379 * BMTRGR TARST LL_HRTIM_BM_GetTrig\n
7380 * BMTRGR TAREP LL_HRTIM_BM_GetTrig\n
7381 * BMTRGR TACMP1 LL_HRTIM_BM_GetTrig\n
7382 * BMTRGR TACMP2 LL_HRTIM_BM_GetTrig\n
7383 * BMTRGR TBRST LL_HRTIM_BM_GetTrig\n
7384 * BMTRGR TBREP LL_HRTIM_BM_GetTrig\n
7385 * BMTRGR TBCMP1 LL_HRTIM_BM_GetTrig\n
7386 * BMTRGR TBCMP2 LL_HRTIM_BM_GetTrig\n
7387 * BMTRGR TCRST LL_HRTIM_BM_GetTrig\n
7388 * BMTRGR TCREP LL_HRTIM_BM_GetTrig\n
7389 * BMTRGR TCCMP1 LL_HRTIM_BM_GetTrig\n
7390 * BMTRGR TCCMP2 LL_HRTIM_BM_GetTrig\n
7391 * BMTRGR TDRST LL_HRTIM_BM_GetTrig\n
7392 * BMTRGR TDREP LL_HRTIM_BM_GetTrig\n
7393 * BMTRGR TDCMP1 LL_HRTIM_BM_GetTrig\n
7394 * BMTRGR TDCMP2 LL_HRTIM_BM_GetTrig\n
7395 * BMTRGR TERST LL_HRTIM_BM_GetTrig\n
7396 * BMTRGR TEREP LL_HRTIM_BM_GetTrig\n
7397 * BMTRGR TECMP1 LL_HRTIM_BM_GetTrig\n
7398 * BMTRGR TECMP2 LL_HRTIM_BM_GetTrig\n
7399 * BMTRGR TAEEV7 LL_HRTIM_BM_GetTrig\n
7400 * BMTRGR TAEEV8 LL_HRTIM_BM_GetTrig\n
7401 * BMTRGR EEV7 LL_HRTIM_BM_GetTrig\n
7402 * BMTRGR EEV8 LL_HRTIM_BM_GetTrig\n
7403 * BMTRGR OCHIPEV LL_HRTIM_BM_GetTrig
7404 * @param HRTIMx High Resolution Timer instance
7405 * @retval Trig This parameter can be a combination of the following values:
7406 * @arg @ref LL_HRTIM_BM_TRIG_NONE
7407 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_RESET
7408 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_REPETITION
7409 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP1
7410 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP2
7411 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP3
7412 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP4
7413 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_RESET
7414 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_REPETITION
7415 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP1
7416 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP2
7417 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_RESET
7418 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_REPETITION
7419 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP1
7420 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP2
7421 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_RESET
7422 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_REPETITION
7423 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP1
7424 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP2
7425 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_RESET
7426 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_REPETITION
7427 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP1
7428 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP2
7429 * @arg @ref LL_HRTIM_BM_TRIG_TIME_RESET
7430 * @arg @ref LL_HRTIM_BM_TRIG_TIME_REPETITION
7431 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP1
7432 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP2
7433 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_EVENT7
7434 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_EVENT8
7435 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_7
7436 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_8
7437 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_ONCHIP
7438 */
7440 {
7442 }
7444 /**
7445 * @brief Set the burst mode controller compare value.
7446 * @rmtoll BMCMPR BMCMP LL_HRTIM_BM_SetCompare
7447 * @param HRTIMx High Resolution Timer instance
7448 * @param CompareValue Compare value must be above or equal to 3
7449 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
7450 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7451 * @retval None
7452 */
7454 {
7456 }
7458 /**
7459 * @brief Get actual burst mode controller compare value.
7460 * @rmtoll BMCMPR BMCMP LL_HRTIM_BM_GetCompare
7461 * @param HRTIMx High Resolution Timer instance
7462 * @retval CompareValue Compare value must be above or equal to 3
7463 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
7464 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7465 */
7467 {
7469 }
7471 /**
7472 * @brief Set the burst mode controller period.
7473 * @rmtoll BMPER BMPER LL_HRTIM_BM_SetPeriod
7474 * @param HRTIMx High Resolution Timer instance
7475 * @param Period The period value must be above or equal to 3 periods of the fHRTIM clock,
7476 * that is 0x60 if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7477 * The maximum value is 0x0000 FFDF.
7478 * @retval None
7479 */
7481 {
7483 }
7485 /**
7486 * @brief Get actual burst mode controller period.
7487 * @rmtoll BMPER BMPER LL_HRTIM_BM_GetPeriod
7488 * @param HRTIMx High Resolution Timer instance
7489 * @retval The period value must be above or equal to 3 periods of the fHRTIM clock,
7490 * that is 0x60 if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7491 * The maximum value is 0x0000 FFDF.
7492 */
7494 {
7496 }
7498 /**
7499 * @brief Enable the burst mode controller
7500 * @rmtoll BMCR BME LL_HRTIM_BM_Enable
7501 * @param HRTIMx High Resolution Timer instance
7502 * @retval None
7503 */
7505 {
7507 }
7509 /**
7510 * @brief Disable the burst mode controller
7511 * @rmtoll BMCR BME LL_HRTIM_BM_Disable
7512 * @param HRTIMx High Resolution Timer instance
7513 * @retval None
7514 */
7516 {
7518 }
7520 /**
7521 * @brief Indicate whether the burst mode controller is enabled.
7522 * @rmtoll BMCR BME LL_HRTIM_BM_IsEnabled
7523 * @param HRTIMx High Resolution Timer instance
7524 * @retval State of BME bit in HRTIM_BMCR register (1 or 0).
7525 */
7527 {
7529 }
7531 /**
7532 * @brief Trigger the burst operation (software trigger)
7533 * @rmtoll BMTRGR SW LL_HRTIM_BM_Start
7534 * @param HRTIMx High Resolution Timer instance
7535 * @retval None
7536 */
7538 {
7540 }
7542 /**
7543 * @brief Stop the burst mode operation.
7544 * @rmtoll BMCR BMSTAT LL_HRTIM_BM_Stop
7545 * @note Causes a burst mode early termination.
7546 * @param HRTIMx High Resolution Timer instance
7547 * @retval None
7548 */
7550 {
7552 }
7554 /**
7555 * @brief Get actual burst mode status
7556 * @rmtoll BMCR BMSTAT LL_HRTIM_BM_GetStatus
7557 * @param HRTIMx High Resolution Timer instance
7558 * @retval Status This parameter can be one of the following values:
7559 * @arg @ref LL_HRTIM_BM_STATUS_NORMAL
7560 * @arg @ref LL_HRTIM_BM_STATUS_BURST_ONGOING
7561 */
7563 {
7565 }
7567 /**
7568 * @}
7569 */
7571 /** @defgroup HRTIM_LL_EF_FLAG_Management FLAG_Management
7572 * @{
7573 */
7575 /**
7576 * @brief Clear the Fault 1 interrupt flag.
7577 * @rmtoll ICR FLT1C LL_HRTIM_ClearFlag_FLT1
7578 * @param HRTIMx High Resolution Timer instance
7579 * @retval None
7580 */
7582 {
7584 }
7586 /**
7587 * @brief Indicate whether Fault 1 interrupt occurred.
7588 * @rmtoll ICR FLT1 LL_HRTIM_IsActiveFlag_FLT1
7589 * @param HRTIMx High Resolution Timer instance
7590 * @retval State of FLT1 bit in HRTIM_ISR register (1 or 0).
7591 */
7593 {
7595 }
7597 /**
7598 * @brief Clear the Fault 2 interrupt flag.
7599 * @rmtoll ICR FLT2C LL_HRTIM_ClearFlag_FLT2
7600 * @param HRTIMx High Resolution Timer instance
7601 * @retval None
7602 */
7604 {
7606 }
7608 /**
7609 * @brief Indicate whether Fault 2 interrupt occurred.
7610 * @rmtoll ICR FLT2 LL_HRTIM_IsActiveFlag_FLT2
7611 * @param HRTIMx High Resolution Timer instance
7612 * @retval State of FLT2 bit in HRTIM_ISR register (1 or 0).
7613 */
7615 {
7617 }
7619 /**
7620 * @brief Clear the Fault 3 interrupt flag.
7621 * @rmtoll ICR FLT3C LL_HRTIM_ClearFlag_FLT3
7622 * @param HRTIMx High Resolution Timer instance
7623 * @retval None
7624 */
7626 {
7628 }
7630 /**
7631 * @brief Indicate whether Fault 3 interrupt occurred.
7632 * @rmtoll ICR FLT3 LL_HRTIM_IsActiveFlag_FLT3
7633 * @param HRTIMx High Resolution Timer instance
7634 * @retval State of FLT3 bit in HRTIM_ISR register (1 or 0).
7635 */
7637 {
7639 }
7641 /**
7642 * @brief Clear the Fault 4 interrupt flag.
7643 * @rmtoll ICR FLT4C LL_HRTIM_ClearFlag_FLT4
7644 * @param HRTIMx High Resolution Timer instance
7645 * @retval None
7646 */
7648 {
7650 }
7652 /**
7653 * @brief Indicate whether Fault 4 interrupt occurred.
7654 * @rmtoll ICR FLT4 LL_HRTIM_IsActiveFlag_FLT4
7655 * @param HRTIMx High Resolution Timer instance
7656 * @retval State of FLT4 bit in HRTIM_ISR register (1 or 0).
7657 */
7659 {
7661 }
7663 /**
7664 * @brief Clear the Fault 5 interrupt flag.
7665 * @rmtoll ICR FLT5C LL_HRTIM_ClearFlag_FLT5
7666 * @param HRTIMx High Resolution Timer instance
7667 * @retval None
7668 */
7670 {
7672 }
7674 /**
7675 * @brief Indicate whether Fault 5 interrupt occurred.
7676 * @rmtoll ICR FLT5 LL_HRTIM_IsActiveFlag_FLT5
7677 * @param HRTIMx High Resolution Timer instance
7678 * @retval State of FLT5 bit in HRTIM_ISR register (1 or 0).
7679 */
7681 {
7683 }
7685 /**
7686 * @brief Clear the System Fault interrupt flag.
7687 * @rmtoll ICR SYSFLTC LL_HRTIM_ClearFlag_SYSFLT
7688 * @param HRTIMx High Resolution Timer instance
7689 * @retval None
7690 */
7692 {
7694 }
7696 /**
7697 * @brief Indicate whether System Fault interrupt occurred.
7698 * @rmtoll ISR SYSFLT LL_HRTIM_IsActiveFlag_SYSFLT
7699 * @param HRTIMx High Resolution Timer instance
7700 * @retval State of SYSFLT bit in HRTIM_ISR register (1 or 0).
7701 */
7703 {
7704 return ((READ_BIT(HRTIMx->sCommonRegs.ISR, HRTIM_ISR_SYSFLT) == (HRTIM_ISR_SYSFLT)) ? 1UL : 0UL);
7705 }
7707 /**
7708 * @brief Clear the Burst Mode period interrupt flag.
7709 * @rmtoll ICR BMPERC LL_HRTIM_ClearFlag_BMPER
7710 * @param HRTIMx High Resolution Timer instance
7711 * @retval None
7712 */
7714 {
7716 }
7718 /**
7719 * @brief Indicate whether Burst Mode period interrupt occurred.
7720 * @rmtoll ISR BMPER LL_HRTIM_IsActiveFlag_BMPER
7721 * @param HRTIMx High Resolution Timer instance
7722 * @retval State of BMPER bit in HRTIM_ISR register (1 or 0).
7723 */
7725 {
7726 return ((READ_BIT(HRTIMx->sCommonRegs.ISR, HRTIM_ISR_BMPER) == (HRTIM_ISR_BMPER)) ? 1UL : 0UL);
7727 }
7729 /**
7730 * @brief Clear the Synchronization Input interrupt flag.
7731 * @rmtoll MICR SYNCC LL_HRTIM_ClearFlag_SYNC
7732 * @param HRTIMx High Resolution Timer instance
7733 * @retval None
7734 */
7736 {
7738 }
7740 /**
7741 * @brief Indicate whether the Synchronization Input interrupt occurred.
7742 * @rmtoll MISR SYNC LL_HRTIM_IsActiveFlag_SYNC
7743 * @param HRTIMx High Resolution Timer instance
7744 * @retval State of SYNC bit in HRTIM_MISR register (1 or 0).
7745 */
7747 {
7748 return ((READ_BIT(HRTIMx->sMasterRegs.MISR, HRTIM_MISR_SYNC) == (HRTIM_MISR_SYNC)) ? 1UL : 0UL);
7749 }
7751 /**
7752 * @brief Clear the update interrupt flag for a given timer (including the master timer) .
7753 * @rmtoll MICR MUPDC LL_HRTIM_ClearFlag_UPDATE\n
7754 * TIMxICR UPDC LL_HRTIM_ClearFlag_UPDATE
7755 * @param HRTIMx High Resolution Timer instance
7756 * @param Timer This parameter can be one of the following values:
7757 * @arg @ref LL_HRTIM_TIMER_MASTER
7758 * @arg @ref LL_HRTIM_TIMER_A
7759 * @arg @ref LL_HRTIM_TIMER_B
7760 * @arg @ref LL_HRTIM_TIMER_C
7761 * @arg @ref LL_HRTIM_TIMER_D
7762 * @arg @ref LL_HRTIM_TIMER_E
7763 * @retval None
7764 */
7766 {
7771 }
7773 /**
7774 * @brief Indicate whether the update interrupt has occurred for a given timer (including the master timer) .
7775 * @rmtoll MISR MUPD LL_HRTIM_IsActiveFlag_UPDATE\n
7776 * TIMxISR UPD LL_HRTIM_IsActiveFlag_UPDATE
7777 * @param HRTIMx High Resolution Timer instance
7778 * @param Timer This parameter can be one of the following values:
7779 * @arg @ref LL_HRTIM_TIMER_MASTER
7780 * @arg @ref LL_HRTIM_TIMER_A
7781 * @arg @ref LL_HRTIM_TIMER_B
7782 * @arg @ref LL_HRTIM_TIMER_C
7783 * @arg @ref LL_HRTIM_TIMER_D
7784 * @arg @ref LL_HRTIM_TIMER_E
7785 * @retval State of MUPD/UPD bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7786 */
7788 {
7790 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
7794 }
7796 /**
7797 * @brief Clear the repetition interrupt flag for a given timer (including the master timer) .
7798 * @rmtoll MICR MREPC LL_HRTIM_ClearFlag_REP\n
7799 * TIMxICR REPC LL_HRTIM_ClearFlag_REP
7800 * @param HRTIMx High Resolution Timer instance
7801 * @param Timer This parameter can be one of the following values:
7802 * @arg @ref LL_HRTIM_TIMER_MASTER
7803 * @arg @ref LL_HRTIM_TIMER_A
7804 * @arg @ref LL_HRTIM_TIMER_B
7805 * @arg @ref LL_HRTIM_TIMER_C
7806 * @arg @ref LL_HRTIM_TIMER_D
7807 * @arg @ref LL_HRTIM_TIMER_E
7808 * @retval None
7809 */
7811 {
7817 }
7819 /**
7820 * @brief Indicate whether the repetition interrupt has occurred for a given timer (including the master timer) .
7821 * @rmtoll MISR MREP LL_HRTIM_IsActiveFlag_REP\n
7822 * TIMxISR REP LL_HRTIM_IsActiveFlag_REP
7823 * @param HRTIMx High Resolution Timer instance
7824 * @param Timer This parameter can be one of the following values:
7825 * @arg @ref LL_HRTIM_TIMER_MASTER
7826 * @arg @ref LL_HRTIM_TIMER_A
7827 * @arg @ref LL_HRTIM_TIMER_B
7828 * @arg @ref LL_HRTIM_TIMER_C
7829 * @arg @ref LL_HRTIM_TIMER_D
7830 * @arg @ref LL_HRTIM_TIMER_E
7831 * @retval State of MREP/REP bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7832 */
7834 {
7836 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
7840 }
7842 /**
7843 * @brief Clear the compare 1 match interrupt for a given timer (including the master timer).
7844 * @rmtoll MICR MCMP1C LL_HRTIM_ClearFlag_CMP1\n
7845 * TIMxICR CMP1C LL_HRTIM_ClearFlag_CMP1
7846 * @param HRTIMx High Resolution Timer instance
7847 * @param Timer This parameter can be one of the following values:
7848 * @arg @ref LL_HRTIM_TIMER_MASTER
7849 * @arg @ref LL_HRTIM_TIMER_A
7850 * @arg @ref LL_HRTIM_TIMER_B
7851 * @arg @ref LL_HRTIM_TIMER_C
7852 * @arg @ref LL_HRTIM_TIMER_D
7853 * @arg @ref LL_HRTIM_TIMER_E
7854 * @retval None
7855 */
7857 {
7862 }
7864 /**
7865 * @brief Indicate whether the compare match 1 interrupt has occurred for a given timer (including the master timer) .
7866 * @rmtoll MISR MCMP1 LL_HRTIM_IsActiveFlag_CMP1\n
7867 * TIMxISR CMP1 LL_HRTIM_IsActiveFlag_CMP1
7868 * @param HRTIMx High Resolution Timer instance
7869 * @param Timer This parameter can be one of the following values:
7870 * @arg @ref LL_HRTIM_TIMER_MASTER
7871 * @arg @ref LL_HRTIM_TIMER_A
7872 * @arg @ref LL_HRTIM_TIMER_B
7873 * @arg @ref LL_HRTIM_TIMER_C
7874 * @arg @ref LL_HRTIM_TIMER_D
7875 * @arg @ref LL_HRTIM_TIMER_E
7876 * @retval State of MCMP1/CMP1 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7877 */
7879 {
7881 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
7885 }
7887 /**
7888 * @brief Clear the compare 2 match interrupt for a given timer (including the master timer).
7889 * @rmtoll MICR MCMP2C LL_HRTIM_ClearFlag_CMP2\n
7890 * TIMxICR CMP2C LL_HRTIM_ClearFlag_CMP2
7891 * @param HRTIMx High Resolution Timer instance
7892 * @param Timer This parameter can be one of the following values:
7893 * @arg @ref LL_HRTIM_TIMER_MASTER
7894 * @arg @ref LL_HRTIM_TIMER_A
7895 * @arg @ref LL_HRTIM_TIMER_B
7896 * @arg @ref LL_HRTIM_TIMER_C
7897 * @arg @ref LL_HRTIM_TIMER_D
7898 * @arg @ref LL_HRTIM_TIMER_E
7899 * @retval None
7900 */
7902 {
7907 }
7909 /**
7910 * @brief Indicate whether the compare match 2 interrupt has occurred for a given timer (including the master timer) .
7911 * @rmtoll MISR MCMP2 LL_HRTIM_IsActiveFlag_CMP2\n
7912 * TIMxISR CMP2 LL_HRTIM_IsActiveFlag_CMP2
7913 * @param HRTIMx High Resolution Timer instance
7914 * @param Timer This parameter can be one of the following values:
7915 * @arg @ref LL_HRTIM_TIMER_MASTER
7916 * @arg @ref LL_HRTIM_TIMER_A
7917 * @arg @ref LL_HRTIM_TIMER_B
7918 * @arg @ref LL_HRTIM_TIMER_C
7919 * @arg @ref LL_HRTIM_TIMER_D
7920 * @arg @ref LL_HRTIM_TIMER_E
7921 * @retval State of MCMP2/CMP2 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7922 */
7924 {
7926 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
7930 }
7932 /**
7933 * @brief Clear the compare 3 match interrupt for a given timer (including the master timer).
7934 * @rmtoll MICR MCMP3C LL_HRTIM_ClearFlag_CMP3\n
7935 * TIMxICR CMP3C LL_HRTIM_ClearFlag_CMP3
7936 * @param HRTIMx High Resolution Timer instance
7937 * @param Timer This parameter can be one of the following values:
7938 * @arg @ref LL_HRTIM_TIMER_MASTER
7939 * @arg @ref LL_HRTIM_TIMER_A
7940 * @arg @ref LL_HRTIM_TIMER_B
7941 * @arg @ref LL_HRTIM_TIMER_C
7942 * @arg @ref LL_HRTIM_TIMER_D
7943 * @arg @ref LL_HRTIM_TIMER_E
7944 * @retval None
7945 */
7947 {
7952 }
7954 /**
7955 * @brief Indicate whether the compare match 3 interrupt has occurred for a given timer (including the master timer) .
7956 * @rmtoll MISR MCMP3 LL_HRTIM_IsActiveFlag_CMP3\n
7957 * TIMxISR CMP3 LL_HRTIM_IsActiveFlag_CMP3
7958 * @param HRTIMx High Resolution Timer instance
7959 * @param Timer This parameter can be one of the following values:
7960 * @arg @ref LL_HRTIM_TIMER_MASTER
7961 * @arg @ref LL_HRTIM_TIMER_A
7962 * @arg @ref LL_HRTIM_TIMER_B
7963 * @arg @ref LL_HRTIM_TIMER_C
7964 * @arg @ref LL_HRTIM_TIMER_D
7965 * @arg @ref LL_HRTIM_TIMER_E
7966 * @retval State of MCMP3/CMP3 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7967 */
7969 {
7971 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
7975 }
7977 /**
7978 * @brief Clear the compare 4 match interrupt for a given timer (including the master timer).
7979 * @rmtoll MICR MCMP4C LL_HRTIM_ClearFlag_CMP4\n
7980 * TIMxICR CMP4C LL_HRTIM_ClearFlag_CMP4
7981 * @param HRTIMx High Resolution Timer instance
7982 * @param Timer This parameter can be one of the following values:
7983 * @arg @ref LL_HRTIM_TIMER_MASTER
7984 * @arg @ref LL_HRTIM_TIMER_A
7985 * @arg @ref LL_HRTIM_TIMER_B
7986 * @arg @ref LL_HRTIM_TIMER_C
7987 * @arg @ref LL_HRTIM_TIMER_D
7988 * @arg @ref LL_HRTIM_TIMER_E
7989 * @retval None
7990 */
7992 {
7997 }
7999 /**
8000 * @brief Indicate whether the compare match 4 interrupt has occurred for a given timer (including the master timer) .
8001 * @rmtoll MISR MCMP4 LL_HRTIM_IsActiveFlag_CMP4\n
8002 * TIMxISR CMP4 LL_HRTIM_IsActiveFlag_CMP4
8003 * @param HRTIMx High Resolution Timer instance
8004 * @param Timer This parameter can be one of the following values:
8005 * @arg @ref LL_HRTIM_TIMER_MASTER
8006 * @arg @ref LL_HRTIM_TIMER_A
8007 * @arg @ref LL_HRTIM_TIMER_B
8008 * @arg @ref LL_HRTIM_TIMER_C
8009 * @arg @ref LL_HRTIM_TIMER_D
8010 * @arg @ref LL_HRTIM_TIMER_E
8011 * @retval State of MCMP4/CMP4 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
8012 */
8014 {
8016 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8020 }
8022 /**
8023 * @brief Clear the capture 1 interrupt flag for a given timer.
8024 * @rmtoll TIMxICR CPT1C LL_HRTIM_ClearFlag_CPT1
8025 * @param HRTIMx High Resolution Timer instance
8026 * @param Timer This parameter can be one of the following values:
8027 * @arg @ref LL_HRTIM_TIMER_A
8028 * @arg @ref LL_HRTIM_TIMER_B
8029 * @arg @ref LL_HRTIM_TIMER_C
8030 * @arg @ref LL_HRTIM_TIMER_D
8031 * @arg @ref LL_HRTIM_TIMER_E
8032 * @retval None
8033 */
8035 {
8040 }
8042 /**
8043 * @brief Indicate whether the capture 1 interrupt occurred for a given timer.
8044 * @rmtoll TIMxISR CPT1 LL_HRTIM_IsActiveFlag_CPT1
8045 * @param HRTIMx High Resolution Timer instance
8046 * @param Timer This parameter can be one of the following values:
8047 * @arg @ref LL_HRTIM_TIMER_A
8048 * @arg @ref LL_HRTIM_TIMER_B
8049 * @arg @ref LL_HRTIM_TIMER_C
8050 * @arg @ref LL_HRTIM_TIMER_D
8051 * @arg @ref LL_HRTIM_TIMER_E
8052 * @retval State of CPT1 bit in HRTIM_TIMxISR register (1 or 0).
8053 */
8055 {
8057 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8061 }
8063 /**
8064 * @brief Clear the capture 2 interrupt flag for a given timer.
8065 * @rmtoll TIMxICR CPT2C LL_HRTIM_ClearFlag_CPT2
8066 * @param HRTIMx High Resolution Timer instance
8067 * @param Timer This parameter can be one of the following values:
8068 * @arg @ref LL_HRTIM_TIMER_A
8069 * @arg @ref LL_HRTIM_TIMER_B
8070 * @arg @ref LL_HRTIM_TIMER_C
8071 * @arg @ref LL_HRTIM_TIMER_D
8072 * @arg @ref LL_HRTIM_TIMER_E
8073 * @retval None
8074 */
8076 {
8081 }
8083 /**
8084 * @brief Indicate whether the capture 2 interrupt occurred for a given timer.
8085 * @rmtoll TIMxISR CPT2 LL_HRTIM_IsActiveFlag_CPT2
8086 * @param HRTIMx High Resolution Timer instance
8087 * @param Timer This parameter can be one of the following values:
8088 * @arg @ref LL_HRTIM_TIMER_A
8089 * @arg @ref LL_HRTIM_TIMER_B
8090 * @arg @ref LL_HRTIM_TIMER_C
8091 * @arg @ref LL_HRTIM_TIMER_D
8092 * @arg @ref LL_HRTIM_TIMER_E
8093 * @retval State of CPT2 bit in HRTIM_TIMxISR register (1 or 0).
8094 */
8096 {
8098 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8102 }
8104 /**
8105 * @brief Clear the output 1 set interrupt flag for a given timer.
8106 * @rmtoll TIMxICR SET1C LL_HRTIM_ClearFlag_SET1
8107 * @param HRTIMx High Resolution Timer instance
8108 * @param Timer This parameter can be one of the following values:
8109 * @arg @ref LL_HRTIM_TIMER_A
8110 * @arg @ref LL_HRTIM_TIMER_B
8111 * @arg @ref LL_HRTIM_TIMER_C
8112 * @arg @ref LL_HRTIM_TIMER_D
8113 * @arg @ref LL_HRTIM_TIMER_E
8114 * @retval None
8115 */
8117 {
8122 }
8124 /**
8125 * @brief Indicate whether the output 1 set interrupt occurred for a given timer.
8126 * @rmtoll TIMxISR SET1 LL_HRTIM_IsActiveFlag_SET1
8127 * @param HRTIMx High Resolution Timer instance
8128 * @param Timer This parameter can be one of the following values:
8129 * @arg @ref LL_HRTIM_TIMER_A
8130 * @arg @ref LL_HRTIM_TIMER_B
8131 * @arg @ref LL_HRTIM_TIMER_C
8132 * @arg @ref LL_HRTIM_TIMER_D
8133 * @arg @ref LL_HRTIM_TIMER_E
8134 * @retval State of SETx1 bit in HRTIM_TIMxISR register (1 or 0).
8135 */
8137 {
8139 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8143 }
8145 /**
8146 * @brief Clear the output 1 reset interrupt flag for a given timer.
8147 * @rmtoll TIMxICR RST1C LL_HRTIM_ClearFlag_RST1
8148 * @param HRTIMx High Resolution Timer instance
8149 * @param Timer This parameter can be one of the following values:
8150 * @arg @ref LL_HRTIM_TIMER_A
8151 * @arg @ref LL_HRTIM_TIMER_B
8152 * @arg @ref LL_HRTIM_TIMER_C
8153 * @arg @ref LL_HRTIM_TIMER_D
8154 * @arg @ref LL_HRTIM_TIMER_E
8155 * @retval None
8156 */
8158 {
8163 }
8165 /**
8166 * @brief Indicate whether the output 1 reset interrupt occurred for a given timer.
8167 * @rmtoll TIMxISR RST1 LL_HRTIM_IsActiveFlag_RST1
8168 * @param HRTIMx High Resolution Timer instance
8169 * @param Timer This parameter can be one of the following values:
8170 * @arg @ref LL_HRTIM_TIMER_A
8171 * @arg @ref LL_HRTIM_TIMER_B
8172 * @arg @ref LL_HRTIM_TIMER_C
8173 * @arg @ref LL_HRTIM_TIMER_D
8174 * @arg @ref LL_HRTIM_TIMER_E
8175 * @retval State of RSTx1 bit in HRTIM_TIMxISR register (1 or 0).
8176 */
8178 {
8180 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8184 }
8186 /**
8187 * @brief Clear the output 2 set interrupt flag for a given timer.
8188 * @rmtoll TIMxICR SET2C LL_HRTIM_ClearFlag_SET2
8189 * @param HRTIMx High Resolution Timer instance
8190 * @param Timer This parameter can be one of the following values:
8191 * @arg @ref LL_HRTIM_TIMER_A
8192 * @arg @ref LL_HRTIM_TIMER_B
8193 * @arg @ref LL_HRTIM_TIMER_C
8194 * @arg @ref LL_HRTIM_TIMER_D
8195 * @arg @ref LL_HRTIM_TIMER_E
8196 * @retval None
8197 */
8199 {
8204 }
8206 /**
8207 * @brief Indicate whether the output 2 set interrupt occurred for a given timer.
8208 * @rmtoll TIMxISR SET2 LL_HRTIM_IsActiveFlag_SET2
8209 * @param HRTIMx High Resolution Timer instance
8210 * @param Timer This parameter can be one of the following values:
8211 * @arg @ref LL_HRTIM_TIMER_A
8212 * @arg @ref LL_HRTIM_TIMER_B
8213 * @arg @ref LL_HRTIM_TIMER_C
8214 * @arg @ref LL_HRTIM_TIMER_D
8215 * @arg @ref LL_HRTIM_TIMER_E
8216 * @retval State of SETx2 bit in HRTIM_TIMxISR register (1 or 0).
8217 */
8219 {
8221 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8225 }
8227 /**
8228 * @brief Clear the output 2reset interrupt flag for a given timer.
8229 * @rmtoll TIMxICR RST2C LL_HRTIM_ClearFlag_RST2
8230 * @param HRTIMx High Resolution Timer instance
8231 * @param Timer This parameter can be one of the following values:
8232 * @arg @ref LL_HRTIM_TIMER_A
8233 * @arg @ref LL_HRTIM_TIMER_B
8234 * @arg @ref LL_HRTIM_TIMER_C
8235 * @arg @ref LL_HRTIM_TIMER_D
8236 * @arg @ref LL_HRTIM_TIMER_E
8237 * @retval None
8238 */
8240 {
8245 }
8247 /**
8248 * @brief Indicate whether the output 2 reset interrupt occurred for a given timer.
8249 * @rmtoll TIMxISR RST2 LL_HRTIM_IsActiveFlag_RST2
8250 * @param HRTIMx High Resolution Timer instance
8251 * @param Timer This parameter can be one of the following values:
8252 * @arg @ref LL_HRTIM_TIMER_A
8253 * @arg @ref LL_HRTIM_TIMER_B
8254 * @arg @ref LL_HRTIM_TIMER_C
8255 * @arg @ref LL_HRTIM_TIMER_D
8256 * @arg @ref LL_HRTIM_TIMER_E
8257 * @retval State of RSTx2 bit in HRTIM_TIMxISR register (1 or 0).
8258 */
8260 {
8262 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8266 }
8268 /**
8269 * @brief Clear the reset and/or roll-over interrupt flag for a given timer.
8270 * @rmtoll TIMxICR RSTC LL_HRTIM_ClearFlag_RST
8271 * @param HRTIMx High Resolution Timer instance
8272 * @param Timer This parameter can be one of the following values:
8273 * @arg @ref LL_HRTIM_TIMER_A
8274 * @arg @ref LL_HRTIM_TIMER_B
8275 * @arg @ref LL_HRTIM_TIMER_C
8276 * @arg @ref LL_HRTIM_TIMER_D
8277 * @arg @ref LL_HRTIM_TIMER_E
8278 * @retval None
8279 */
8281 {
8286 }
8288 /**
8289 * @brief Indicate whether the reset and/or roll-over interrupt occurred for a given timer.
8290 * @rmtoll TIMxISR RST LL_HRTIM_IsActiveFlag_RST
8291 * @param HRTIMx High Resolution Timer instance
8292 * @param Timer This parameter can be one of the following values:
8293 * @arg @ref LL_HRTIM_TIMER_A
8294 * @arg @ref LL_HRTIM_TIMER_B
8295 * @arg @ref LL_HRTIM_TIMER_C
8296 * @arg @ref LL_HRTIM_TIMER_D
8297 * @arg @ref LL_HRTIM_TIMER_E
8298 * @retval State of RST bit in HRTIM_TIMxISR register (1 or 0).
8299 */
8301 {
8303 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8307 }
8309 /**
8310 * @brief Clear the delayed protection interrupt flag for a given timer.
8311 * @rmtoll TIMxICR DLYPRTC LL_HRTIM_ClearFlag_DLYPRT
8312 * @param HRTIMx High Resolution Timer instance
8313 * @param Timer This parameter can be one of the following values:
8314 * @arg @ref LL_HRTIM_TIMER_A
8315 * @arg @ref LL_HRTIM_TIMER_B
8316 * @arg @ref LL_HRTIM_TIMER_C
8317 * @arg @ref LL_HRTIM_TIMER_D
8318 * @arg @ref LL_HRTIM_TIMER_E
8319 * @retval None
8320 */
8322 {
8327 }
8329 /**
8330 * @brief Indicate whether the delayed protection interrupt occurred for a given timer.
8331 * @rmtoll TIMxISR DLYPRT LL_HRTIM_IsActiveFlag_DLYPRT
8332 * @param HRTIMx High Resolution Timer instance
8333 * @param Timer This parameter can be one of the following values:
8334 * @arg @ref LL_HRTIM_TIMER_A
8335 * @arg @ref LL_HRTIM_TIMER_B
8336 * @arg @ref LL_HRTIM_TIMER_C
8337 * @arg @ref LL_HRTIM_TIMER_D
8338 * @arg @ref LL_HRTIM_TIMER_E
8339 * @retval State of DLYPRT bit in HRTIM_TIMxISR register (1 or 0).
8340 */
8342 {
8344 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MISR) +
8348 }
8350 /**
8351 * @}
8352 */
8354 /** @defgroup HRTIM_LL_EF_IT_Management IT_Management
8355 * @{
8356 */
8358 /**
8359 * @brief Enable the fault 1 interrupt.
8360 * @rmtoll IER FLT1IE LL_HRTIM_EnableIT_FLT1
8361 * @param HRTIMx High Resolution Timer instance
8362 * @retval None
8363 */
8365 {
8367 }
8369 /**
8370 * @brief Disable the fault 1 interrupt.
8371 * @rmtoll IER FLT1IE LL_HRTIM_DisableIT_FLT1
8372 * @param HRTIMx High Resolution Timer instance
8373 * @retval None
8374 */
8376 {
8378 }
8380 /**
8381 * @brief Indicate whether the fault 1 interrupt is enabled.
8382 * @rmtoll IER FLT1IE LL_HRTIM_IsEnabledIT_FLT1
8383 * @param HRTIMx High Resolution Timer instance
8384 * @retval State of FLT1IE bit in HRTIM_IER register (1 or 0).
8385 */
8387 {
8389 }
8391 /**
8392 * @brief Enable the fault 2 interrupt.
8393 * @rmtoll IER FLT2IE LL_HRTIM_EnableIT_FLT2
8394 * @param HRTIMx High Resolution Timer instance
8395 * @retval None
8396 */
8398 {
8400 }
8402 /**
8403 * @brief Disable the fault 2 interrupt.
8404 * @rmtoll IER FLT2IE LL_HRTIM_DisableIT_FLT2
8405 * @param HRTIMx High Resolution Timer instance
8406 * @retval None
8407 */
8409 {
8411 }
8413 /**
8414 * @brief Indicate whether the fault 2 interrupt is enabled.
8415 * @rmtoll IER FLT2IE LL_HRTIM_IsEnabledIT_FLT2
8416 * @param HRTIMx High Resolution Timer instance
8417 * @retval State of FLT2IE bit in HRTIM_IER register (1 or 0).
8418 */
8420 {
8422 }
8424 /**
8425 * @brief Enable the fault 3 interrupt.
8426 * @rmtoll IER FLT3IE LL_HRTIM_EnableIT_FLT3
8427 * @param HRTIMx High Resolution Timer instance
8428 * @retval None
8429 */
8431 {
8433 }
8435 /**
8436 * @brief Disable the fault 3 interrupt.
8437 * @rmtoll IER FLT3IE LL_HRTIM_DisableIT_FLT3
8438 * @param HRTIMx High Resolution Timer instance
8439 * @retval None
8440 */
8442 {
8444 }
8446 /**
8447 * @brief Indicate whether the fault 3 interrupt is enabled.
8448 * @rmtoll IER FLT3IE LL_HRTIM_IsEnabledIT_FLT3
8449 * @param HRTIMx High Resolution Timer instance
8450 * @retval State of FLT3IE bit in HRTIM_IER register (1 or 0).
8451 */
8453 {
8455 }
8457 /**
8458 * @brief Enable the fault 4 interrupt.
8459 * @rmtoll IER FLT4IE LL_HRTIM_EnableIT_FLT4
8460 * @param HRTIMx High Resolution Timer instance
8461 * @retval None
8462 */
8464 {
8466 }
8468 /**
8469 * @brief Disable the fault 4 interrupt.
8470 * @rmtoll IER FLT4IE LL_HRTIM_DisableIT_FLT4
8471 * @param HRTIMx High Resolution Timer instance
8472 * @retval None
8473 */
8475 {
8477 }
8479 /**
8480 * @brief Indicate whether the fault 4 interrupt is enabled.
8481 * @rmtoll IER FLT4IE LL_HRTIM_IsEnabledIT_FLT4
8482 * @param HRTIMx High Resolution Timer instance
8483 * @retval State of FLT4IE bit in HRTIM_IER register (1 or 0).
8484 */
8486 {
8488 }
8490 /**
8491 * @brief Enable the fault 5 interrupt.
8492 * @rmtoll IER FLT5IE LL_HRTIM_EnableIT_FLT5
8493 * @param HRTIMx High Resolution Timer instance
8494 * @retval None
8495 */
8497 {
8499 }
8501 /**
8502 * @brief Disable the fault 5 interrupt.
8503 * @rmtoll IER FLT5IE LL_HRTIM_DisableIT_FLT5
8504 * @param HRTIMx High Resolution Timer instance
8505 * @retval None
8506 */
8508 {
8510 }
8512 /**
8513 * @brief Indicate whether the fault 5 interrupt is enabled.
8514 * @rmtoll IER FLT5IE LL_HRTIM_IsEnabledIT_FLT5
8515 * @param HRTIMx High Resolution Timer instance
8516 * @retval State of FLT5IE bit in HRTIM_IER register (1 or 0).
8517 */
8519 {
8521 }
8523 /**
8524 * @brief Enable the system fault interrupt.
8525 * @rmtoll IER SYSFLTIE LL_HRTIM_EnableIT_SYSFLT
8526 * @param HRTIMx High Resolution Timer instance
8527 * @retval None
8528 */
8530 {
8532 }
8534 /**
8535 * @brief Disable the system fault interrupt.
8536 * @rmtoll IER SYSFLTIE LL_HRTIM_DisableIT_SYSFLT
8537 * @param HRTIMx High Resolution Timer instance
8538 * @retval None
8539 */
8541 {
8543 }
8545 /**
8546 * @brief Indicate whether the system fault interrupt is enabled.
8547 * @rmtoll IER SYSFLTIE LL_HRTIM_IsEnabledIT_SYSFLT
8548 * @param HRTIMx High Resolution Timer instance
8549 * @retval State of SYSFLTIE bit in HRTIM_IER register (1 or 0).
8550 */
8552 {
8553 return ((READ_BIT(HRTIMx->sCommonRegs.IER, HRTIM_IER_SYSFLT) == (HRTIM_IER_SYSFLT)) ? 1UL : 0UL);
8554 }
8556 /**
8557 * @brief Enable the burst mode period interrupt.
8558 * @rmtoll IER BMPERIE LL_HRTIM_EnableIT_BMPER
8559 * @param HRTIMx High Resolution Timer instance
8560 * @retval None
8561 */
8563 {
8565 }
8567 /**
8568 * @brief Disable the burst mode period interrupt.
8569 * @rmtoll IER BMPERIE LL_HRTIM_DisableIT_BMPER
8570 * @param HRTIMx High Resolution Timer instance
8571 * @retval None
8572 */
8574 {
8576 }
8578 /**
8579 * @brief Indicate whether the burst mode period interrupt is enabled.
8580 * @rmtoll IER BMPERIE LL_HRTIM_IsEnabledIT_BMPER
8581 * @param HRTIMx High Resolution Timer instance
8582 * @retval State of BMPERIE bit in HRTIM_IER register (1 or 0).
8583 */
8585 {
8586 return ((READ_BIT(HRTIMx->sCommonRegs.IER, HRTIM_IER_BMPER) == (HRTIM_IER_BMPER)) ? 1UL : 0UL);
8587 }
8589 /**
8590 * @brief Enable the synchronization input interrupt.
8591 * @rmtoll MDIER SYNCIE LL_HRTIM_EnableIT_SYNC
8592 * @param HRTIMx High Resolution Timer instance
8593 * @retval None
8594 */
8596 {
8598 }
8600 /**
8601 * @brief Disable the synchronization input interrupt.
8602 * @rmtoll MDIER SYNCIE LL_HRTIM_DisableIT_SYNC
8603 * @param HRTIMx High Resolution Timer instance
8604 * @retval None
8605 */
8607 {
8609 }
8611 /**
8612 * @brief Indicate whether the synchronization input interrupt is enabled.
8613 * @rmtoll MDIER SYNCIE LL_HRTIM_IsEnabledIT_SYNC
8614 * @param HRTIMx High Resolution Timer instance
8615 * @retval State of SYNCIE bit in HRTIM_MDIER register (1 or 0).
8616 */
8618 {
8619 return ((READ_BIT(HRTIMx->sMasterRegs.MDIER, HRTIM_MDIER_SYNCIE) == (HRTIM_MDIER_SYNCIE)) ? 1UL : 0UL);
8620 }
8622 /**
8623 * @brief Enable the update interrupt for a given timer.
8624 * @rmtoll MDIER MUPDIE LL_HRTIM_EnableIT_UPDATE\n
8625 * TIMxDIER UPDIE LL_HRTIM_EnableIT_UPDATE
8626 * @param HRTIMx High Resolution Timer instance
8627 * @param Timer This parameter can be one of the following values:
8628 * @arg @ref LL_HRTIM_TIMER_MASTER
8629 * @arg @ref LL_HRTIM_TIMER_A
8630 * @arg @ref LL_HRTIM_TIMER_B
8631 * @arg @ref LL_HRTIM_TIMER_C
8632 * @arg @ref LL_HRTIM_TIMER_D
8633 * @arg @ref LL_HRTIM_TIMER_E
8634 * @retval None
8635 */
8637 {
8642 }
8644 /**
8645 * @brief Disable the update interrupt for a given timer.
8646 * @rmtoll MDIER MUPDIE LL_HRTIM_DisableIT_UPDATE\n
8647 * TIMxDIER UPDIE LL_HRTIM_DisableIT_UPDATE
8648 * @param HRTIMx High Resolution Timer instance
8649 * @param Timer This parameter can be one of the following values:
8650 * @arg @ref LL_HRTIM_TIMER_MASTER
8651 * @arg @ref LL_HRTIM_TIMER_A
8652 * @arg @ref LL_HRTIM_TIMER_B
8653 * @arg @ref LL_HRTIM_TIMER_C
8654 * @arg @ref LL_HRTIM_TIMER_D
8655 * @arg @ref LL_HRTIM_TIMER_E
8656 * @retval None
8657 */
8659 {
8664 }
8666 /**
8667 * @brief Indicate whether the update interrupt is enabled for a given timer.
8668 * @rmtoll MDIER MUPDIE LL_HRTIM_IsEnabledIT_UPDATE\n
8669 * TIMxDIER UPDIE LL_HRTIM_IsEnabledIT_UPDATE
8670 * @param HRTIMx High Resolution Timer instance
8671 * @param Timer This parameter can be one of the following values:
8672 * @arg @ref LL_HRTIM_TIMER_MASTER
8673 * @arg @ref LL_HRTIM_TIMER_A
8674 * @arg @ref LL_HRTIM_TIMER_B
8675 * @arg @ref LL_HRTIM_TIMER_C
8676 * @arg @ref LL_HRTIM_TIMER_D
8677 * @arg @ref LL_HRTIM_TIMER_E
8678 * @retval State of MUPDIE/UPDIE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8679 */
8681 {
8683 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
8687 }
8689 /**
8690 * @brief Enable the repetition interrupt for a given timer.
8691 * @rmtoll MDIER MREPIE LL_HRTIM_EnableIT_REP\n
8692 * TIMxDIER REPIE LL_HRTIM_EnableIT_REP
8693 * @param HRTIMx High Resolution Timer instance
8694 * @param Timer This parameter can be one of the following values:
8695 * @arg @ref LL_HRTIM_TIMER_MASTER
8696 * @arg @ref LL_HRTIM_TIMER_A
8697 * @arg @ref LL_HRTIM_TIMER_B
8698 * @arg @ref LL_HRTIM_TIMER_C
8699 * @arg @ref LL_HRTIM_TIMER_D
8700 * @arg @ref LL_HRTIM_TIMER_E
8701 * @retval None
8702 */
8704 {
8709 }
8711 /**
8712 * @brief Disable the repetition interrupt for a given timer.
8713 * @rmtoll MDIER MREPIE LL_HRTIM_DisableIT_REP\n
8714 * TIMxDIER REPIE LL_HRTIM_DisableIT_REP
8715 * @param HRTIMx High Resolution Timer instance
8716 * @param Timer This parameter can be one of the following values:
8717 * @arg @ref LL_HRTIM_TIMER_MASTER
8718 * @arg @ref LL_HRTIM_TIMER_A
8719 * @arg @ref LL_HRTIM_TIMER_B
8720 * @arg @ref LL_HRTIM_TIMER_C
8721 * @arg @ref LL_HRTIM_TIMER_D
8722 * @arg @ref LL_HRTIM_TIMER_E
8723 * @retval None
8724 */
8726 {
8731 }
8733 /**
8734 * @brief Indicate whether the repetition interrupt is enabled for a given timer.
8735 * @rmtoll MDIER MREPIE LL_HRTIM_IsEnabledIT_REP\n
8736 * TIMxDIER REPIE LL_HRTIM_IsEnabledIT_REP
8737 * @param HRTIMx High Resolution Timer instance
8738 * @param Timer This parameter can be one of the following values:
8739 * @arg @ref LL_HRTIM_TIMER_MASTER
8740 * @arg @ref LL_HRTIM_TIMER_A
8741 * @arg @ref LL_HRTIM_TIMER_B
8742 * @arg @ref LL_HRTIM_TIMER_C
8743 * @arg @ref LL_HRTIM_TIMER_D
8744 * @arg @ref LL_HRTIM_TIMER_E
8745 * @retval State of MREPIE/REPIE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8746 */
8748 {
8750 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
8754 }
8756 /**
8757 * @brief Enable the compare 1 interrupt for a given timer.
8758 * @rmtoll MDIER MCMP1IE LL_HRTIM_EnableIT_CMP1\n
8759 * TIMxDIER CMP1IE LL_HRTIM_EnableIT_CMP1
8760 * @param HRTIMx High Resolution Timer instance
8761 * @param Timer This parameter can be one of the following values:
8762 * @arg @ref LL_HRTIM_TIMER_MASTER
8763 * @arg @ref LL_HRTIM_TIMER_A
8764 * @arg @ref LL_HRTIM_TIMER_B
8765 * @arg @ref LL_HRTIM_TIMER_C
8766 * @arg @ref LL_HRTIM_TIMER_D
8767 * @arg @ref LL_HRTIM_TIMER_E
8768 * @retval None
8769 */
8771 {
8776 }
8778 /**
8779 * @brief Disable the compare 1 interrupt for a given timer.
8780 * @rmtoll MDIER MCMP1IE LL_HRTIM_DisableIT_CMP1\n
8781 * TIMxDIER CMP1IE LL_HRTIM_DisableIT_CMP1
8782 * @param HRTIMx High Resolution Timer instance
8783 * @param Timer This parameter can be one of the following values:
8784 * @arg @ref LL_HRTIM_TIMER_MASTER
8785 * @arg @ref LL_HRTIM_TIMER_A
8786 * @arg @ref LL_HRTIM_TIMER_B
8787 * @arg @ref LL_HRTIM_TIMER_C
8788 * @arg @ref LL_HRTIM_TIMER_D
8789 * @arg @ref LL_HRTIM_TIMER_E
8790 * @retval None
8791 */
8793 {
8798 }
8800 /**
8801 * @brief Indicate whether the compare 1 interrupt is enabled for a given timer.
8802 * @rmtoll MDIER MCMP1IE LL_HRTIM_IsEnabledIT_CMP1\n
8803 * TIMxDIER CMP1IE LL_HRTIM_IsEnabledIT_CMP1
8804 * @param HRTIMx High Resolution Timer instance
8805 * @param Timer This parameter can be one of the following values:
8806 * @arg @ref LL_HRTIM_TIMER_MASTER
8807 * @arg @ref LL_HRTIM_TIMER_A
8808 * @arg @ref LL_HRTIM_TIMER_B
8809 * @arg @ref LL_HRTIM_TIMER_C
8810 * @arg @ref LL_HRTIM_TIMER_D
8811 * @arg @ref LL_HRTIM_TIMER_E
8812 * @retval State of MCMP1IE/CMP1IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8813 */
8815 {
8817 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
8821 }
8823 /**
8824 * @brief Enable the compare 2 interrupt for a given timer.
8825 * @rmtoll MDIER MCMP2IE LL_HRTIM_EnableIT_CMP2\n
8826 * TIMxDIER CMP2IE LL_HRTIM_EnableIT_CMP2
8827 * @param HRTIMx High Resolution Timer instance
8828 * @param Timer This parameter can be one of the following values:
8829 * @arg @ref LL_HRTIM_TIMER_MASTER
8830 * @arg @ref LL_HRTIM_TIMER_A
8831 * @arg @ref LL_HRTIM_TIMER_B
8832 * @arg @ref LL_HRTIM_TIMER_C
8833 * @arg @ref LL_HRTIM_TIMER_D
8834 * @arg @ref LL_HRTIM_TIMER_E
8835 * @retval None
8836 */
8838 {
8843 }
8845 /**
8846 * @brief Disable the compare 2 interrupt for a given timer.
8847 * @rmtoll MDIER MCMP2IE LL_HRTIM_DisableIT_CMP2\n
8848 * TIMxDIER CMP2IE LL_HRTIM_DisableIT_CMP2
8849 * @param HRTIMx High Resolution Timer instance
8850 * @param Timer This parameter can be one of the following values:
8851 * @arg @ref LL_HRTIM_TIMER_MASTER
8852 * @arg @ref LL_HRTIM_TIMER_A
8853 * @arg @ref LL_HRTIM_TIMER_B
8854 * @arg @ref LL_HRTIM_TIMER_C
8855 * @arg @ref LL_HRTIM_TIMER_D
8856 * @arg @ref LL_HRTIM_TIMER_E
8857 * @retval None
8858 */
8860 {
8865 }
8867 /**
8868 * @brief Indicate whether the compare 2 interrupt is enabled for a given timer.
8869 * @rmtoll MDIER MCMP2IE LL_HRTIM_IsEnabledIT_CMP2\n
8870 * TIMxDIER CMP2IE LL_HRTIM_IsEnabledIT_CMP2
8871 * @param HRTIMx High Resolution Timer instance
8872 * @param Timer This parameter can be one of the following values:
8873 * @arg @ref LL_HRTIM_TIMER_MASTER
8874 * @arg @ref LL_HRTIM_TIMER_A
8875 * @arg @ref LL_HRTIM_TIMER_B
8876 * @arg @ref LL_HRTIM_TIMER_C
8877 * @arg @ref LL_HRTIM_TIMER_D
8878 * @arg @ref LL_HRTIM_TIMER_E
8879 * @retval State of MCMP2IE/CMP2IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8880 */
8882 {
8884 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
8888 }
8890 /**
8891 * @brief Enable the compare 3 interrupt for a given timer.
8892 * @rmtoll MDIER MCMP3IE LL_HRTIM_EnableIT_CMP3\n
8893 * TIMxDIER CMP3IE LL_HRTIM_EnableIT_CMP3
8894 * @param HRTIMx High Resolution Timer instance
8895 * @param Timer This parameter can be one of the following values:
8896 * @arg @ref LL_HRTIM_TIMER_MASTER
8897 * @arg @ref LL_HRTIM_TIMER_A
8898 * @arg @ref LL_HRTIM_TIMER_B
8899 * @arg @ref LL_HRTIM_TIMER_C
8900 * @arg @ref LL_HRTIM_TIMER_D
8901 * @arg @ref LL_HRTIM_TIMER_E
8902 * @retval None
8903 */
8905 {
8910 }
8912 /**
8913 * @brief Disable the compare 3 interrupt for a given timer.
8914 * @rmtoll MDIER MCMP3IE LL_HRTIM_DisableIT_CMP3\n
8915 * TIMxDIER CMP3IE LL_HRTIM_DisableIT_CMP3
8916 * @param HRTIMx High Resolution Timer instance
8917 * @param Timer This parameter can be one of the following values:
8918 * @arg @ref LL_HRTIM_TIMER_MASTER
8919 * @arg @ref LL_HRTIM_TIMER_A
8920 * @arg @ref LL_HRTIM_TIMER_B
8921 * @arg @ref LL_HRTIM_TIMER_C
8922 * @arg @ref LL_HRTIM_TIMER_D
8923 * @arg @ref LL_HRTIM_TIMER_E
8924 * @retval None
8925 */
8927 {
8932 }
8934 /**
8935 * @brief Indicate whether the compare 3 interrupt is enabled for a given timer.
8936 * @rmtoll MDIER MCMP3IE LL_HRTIM_IsEnabledIT_CMP3\n
8937 * TIMxDIER CMP3IE LL_HRTIM_IsEnabledIT_CMP3
8938 * @param HRTIMx High Resolution Timer instance
8939 * @param Timer This parameter can be one of the following values:
8940 * @arg @ref LL_HRTIM_TIMER_MASTER
8941 * @arg @ref LL_HRTIM_TIMER_A
8942 * @arg @ref LL_HRTIM_TIMER_B
8943 * @arg @ref LL_HRTIM_TIMER_C
8944 * @arg @ref LL_HRTIM_TIMER_D
8945 * @arg @ref LL_HRTIM_TIMER_E
8946 * @retval State of MCMP3IE/CMP3IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8947 */
8949 {
8951 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
8955 }
8957 /**
8958 * @brief Enable the compare 4 interrupt for a given timer.
8959 * @rmtoll MDIER MCMP4IE LL_HRTIM_EnableIT_CMP4\n
8960 * TIMxDIER CMP4IE LL_HRTIM_EnableIT_CMP4
8961 * @param HRTIMx High Resolution Timer instance
8962 * @param Timer This parameter can be one of the following values:
8963 * @arg @ref LL_HRTIM_TIMER_MASTER
8964 * @arg @ref LL_HRTIM_TIMER_A
8965 * @arg @ref LL_HRTIM_TIMER_B
8966 * @arg @ref LL_HRTIM_TIMER_C
8967 * @arg @ref LL_HRTIM_TIMER_D
8968 * @arg @ref LL_HRTIM_TIMER_E
8969 * @retval None
8970 */
8972 {
8977 }
8979 /**
8980 * @brief Disable the compare 4 interrupt for a given timer.
8981 * @rmtoll MDIER MCMP4IE LL_HRTIM_DisableIT_CMP4\n
8982 * TIMxDIER CMP4IE LL_HRTIM_DisableIT_CMP4
8983 * @param HRTIMx High Resolution Timer instance
8984 * @param Timer This parameter can be one of the following values:
8985 * @arg @ref LL_HRTIM_TIMER_MASTER
8986 * @arg @ref LL_HRTIM_TIMER_A
8987 * @arg @ref LL_HRTIM_TIMER_B
8988 * @arg @ref LL_HRTIM_TIMER_C
8989 * @arg @ref LL_HRTIM_TIMER_D
8990 * @arg @ref LL_HRTIM_TIMER_E
8991 * @retval None
8992 */
8994 {
8999 }
9001 /**
9002 * @brief Indicate whether the compare 4 interrupt is enabled for a given timer.
9003 * @rmtoll MDIER MCMP4IE LL_HRTIM_IsEnabledIT_CMP4\n
9004 * TIMxDIER CMP4IE LL_HRTIM_IsEnabledIT_CMP4
9005 * @param HRTIMx High Resolution Timer instance
9006 * @param Timer This parameter can be one of the following values:
9007 * @arg @ref LL_HRTIM_TIMER_MASTER
9008 * @arg @ref LL_HRTIM_TIMER_A
9009 * @arg @ref LL_HRTIM_TIMER_B
9010 * @arg @ref LL_HRTIM_TIMER_C
9011 * @arg @ref LL_HRTIM_TIMER_D
9012 * @arg @ref LL_HRTIM_TIMER_E
9013 * @retval State of MCMP4IE/CMP4IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9014 */
9016 {
9018 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9022 }
9024 /**
9025 * @brief Enable the capture 1 interrupt for a given timer.
9026 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_EnableIT_CPT1
9027 * @param HRTIMx High Resolution Timer instance
9028 * @param Timer This parameter can be one of the following values:
9029 * @arg @ref LL_HRTIM_TIMER_A
9030 * @arg @ref LL_HRTIM_TIMER_B
9031 * @arg @ref LL_HRTIM_TIMER_C
9032 * @arg @ref LL_HRTIM_TIMER_D
9033 * @arg @ref LL_HRTIM_TIMER_E
9034 * @retval None
9035 */
9037 {
9042 }
9044 /**
9045 * @brief Enable the capture 1 interrupt for a given timer.
9046 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_DisableIT_CPT1
9047 * @param HRTIMx High Resolution Timer instance
9048 * @param Timer This parameter can be one of the following values:
9049 * @arg @ref LL_HRTIM_TIMER_A
9050 * @arg @ref LL_HRTIM_TIMER_B
9051 * @arg @ref LL_HRTIM_TIMER_C
9052 * @arg @ref LL_HRTIM_TIMER_D
9053 * @arg @ref LL_HRTIM_TIMER_E
9054 * @retval None
9055 */
9057 {
9062 }
9064 /**
9065 * @brief Indicate whether the capture 1 interrupt is enabled for a given timer.
9066 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_IsEnabledIT_CPT1
9067 * @param HRTIMx High Resolution Timer instance
9068 * @param Timer This parameter can be one of the following values:
9069 * @arg @ref LL_HRTIM_TIMER_A
9070 * @arg @ref LL_HRTIM_TIMER_B
9071 * @arg @ref LL_HRTIM_TIMER_C
9072 * @arg @ref LL_HRTIM_TIMER_D
9073 * @arg @ref LL_HRTIM_TIMER_E
9074 * @retval State of CPT1IE bit in HRTIM_TIMxDIER register (1 or 0).
9075 */
9077 {
9079 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9083 }
9085 /**
9086 * @brief Enable the capture 2 interrupt for a given timer.
9087 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_EnableIT_CPT2
9088 * @param HRTIMx High Resolution Timer instance
9089 * @param Timer This parameter can be one of the following values:
9090 * @arg @ref LL_HRTIM_TIMER_A
9091 * @arg @ref LL_HRTIM_TIMER_B
9092 * @arg @ref LL_HRTIM_TIMER_C
9093 * @arg @ref LL_HRTIM_TIMER_D
9094 * @arg @ref LL_HRTIM_TIMER_E
9095 * @retval None
9096 */
9098 {
9103 }
9105 /**
9106 * @brief Enable the capture 2 interrupt for a given timer.
9107 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_DisableIT_CPT2
9108 * @param HRTIMx High Resolution Timer instance
9109 * @param Timer This parameter can be one of the following values:
9110 * @arg @ref LL_HRTIM_TIMER_A
9111 * @arg @ref LL_HRTIM_TIMER_B
9112 * @arg @ref LL_HRTIM_TIMER_C
9113 * @arg @ref LL_HRTIM_TIMER_D
9114 * @arg @ref LL_HRTIM_TIMER_E
9115 * @retval None
9116 */
9118 {
9123 }
9125 /**
9126 * @brief Indicate whether the capture 2 interrupt is enabled for a given timer.
9127 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_IsEnabledIT_CPT2
9128 * @param HRTIMx High Resolution Timer instance
9129 * @param Timer This parameter can be one of the following values:
9130 * @arg @ref LL_HRTIM_TIMER_A
9131 * @arg @ref LL_HRTIM_TIMER_B
9132 * @arg @ref LL_HRTIM_TIMER_C
9133 * @arg @ref LL_HRTIM_TIMER_D
9134 * @arg @ref LL_HRTIM_TIMER_E
9135 * @retval State of CPT2IE bit in HRTIM_TIMxDIER register (1 or 0).
9136 */
9138 {
9140 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9144 }
9146 /**
9147 * @brief Enable the output 1 set interrupt for a given timer.
9148 * @rmtoll TIMxDIER SET1IE LL_HRTIM_EnableIT_SET1
9149 * @param HRTIMx High Resolution Timer instance
9150 * @param Timer This parameter can be one of the following values:
9151 * @arg @ref LL_HRTIM_TIMER_A
9152 * @arg @ref LL_HRTIM_TIMER_B
9153 * @arg @ref LL_HRTIM_TIMER_C
9154 * @arg @ref LL_HRTIM_TIMER_D
9155 * @arg @ref LL_HRTIM_TIMER_E
9156 * @retval None
9157 */
9159 {
9164 }
9166 /**
9167 * @brief Disable the output 1 set interrupt for a given timer.
9168 * @rmtoll TIMxDIER SET1IE LL_HRTIM_DisableIT_SET1
9169 * @param HRTIMx High Resolution Timer instance
9170 * @param Timer This parameter can be one of the following values:
9171 * @arg @ref LL_HRTIM_TIMER_A
9172 * @arg @ref LL_HRTIM_TIMER_B
9173 * @arg @ref LL_HRTIM_TIMER_C
9174 * @arg @ref LL_HRTIM_TIMER_D
9175 * @arg @ref LL_HRTIM_TIMER_E
9176 * @retval None
9177 */
9179 {
9184 }
9186 /**
9187 * @brief Indicate whether the output 1 set interrupt is enabled for a given timer.
9188 * @rmtoll TIMxDIER SET1IE LL_HRTIM_IsEnabledIT_SET1
9189 * @param HRTIMx High Resolution Timer instance
9190 * @param Timer This parameter can be one of the following values:
9191 * @arg @ref LL_HRTIM_TIMER_A
9192 * @arg @ref LL_HRTIM_TIMER_B
9193 * @arg @ref LL_HRTIM_TIMER_C
9194 * @arg @ref LL_HRTIM_TIMER_D
9195 * @arg @ref LL_HRTIM_TIMER_E
9196 * @retval State of SET1xIE bit in HRTIM_TIMxDIER register (1 or 0).
9197 */
9199 {
9201 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9205 }
9207 /**
9208 * @brief Enable the output 1 reset interrupt for a given timer.
9209 * @rmtoll TIMxDIER RST1IE LL_HRTIM_EnableIT_RST1
9210 * @param HRTIMx High Resolution Timer instance
9211 * @param Timer This parameter can be one of the following values:
9212 * @arg @ref LL_HRTIM_TIMER_A
9213 * @arg @ref LL_HRTIM_TIMER_B
9214 * @arg @ref LL_HRTIM_TIMER_C
9215 * @arg @ref LL_HRTIM_TIMER_D
9216 * @arg @ref LL_HRTIM_TIMER_E
9217 * @retval None
9218 */
9220 {
9225 }
9227 /**
9228 * @brief Disable the output 1 reset interrupt for a given timer.
9229 * @rmtoll TIMxDIER RST1IE LL_HRTIM_DisableIT_RST1
9230 * @param HRTIMx High Resolution Timer instance
9231 * @param Timer This parameter can be one of the following values:
9232 * @arg @ref LL_HRTIM_TIMER_A
9233 * @arg @ref LL_HRTIM_TIMER_B
9234 * @arg @ref LL_HRTIM_TIMER_C
9235 * @arg @ref LL_HRTIM_TIMER_D
9236 * @arg @ref LL_HRTIM_TIMER_E
9237 * @retval None
9238 */
9240 {
9245 }
9247 /**
9248 * @brief Indicate whether the output 1 reset interrupt is enabled for a given timer.
9249 * @rmtoll TIMxDIER RST1IE LL_HRTIM_IsEnabledIT_RST1
9250 * @param HRTIMx High Resolution Timer instance
9251 * @param Timer This parameter can be one of the following values:
9252 * @arg @ref LL_HRTIM_TIMER_A
9253 * @arg @ref LL_HRTIM_TIMER_B
9254 * @arg @ref LL_HRTIM_TIMER_C
9255 * @arg @ref LL_HRTIM_TIMER_D
9256 * @arg @ref LL_HRTIM_TIMER_E
9257 * @retval State of RST1xIE bit in HRTIM_TIMxDIER register (1 or 0).
9258 */
9260 {
9262 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9266 }
9268 /**
9269 * @brief Enable the output 2 set interrupt for a given timer.
9270 * @rmtoll TIMxDIER SET2IE LL_HRTIM_EnableIT_SET2
9271 * @param HRTIMx High Resolution Timer instance
9272 * @param Timer This parameter can be one of the following values:
9273 * @arg @ref LL_HRTIM_TIMER_A
9274 * @arg @ref LL_HRTIM_TIMER_B
9275 * @arg @ref LL_HRTIM_TIMER_C
9276 * @arg @ref LL_HRTIM_TIMER_D
9277 * @arg @ref LL_HRTIM_TIMER_E
9278 * @retval None
9279 */
9281 {
9286 }
9288 /**
9289 * @brief Disable the output 2 set interrupt for a given timer.
9290 * @rmtoll TIMxDIER SET2IE LL_HRTIM_DisableIT_SET2
9291 * @param HRTIMx High Resolution Timer instance
9292 * @param Timer This parameter can be one of the following values:
9293 * @arg @ref LL_HRTIM_TIMER_A
9294 * @arg @ref LL_HRTIM_TIMER_B
9295 * @arg @ref LL_HRTIM_TIMER_C
9296 * @arg @ref LL_HRTIM_TIMER_D
9297 * @arg @ref LL_HRTIM_TIMER_E
9298 * @retval None
9299 */
9301 {
9306 }
9308 /**
9309 * @brief Indicate whether the output 2 set interrupt is enabled for a given timer.
9310 * @rmtoll TIMxDIER SET2IE LL_HRTIM_IsEnabledIT_SET2
9311 * @param HRTIMx High Resolution Timer instance
9312 * @param Timer This parameter can be one of the following values:
9313 * @arg @ref LL_HRTIM_TIMER_A
9314 * @arg @ref LL_HRTIM_TIMER_B
9315 * @arg @ref LL_HRTIM_TIMER_C
9316 * @arg @ref LL_HRTIM_TIMER_D
9317 * @arg @ref LL_HRTIM_TIMER_E
9318 * @retval State of SET2xIE bit in HRTIM_TIMxDIER register (1 or 0).
9319 */
9321 {
9323 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9327 }
9329 /**
9330 * @brief Enable the output 2 reset interrupt for a given timer.
9331 * @rmtoll TIMxDIER RST2IE LL_HRTIM_EnableIT_RST2
9332 * @param HRTIMx High Resolution Timer instance
9333 * @param Timer This parameter can be one of the following values:
9334 * @arg @ref LL_HRTIM_TIMER_A
9335 * @arg @ref LL_HRTIM_TIMER_B
9336 * @arg @ref LL_HRTIM_TIMER_C
9337 * @arg @ref LL_HRTIM_TIMER_D
9338 * @arg @ref LL_HRTIM_TIMER_E
9339 * @retval None
9340 */
9342 {
9347 }
9349 /**
9350 * @brief Disable the output 2 reset interrupt for a given timer.
9351 * @rmtoll TIMxDIER RST2IE LL_HRTIM_DisableIT_RST2
9352 * @param HRTIMx High Resolution Timer instance
9353 * @param Timer This parameter can be one of the following values:
9354 * @arg @ref LL_HRTIM_TIMER_A
9355 * @arg @ref LL_HRTIM_TIMER_B
9356 * @arg @ref LL_HRTIM_TIMER_C
9357 * @arg @ref LL_HRTIM_TIMER_D
9358 * @arg @ref LL_HRTIM_TIMER_E
9359 * @retval None
9360 */
9362 {
9367 }
9369 /**
9370 * @brief Indicate whether the output 2 reset LL_HRTIM_IsEnabledIT_RST2 is enabled for a given timer.
9371 * @rmtoll TIMxDIER RST2IE LL_HRTIM_DisableIT_RST2
9372 * @param HRTIMx High Resolution Timer instance
9373 * @param Timer This parameter can be one of the following values:
9374 * @arg @ref LL_HRTIM_TIMER_A
9375 * @arg @ref LL_HRTIM_TIMER_B
9376 * @arg @ref LL_HRTIM_TIMER_C
9377 * @arg @ref LL_HRTIM_TIMER_D
9378 * @arg @ref LL_HRTIM_TIMER_E
9379 * @retval State of RST2xIE bit in HRTIM_TIMxDIER register (1 or 0).
9380 */
9382 {
9384 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9388 }
9390 /**
9391 * @brief Enable the reset/roll-over interrupt for a given timer.
9392 * @rmtoll TIMxDIER RSTIE LL_HRTIM_EnableIT_RST
9393 * @param HRTIMx High Resolution Timer instance
9394 * @param Timer This parameter can be one of the following values:
9395 * @arg @ref LL_HRTIM_TIMER_A
9396 * @arg @ref LL_HRTIM_TIMER_B
9397 * @arg @ref LL_HRTIM_TIMER_C
9398 * @arg @ref LL_HRTIM_TIMER_D
9399 * @arg @ref LL_HRTIM_TIMER_E
9400 * @retval None
9401 */
9403 {
9408 }
9410 /**
9411 * @brief Disable the reset/roll-over interrupt for a given timer.
9412 * @rmtoll TIMxDIER RSTIE LL_HRTIM_DisableIT_RST
9413 * @param HRTIMx High Resolution Timer instance
9414 * @param Timer This parameter can be one of the following values:
9415 * @arg @ref LL_HRTIM_TIMER_A
9416 * @arg @ref LL_HRTIM_TIMER_B
9417 * @arg @ref LL_HRTIM_TIMER_C
9418 * @arg @ref LL_HRTIM_TIMER_D
9419 * @arg @ref LL_HRTIM_TIMER_E
9420 * @retval None
9421 */
9423 {
9428 }
9430 /**
9431 * @brief Indicate whether the reset/roll-over interrupt is enabled for a given timer.
9432 * @rmtoll TIMxDIER RSTIE LL_HRTIM_IsEnabledIT_RST
9433 * @param HRTIMx High Resolution Timer instance
9434 * @param Timer This parameter can be one of the following values:
9435 * @arg @ref LL_HRTIM_TIMER_A
9436 * @arg @ref LL_HRTIM_TIMER_B
9437 * @arg @ref LL_HRTIM_TIMER_C
9438 * @arg @ref LL_HRTIM_TIMER_D
9439 * @arg @ref LL_HRTIM_TIMER_E
9440 * @retval State of RSTIE bit in HRTIM_TIMxDIER register (1 or 0).
9441 */
9443 {
9445 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9449 }
9451 /**
9452 * @brief Enable the delayed protection interrupt for a given timer.
9453 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_EnableIT_DLYPRT
9454 * @param HRTIMx High Resolution Timer instance
9455 * @param Timer This parameter can be one of the following values:
9456 * @arg @ref LL_HRTIM_TIMER_A
9457 * @arg @ref LL_HRTIM_TIMER_B
9458 * @arg @ref LL_HRTIM_TIMER_C
9459 * @arg @ref LL_HRTIM_TIMER_D
9460 * @arg @ref LL_HRTIM_TIMER_E
9461 * @retval None
9462 */
9464 {
9469 }
9471 /**
9472 * @brief Disable the delayed protection interrupt for a given timer.
9473 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_DisableIT_DLYPRT
9474 * @param HRTIMx High Resolution Timer instance
9475 * @param Timer This parameter can be one of the following values:
9476 * @arg @ref LL_HRTIM_TIMER_A
9477 * @arg @ref LL_HRTIM_TIMER_B
9478 * @arg @ref LL_HRTIM_TIMER_C
9479 * @arg @ref LL_HRTIM_TIMER_D
9480 * @arg @ref LL_HRTIM_TIMER_E
9481 * @retval None
9482 */
9484 {
9489 }
9491 /**
9492 * @brief Indicate whether the delayed protection interrupt is enabled for a given timer.
9493 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_IsEnabledIT_DLYPRT
9494 * @param HRTIMx High Resolution Timer instance
9495 * @param Timer This parameter can be one of the following values:
9496 * @arg @ref LL_HRTIM_TIMER_A
9497 * @arg @ref LL_HRTIM_TIMER_B
9498 * @arg @ref LL_HRTIM_TIMER_C
9499 * @arg @ref LL_HRTIM_TIMER_D
9500 * @arg @ref LL_HRTIM_TIMER_E
9501 * @retval State of DLYPRTIE bit in HRTIM_TIMxDIER register (1 or 0).
9502 */
9504 {
9506 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9510 }
9512 /**
9513 * @}
9514 */
9516 /** @defgroup HRTIM_LL_EF_DMA_Management DMA_Management
9517 * @{
9518 */
9520 /**
9521 * @brief Enable the synchronization input DMA request.
9522 * @rmtoll MDIER SYNCDE LL_HRTIM_EnableDMAReq_SYNC
9523 * @param HRTIMx High Resolution Timer instance
9524 * @retval None
9525 */
9527 {
9529 }
9531 /**
9532 * @brief Disable the synchronization input DMA request
9533 * @rmtoll MDIER SYNCDE LL_HRTIM_DisableDMAReq_SYNC
9534 * @param HRTIMx High Resolution Timer instance
9535 * @retval None
9536 */
9538 {
9540 }
9542 /**
9543 * @brief Indicate whether the synchronization input DMA request is enabled.
9544 * @rmtoll MDIER SYNCDE LL_HRTIM_IsEnabledDMAReq_SYNC
9545 * @param HRTIMx High Resolution Timer instance
9546 * @retval State of SYNCDE bit in HRTIM_MDIER register (1 or 0).
9547 */
9549 {
9550 return ((READ_BIT(HRTIMx->sMasterRegs.MDIER, HRTIM_MDIER_SYNCDE) == (HRTIM_MDIER_SYNCDE)) ? 1UL : 0UL);
9551 }
9553 /**
9554 * @brief Enable the update DMA request for a given timer.
9555 * @rmtoll MDIER MUPDDE LL_HRTIM_EnableDMAReq_UPDATE\n
9556 * TIMxDIER UPDDE LL_HRTIM_EnableDMAReq_UPDATE
9557 * @param HRTIMx High Resolution Timer instance
9558 * @param Timer This parameter can be one of the following values:
9559 * @arg @ref LL_HRTIM_TIMER_MASTER
9560 * @arg @ref LL_HRTIM_TIMER_A
9561 * @arg @ref LL_HRTIM_TIMER_B
9562 * @arg @ref LL_HRTIM_TIMER_C
9563 * @arg @ref LL_HRTIM_TIMER_D
9564 * @arg @ref LL_HRTIM_TIMER_E
9565 * @retval None
9566 */
9568 {
9573 }
9575 /**
9576 * @brief Disable the update DMA request for a given timer.
9577 * @rmtoll MDIER MUPDDE LL_HRTIM_DisableDMAReq_UPDATE\n
9578 * TIMxDIER UPDDE LL_HRTIM_DisableDMAReq_UPDATE
9579 * @param HRTIMx High Resolution Timer instance
9580 * @param Timer This parameter can be one of the following values:
9581 * @arg @ref LL_HRTIM_TIMER_MASTER
9582 * @arg @ref LL_HRTIM_TIMER_A
9583 * @arg @ref LL_HRTIM_TIMER_B
9584 * @arg @ref LL_HRTIM_TIMER_C
9585 * @arg @ref LL_HRTIM_TIMER_D
9586 * @arg @ref LL_HRTIM_TIMER_E
9587 * @retval None
9588 */
9590 {
9595 }
9597 /**
9598 * @brief Indicate whether the update DMA request is enabled for a given timer.
9599 * @rmtoll MDIER MUPDDE LL_HRTIM_IsEnabledDMAReq_UPDATE\n
9600 * TIMxDIER UPDDE LL_HRTIM_IsEnabledDMAReq_UPDATE
9601 * @param HRTIMx High Resolution Timer instance
9602 * @param Timer This parameter can be one of the following values:
9603 * @arg @ref LL_HRTIM_TIMER_MASTER
9604 * @arg @ref LL_HRTIM_TIMER_A
9605 * @arg @ref LL_HRTIM_TIMER_B
9606 * @arg @ref LL_HRTIM_TIMER_C
9607 * @arg @ref LL_HRTIM_TIMER_D
9608 * @arg @ref LL_HRTIM_TIMER_E
9609 * @retval State of MUPDDE/UPDDE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9610 */
9611 __STATIC_INLINE uint32_t LL_HRTIM_IsEnabledDMAReq_UPDATE(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
9612 {
9614 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9618 }
9620 /**
9621 * @brief Enable the repetition DMA request for a given timer.
9622 * @rmtoll MDIER MREPDE LL_HRTIM_EnableDMAReq_REP\n
9623 * TIMxDIER REPDE LL_HRTIM_EnableDMAReq_REP
9624 * @param HRTIMx High Resolution Timer instance
9625 * @param Timer This parameter can be one of the following values:
9626 * @arg @ref LL_HRTIM_TIMER_MASTER
9627 * @arg @ref LL_HRTIM_TIMER_A
9628 * @arg @ref LL_HRTIM_TIMER_B
9629 * @arg @ref LL_HRTIM_TIMER_C
9630 * @arg @ref LL_HRTIM_TIMER_D
9631 * @arg @ref LL_HRTIM_TIMER_E
9632 * @retval None
9633 */
9635 {
9640 }
9642 /**
9643 * @brief Disable the repetition DMA request for a given timer.
9644 * @rmtoll MDIER MREPDE LL_HRTIM_DisableDMAReq_REP\n
9645 * TIMxDIER REPDE LL_HRTIM_DisableDMAReq_REP
9646 * @param HRTIMx High Resolution Timer instance
9647 * @param Timer This parameter can be one of the following values:
9648 * @arg @ref LL_HRTIM_TIMER_MASTER
9649 * @arg @ref LL_HRTIM_TIMER_A
9650 * @arg @ref LL_HRTIM_TIMER_B
9651 * @arg @ref LL_HRTIM_TIMER_C
9652 * @arg @ref LL_HRTIM_TIMER_D
9653 * @arg @ref LL_HRTIM_TIMER_E
9654 * @retval None
9655 */
9657 {
9662 }
9664 /**
9665 * @brief Indicate whether the repetition DMA request is enabled for a given timer.
9666 * @rmtoll MDIER MREPDE LL_HRTIM_IsEnabledDMAReq_REP\n
9667 * TIMxDIER REPDE LL_HRTIM_IsEnabledDMAReq_REP
9668 * @param HRTIMx High Resolution Timer instance
9669 * @param Timer This parameter can be one of the following values:
9670 * @arg @ref LL_HRTIM_TIMER_MASTER
9671 * @arg @ref LL_HRTIM_TIMER_A
9672 * @arg @ref LL_HRTIM_TIMER_B
9673 * @arg @ref LL_HRTIM_TIMER_C
9674 * @arg @ref LL_HRTIM_TIMER_D
9675 * @arg @ref LL_HRTIM_TIMER_E
9676 * @retval State of MREPDE/REPDE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9677 */
9679 {
9681 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9685 }
9687 /**
9688 * @brief Enable the compare 1 DMA request for a given timer.
9689 * @rmtoll MDIER MCMP1DE LL_HRTIM_EnableDMAReq_CMP1\n
9690 * TIMxDIER CMP1DE LL_HRTIM_EnableDMAReq_CMP1
9691 * @param HRTIMx High Resolution Timer instance
9692 * @param Timer This parameter can be one of the following values:
9693 * @arg @ref LL_HRTIM_TIMER_MASTER
9694 * @arg @ref LL_HRTIM_TIMER_A
9695 * @arg @ref LL_HRTIM_TIMER_B
9696 * @arg @ref LL_HRTIM_TIMER_C
9697 * @arg @ref LL_HRTIM_TIMER_D
9698 * @arg @ref LL_HRTIM_TIMER_E
9699 * @retval None
9700 */
9702 {
9707 }
9709 /**
9710 * @brief Disable the compare 1 DMA request for a given timer.
9711 * @rmtoll MDIER MCMP1DE LL_HRTIM_DisableDMAReq_CMP1\n
9712 * TIMxDIER CMP1DE LL_HRTIM_DisableDMAReq_CMP1
9713 * @param HRTIMx High Resolution Timer instance
9714 * @param Timer This parameter can be one of the following values:
9715 * @arg @ref LL_HRTIM_TIMER_MASTER
9716 * @arg @ref LL_HRTIM_TIMER_A
9717 * @arg @ref LL_HRTIM_TIMER_B
9718 * @arg @ref LL_HRTIM_TIMER_C
9719 * @arg @ref LL_HRTIM_TIMER_D
9720 * @arg @ref LL_HRTIM_TIMER_E
9721 * @retval None
9722 */
9724 {
9729 }
9731 /**
9732 * @brief Indicate whether the compare 1 DMA request is enabled for a given timer.
9733 * @rmtoll MDIER MCMP1DE LL_HRTIM_IsEnabledDMAReq_CMP1\n
9734 * TIMxDIER CMP1DE LL_HRTIM_IsEnabledDMAReq_CMP1
9735 * @param HRTIMx High Resolution Timer instance
9736 * @param Timer This parameter can be one of the following values:
9737 * @arg @ref LL_HRTIM_TIMER_MASTER
9738 * @arg @ref LL_HRTIM_TIMER_A
9739 * @arg @ref LL_HRTIM_TIMER_B
9740 * @arg @ref LL_HRTIM_TIMER_C
9741 * @arg @ref LL_HRTIM_TIMER_D
9742 * @arg @ref LL_HRTIM_TIMER_E
9743 * @retval State of MCMP1DE/CMP1DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9744 */
9746 {
9748 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9752 }
9754 /**
9755 * @brief Enable the compare 2 DMA request for a given timer.
9756 * @rmtoll MDIER MCMP2DE LL_HRTIM_EnableDMAReq_CMP2\n
9757 * TIMxDIER CMP2DE LL_HRTIM_EnableDMAReq_CMP2
9758 * @param HRTIMx High Resolution Timer instance
9759 * @param Timer This parameter can be one of the following values:
9760 * @arg @ref LL_HRTIM_TIMER_MASTER
9761 * @arg @ref LL_HRTIM_TIMER_A
9762 * @arg @ref LL_HRTIM_TIMER_B
9763 * @arg @ref LL_HRTIM_TIMER_C
9764 * @arg @ref LL_HRTIM_TIMER_D
9765 * @arg @ref LL_HRTIM_TIMER_E
9766 * @retval None
9767 */
9769 {
9774 }
9776 /**
9777 * @brief Disable the compare 2 DMA request for a given timer.
9778 * @rmtoll MDIER MCMP2DE LL_HRTIM_DisableDMAReq_CMP2\n
9779 * TIMxDIER CMP2DE LL_HRTIM_DisableDMAReq_CMP2
9780 * @param HRTIMx High Resolution Timer instance
9781 * @param Timer This parameter can be one of the following values:
9782 * @arg @ref LL_HRTIM_TIMER_MASTER
9783 * @arg @ref LL_HRTIM_TIMER_A
9784 * @arg @ref LL_HRTIM_TIMER_B
9785 * @arg @ref LL_HRTIM_TIMER_C
9786 * @arg @ref LL_HRTIM_TIMER_D
9787 * @arg @ref LL_HRTIM_TIMER_E
9788 * @retval None
9789 */
9791 {
9796 }
9798 /**
9799 * @brief Indicate whether the compare 2 DMA request is enabled for a given timer.
9800 * @rmtoll MDIER MCMP2DE LL_HRTIM_IsEnabledDMAReq_CMP2\n
9801 * TIMxDIER CMP2DE LL_HRTIM_IsEnabledDMAReq_CMP2
9802 * @param HRTIMx High Resolution Timer instance
9803 * @param Timer This parameter can be one of the following values:
9804 * @arg @ref LL_HRTIM_TIMER_MASTER
9805 * @arg @ref LL_HRTIM_TIMER_A
9806 * @arg @ref LL_HRTIM_TIMER_B
9807 * @arg @ref LL_HRTIM_TIMER_C
9808 * @arg @ref LL_HRTIM_TIMER_D
9809 * @arg @ref LL_HRTIM_TIMER_E
9810 * @retval State of MCMP2DE/CMP2DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9811 */
9813 {
9815 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9819 }
9821 /**
9822 * @brief Enable the compare 3 DMA request for a given timer.
9823 * @rmtoll MDIER MCMP3DE LL_HRTIM_EnableDMAReq_CMP3\n
9824 * TIMxDIER CMP3DE LL_HRTIM_EnableDMAReq_CMP3
9825 * @param HRTIMx High Resolution Timer instance
9826 * @param Timer This parameter can be one of the following values:
9827 * @arg @ref LL_HRTIM_TIMER_MASTER
9828 * @arg @ref LL_HRTIM_TIMER_A
9829 * @arg @ref LL_HRTIM_TIMER_B
9830 * @arg @ref LL_HRTIM_TIMER_C
9831 * @arg @ref LL_HRTIM_TIMER_D
9832 * @arg @ref LL_HRTIM_TIMER_E
9833 * @retval None
9834 */
9836 {
9841 }
9843 /**
9844 * @brief Disable the compare 3 DMA request for a given timer.
9845 * @rmtoll MDIER MCMP3DE LL_HRTIM_DisableDMAReq_CMP3\n
9846 * TIMxDIER CMP3DE LL_HRTIM_DisableDMAReq_CMP3
9847 * @param HRTIMx High Resolution Timer instance
9848 * @param Timer This parameter can be one of the following values:
9849 * @arg @ref LL_HRTIM_TIMER_MASTER
9850 * @arg @ref LL_HRTIM_TIMER_A
9851 * @arg @ref LL_HRTIM_TIMER_B
9852 * @arg @ref LL_HRTIM_TIMER_C
9853 * @arg @ref LL_HRTIM_TIMER_D
9854 * @arg @ref LL_HRTIM_TIMER_E
9855 * @retval None
9856 */
9858 {
9863 }
9865 /**
9866 * @brief Indicate whether the compare 3 DMA request is enabled for a given timer.
9867 * @rmtoll MDIER MCMP3DE LL_HRTIM_IsEnabledDMAReq_CMP3\n
9868 * TIMxDIER CMP3DE LL_HRTIM_IsEnabledDMAReq_CMP3
9869 * @param HRTIMx High Resolution Timer instance
9870 * @param Timer This parameter can be one of the following values:
9871 * @arg @ref LL_HRTIM_TIMER_MASTER
9872 * @arg @ref LL_HRTIM_TIMER_A
9873 * @arg @ref LL_HRTIM_TIMER_B
9874 * @arg @ref LL_HRTIM_TIMER_C
9875 * @arg @ref LL_HRTIM_TIMER_D
9876 * @arg @ref LL_HRTIM_TIMER_E
9877 * @retval State of MCMP3DE/CMP3DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9878 */
9880 {
9882 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9886 }
9888 /**
9889 * @brief Enable the compare 4 DMA request for a given timer.
9890 * @rmtoll MDIER MCMP4DE LL_HRTIM_EnableDMAReq_CMP4\n
9891 * TIMxDIER CMP4DE LL_HRTIM_EnableDMAReq_CMP4
9892 * @param HRTIMx High Resolution Timer instance
9893 * @param Timer This parameter can be one of the following values:
9894 * @arg @ref LL_HRTIM_TIMER_MASTER
9895 * @arg @ref LL_HRTIM_TIMER_A
9896 * @arg @ref LL_HRTIM_TIMER_B
9897 * @arg @ref LL_HRTIM_TIMER_C
9898 * @arg @ref LL_HRTIM_TIMER_D
9899 * @arg @ref LL_HRTIM_TIMER_E
9900 * @retval None
9901 */
9903 {
9908 }
9910 /**
9911 * @brief Disable the compare 4 DMA request for a given timer.
9912 * @rmtoll MDIER MCMP4DE LL_HRTIM_DisableDMAReq_CMP4\n
9913 * TIMxDIER CMP4DE LL_HRTIM_DisableDMAReq_CMP4
9914 * @param HRTIMx High Resolution Timer instance
9915 * @param Timer This parameter can be one of the following values:
9916 * @arg @ref LL_HRTIM_TIMER_MASTER
9917 * @arg @ref LL_HRTIM_TIMER_A
9918 * @arg @ref LL_HRTIM_TIMER_B
9919 * @arg @ref LL_HRTIM_TIMER_C
9920 * @arg @ref LL_HRTIM_TIMER_D
9921 * @arg @ref LL_HRTIM_TIMER_E
9922 * @retval None
9923 */
9925 {
9930 }
9932 /**
9933 * @brief Indicate whether the compare 4 DMA request is enabled for a given timer.
9934 * @rmtoll MDIER MCMP4DE LL_HRTIM_IsEnabledDMAReq_CMP4\n
9935 * TIMxDIER CMP4DE LL_HRTIM_IsEnabledDMAReq_CMP4
9936 * @param HRTIMx High Resolution Timer instance
9937 * @param Timer This parameter can be one of the following values:
9938 * @arg @ref LL_HRTIM_TIMER_MASTER
9939 * @arg @ref LL_HRTIM_TIMER_A
9940 * @arg @ref LL_HRTIM_TIMER_B
9941 * @arg @ref LL_HRTIM_TIMER_C
9942 * @arg @ref LL_HRTIM_TIMER_D
9943 * @arg @ref LL_HRTIM_TIMER_E
9944 * @retval State of MCMP4DE/CMP4DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9945 */
9947 {
9949 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
9953 }
9955 /**
9956 * @brief Enable the capture 1 DMA request for a given timer.
9957 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_EnableDMAReq_CPT1
9958 * @param HRTIMx High Resolution Timer instance
9959 * @param Timer This parameter can be one of the following values:
9960 * @arg @ref LL_HRTIM_TIMER_A
9961 * @arg @ref LL_HRTIM_TIMER_B
9962 * @arg @ref LL_HRTIM_TIMER_C
9963 * @arg @ref LL_HRTIM_TIMER_D
9964 * @arg @ref LL_HRTIM_TIMER_E
9965 * @retval None
9966 */
9968 {
9973 }
9975 /**
9976 * @brief Disable the capture 1 DMA request for a given timer.
9977 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_DisableDMAReq_CPT1
9978 * @param HRTIMx High Resolution Timer instance
9979 * @param Timer This parameter can be one of the following values:
9980 * @arg @ref LL_HRTIM_TIMER_A
9981 * @arg @ref LL_HRTIM_TIMER_B
9982 * @arg @ref LL_HRTIM_TIMER_C
9983 * @arg @ref LL_HRTIM_TIMER_D
9984 * @arg @ref LL_HRTIM_TIMER_E
9985 * @retval None
9986 */
9988 {
9993 }
9995 /**
9996 * @brief Indicate whether the capture 1 DMA request is enabled for a given timer.
9997 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_IsEnabledDMAReq_CPT1
9998 * @param HRTIMx High Resolution Timer instance
9999 * @param Timer This parameter can be one of the following values:
10000 * @arg @ref LL_HRTIM_TIMER_A
10001 * @arg @ref LL_HRTIM_TIMER_B
10002 * @arg @ref LL_HRTIM_TIMER_C
10003 * @arg @ref LL_HRTIM_TIMER_D
10004 * @arg @ref LL_HRTIM_TIMER_E
10005 * @retval State of CPT1DE bit in HRTIM_TIMxDIER register (1 or 0).
10006 */
10008 {
10010 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10014 }
10016 /**
10017 * @brief Enable the capture 2 DMA request for a given timer.
10018 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_EnableDMAReq_CPT2
10019 * @param HRTIMx High Resolution Timer instance
10020 * @param Timer This parameter can be one of the following values:
10021 * @arg @ref LL_HRTIM_TIMER_A
10022 * @arg @ref LL_HRTIM_TIMER_B
10023 * @arg @ref LL_HRTIM_TIMER_C
10024 * @arg @ref LL_HRTIM_TIMER_D
10025 * @arg @ref LL_HRTIM_TIMER_E
10026 * @retval None
10027 */
10029 {
10034 }
10036 /**
10037 * @brief Disable the capture 2 DMA request for a given timer.
10038 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_DisableDMAReq_CPT2
10039 * @param HRTIMx High Resolution Timer instance
10040 * @param Timer This parameter can be one of the following values:
10041 * @arg @ref LL_HRTIM_TIMER_A
10042 * @arg @ref LL_HRTIM_TIMER_B
10043 * @arg @ref LL_HRTIM_TIMER_C
10044 * @arg @ref LL_HRTIM_TIMER_D
10045 * @arg @ref LL_HRTIM_TIMER_E
10046 * @retval None
10047 */
10049 {
10054 }
10056 /**
10057 * @brief Indicate whether the capture 2 DMA request is enabled for a given timer.
10058 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_IsEnabledDMAReq_CPT2
10059 * @param HRTIMx High Resolution Timer instance
10060 * @param Timer This parameter can be one of the following values:
10061 * @arg @ref LL_HRTIM_TIMER_A
10062 * @arg @ref LL_HRTIM_TIMER_B
10063 * @arg @ref LL_HRTIM_TIMER_C
10064 * @arg @ref LL_HRTIM_TIMER_D
10065 * @arg @ref LL_HRTIM_TIMER_E
10066 * @retval State of CPT2DE bit in HRTIM_TIMxDIER register (1 or 0).
10067 */
10069 {
10071 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10075 }
10077 /**
10078 * @brief Enable the output 1 set DMA request for a given timer.
10079 * @rmtoll TIMxDIER SET1DE LL_HRTIM_EnableDMAReq_SET1
10080 * @param HRTIMx High Resolution Timer instance
10081 * @param Timer This parameter can be one of the following values:
10082 * @arg @ref LL_HRTIM_TIMER_A
10083 * @arg @ref LL_HRTIM_TIMER_B
10084 * @arg @ref LL_HRTIM_TIMER_C
10085 * @arg @ref LL_HRTIM_TIMER_D
10086 * @arg @ref LL_HRTIM_TIMER_E
10087 * @retval None
10088 */
10090 {
10095 }
10097 /**
10098 * @brief Disable the output 1 set DMA request for a given timer.
10099 * @rmtoll TIMxDIER SET1DE LL_HRTIM_DisableDMAReq_SET1
10100 * @param HRTIMx High Resolution Timer instance
10101 * @param Timer This parameter can be one of the following values:
10102 * @arg @ref LL_HRTIM_TIMER_A
10103 * @arg @ref LL_HRTIM_TIMER_B
10104 * @arg @ref LL_HRTIM_TIMER_C
10105 * @arg @ref LL_HRTIM_TIMER_D
10106 * @arg @ref LL_HRTIM_TIMER_E
10107 * @retval None
10108 */
10110 {
10115 }
10117 /**
10118 * @brief Indicate whether the output 1 set DMA request is enabled for a given timer.
10119 * @rmtoll TIMxDIER SET1DE LL_HRTIM_IsEnabledDMAReq_SET1
10120 * @param HRTIMx High Resolution Timer instance
10121 * @param Timer This parameter can be one of the following values:
10122 * @arg @ref LL_HRTIM_TIMER_A
10123 * @arg @ref LL_HRTIM_TIMER_B
10124 * @arg @ref LL_HRTIM_TIMER_C
10125 * @arg @ref LL_HRTIM_TIMER_D
10126 * @arg @ref LL_HRTIM_TIMER_E
10127 * @retval State of SET1xDE bit in HRTIM_TIMxDIER register (1 or 0).
10128 */
10130 {
10132 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10136 }
10138 /**
10139 * @brief Enable the output 1 reset DMA request for a given timer.
10140 * @rmtoll TIMxDIER RST1DE LL_HRTIM_EnableDMAReq_RST1
10141 * @param HRTIMx High Resolution Timer instance
10142 * @param Timer This parameter can be one of the following values:
10143 * @arg @ref LL_HRTIM_TIMER_A
10144 * @arg @ref LL_HRTIM_TIMER_B
10145 * @arg @ref LL_HRTIM_TIMER_C
10146 * @arg @ref LL_HRTIM_TIMER_D
10147 * @arg @ref LL_HRTIM_TIMER_E
10148 * @retval None
10149 */
10151 {
10156 }
10158 /**
10159 * @brief Disable the output 1 reset DMA request for a given timer.
10160 * @rmtoll TIMxDIER RST1DE LL_HRTIM_DisableDMAReq_RST1
10161 * @param HRTIMx High Resolution Timer instance
10162 * @param Timer This parameter can be one of the following values:
10163 * @arg @ref LL_HRTIM_TIMER_A
10164 * @arg @ref LL_HRTIM_TIMER_B
10165 * @arg @ref LL_HRTIM_TIMER_C
10166 * @arg @ref LL_HRTIM_TIMER_D
10167 * @arg @ref LL_HRTIM_TIMER_E
10168 * @retval None
10169 */
10171 {
10176 }
10178 /**
10179 * @brief Indicate whether the output 1 reset interrupt is enabled for a given timer.
10180 * @rmtoll TIMxDIER RST1DE LL_HRTIM_IsEnabledDMAReq_RST1
10181 * @param HRTIMx High Resolution Timer instance
10182 * @param Timer This parameter can be one of the following values:
10183 * @arg @ref LL_HRTIM_TIMER_A
10184 * @arg @ref LL_HRTIM_TIMER_B
10185 * @arg @ref LL_HRTIM_TIMER_C
10186 * @arg @ref LL_HRTIM_TIMER_D
10187 * @arg @ref LL_HRTIM_TIMER_E
10188 * @retval State of RST1xDE bit in HRTIM_TIMxDIER register (1 or 0).
10189 */
10191 {
10193 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10197 }
10199 /**
10200 * @brief Enable the output 2 set DMA request for a given timer.
10201 * @rmtoll TIMxDIER SET2DE LL_HRTIM_EnableDMAReq_SET2
10202 * @param HRTIMx High Resolution Timer instance
10203 * @param Timer This parameter can be one of the following values:
10204 * @arg @ref LL_HRTIM_TIMER_A
10205 * @arg @ref LL_HRTIM_TIMER_B
10206 * @arg @ref LL_HRTIM_TIMER_C
10207 * @arg @ref LL_HRTIM_TIMER_D
10208 * @arg @ref LL_HRTIM_TIMER_E
10209 * @retval None
10210 */
10212 {
10217 }
10219 /**
10220 * @brief Disable the output 2 set DMA request for a given timer.
10221 * @rmtoll TIMxDIER SET2DE LL_HRTIM_DisableDMAReq_SET2
10222 * @param HRTIMx High Resolution Timer instance
10223 * @param Timer This parameter can be one of the following values:
10224 * @arg @ref LL_HRTIM_TIMER_A
10225 * @arg @ref LL_HRTIM_TIMER_B
10226 * @arg @ref LL_HRTIM_TIMER_C
10227 * @arg @ref LL_HRTIM_TIMER_D
10228 * @arg @ref LL_HRTIM_TIMER_E
10229 * @retval None
10230 */
10232 {
10237 }
10239 /**
10240 * @brief Indicate whether the output 2 set DMA request is enabled for a given timer.
10241 * @rmtoll TIMxDIER SET2DE LL_HRTIM_IsEnabledDMAReq_SET2
10242 * @param HRTIMx High Resolution Timer instance
10243 * @param Timer This parameter can be one of the following values:
10244 * @arg @ref LL_HRTIM_TIMER_A
10245 * @arg @ref LL_HRTIM_TIMER_B
10246 * @arg @ref LL_HRTIM_TIMER_C
10247 * @arg @ref LL_HRTIM_TIMER_D
10248 * @arg @ref LL_HRTIM_TIMER_E
10249 * @retval State of SET2xDE bit in HRTIM_TIMxDIER register (1 or 0).
10250 */
10252 {
10254 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10258 }
10260 /**
10261 * @brief Enable the output 2 reset DMA request for a given timer.
10262 * @rmtoll TIMxDIER RST2DE LL_HRTIM_EnableDMAReq_RST2
10263 * @param HRTIMx High Resolution Timer instance
10264 * @param Timer This parameter can be one of the following values:
10265 * @arg @ref LL_HRTIM_TIMER_A
10266 * @arg @ref LL_HRTIM_TIMER_B
10267 * @arg @ref LL_HRTIM_TIMER_C
10268 * @arg @ref LL_HRTIM_TIMER_D
10269 * @arg @ref LL_HRTIM_TIMER_E
10270 * @retval None
10271 */
10273 {
10278 }
10280 /**
10281 * @brief Disable the output 2 reset DMA request for a given timer.
10282 * @rmtoll TIMxDIER RST2DE LL_HRTIM_DisableDMAReq_RST2
10283 * @param HRTIMx High Resolution Timer instance
10284 * @param Timer This parameter can be one of the following values:
10285 * @arg @ref LL_HRTIM_TIMER_A
10286 * @arg @ref LL_HRTIM_TIMER_B
10287 * @arg @ref LL_HRTIM_TIMER_C
10288 * @arg @ref LL_HRTIM_TIMER_D
10289 * @arg @ref LL_HRTIM_TIMER_E
10290 * @retval None
10291 */
10293 {
10298 }
10300 /**
10301 * @brief Indicate whether the output 2 reset DMA request is enabled for a given timer.
10302 * @rmtoll TIMxDIER RST2DE LL_HRTIM_IsEnabledDMAReq_RST2
10303 * @param HRTIMx High Resolution Timer instance
10304 * @param Timer This parameter can be one of the following values:
10305 * @arg @ref LL_HRTIM_TIMER_A
10306 * @arg @ref LL_HRTIM_TIMER_B
10307 * @arg @ref LL_HRTIM_TIMER_C
10308 * @arg @ref LL_HRTIM_TIMER_D
10309 * @arg @ref LL_HRTIM_TIMER_E
10310 * @retval State of RST2xDE bit in HRTIM_TIMxDIER register (1 or 0).
10311 */
10313 {
10315 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10319 }
10321 /**
10322 * @brief Enable the reset/roll-over DMA request for a given timer.
10323 * @rmtoll TIMxDIER RSTDE LL_HRTIM_EnableDMAReq_RST
10324 * @param HRTIMx High Resolution Timer instance
10325 * @param Timer This parameter can be one of the following values:
10326 * @arg @ref LL_HRTIM_TIMER_A
10327 * @arg @ref LL_HRTIM_TIMER_B
10328 * @arg @ref LL_HRTIM_TIMER_C
10329 * @arg @ref LL_HRTIM_TIMER_D
10330 * @arg @ref LL_HRTIM_TIMER_E
10331 * @retval None
10332 */
10334 {
10339 }
10341 /**
10342 * @brief Disable the reset/roll-over DMA request for a given timer.
10343 * @rmtoll TIMxDIER RSTDE LL_HRTIM_DisableDMAReq_RST
10344 * @param HRTIMx High Resolution Timer instance
10345 * @param Timer This parameter can be one of the following values:
10346 * @arg @ref LL_HRTIM_TIMER_A
10347 * @arg @ref LL_HRTIM_TIMER_B
10348 * @arg @ref LL_HRTIM_TIMER_C
10349 * @arg @ref LL_HRTIM_TIMER_D
10350 * @arg @ref LL_HRTIM_TIMER_E
10351 * @retval None
10352 */
10354 {
10359 }
10361 /**
10362 * @brief Indicate whether the reset/roll-over DMA request is enabled for a given timer.
10363 * @rmtoll TIMxDIER RSTDE LL_HRTIM_IsEnabledDMAReq_RST
10364 * @param HRTIMx High Resolution Timer instance
10365 * @param Timer This parameter can be one of the following values:
10366 * @arg @ref LL_HRTIM_TIMER_A
10367 * @arg @ref LL_HRTIM_TIMER_B
10368 * @arg @ref LL_HRTIM_TIMER_C
10369 * @arg @ref LL_HRTIM_TIMER_D
10370 * @arg @ref LL_HRTIM_TIMER_E
10371 * @retval State of RSTDE bit in HRTIM_TIMxDIER register (1 or 0).
10372 */
10374 {
10376 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10380 }
10382 /**
10383 * @brief Enable the delayed protection DMA request for a given timer.
10384 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_EnableDMAReq_DLYPRT
10385 * @param HRTIMx High Resolution Timer instance
10386 * @param Timer This parameter can be one of the following values:
10387 * @arg @ref LL_HRTIM_TIMER_A
10388 * @arg @ref LL_HRTIM_TIMER_B
10389 * @arg @ref LL_HRTIM_TIMER_C
10390 * @arg @ref LL_HRTIM_TIMER_D
10391 * @arg @ref LL_HRTIM_TIMER_E
10392 * @retval None
10393 */
10395 {
10400 }
10402 /**
10403 * @brief Disable the delayed protection DMA request for a given timer.
10404 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_DisableDMAReq_DLYPRT
10405 * @param HRTIMx High Resolution Timer instance
10406 * @param Timer This parameter can be one of the following values:
10407 * @arg @ref LL_HRTIM_TIMER_A
10408 * @arg @ref LL_HRTIM_TIMER_B
10409 * @arg @ref LL_HRTIM_TIMER_C
10410 * @arg @ref LL_HRTIM_TIMER_D
10411 * @arg @ref LL_HRTIM_TIMER_E
10412 * @retval None
10413 */
10415 {
10420 }
10422 /**
10423 * @brief Indicate whether the delayed protection DMA request is enabled for a given timer.
10424 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_IsEnabledDMAReq_DLYPRT
10425 * @param HRTIMx High Resolution Timer instance
10426 * @param Timer This parameter can be one of the following values:
10427 * @arg @ref LL_HRTIM_TIMER_A
10428 * @arg @ref LL_HRTIM_TIMER_B
10429 * @arg @ref LL_HRTIM_TIMER_C
10430 * @arg @ref LL_HRTIM_TIMER_D
10431 * @arg @ref LL_HRTIM_TIMER_E
10432 * @retval State of DLYPRTDE bit in HRTIM_TIMxDIER register (1 or 0).
10433 */
10434 __STATIC_INLINE uint32_t LL_HRTIM_IsEnabledDMAReq_DLYPRT(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
10435 {
10437 const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MDIER) +
10441 }
10443 /**
10444 * @}
10445 */
10447 #if defined(USE_FULL_LL_DRIVER)
10448 /** @defgroup HRTIM_LL_LL_EF_Init In-initialization and de-initialization functions
10449 * @{
10450 */
10452 /**
10453 * @}
10454 */
10457 /**
10458 * @}
10459 */
10461 /**
10462 * @}
10463 */
10467 /**
10468 * @}
10469 */
10471 #ifdef __cplusplus
10472 }
10473 #endif
10477 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/