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Merge pull request #11270 from haslinghuis/rename_attr
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_ll_mdma.h
blob18609ad3e67ab7e2ea564036dfef946051ad758e
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_mdma.h
4 * @author MCD Application Team
5 * @brief Header file of MDMA LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_LL_MDMA_H
22 #define STM32H7xx_LL_MDMA_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx.h"
30
31 /** @addtogroup STM32H7xx_LL_Driver
32 * @{
33 */
34
35 #if defined (MDMA)
36
37 /** @defgroup MDMA_LL MDMA
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /** @defgroup MDMA_LL_Private_Variables MDMA Private Variables
44 * @{
45 */
46 /* Array used to get the MDMA channel register offset versus channel index LL_MDMA_CHANNEL_x */
47 static const uint32_t LL_MDMA_CH_OFFSET_TAB[] =
48 {
49 (uint32_t)(MDMA_Channel0_BASE - MDMA_BASE),
50 (uint32_t)(MDMA_Channel1_BASE - MDMA_BASE),
51 (uint32_t)(MDMA_Channel2_BASE - MDMA_BASE),
52 (uint32_t)(MDMA_Channel3_BASE - MDMA_BASE),
53 (uint32_t)(MDMA_Channel4_BASE - MDMA_BASE),
54 (uint32_t)(MDMA_Channel5_BASE - MDMA_BASE),
55 (uint32_t)(MDMA_Channel6_BASE - MDMA_BASE),
56 (uint32_t)(MDMA_Channel7_BASE - MDMA_BASE),
57 (uint32_t)(MDMA_Channel8_BASE - MDMA_BASE),
58 (uint32_t)(MDMA_Channel9_BASE - MDMA_BASE),
59 (uint32_t)(MDMA_Channel10_BASE - MDMA_BASE),
60 (uint32_t)(MDMA_Channel11_BASE - MDMA_BASE),
61 (uint32_t)(MDMA_Channel12_BASE - MDMA_BASE),
62 (uint32_t)(MDMA_Channel13_BASE - MDMA_BASE),
63 (uint32_t)(MDMA_Channel14_BASE - MDMA_BASE),
64 (uint32_t)(MDMA_Channel15_BASE - MDMA_BASE)
65 };
66
67 /**
68 * @}
69 */
70
71 /* Private constants ---------------------------------------------------------*/
72 /** @defgroup MDMA_LL_Private_Constants MDMA Private Constants
73 * @{
74 */
75 /**
76 * @}
77 */
78
79
80 /* Private macros ------------------------------------------------------------*/
81 /* Exported types ------------------------------------------------------------*/
82 #if defined(USE_FULL_LL_DRIVER)
83 /** @defgroup MDMA_LL_ES_INIT MDMA Exported Init structure
84 * @{
85 */
86 typedef struct
87 {
88 uint32_t SrcAddress; /*!< Specifies the transfer source address
89 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF.
90 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceAddress() */
91
92 uint32_t DstAddress; /*!< Specifies the transfer destination address
93 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF.
94 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationAddress() */
95
96 uint32_t RequestMode; /*!< Specifies the request mode Hardware or Software.
97 This parameter can be a value of @ref MDMA_LL_EC_REQUEST_MODE
98 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetRequestMode() */
99
100 uint32_t TriggerMode; /*!< Specifies the transfer trigger mode.
101 This parameter can be a value of @ref MDMA_LL_EC_TRIGGER_MODE
102 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetTriggerMode() */
103
104 uint32_t HWTrigger; /*!< Specifies the HW transfer trigger used when RequestMode is HW.
105 This parameter can be a value of @ref MDMA_LL_EC_HW_TRIGGER_SELCTION
106 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHWTrigger() */
107
108 uint32_t BlockDataLength; /*!< Specifies the length of a block transfer in bytes
109 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00010000.
110 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkDataLength() */
111
112 uint32_t BlockRepeatCount; /*!< Specifies the Block Repeat Count
113 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00000FFF.
114 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatCount() */
115
116 uint32_t BlockRepeatDestAddrUpdateMode; /*!< Specifies the block repeat destination address update mode.
117 This parameter can be a value of @ref MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE
118 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatDestAddrUpdate() */
119
120 uint32_t BlockRepeatSrcAddrUpdateMode; /*!< Specifies the block repeat source address update mode.
121 This parameter can be a value of @ref MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE
122 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatSrcAddrUpdate() */
123
124 uint32_t BlockRepeatDestAddrUpdateVal; /*!< Specifies the block repeat destination address update value.
125 This parameter can be a value Between 0 to 0x0000FFFF
126 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptDestAddrUpdateValue() */
127
128 uint32_t BlockRepeatSrcAddrUpdateVal; /*!< Specifies the block repeat source address update value.
129 This parameter can be a value Between 0 to 0x0000FFFF
130 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptSrcAddrUpdateValue() */
131
132 uint32_t LinkAddress; /*!< Specifies the linked list next transfer node address.
133 This parameter can be a value Between 0 to 0xFFFFFFFF
134 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetLinkAddress() */
135
136 uint32_t WordEndianess; /*!< Specifies the Word transfer endianness
137 This parameter can be a value of @ref MDMA_LL_EC_WORD_ENDIANNESS.
138 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetWordEndianness() */
139
140 uint32_t HalfWordEndianess; /*!< Specifies the Half Word transfer endianness
141 This parameter can be a value of @ref MDMA_LL_EC_HALFWORD_ENDIANNESS.
142 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHalfWordEndianness() */
143
144 uint32_t ByteEndianess; /*!< Specifies the Byte transfer endianness
145 This parameter can be a value of @ref MDMA_LL_EC_BYTE_ENDIANNESS.
146 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetByteEndianness() */
147
148 uint32_t Priority; /*!< Specifies the channel priority level.
149 This parameter can be a value of @ref MDMA_LL_EC_PRIORITY
150 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetChannelPriorityLevel() */
151
152 uint32_t BufferableWriteMode; /*!< Specifies the transfer Bufferable Write Mode.
153 This parameter can be a value of @ref MDMA_LL_EC_BUFF_WRITE_MODE
154 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnableBufferableWrMode()
155 and LL_MDMA_DisableBufferableWrMode */
156
157
158 uint32_t PaddingAlignment; /*!< Specifies the transfer Padding and Alignment.
159 This parameter can be a value of @ref MDMA_LL_EC_PADDING_ALIGNMENT_MODE
160 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetPaddingAlignment() */
161
162 uint32_t PackMode; /*!< Specifies the transfer Packing enabled or disabled.
163 This parameter can be a value of @ref MDMA_LL_EC_PACKING_MODE
164 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnablePacking()
165 and LL_MDMA_DisablePacking() */
166
167 uint32_t BufferTransferLength; /*!< Specifies the length of a buffer transfer in bytes
168 This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000007F.
169 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBufferTransferLength() */
170
171 uint32_t DestBurst; /*!< Specifies the destination burst size.
172 This parameter can be a value of @ref MDMA_LL_EC_DEST_BURST
173 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationBurstSize() */
174
175 uint32_t SrctBurst; /*!< Specifies the source burst size.
176 This parameter can be a value of @ref MDMA_LL_EC_SRC_BURST
177 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceBurstSize() */
178
179 uint32_t DestIncSize; /*!< Specifies the destination increment size.
180 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_OFFSET_SIZE
181 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncSize() */
182
183 uint32_t SrcIncSize; /*!< Specifies the source increment size.
184 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_OFFSET_SIZE
185 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncSize() */
186
187 uint32_t DestDataSize; /*!< Specifies the destination data size.
188 This parameter can be a value of @ref MDMA_LL_EC_DEST_DATA_SIZE
189 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationDataSize() */
190
191 uint32_t SrcDataSize; /*!< Specifies the source data size.
192 This parameter can be a value of @ref MDMA_LL_EC_SRC_DATA_SIZE
193 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceDataSize() */
194
195 uint32_t DestIncMode; /*!< Specifies the destination increment mode.
196 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_MODE
197 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncMode() */
198
199 uint32_t SrcIncMode; /*!< Specifies the source increment mode.
200 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_MODE
201 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncMode() */
202
203
204 uint32_t DestBus; /*!< Specifies the destination transfer bus, System AXI or AHB/TCM bus.
205 This parameter can be a value of @ref MDMA_LL_EC_DEST_BUS
206 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestBusSelection() */
207
208 uint32_t SrcBus; /*!< Specifies the source transfer bus, System AXI or AHB/TCM bus.
209 This parameter can be a value of @ref MDMA_LL_EC_SRC_BUS
210 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSrcBusSelection() */
211
212 uint32_t MaskAddress; /*!< Specifies the address to be updated (written) with MaskData after a request is served.
213 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served
214 This parameter can be a value Between 0 to 0xFFFFFFFF
215 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskAddress() */
216
217 uint32_t MaskData; /*!< Specifies the value to be written to MaskAddress after a request is served.
218 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served
219 This parameter can be a value Between 0 to 0xFFFFFFFF
220 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskData() */
221
222 } LL_MDMA_InitTypeDef;
223
224 /**
225 * @brief LL MDMA linked list node structure definition
226 * @note The Linked list node allows to define a new MDMA configuration
227 * (CTCR ,CBNDTR ,CSAR ,CDAR ,CBRUR, CLAR, CTBR, CMAR and CMDR registers).
228 * When CLAR register is configured to a non NULL value , each time a transfer ends,
229 * a new configuration (linked list node) is automatically loaded from the address given in CLAR register.
230 */
231 typedef struct
232 {
233 __IO uint32_t CTCR; /*!< New CTCR register configuration for the given MDMA linked list node */
234 __IO uint32_t CBNDTR; /*!< New CBNDTR register configuration for the given MDMA linked list node */
235 __IO uint32_t CSAR; /*!< New CSAR register configuration for the given MDMA linked list node */
236 __IO uint32_t CDAR; /*!< New CDAR register configuration for the given MDMA linked list node */
237 __IO uint32_t CBRUR; /*!< New CBRUR register configuration for the given MDMA linked list node */
238 __IO uint32_t CLAR; /*!< New CLAR register configuration for the given MDMA linked list node */
239 __IO uint32_t CTBR; /*!< New CTBR register configuration for the given MDMA linked list node */
240 __IO uint32_t Reserved; /*!< Reserved register*/
241 __IO uint32_t CMAR; /*!< New CMAR register configuration for the given MDMA linked list node */
242 __IO uint32_t CMDR; /*!< New CMDR register configuration for the given MDMA linked list node */
243
244 }LL_MDMA_LinkNodeTypeDef;
245
246 /**
247 * @}
248 */
249 #endif /*USE_FULL_LL_DRIVER*/
250 /* Exported constants --------------------------------------------------------*/
251 /** @defgroup MDMA_LL_Exported_Constants MDMA Exported Constants
252 * @{
253 */
254
255 /** @defgroup MDMA_LL_EC_CHANNEL CHANNEL
256 * @{
257 */
258 #define LL_MDMA_CHANNEL_0 0x00000000U
259 #define LL_MDMA_CHANNEL_1 0x00000001U
260 #define LL_MDMA_CHANNEL_2 0x00000002U
261 #define LL_MDMA_CHANNEL_3 0x00000003U
262 #define LL_MDMA_CHANNEL_4 0x00000004U
263 #define LL_MDMA_CHANNEL_5 0x00000005U
264 #define LL_MDMA_CHANNEL_6 0x00000006U
265 #define LL_MDMA_CHANNEL_7 0x00000007U
266 #define LL_MDMA_CHANNEL_8 0x00000008U
267 #define LL_MDMA_CHANNEL_9 0x00000009U
268 #define LL_MDMA_CHANNEL_10 0x0000000AU
269 #define LL_MDMA_CHANNEL_11 0x0000000BU
270 #define LL_MDMA_CHANNEL_12 0x0000000CU
271 #define LL_MDMA_CHANNEL_13 0x0000000DU
272 #define LL_MDMA_CHANNEL_14 0x0000000EU
273 #define LL_MDMA_CHANNEL_15 0x0000000FU
274 #define LL_MDMA_CHANNEL_ALL 0xFFFF0000U
275 /**
276 * @}
277 */
278
279 /** @defgroup MDMA_LL_EC_WORD_ENDIANNESS Word Endianness
280 * @{
281 */
282 #define LL_MDMA_WORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianess preserved for words */
283 #define LL_MDMA_WORD_ENDIANNESS_EXCHANGE MDMA_CCR_WEX /*!< word order exchanged when destination data size is double word */
284
285 /**
286 * @}
287 */
288
289 /** @defgroup MDMA_LL_EC_HALFWORD_ENDIANNESS Half Word Endianness
290 * @{
291 */
292 #define LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianess preserved for half words */
293 #define LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE MDMA_CCR_HEX /*!< half word order exchanged when destination data size is word or double word */
294
295 /**
296 * @}
297 */
298
299 /** @defgroup MDMA_LL_EC_BYTE_ENDIANNESS Byte Endianness
300 * @{
301 */
302 #define LL_MDMA_BYTE_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianess preserved for bytes */
303 #define LL_MDMA_BYTE_ENDIANNESS_EXCHANGE MDMA_CCR_BEX /*!< byte order exchanged when destination data size is half word , word or double word */
304
305 /**
306 * @}
307 */
308
309 /** @defgroup MDMA_LL_EC_PRIORITY Transfer Priority level
310 * @{
311 */
312 #define LL_MDMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
313 #define LL_MDMA_PRIORITY_MEDIUM MDMA_CCR_PL_0 /*!< Priority level : Medium */
314 #define LL_MDMA_PRIORITY_HIGH MDMA_CCR_PL_1 /*!< Priority level : High */
315 #define LL_MDMA_PRIORITY_VERYHIGH MDMA_CCR_PL /*!< Priority level : Very_High */
316 /**
317 * @}
318 */
319
320 /** @defgroup MDMA_LL_EC_BUFF_WRITE_MODE Bufferable Write Mode
321 * @{
322 */
323 #define LL_MDMA_BUFF_WRITE_DISABLE 0x00000000U /*!< destination write operation is non-bufferable */
324 #define LL_MDMA_BUFF_WRITE_ENABLE MDMA_CTCR_BWM /*!< destination write operation is bufferable */
325 /**
326 * @}
327 */
328
329 /** @defgroup MDMA_LL_EC_REQUEST_MODE Request Mode
330 * @{
331 */
332 #define LL_MDMA_REQUEST_MODE_HW 0x00000000U /*!< Request mode is Hardware */
333 #define LL_MDMA_REQUEST_MODE_SW MDMA_CTCR_SWRM /*!< Request mode is Software */
334 /**
335 * @}
336 */
337
338 /** @defgroup MDMA_LL_EC_TRIGGER_MODE Trigger Mode
339 * @{
340 */
341 #define LL_MDMA_BUFFER_TRANSFER 0x00000000U /*!< Each MDMA request (SW or HW) triggers a buffer transfer */
342 #define LL_MDMA_BLOCK_TRANSFER MDMA_CTCR_TRGM_0 /*!< Each MDMA request (SW or HW) triggers a block transfer */
343 #define LL_MDMA_REPEAT_BLOCK_TRANSFER MDMA_CTCR_TRGM_1 /*!< Each MDMA request (SW or HW) triggers a repeated block transfer */
344 #define LL_MDMA_FULL_TRANSFER MDMA_CTCR_TRGM /*!< Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any */
345 /**
346 * @}
347 */
348
349 /** @defgroup MDMA_LL_EC_PADDING_ALIGNMENT_MODE Padding Alignment Mode
350 * @{
351 */
352 #define LL_MDMA_DATAALIGN_RIGHT 0x00000000U /*!< Right Aligned, padded w/ 0s (default) */
353 #define LL_MDMA_DATAALIGN_RIGHT_SIGNED MDMA_CTCR_PAM_0 /*!< Right Aligned, Sign extended ,
354 Note : this mode is allowed only if the Source data size smaller than Destination data size */
355 #define LL_MDMA_DATAALIGN_LEFT MDMA_CTCR_PAM_1 /*!< Left Aligned (padded with 0s) */
356 /**
357 * @}
358 */
359
360 /** @defgroup MDMA_LL_EC_PACKING_MODE Transfer Packing
361 * @{
362 */
363 #define LL_MDMA_PACK_DISABLE 0x00000000U /*!< Packing disabled */
364 #define LL_MDMA_PACK_ENABLE MDMA_CTCR_PKE /*!< Packing enabled */
365 /**
366 * @}
367 */
368
369 /** @defgroup MDMA_LL_EC_DEST_BURST Transfer Destination Burst
370 * @{
371 */
372 #define LL_MDMA_DEST_BURST_SINGLE 0x00000000U /*!< Single transfer */
373 #define LL_MDMA_DEST_BURST_2BEATS MDMA_CTCR_DBURST_0 /*!< Burst 2 beats */
374 #define LL_MDMA_DEST_BURST_4BEATS MDMA_CTCR_DBURST_1 /*!< Burst 4 beats */
375 #define LL_MDMA_DEST_BURST_8BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_1) /*!< Burst 8 beats */
376 #define LL_MDMA_DEST_BURST_16BEATS MDMA_CTCR_DBURST_2 /*!< Burst 16 beats */
377 #define LL_MDMA_DEST_BURST_32BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_2) /*!< Burst 32 beats */
378 #define LL_MDMA_DEST_BURST_64BEATS (MDMA_CTCR_DBURST_1 | MDMA_CTCR_DBURST_2) /*!< Burst 64 beats */
379 #define LL_MDMA_DEST_BURST_128BEATS (MDMA_CTCR_DBURST) /*!< Burst 128 beats */
380 /**
381 * @}
382 */
383
384 /** @defgroup MDMA_LL_EC_SRC_BURST Transfer Source Burst
385 * @{
386 */
387 #define LL_MDMA_SRC_BURST_SINGLE 0x00000000U /*!< Single transfer */
388 #define LL_MDMA_SRC_BURST_2BEATS MDMA_CTCR_SBURST_0 /*!< Burst 2 beats */
389 #define LL_MDMA_SRC_BURST_4BEATS MDMA_CTCR_SBURST_1 /*!< Burst 4 beats */
390 #define LL_MDMA_SRC_BURST_8BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_1) /*!< Burst 8 beats */
391 #define LL_MDMA_SRC_BURST_16BEATS MDMA_CTCR_SBURST_2 /*!< Burst 16 beats */
392 #define LL_MDMA_SRC_BURST_32BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_2) /*!< Burst 32 beats */
393 #define LL_MDMA_SRC_BURST_64BEATS (MDMA_CTCR_SBURST_1 | MDMA_CTCR_SBURST_2) /*!< Burst 64 beats */
394 #define LL_MDMA_SRC_BURST_128BEATS MDMA_CTCR_SBURST /*!< Burst 128 beats */
395 /**
396 * @}
397 */
398
399 /** @defgroup MDMA_LL_EC_DEST_INC_OFFSET_SIZE Destination Increment Offset Size
400 * @{
401 */
402 #define LL_MDMA_DEST_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */
403 #define LL_MDMA_DEST_INC_OFFSET_HALFWORD MDMA_CTCR_DINCOS_0 /*!< offset is Half Word (16-bit) */
404 #define LL_MDMA_DEST_INC_OFFSET_WORD MDMA_CTCR_DINCOS_1 /*!< offset is Word (32-bit) */
405 #define LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD MDMA_CTCR_DINCOS /*!< offset is Double Word (64-bit) */
406 /**
407 * @}
408 */
409
410 /** @defgroup MDMA_LL_EC_SRC_INC_OFFSET_SIZE Source Increment Offset Size
411 * @{
412 */
413 #define LL_MDMA_SRC_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */
414 #define LL_MDMA_SRC_INC_OFFSET_HALFWORD MDMA_CTCR_SINCOS_0 /*!< offset is Half Word (16-bit) */
415 #define LL_MDMA_SRC_INC_OFFSET_WORD MDMA_CTCR_SINCOS_1 /*!< offset is Word (32-bit) */
416 #define LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD MDMA_CTCR_SINCOS /*!< offset is Double Word (64-bit) */
417 /**
418 * @}
419 */
420
421 /** @defgroup MDMA_LL_EC_DEST_DATA_SIZE Destination Data Size
422 * @{
423 */
424 #define LL_MDMA_DEST_DATA_SIZE_BYTE 0x00000000U /*!< Destination data size is Byte */
425 #define LL_MDMA_DEST_DATA_SIZE_HALFWORD MDMA_CTCR_DSIZE_0 /*!< Destination data size is half word */
426 #define LL_MDMA_DEST_DATA_SIZE_WORD MDMA_CTCR_DSIZE_1 /*!< Destination data size is word */
427 #define LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD MDMA_CTCR_DSIZE /*!< Destination data size is double word */
428 /**
429 * @}
430 */
431
432 /** @defgroup MDMA_LL_EC_SRC_DATA_SIZE Source Data Size
433 * @{
434 */
435 #define LL_MDMA_SRC_DATA_SIZE_BYTE 0x00000000U /*!< Source data size is Byte */
436 #define LL_MDMA_SRC_DATA_SIZE_HALFWORD MDMA_CTCR_SSIZE_0 /*!< Source data size is half word */
437 #define LL_MDMA_SRC_DATA_SIZE_WORD MDMA_CTCR_SSIZE_1 /*!< Source data size is word */
438 #define LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD MDMA_CTCR_SSIZE /*!< Source data size is double word */
439 /**
440 * @}
441 */
442
443 /** @defgroup MDMA_LL_EC_DEST_INC_MODE Destination Increment Mode
444 * @{
445 */
446 #define LL_MDMA_DEST_FIXED 0x00000000U /*!< Destination address pointer is fixed */
447 #define LL_MDMA_DEST_INCREMENT MDMA_CTCR_DINC_1 /*!< Destination address pointer is incremented after each data transfer */
448 #define LL_MDMA_DEST_DECREMENT MDMA_CTCR_DINC /*!< Destination address pointer is decremented after each data transfer */
449 /**
450 * @}
451 */
452
453 /** @defgroup MDMA_LL_EC_SRC_INC_MODE Source Increment Mode
454 * @{
455 */
456 #define LL_MDMA_SRC_FIXED 0x00000000U /*!< Destination address pointer is fixed */
457 #define LL_MDMA_SRC_INCREMENT MDMA_CTCR_SINC_1 /*!< Destination address pointer is incremented after each data transfer */
458 #define LL_MDMA_SRC_DECREMENT MDMA_CTCR_SINC /*!< Destination address pointer is decremented after each data transfer */
459 /**
460 * @}
461 */
462
463 /** @defgroup MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE Block Repeat Destination address Update Mode
464 * @{
465 */
466 #define LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT 0x00000000U /*!< Destination address pointer is incremented after each block transfer by Destination Update Value */
467 #define LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT MDMA_CBNDTR_BRDUM /*!< Destination address pointer is decremented after each block transfer by Destination Update Value */
468 /**
469 * @}
470 */
471
472 /** @defgroup MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE Source Block Repeat address Update Mode
473 * @{
474 */
475 #define LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT 0x00000000U /*!< Source address pointer is incremented after each block transfer by Source Update Value */
476 #define LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT MDMA_CBNDTR_BRSUM /*!< Source address pointer is decremented after each block transfer by Source Update Value */
477 /**
478 * @}
479 */
480
481 /** @defgroup MDMA_LL_EC_DEST_BUS Destination BUS Selection
482 * @{
483 */
484 #define LL_MDMA_DEST_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as destination */
485 #define LL_MDMA_DEST_BUS_AHB_TCM MDMA_CTBR_DBUS /*!< AHB bus/TCM is used as destination */
486 /**
487 * @}
488 */
489
490 /** @defgroup MDMA_LL_EC_SRC_BUS Source BUS Selection
491 * @{
492 */
493 #define LL_MDMA_SRC_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as source */
494 #define LL_MDMA_SRC_BUS_AHB_TCM MDMA_CTBR_SBUS /*!< AHB bus/TCM is used as source */
495 /**
496 * @}
497 */
498
499 /** @defgroup MDMA_LL_EC_HW_TRIGGER_SELCTION HW Trigger Selection
500 * @{
501 */
502 #define LL_MDMA_REQ_DMA1_STREAM0_TC 0x00000000U /*!< MDMA HW Trigger (request) is DMA1 Stream 0 Transfer Complete Flag */
503 #define LL_MDMA_REQ_DMA1_STREAM1_TC 0x00000001U /*!< MDMA HW Trigger (request) is DMA1 Stream 1 Transfer Complete Flag */
504 #define LL_MDMA_REQ_DMA1_STREAM2_TC 0x00000002U /*!< MDMA HW Trigger (request) is DMA1 Stream 2 Transfer Complete Flag */
505 #define LL_MDMA_REQ_DMA1_STREAM3_TC 0x00000003U /*!< MDMA HW Trigger (request) is DMA1 Stream 3 Transfer Complete Flag */
506 #define LL_MDMA_REQ_DMA1_STREAM4_TC 0x00000004U /*!< MDMA HW Trigger (request) is DMA1 Stream 4 Transfer Complete Flag */
507 #define LL_MDMA_REQ_DMA1_STREAM5_TC 0x00000005U /*!< MDMA HW Trigger (request) is DMA1 Stream 5 Transfer Complete Flag */
508 #define LL_MDMA_REQ_DMA1_STREAM6_TC 0x00000006U /*!< MDMA HW Trigger (request) is DMA1 Stream 6 Transfer Complete Flag */
509 #define LL_MDMA_REQ_DMA1_STREAM7_TC 0x00000007U /*!< MDMA HW Trigger (request) is DMA1 Stream 7 Transfer Complete Flag */
510 #define LL_MDMA_REQ_DMA2_STREAM0_TC 0x00000008U /*!< MDMA HW Trigger (request) is DMA2 Stream 0 Transfer Complete Flag */
511 #define LL_MDMA_REQ_DMA2_STREAM1_TC 0x00000009U /*!< MDMA HW Trigger (request) is DMA2 Stream 1 Transfer Complete Flag */
512 #define LL_MDMA_REQ_DMA2_STREAM2_TC 0x0000000AU /*!< MDMA HW Trigger (request) is DMA2 Stream 2 Transfer Complete Flag */
513 #define LL_MDMA_REQ_DMA2_STREAM3_TC 0x0000000BU /*!< MDMA HW Trigger (request) is DMA2 Stream 3 Transfer Complete Flag */
514 #define LL_MDMA_REQ_DMA2_STREAM4_TC 0x0000000CU /*!< MDMA HW Trigger (request) is DMA2 Stream 4 Transfer Complete Flag */
515 #define LL_MDMA_REQ_DMA2_STREAM5_TC 0x0000000DU /*!< MDMA HW Trigger (request) is DMA2 Stream 5 Transfer Complete Flag */
516 #define LL_MDMA_REQ_DMA2_STREAM6_TC 0x0000000EU /*!< MDMA HW Trigger (request) is DMA2 Stream 6 Transfer Complete Flag */
517 #define LL_MDMA_REQ_DMA2_STREAM7_TC 0x0000000FU /*!< MDMA HW Trigger (request) is DMA2 Stream 7 Transfer Complete Flag */
518 #if defined (LTDC)
519 #define LL_MDMA_REQ_LTDC_LINE_IT 0x00000010U /*!< MDMA HW Trigger (request) is LTDC Line interrupt Flag */
520 #endif /* LTDC */
521 #if defined (JPEG)
522 #define LL_MDMA_REQ_JPEG_INFIFO_TH 0x00000011U /*!< MDMA HW Trigger (request) is JPEG Input FIFO threshold Flag */
523 #define LL_MDMA_REQ_JPEG_INFIFO_NF 0x00000012U /*!< MDMA HW Trigger (request) is JPEG Input FIFO not full Flag */
524 #define LL_MDMA_REQ_JPEG_OUTFIFO_TH 0x00000013U /*!< MDMA HW Trigger (request) is JPEG Output FIFO threshold Flag */
525 #define LL_MDMA_REQ_JPEG_OUTFIFO_NE 0x00000014U /*!< MDMA HW Trigger (request) is JPEG Output FIFO not empty Flag */
526 #define LL_MDMA_REQ_JPEG_END_CONVERSION 0x00000015U /*!< MDMA HW Trigger (request) is JPEG End of conversion Flag */
527 #endif /* JPEG */
528 #if defined (QUADSPI)
529 #define LL_MDMA_REQ_QUADSPI_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is QSPI FIFO threshold Flag */
530 #define LL_MDMA_REQ_QUADSPI_TC 0x00000017U /*!< MDMA HW Trigger (request) is QSPI Transfer complete Flag */
531 #endif /* QUADSPI */
532 #if defined (OCTOSPI1)
533 #define LL_MDMA_REQ_OCTOSPI1_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is OCTOSPI1 FIFO threshold Flag */
534 #define LL_MDMA_REQ_OCTOSPI1_TC 0x00000017U /*!< MDMA HW Trigger (request) is OCTOSPI1 Transfer complete Flag */
535 #endif /* OCTOSPI1 */
536 #define LL_MDMA_REQ_DMA2D_CLUT_TC 0x00000018U /*!< MDMA HW Trigger (request) is DMA2D CLUT Transfer Complete Flag */
537 #define LL_MDMA_REQ_DMA2D_TC 0x00000019U /*!< MDMA HW Trigger (request) is DMA2D Transfer Complete Flag */
538 #define LL_MDMA_REQ_DMA2D_TW 0x0000001AU /*!< MDMA HW Trigger (request) is DMA2D Transfer Watermark Flag */
539 #if defined (DSI)
540 #define LL_MDMA_REQ_DSI_TEARING_EFFECT 0x0000001BU /*!< MDMA HW Trigger (request) is DSI Tearing Effect Flag */
541 #define LL_MDMA_REQ_DSI_END_REFRESH 0x0000001CU /*!< MDMA HW Trigger (request) is DSI End of refresh Flag */
542 #endif /* DSI */
543 #define LL_MDMA_REQ_SDMMC1_END_DATA 0x0000001DU /*!< MDMA HW Trigger (request) is SDMMC1 End of Data Flag */
544 #define LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER 0x0000001EU /*!< MDMA HW Trigger (request) is SDMMC1 Internal DMA buffer End Flag : This trigger is available starting from STM32H7 Rev.B devices */
545 #define LL_MDMA_REQ_SDMMC1_COMMAND_END 0x0000001FU /*!< MDMA HW Trigger (request) is SDMMC1 Command End Flag : This trigger is available starting from STM32H7 Rev.B devices */
546 #if defined (OCTOSPI2)
547 #define LL_MDMA_REQ_OCTOSPI2_FIFO_TH 0x00000020U /*!< MDMA HW Trigger (request) is OCTOSPI2 FIFO threshold Flag */
548 #define LL_MDMA_REQ_OCTOSPI2_TC 0x00000021U /*!< MDMA HW Trigger (request) is OCTOSPI2 Transfer complete Flag */
549 #endif /* OCTOSPI2 */
550 /**
551 * @}
552 */
553
554 /** @defgroup MDMA_LL_EC_XFER_ERROR_DIRECTION Transfer Error Direction
555 * @{
556 */
557 #define LL_MDMA_READ_ERROR 0x00000000U /*!< Last transfer error on the channel was a related to a read access */
558 #define LL_MDMA_WRITE_ERROR MDMA_CESR_TED /*!< Last transfer error on the channel was a related to a write access */
559 /**
560 * @}
561 */
562
563 /**
564 * @}
565 */
566
567 /* Exported macro ------------------------------------------------------------*/
568 /** @defgroup MDMA_LL_Exported_Macros MDMA Exported Macros
569 * @{
570 */
571
572 /** @defgroup MDMA_LL_EM_WRITE_READ Common Write and read registers macros
573 * @{
574 */
575 /**
576 * @brief Write a value in MDMA register
577 * @param __INSTANCE__ MDMA Instance
578 * @param __REG__ Register to be written
579 * @param __VALUE__ Value to be written in the register
580 * @retval None
581 */
582 #define LL_MDMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
583
584 /**
585 * @brief Read a value in MDMA register
586 * @param __INSTANCE__ MDMA Instance
587 * @param __REG__ Register to be read
588 * @retval Register value
589 */
590 #define LL_MDMA_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
591 /**
592 * @}
593 */
594
595 /** @defgroup MDMA_LL_EM_CONVERT_DMAxCHANNELy Convert MDMAxChannely
596 * @{
597 */
598 /**
599 * @brief Convert MDMAx_Channely into MDMAx
600 * @param __CHANNEL_INSTANCE__ MDMAx_Channely
601 * @retval MDMAx
602 */
603 #define LL_MDMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (MDMA)
604
605 /**
606 * @brief Convert MDMAx_Channely into LL_MDMA_CHANNEL_y
607 * @param __CHANNEL_INSTANCE__ MDMAx_Channely
608 * @retval LL_MDMA_CHANNEL_y
609 */
610 #define LL_MDMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
611 (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel0 )) ? LL_MDMA_CHANNEL_0 : \
612 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel1 )) ? LL_MDMA_CHANNEL_1 : \
613 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel2 )) ? LL_MDMA_CHANNEL_2 : \
614 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel3 )) ? LL_MDMA_CHANNEL_3 : \
615 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel4 )) ? LL_MDMA_CHANNEL_4 : \
616 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel5 )) ? LL_MDMA_CHANNEL_5 : \
617 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel6 )) ? LL_MDMA_CHANNEL_6 : \
618 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel7 )) ? LL_MDMA_CHANNEL_7 : \
619 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel8 )) ? LL_MDMA_CHANNEL_8 : \
620 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel9 )) ? LL_MDMA_CHANNEL_9 : \
621 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel10)) ? LL_MDMA_CHANNEL_10 : \
622 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel11)) ? LL_MDMA_CHANNEL_11 : \
623 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel12)) ? LL_MDMA_CHANNEL_12 : \
624 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel13)) ? LL_MDMA_CHANNEL_13 : \
625 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel14)) ? LL_MDMA_CHANNEL_14 : \
626 LL_MDMA_CHANNEL_15)
627
628 /**
629 * @brief Convert MDMA Instance MDMAx and LL_MDMA_CHANNEL_y into MDMAx_Channely
630 * @param __MDMA_INSTANCE__ MDMAx
631 * @param __CHANNEL__ LL_MDMA_CHANNEL_y
632 * @retval MDMAx_Channely
633 */
634 #define LL_MDMA_GET_CHANNEL_INSTANCE(__MDMA_INSTANCE__, __CHANNEL__) \
635 (((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_0 )) ? MDMA_Channel0 : \
636 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_1 )) ? MDMA_Channel1 : \
637 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_2 )) ? MDMA_Channel2 : \
638 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_3 )) ? MDMA_Channel3 : \
639 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_4 )) ? MDMA_Channel4 : \
640 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_5 )) ? MDMA_Channel5 : \
641 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_6 )) ? MDMA_Channel6 : \
642 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_7 )) ? MDMA_Channel7 : \
643 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_8 )) ? MDMA_Channel8 : \
644 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_9 )) ? MDMA_Channel9 : \
645 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_10)) ? MDMA_Channel10 : \
646 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_11)) ? MDMA_Channel11 : \
647 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_12)) ? MDMA_Channel12 : \
648 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_13)) ? MDMA_Channel13 : \
649 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_14)) ? MDMA_Channel14 : \
650 MDMA_Channel15)
651
652 /**
653 * @}
654 */
655
656 /**
657 * @}
658 */
659
660
661 /* Exported functions --------------------------------------------------------*/
662 /** @defgroup MDMA_LL_Exported_Functions MDMA Exported Functions
663 * @{
664 */
665
666 /** @defgroup MDMA_LL_EF_Configuration Configuration
667 * @{
668 */
669 /**
670 * @brief Enable MDMA channel.
671 * @rmtoll CCR EN LL_MDMA_EnableChannel
672 * @param MDMAx MDMAx Instance
673 * @param Channel This parameter can be one of the following values:
674 * @arg @ref LL_MDMA_CHANNEL_0
675 * @arg @ref LL_MDMA_CHANNEL_1
676 * @arg @ref LL_MDMA_CHANNEL_2
677 * @arg @ref LL_MDMA_CHANNEL_3
678 * @arg @ref LL_MDMA_CHANNEL_4
679 * @arg @ref LL_MDMA_CHANNEL_5
680 * @arg @ref LL_MDMA_CHANNEL_6
681 * @arg @ref LL_MDMA_CHANNEL_7
682 * @arg @ref LL_MDMA_CHANNEL_8
683 * @arg @ref LL_MDMA_CHANNEL_9
684 * @arg @ref LL_MDMA_CHANNEL_10
685 * @arg @ref LL_MDMA_CHANNEL_11
686 * @arg @ref LL_MDMA_CHANNEL_12
687 * @arg @ref LL_MDMA_CHANNEL_13
688 * @arg @ref LL_MDMA_CHANNEL_14
689 * @arg @ref LL_MDMA_CHANNEL_15
690 * @retval None
691 */
692 __STATIC_INLINE void LL_MDMA_EnableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
693 {
694 uint32_t mdma_base_addr = (uint32_t)MDMAx;
695
696 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN);
697 }
698
699 /**
700 * @brief Disable MDMA channel.
701 * @rmtoll CCR EN LL_MDMA_DisableChannel
702 * @param MDMAx MDMAx Instance
703 * @param Channel This parameter can be one of the following values:
704 * @arg @ref LL_MDMA_CHANNEL_0
705 * @arg @ref LL_MDMA_CHANNEL_1
706 * @arg @ref LL_MDMA_CHANNEL_2
707 * @arg @ref LL_MDMA_CHANNEL_3
708 * @arg @ref LL_MDMA_CHANNEL_4
709 * @arg @ref LL_MDMA_CHANNEL_5
710 * @arg @ref LL_MDMA_CHANNEL_6
711 * @arg @ref LL_MDMA_CHANNEL_7
712 * @arg @ref LL_MDMA_CHANNEL_8
713 * @arg @ref LL_MDMA_CHANNEL_9
714 * @arg @ref LL_MDMA_CHANNEL_10
715 * @arg @ref LL_MDMA_CHANNEL_11
716 * @arg @ref LL_MDMA_CHANNEL_12
717 * @arg @ref LL_MDMA_CHANNEL_13
718 * @arg @ref LL_MDMA_CHANNEL_14
719 * @arg @ref LL_MDMA_CHANNEL_15
720 * @retval None
721 */
722 __STATIC_INLINE void LL_MDMA_DisableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
723 {
724 uint32_t mdma_base_addr = (uint32_t)MDMAx;
725
726 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN);
727 }
728
729 /**
730 * @brief Check if MDMA channel is enabled or disabled.
731 * @rmtoll CCR EN LL_MDMA_IsEnabledChannel
732 * @param MDMAx MDMAx Instance
733 * @param Channel This parameter can be one of the following values:
734 * @arg @ref LL_MDMA_CHANNEL_0
735 * @arg @ref LL_MDMA_CHANNEL_1
736 * @arg @ref LL_MDMA_CHANNEL_2
737 * @arg @ref LL_MDMA_CHANNEL_3
738 * @arg @ref LL_MDMA_CHANNEL_4
739 * @arg @ref LL_MDMA_CHANNEL_5
740 * @arg @ref LL_MDMA_CHANNEL_6
741 * @arg @ref LL_MDMA_CHANNEL_7
742 * @arg @ref LL_MDMA_CHANNEL_8
743 * @arg @ref LL_MDMA_CHANNEL_9
744 * @arg @ref LL_MDMA_CHANNEL_10
745 * @arg @ref LL_MDMA_CHANNEL_11
746 * @arg @ref LL_MDMA_CHANNEL_12
747 * @arg @ref LL_MDMA_CHANNEL_13
748 * @arg @ref LL_MDMA_CHANNEL_14
749 * @arg @ref LL_MDMA_CHANNEL_15
750 * @retval State of bit (1 or 0).
751 */
752 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
753 {
754 uint32_t mdma_base_addr = (uint32_t)MDMAx;
755
756 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN) == (MDMA_CCR_EN)) ? 1UL : 0UL);
757 }
758
759 /**
760 * @brief Generate a SW transfer request on the MDMA channel.
761 * @rmtoll CCR SWRQ LL_MDMA_GenerateSWRequest
762 * @param MDMAx MDMAx Instance
763 * @param Channel This parameter can be one of the following values:
764 * @arg @ref LL_MDMA_CHANNEL_0
765 * @arg @ref LL_MDMA_CHANNEL_1
766 * @arg @ref LL_MDMA_CHANNEL_2
767 * @arg @ref LL_MDMA_CHANNEL_3
768 * @arg @ref LL_MDMA_CHANNEL_4
769 * @arg @ref LL_MDMA_CHANNEL_5
770 * @arg @ref LL_MDMA_CHANNEL_6
771 * @arg @ref LL_MDMA_CHANNEL_7
772 * @arg @ref LL_MDMA_CHANNEL_8
773 * @arg @ref LL_MDMA_CHANNEL_9
774 * @arg @ref LL_MDMA_CHANNEL_10
775 * @arg @ref LL_MDMA_CHANNEL_11
776 * @arg @ref LL_MDMA_CHANNEL_12
777 * @arg @ref LL_MDMA_CHANNEL_13
778 * @arg @ref LL_MDMA_CHANNEL_14
779 * @arg @ref LL_MDMA_CHANNEL_15
780 * @retval None
781 */
782 __STATIC_INLINE void LL_MDMA_GenerateSWRequest(MDMA_TypeDef *MDMAx, uint32_t Channel)
783 {
784 uint32_t mdma_base_addr = (uint32_t)MDMAx;
785
786 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_SWRQ);
787 }
788
789 /**
790 * @brief Configure Transfer endianness paremeters : Word, Half word and Bytes Endianess.
791 * @rmtoll CCR WEX LL_MDMA_ConfigXferEndianness\n
792 * @rmtoll CCR HEX LL_MDMA_ConfigXferEndianness\n
793 * @rmtoll CCR BEX LL_MDMA_ConfigXferEndianness
794 * @param MDMAx MDMAx Instance
795 * @param Channel This parameter can be one of the following values:
796 * @arg @ref LL_MDMA_CHANNEL_0
797 * @arg @ref LL_MDMA_CHANNEL_1
798 * @arg @ref LL_MDMA_CHANNEL_2
799 * @arg @ref LL_MDMA_CHANNEL_3
800 * @arg @ref LL_MDMA_CHANNEL_4
801 * @arg @ref LL_MDMA_CHANNEL_5
802 * @arg @ref LL_MDMA_CHANNEL_6
803 * @arg @ref LL_MDMA_CHANNEL_7
804 * @arg @ref LL_MDMA_CHANNEL_8
805 * @arg @ref LL_MDMA_CHANNEL_9
806 * @arg @ref LL_MDMA_CHANNEL_10
807 * @arg @ref LL_MDMA_CHANNEL_11
808 * @arg @ref LL_MDMA_CHANNEL_12
809 * @arg @ref LL_MDMA_CHANNEL_13
810 * @arg @ref LL_MDMA_CHANNEL_14
811 * @arg @ref LL_MDMA_CHANNEL_15
812 * @param Configuration This parameter must be a combination of all the following values:
813 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
814 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
815 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE or @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
816 * @retval None
817 */
818 __STATIC_INLINE void LL_MDMA_ConfigXferEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
819 {
820 uint32_t mdma_base_addr = (uint32_t)MDMAx;
821
822 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR,
823 MDMA_CCR_WEX | MDMA_CCR_HEX | MDMA_CCR_BEX, Configuration);
824 }
825
826 /**
827 * @brief Set Words Endianess.
828 * @rmtoll CCR WEX LL_MDMA_SetWordEndianness
829 * @param MDMAx MDMAx Instance
830 * @param Channel This parameter can be one of the following values:
831 * @arg @ref LL_MDMA_CHANNEL_0
832 * @arg @ref LL_MDMA_CHANNEL_1
833 * @arg @ref LL_MDMA_CHANNEL_2
834 * @arg @ref LL_MDMA_CHANNEL_3
835 * @arg @ref LL_MDMA_CHANNEL_4
836 * @arg @ref LL_MDMA_CHANNEL_5
837 * @arg @ref LL_MDMA_CHANNEL_6
838 * @arg @ref LL_MDMA_CHANNEL_7
839 * @arg @ref LL_MDMA_CHANNEL_8
840 * @arg @ref LL_MDMA_CHANNEL_9
841 * @arg @ref LL_MDMA_CHANNEL_10
842 * @arg @ref LL_MDMA_CHANNEL_11
843 * @arg @ref LL_MDMA_CHANNEL_12
844 * @arg @ref LL_MDMA_CHANNEL_13
845 * @arg @ref LL_MDMA_CHANNEL_14
846 * @arg @ref LL_MDMA_CHANNEL_15
847 * @param Endianness This parameter can be one of the following values:
848 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE
849 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
850 * @retval None
851 */
852 __STATIC_INLINE void LL_MDMA_SetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
853 {
854 uint32_t mdma_base_addr = (uint32_t)MDMAx;
855
856 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX, Endianness);
857 }
858
859 /**
860 * @brief Get Words Endianess.
861 * @rmtoll CCR WEX LL_MDMA_GetWordEndianness
862 * @param MDMAx MDMAx Instance
863 * @param Channel This parameter can be one of the following values:
864 * @arg @ref LL_MDMA_CHANNEL_0
865 * @arg @ref LL_MDMA_CHANNEL_1
866 * @arg @ref LL_MDMA_CHANNEL_2
867 * @arg @ref LL_MDMA_CHANNEL_3
868 * @arg @ref LL_MDMA_CHANNEL_4
869 * @arg @ref LL_MDMA_CHANNEL_5
870 * @arg @ref LL_MDMA_CHANNEL_6
871 * @arg @ref LL_MDMA_CHANNEL_7
872 * @arg @ref LL_MDMA_CHANNEL_8
873 * @arg @ref LL_MDMA_CHANNEL_9
874 * @arg @ref LL_MDMA_CHANNEL_10
875 * @arg @ref LL_MDMA_CHANNEL_11
876 * @arg @ref LL_MDMA_CHANNEL_12
877 * @arg @ref LL_MDMA_CHANNEL_13
878 * @arg @ref LL_MDMA_CHANNEL_14
879 * @arg @ref LL_MDMA_CHANNEL_15
880 * @retval Returned value can be one of the following values:
881 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE
882 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
883 * @retval None
884 */
885 __STATIC_INLINE uint32_t LL_MDMA_GetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
886 {
887 uint32_t mdma_base_addr = (uint32_t)MDMAx;
888
889 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX));
890 }
891
892 /**
893 * @brief Set Half Words Endianess.
894 * @rmtoll CCR HEX LL_MDMA_SetHalfWordEndianness
895 * @param MDMAx MDMAx Instance
896 * @param Channel This parameter can be one of the following values:
897 * @arg @ref LL_MDMA_CHANNEL_0
898 * @arg @ref LL_MDMA_CHANNEL_1
899 * @arg @ref LL_MDMA_CHANNEL_2
900 * @arg @ref LL_MDMA_CHANNEL_3
901 * @arg @ref LL_MDMA_CHANNEL_4
902 * @arg @ref LL_MDMA_CHANNEL_5
903 * @arg @ref LL_MDMA_CHANNEL_6
904 * @arg @ref LL_MDMA_CHANNEL_7
905 * @arg @ref LL_MDMA_CHANNEL_8
906 * @arg @ref LL_MDMA_CHANNEL_9
907 * @arg @ref LL_MDMA_CHANNEL_10
908 * @arg @ref LL_MDMA_CHANNEL_11
909 * @arg @ref LL_MDMA_CHANNEL_12
910 * @arg @ref LL_MDMA_CHANNEL_13
911 * @arg @ref LL_MDMA_CHANNEL_14
912 * @arg @ref LL_MDMA_CHANNEL_15
913 * @param Endianness This parameter can be one of the following values:
914 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE
915 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
916 * @retval None
917 */
918 __STATIC_INLINE void LL_MDMA_SetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
919 {
920 uint32_t mdma_base_addr = (uint32_t)MDMAx;
921
922 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX, Endianness);
923 }
924
925 /**
926 * @brief Get Half Words Endianess.
927 * @rmtoll CCR HEX LL_MDMA_GetHalfWordEndianness
928 * @param MDMAx MDMAx Instance
929 * @param Channel This parameter can be one of the following values:
930 * @arg @ref LL_MDMA_CHANNEL_0
931 * @arg @ref LL_MDMA_CHANNEL_1
932 * @arg @ref LL_MDMA_CHANNEL_2
933 * @arg @ref LL_MDMA_CHANNEL_3
934 * @arg @ref LL_MDMA_CHANNEL_4
935 * @arg @ref LL_MDMA_CHANNEL_5
936 * @arg @ref LL_MDMA_CHANNEL_6
937 * @arg @ref LL_MDMA_CHANNEL_7
938 * @arg @ref LL_MDMA_CHANNEL_8
939 * @arg @ref LL_MDMA_CHANNEL_9
940 * @arg @ref LL_MDMA_CHANNEL_10
941 * @arg @ref LL_MDMA_CHANNEL_11
942 * @arg @ref LL_MDMA_CHANNEL_12
943 * @arg @ref LL_MDMA_CHANNEL_13
944 * @arg @ref LL_MDMA_CHANNEL_14
945 * @arg @ref LL_MDMA_CHANNEL_15
946 * @retval Returned value can be one of the following values:
947 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE
948 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
949 * @retval None
950 */
951 __STATIC_INLINE uint32_t LL_MDMA_GetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
952 {
953 uint32_t mdma_base_addr = (uint32_t)MDMAx;
954
955 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX));
956 }
957
958 /**
959 * @brief Set Bytes Endianess.
960 * @rmtoll CCR BEX LL_MDMA_SetByteEndianness
961 * @param MDMAx MDMAx Instance
962 * @param Channel This parameter can be one of the following values:
963 * @arg @ref LL_MDMA_CHANNEL_0
964 * @arg @ref LL_MDMA_CHANNEL_1
965 * @arg @ref LL_MDMA_CHANNEL_2
966 * @arg @ref LL_MDMA_CHANNEL_3
967 * @arg @ref LL_MDMA_CHANNEL_4
968 * @arg @ref LL_MDMA_CHANNEL_5
969 * @arg @ref LL_MDMA_CHANNEL_6
970 * @arg @ref LL_MDMA_CHANNEL_7
971 * @arg @ref LL_MDMA_CHANNEL_8
972 * @arg @ref LL_MDMA_CHANNEL_9
973 * @arg @ref LL_MDMA_CHANNEL_10
974 * @arg @ref LL_MDMA_CHANNEL_11
975 * @arg @ref LL_MDMA_CHANNEL_12
976 * @arg @ref LL_MDMA_CHANNEL_13
977 * @arg @ref LL_MDMA_CHANNEL_14
978 * @arg @ref LL_MDMA_CHANNEL_15
979 * @param Endianness This parameter can be one of the following values:
980 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE
981 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
982 * @retval None
983 */
984 __STATIC_INLINE void LL_MDMA_SetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
985 {
986 uint32_t mdma_base_addr = (uint32_t)MDMAx;
987
988 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX, Endianness);
989 }
990
991 /**
992 * @brief Get Bytes Endianess.
993 * @rmtoll CCR BEX LL_MDMA_GetByteEndianness
994 * @param MDMAx MDMAx Instance
995 * @param Channel This parameter can be one of the following values:
996 * @arg @ref LL_MDMA_CHANNEL_0
997 * @arg @ref LL_MDMA_CHANNEL_1
998 * @arg @ref LL_MDMA_CHANNEL_2
999 * @arg @ref LL_MDMA_CHANNEL_3
1000 * @arg @ref LL_MDMA_CHANNEL_4
1001 * @arg @ref LL_MDMA_CHANNEL_5
1002 * @arg @ref LL_MDMA_CHANNEL_6
1003 * @arg @ref LL_MDMA_CHANNEL_7
1004 * @arg @ref LL_MDMA_CHANNEL_8
1005 * @arg @ref LL_MDMA_CHANNEL_9
1006 * @arg @ref LL_MDMA_CHANNEL_10
1007 * @arg @ref LL_MDMA_CHANNEL_11
1008 * @arg @ref LL_MDMA_CHANNEL_12
1009 * @arg @ref LL_MDMA_CHANNEL_13
1010 * @arg @ref LL_MDMA_CHANNEL_14
1011 * @arg @ref LL_MDMA_CHANNEL_15
1012 * @retval Returned value can be one of the following values:
1013 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE
1014 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
1015 * @retval None
1016 */
1017 __STATIC_INLINE uint32_t LL_MDMA_GetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
1018 {
1019 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1020
1021 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX));
1022 }
1023
1024 /**
1025 * @brief Set Channel priority level.
1026 * @rmtoll CCR PL LL_MDMA_SetChannelPriorityLevel
1027 * @param MDMAx MDMAx Instance
1028 * @param Channel This parameter can be one of the following values:
1029 * @arg @ref LL_MDMA_CHANNEL_0
1030 * @arg @ref LL_MDMA_CHANNEL_1
1031 * @arg @ref LL_MDMA_CHANNEL_2
1032 * @arg @ref LL_MDMA_CHANNEL_3
1033 * @arg @ref LL_MDMA_CHANNEL_4
1034 * @arg @ref LL_MDMA_CHANNEL_5
1035 * @arg @ref LL_MDMA_CHANNEL_6
1036 * @arg @ref LL_MDMA_CHANNEL_7
1037 * @arg @ref LL_MDMA_CHANNEL_8
1038 * @arg @ref LL_MDMA_CHANNEL_9
1039 * @arg @ref LL_MDMA_CHANNEL_10
1040 * @arg @ref LL_MDMA_CHANNEL_11
1041 * @arg @ref LL_MDMA_CHANNEL_12
1042 * @arg @ref LL_MDMA_CHANNEL_13
1043 * @arg @ref LL_MDMA_CHANNEL_14
1044 * @arg @ref LL_MDMA_CHANNEL_15
1045 * @param Priority This parameter can be one of the following values:
1046 * @arg @ref LL_MDMA_PRIORITY_LOW
1047 * @arg @ref LL_MDMA_PRIORITY_MEDIUM
1048 * @arg @ref LL_MDMA_PRIORITY_HIGH
1049 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH
1050 * @retval None
1051 */
1052 __STATIC_INLINE void LL_MDMA_SetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Priority)
1053 {
1054 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1055
1056 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL, Priority);
1057 }
1058
1059 /**
1060 * @brief Get Channel priority level.
1061 * @rmtoll CCR PL LL_MDMA_GetChannelPriorityLevel
1062 * @param MDMAx MDMAx Instance
1063 * @param Channel This parameter can be one of the following values:
1064 * @arg @ref LL_MDMA_CHANNEL_0
1065 * @arg @ref LL_MDMA_CHANNEL_1
1066 * @arg @ref LL_MDMA_CHANNEL_2
1067 * @arg @ref LL_MDMA_CHANNEL_3
1068 * @arg @ref LL_MDMA_CHANNEL_4
1069 * @arg @ref LL_MDMA_CHANNEL_5
1070 * @arg @ref LL_MDMA_CHANNEL_6
1071 * @arg @ref LL_MDMA_CHANNEL_7
1072 * @arg @ref LL_MDMA_CHANNEL_8
1073 * @arg @ref LL_MDMA_CHANNEL_9
1074 * @arg @ref LL_MDMA_CHANNEL_10
1075 * @arg @ref LL_MDMA_CHANNEL_11
1076 * @arg @ref LL_MDMA_CHANNEL_12
1077 * @arg @ref LL_MDMA_CHANNEL_13
1078 * @arg @ref LL_MDMA_CHANNEL_14
1079 * @arg @ref LL_MDMA_CHANNEL_15
1080 * @retval Returned value can be one of the following values:
1081 * @arg @ref LL_MDMA_PRIORITY_LOW
1082 * @arg @ref LL_MDMA_PRIORITY_MEDIUM
1083 * @arg @ref LL_MDMA_PRIORITY_HIGH
1084 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH
1085 * @retval None
1086 */
1087 __STATIC_INLINE uint32_t LL_MDMA_GetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel)
1088 {
1089 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1090
1091 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL));
1092 }
1093
1094 /**
1095 * @brief Configure MDMA transfer parameters.
1096 * @rmtoll CTCR BWM LL_MDMA_ConfigTransfer\n
1097 * @rmtoll CTCR SWRM LL_MDMA_ConfigTransfer\n
1098 * @rmtoll CTCR TRGM LL_MDMA_ConfigTransfer\n
1099 * @rmtoll CTCR PAM LL_MDMA_ConfigTransfer\n
1100 * @rmtoll CTCR PKE LL_MDMA_ConfigTransfer\n
1101 * @rmtoll CTCR TLEN LL_MDMA_ConfigTransfer\n
1102 * @rmtoll CTCR DBURST LL_MDMA_ConfigTransfer\n
1103 * @rmtoll CTCR SBURST LL_MDMA_ConfigTransfer\n
1104 * @rmtoll CTCR DINCOS LL_MDMA_ConfigTransfer\n
1105 * @rmtoll CTCR SINCOS LL_MDMA_ConfigTransfer\n
1106 * @rmtoll CTCR DSIZE LL_MDMA_ConfigTransfer\n
1107 * @rmtoll CTCR SSIZE LL_MDMA_ConfigTransfer\n
1108 * @rmtoll CTCR DINC LL_MDMA_ConfigTransfer\n
1109 * @rmtoll CTCR SINC LL_MDMA_ConfigTransfer
1110 * @param MDMAx MDMAx Instance
1111 * @param Channel This parameter can be one of the following values:
1112 * @arg @ref LL_MDMA_CHANNEL_0
1113 * @arg @ref LL_MDMA_CHANNEL_1
1114 * @arg @ref LL_MDMA_CHANNEL_2
1115 * @arg @ref LL_MDMA_CHANNEL_3
1116 * @arg @ref LL_MDMA_CHANNEL_4
1117 * @arg @ref LL_MDMA_CHANNEL_5
1118 * @arg @ref LL_MDMA_CHANNEL_6
1119 * @arg @ref LL_MDMA_CHANNEL_7
1120 * @arg @ref LL_MDMA_CHANNEL_8
1121 * @arg @ref LL_MDMA_CHANNEL_9
1122 * @arg @ref LL_MDMA_CHANNEL_10
1123 * @arg @ref LL_MDMA_CHANNEL_11
1124 * @arg @ref LL_MDMA_CHANNEL_12
1125 * @arg @ref LL_MDMA_CHANNEL_13
1126 * @arg @ref LL_MDMA_CHANNEL_14
1127 * @arg @ref LL_MDMA_CHANNEL_15
1128 * @param Configuration This parameter must be a combination of all the following values:
1129 * @arg @ref LL_MDMA_BUFF_WRITE_DISABLE or @ref LL_MDMA_BUFF_WRITE_ENABLE
1130 * @arg @ref LL_MDMA_REQUEST_MODE_HW or @ref LL_MDMA_REQUEST_MODE_SW
1131 * @arg @ref LL_MDMA_BUFFER_TRANSFER or @ref LL_MDMA_BLOCK_TRANSFER or @ref LL_MDMA_REPEAT_BLOCK_TRANSFER or @ref LL_MDMA_FULL_TRANSFER
1132 * @arg @ref LL_MDMA_DATAALIGN_RIGHT or @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED or @ref LL_MDMA_DATAALIGN_LEFT
1133 * @arg @ref LL_MDMA_PACK_DISABLE or @ref LL_MDMA_PACK_ENABLE
1134 * @arg @ref LL_MDMA_DEST_BURST_SINGLE or @ref LL_MDMA_DEST_BURST_2BEATS or @ref LL_MDMA_DEST_BURST_4BEATS or @ref LL_MDMA_DEST_BURST_8BEATS
1135 * or @ref LL_MDMA_DEST_BURST_16BEATS or @ref LL_MDMA_DEST_BURST_32BEATS or @ref LL_MDMA_DEST_BURST_64BEATS or @ref LL_MDMA_DEST_BURST_128BEATS
1136 * @arg @ref LL_MDMA_SRC_BURST_SINGLE or @ref LL_MDMA_SRC_BURST_2BEATS or @ref LL_MDMA_SRC_BURST_4BEATS or @ref LL_MDMA_SRC_BURST_8BEATS
1137 * or @ref LL_MDMA_SRC_BURST_16BEATS or @ref LL_MDMA_SRC_BURST_32BEATS or @ref LL_MDMA_SRC_BURST_64BEATS or @ref LL_MDMA_SRC_BURST_128BEATS
1138 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE or @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD or @ref LL_MDMA_DEST_INC_OFFSET_WORD or @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1139 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE or @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD or @ref LL_MDMA_SRC_INC_OFFSET_WORD or @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1140 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE or @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD or @ref LL_MDMA_DEST_DATA_SIZE_WORD or @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1141 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE or @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD or @ref LL_MDMA_SRC_DATA_SIZE_WORD or @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
1142 * @arg @ref LL_MDMA_DEST_FIXED or @ref LL_MDMA_DEST_INCREMENT or @ref LL_MDMA_DEST_DECREMENT
1143 * @arg @ref LL_MDMA_SRC_FIXED or @ref LL_MDMA_SRC_INCREMENT or @ref LL_MDMA_SRC_DECREMENT
1144 * @param BufferXferLength This parameter can be a value Between 0 to 0x0000007F
1145 * @retval None
1146 */
1147 __STATIC_INLINE void LL_MDMA_ConfigTransfer(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration, uint32_t BufferXferLength)
1148 {
1149 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1150
1151 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR,
1152 Configuration | ((BufferXferLength << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk));
1153 }
1154
1155 /**
1156 * @brief Enable Bufferable Write Mode.
1157 * @rmtoll CTCR BWM LL_MDMA_EnableBufferableWrMode
1158 * @param MDMAx MDMAx Instance
1159 * @param Channel This parameter can be one of the following values:
1160 * @arg @ref LL_MDMA_CHANNEL_0
1161 * @arg @ref LL_MDMA_CHANNEL_1
1162 * @arg @ref LL_MDMA_CHANNEL_2
1163 * @arg @ref LL_MDMA_CHANNEL_3
1164 * @arg @ref LL_MDMA_CHANNEL_4
1165 * @arg @ref LL_MDMA_CHANNEL_5
1166 * @arg @ref LL_MDMA_CHANNEL_6
1167 * @arg @ref LL_MDMA_CHANNEL_7
1168 * @arg @ref LL_MDMA_CHANNEL_8
1169 * @arg @ref LL_MDMA_CHANNEL_9
1170 * @arg @ref LL_MDMA_CHANNEL_10
1171 * @arg @ref LL_MDMA_CHANNEL_11
1172 * @arg @ref LL_MDMA_CHANNEL_12
1173 * @arg @ref LL_MDMA_CHANNEL_13
1174 * @arg @ref LL_MDMA_CHANNEL_14
1175 * @arg @ref LL_MDMA_CHANNEL_15
1176 * @retval None
1177 */
1178 __STATIC_INLINE void LL_MDMA_EnableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1179 {
1180 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1181
1182 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM);
1183 }
1184
1185 /**
1186 * @brief Disable Bufferable Write Mode.
1187 * @rmtoll CTCR BWM LL_MDMA_DisableBufferableWrMode
1188 * @param MDMAx MDMAx Instance
1189 * @param Channel This parameter can be one of the following values:
1190 * @arg @ref LL_MDMA_CHANNEL_0
1191 * @arg @ref LL_MDMA_CHANNEL_1
1192 * @arg @ref LL_MDMA_CHANNEL_2
1193 * @arg @ref LL_MDMA_CHANNEL_3
1194 * @arg @ref LL_MDMA_CHANNEL_4
1195 * @arg @ref LL_MDMA_CHANNEL_5
1196 * @arg @ref LL_MDMA_CHANNEL_6
1197 * @arg @ref LL_MDMA_CHANNEL_7
1198 * @arg @ref LL_MDMA_CHANNEL_8
1199 * @arg @ref LL_MDMA_CHANNEL_9
1200 * @arg @ref LL_MDMA_CHANNEL_10
1201 * @arg @ref LL_MDMA_CHANNEL_11
1202 * @arg @ref LL_MDMA_CHANNEL_12
1203 * @arg @ref LL_MDMA_CHANNEL_13
1204 * @arg @ref LL_MDMA_CHANNEL_14
1205 * @arg @ref LL_MDMA_CHANNEL_15
1206 * @retval None
1207 */
1208 __STATIC_INLINE void LL_MDMA_DisableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1209 {
1210 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1211
1212 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM);
1213 }
1214
1215 /**
1216 * @brief Check if Bufferable Write Mode is enabled or disabled.
1217 * @rmtoll CTCR BWM LL_MDMA_IsEnabledBufferableWrMode
1218 * @param MDMAx MDMAx Instance
1219 * @param Channel This parameter can be one of the following values:
1220 * @arg @ref LL_MDMA_CHANNEL_0
1221 * @arg @ref LL_MDMA_CHANNEL_1
1222 * @arg @ref LL_MDMA_CHANNEL_2
1223 * @arg @ref LL_MDMA_CHANNEL_3
1224 * @arg @ref LL_MDMA_CHANNEL_4
1225 * @arg @ref LL_MDMA_CHANNEL_5
1226 * @arg @ref LL_MDMA_CHANNEL_6
1227 * @arg @ref LL_MDMA_CHANNEL_7
1228 * @arg @ref LL_MDMA_CHANNEL_8
1229 * @arg @ref LL_MDMA_CHANNEL_9
1230 * @arg @ref LL_MDMA_CHANNEL_10
1231 * @arg @ref LL_MDMA_CHANNEL_11
1232 * @arg @ref LL_MDMA_CHANNEL_12
1233 * @arg @ref LL_MDMA_CHANNEL_13
1234 * @arg @ref LL_MDMA_CHANNEL_14
1235 * @arg @ref LL_MDMA_CHANNEL_15
1236 * @retval State of bit (1 or 0).
1237 */
1238 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1239 {
1240 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1241
1242 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM) == (MDMA_CTCR_BWM)) ? 1UL : 0UL);
1243 }
1244
1245 /**
1246 * @brief Set Request Mode.
1247 * @rmtoll CTCR SWRM LL_MDMA_SetRequestMode
1248 * @param MDMAx MDMAx Instance
1249 * @param Channel This parameter can be one of the following values:
1250 * @arg @ref LL_MDMA_CHANNEL_0
1251 * @arg @ref LL_MDMA_CHANNEL_1
1252 * @arg @ref LL_MDMA_CHANNEL_2
1253 * @arg @ref LL_MDMA_CHANNEL_3
1254 * @arg @ref LL_MDMA_CHANNEL_4
1255 * @arg @ref LL_MDMA_CHANNEL_5
1256 * @arg @ref LL_MDMA_CHANNEL_6
1257 * @arg @ref LL_MDMA_CHANNEL_7
1258 * @arg @ref LL_MDMA_CHANNEL_8
1259 * @arg @ref LL_MDMA_CHANNEL_9
1260 * @arg @ref LL_MDMA_CHANNEL_10
1261 * @arg @ref LL_MDMA_CHANNEL_11
1262 * @arg @ref LL_MDMA_CHANNEL_12
1263 * @arg @ref LL_MDMA_CHANNEL_13
1264 * @arg @ref LL_MDMA_CHANNEL_14
1265 * @arg @ref LL_MDMA_CHANNEL_15
1266 * @param RequestMode This parameter can be one of the following values:
1267 * @arg @ref LL_MDMA_REQUEST_MODE_HW
1268 * @arg @ref LL_MDMA_REQUEST_MODE_SW
1269 * @retval None
1270 */
1271 __STATIC_INLINE void LL_MDMA_SetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t RequestMode)
1272 {
1273 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1274
1275 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM, RequestMode);
1276 }
1277
1278 /**
1279 * @brief Get Request Mode.
1280 * @rmtoll CTCR SWRM LL_MDMA_GetRequestMode
1281 * @param MDMAx MDMAx Instance
1282 * @param Channel This parameter can be one of the following values:
1283 * @arg @ref LL_MDMA_CHANNEL_0
1284 * @arg @ref LL_MDMA_CHANNEL_1
1285 * @arg @ref LL_MDMA_CHANNEL_2
1286 * @arg @ref LL_MDMA_CHANNEL_3
1287 * @arg @ref LL_MDMA_CHANNEL_4
1288 * @arg @ref LL_MDMA_CHANNEL_5
1289 * @arg @ref LL_MDMA_CHANNEL_6
1290 * @arg @ref LL_MDMA_CHANNEL_7
1291 * @arg @ref LL_MDMA_CHANNEL_8
1292 * @arg @ref LL_MDMA_CHANNEL_9
1293 * @arg @ref LL_MDMA_CHANNEL_10
1294 * @arg @ref LL_MDMA_CHANNEL_11
1295 * @arg @ref LL_MDMA_CHANNEL_12
1296 * @arg @ref LL_MDMA_CHANNEL_13
1297 * @arg @ref LL_MDMA_CHANNEL_14
1298 * @arg @ref LL_MDMA_CHANNEL_15
1299 * @retval Returned value can be one of the following values:
1300 * @arg @ref LL_MDMA_REQUEST_MODE_HW
1301 * @arg @ref LL_MDMA_REQUEST_MODE_SW
1302 * @retval None
1303 */
1304 __STATIC_INLINE uint32_t LL_MDMA_GetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1305 {
1306 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1307
1308 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM));
1309 }
1310
1311 /**
1312 * @brief Set Trigger Mode.
1313 * @rmtoll CTCR TRGM LL_MDMA_SetTriggerMode
1314 * @param MDMAx MDMAx Instance
1315 * @param Channel This parameter can be one of the following values:
1316 * @arg @ref LL_MDMA_CHANNEL_0
1317 * @arg @ref LL_MDMA_CHANNEL_1
1318 * @arg @ref LL_MDMA_CHANNEL_2
1319 * @arg @ref LL_MDMA_CHANNEL_3
1320 * @arg @ref LL_MDMA_CHANNEL_4
1321 * @arg @ref LL_MDMA_CHANNEL_5
1322 * @arg @ref LL_MDMA_CHANNEL_6
1323 * @arg @ref LL_MDMA_CHANNEL_7
1324 * @arg @ref LL_MDMA_CHANNEL_8
1325 * @arg @ref LL_MDMA_CHANNEL_9
1326 * @arg @ref LL_MDMA_CHANNEL_10
1327 * @arg @ref LL_MDMA_CHANNEL_11
1328 * @arg @ref LL_MDMA_CHANNEL_12
1329 * @arg @ref LL_MDMA_CHANNEL_13
1330 * @arg @ref LL_MDMA_CHANNEL_14
1331 * @arg @ref LL_MDMA_CHANNEL_15
1332 * @param TriggerMode This parameter can be one of the following values:
1333 * @arg @ref LL_MDMA_BUFFER_TRANSFER
1334 * @arg @ref LL_MDMA_BLOCK_TRANSFER
1335 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER
1336 * @arg @ref LL_MDMA_FULL_TRANSFER
1337 * @retval None
1338 */
1339 __STATIC_INLINE void LL_MDMA_SetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t TriggerMode)
1340 {
1341 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1342
1343 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM, TriggerMode);
1344 }
1345
1346 /**
1347 * @brief Get Trigger Mode.
1348 * @rmtoll CTCR TRGM LL_MDMA_GetTriggerMode
1349 * @param MDMAx MDMAx Instance
1350 * @param Channel This parameter can be one of the following values:
1351 * @arg @ref LL_MDMA_CHANNEL_0
1352 * @arg @ref LL_MDMA_CHANNEL_1
1353 * @arg @ref LL_MDMA_CHANNEL_2
1354 * @arg @ref LL_MDMA_CHANNEL_3
1355 * @arg @ref LL_MDMA_CHANNEL_4
1356 * @arg @ref LL_MDMA_CHANNEL_5
1357 * @arg @ref LL_MDMA_CHANNEL_6
1358 * @arg @ref LL_MDMA_CHANNEL_7
1359 * @arg @ref LL_MDMA_CHANNEL_8
1360 * @arg @ref LL_MDMA_CHANNEL_9
1361 * @arg @ref LL_MDMA_CHANNEL_10
1362 * @arg @ref LL_MDMA_CHANNEL_11
1363 * @arg @ref LL_MDMA_CHANNEL_12
1364 * @arg @ref LL_MDMA_CHANNEL_13
1365 * @arg @ref LL_MDMA_CHANNEL_14
1366 * @arg @ref LL_MDMA_CHANNEL_15
1367 * @retval Returned value can be one of the following values:
1368 * @arg @ref LL_MDMA_BUFFER_TRANSFER
1369 * @arg @ref LL_MDMA_BLOCK_TRANSFER
1370 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER
1371 * @arg @ref LL_MDMA_FULL_TRANSFER
1372 * @retval None
1373 */
1374 __STATIC_INLINE uint32_t LL_MDMA_GetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1375 {
1376 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1377
1378 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM));
1379 }
1380
1381 /**
1382 * @brief Set Padding Alignment.
1383 * @rmtoll CTCR PAM LL_MDMA_SetPaddingAlignment
1384 * @param MDMAx MDMAx Instance
1385 * @param Channel This parameter can be one of the following values:
1386 * @arg @ref LL_MDMA_CHANNEL_0
1387 * @arg @ref LL_MDMA_CHANNEL_1
1388 * @arg @ref LL_MDMA_CHANNEL_2
1389 * @arg @ref LL_MDMA_CHANNEL_3
1390 * @arg @ref LL_MDMA_CHANNEL_4
1391 * @arg @ref LL_MDMA_CHANNEL_5
1392 * @arg @ref LL_MDMA_CHANNEL_6
1393 * @arg @ref LL_MDMA_CHANNEL_7
1394 * @arg @ref LL_MDMA_CHANNEL_8
1395 * @arg @ref LL_MDMA_CHANNEL_9
1396 * @arg @ref LL_MDMA_CHANNEL_10
1397 * @arg @ref LL_MDMA_CHANNEL_11
1398 * @arg @ref LL_MDMA_CHANNEL_12
1399 * @arg @ref LL_MDMA_CHANNEL_13
1400 * @arg @ref LL_MDMA_CHANNEL_14
1401 * @arg @ref LL_MDMA_CHANNEL_15
1402 * @param PaddingAlignment This parameter can be one of the following values:
1403 * @arg @ref LL_MDMA_DATAALIGN_RIGHT
1404 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED
1405 * @arg @ref LL_MDMA_DATAALIGN_LEFT
1406 * @retval None
1407 */
1408 __STATIC_INLINE void LL_MDMA_SetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t PaddingAlignment)
1409 {
1410 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1411
1412 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM, PaddingAlignment);
1413 }
1414
1415 /**
1416 * @brief Get Padding Alignment.
1417 * @rmtoll CTCR PAM LL_MDMA_GetPaddingAlignment
1418 * @param MDMAx MDMAx Instance
1419 * @param Channel This parameter can be one of the following values:
1420 * @arg @ref LL_MDMA_CHANNEL_0
1421 * @arg @ref LL_MDMA_CHANNEL_1
1422 * @arg @ref LL_MDMA_CHANNEL_2
1423 * @arg @ref LL_MDMA_CHANNEL_3
1424 * @arg @ref LL_MDMA_CHANNEL_4
1425 * @arg @ref LL_MDMA_CHANNEL_5
1426 * @arg @ref LL_MDMA_CHANNEL_6
1427 * @arg @ref LL_MDMA_CHANNEL_7
1428 * @arg @ref LL_MDMA_CHANNEL_8
1429 * @arg @ref LL_MDMA_CHANNEL_9
1430 * @arg @ref LL_MDMA_CHANNEL_10
1431 * @arg @ref LL_MDMA_CHANNEL_11
1432 * @arg @ref LL_MDMA_CHANNEL_12
1433 * @arg @ref LL_MDMA_CHANNEL_13
1434 * @arg @ref LL_MDMA_CHANNEL_14
1435 * @arg @ref LL_MDMA_CHANNEL_15
1436 * @retval Returned value can be one of the following values:
1437 * @arg @ref LL_MDMA_DATAALIGN_RIGHT
1438 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED
1439 * @arg @ref LL_MDMA_DATAALIGN_LEFT
1440 * @retval None
1441 */
1442 __STATIC_INLINE uint32_t LL_MDMA_GetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel)
1443 {
1444 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1445
1446 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM));
1447 }
1448
1449
1450 /**
1451 * @brief Enable Packing.
1452 * @rmtoll CTCR PKE LL_MDMA_EnablePacking
1453 * @param MDMAx MDMAx Instance
1454 * @param Channel This parameter can be one of the following values:
1455 * @arg @ref LL_MDMA_CHANNEL_0
1456 * @arg @ref LL_MDMA_CHANNEL_1
1457 * @arg @ref LL_MDMA_CHANNEL_2
1458 * @arg @ref LL_MDMA_CHANNEL_3
1459 * @arg @ref LL_MDMA_CHANNEL_4
1460 * @arg @ref LL_MDMA_CHANNEL_5
1461 * @arg @ref LL_MDMA_CHANNEL_6
1462 * @arg @ref LL_MDMA_CHANNEL_7
1463 * @arg @ref LL_MDMA_CHANNEL_8
1464 * @arg @ref LL_MDMA_CHANNEL_9
1465 * @arg @ref LL_MDMA_CHANNEL_10
1466 * @arg @ref LL_MDMA_CHANNEL_11
1467 * @arg @ref LL_MDMA_CHANNEL_12
1468 * @arg @ref LL_MDMA_CHANNEL_13
1469 * @arg @ref LL_MDMA_CHANNEL_14
1470 * @arg @ref LL_MDMA_CHANNEL_15
1471 * @retval None
1472 */
1473 __STATIC_INLINE void LL_MDMA_EnablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1474 {
1475 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1476
1477 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE);
1478 }
1479
1480 /**
1481 * @brief Disable Packing.
1482 * @rmtoll CTCR PKE LL_MDMA_DisablePacking
1483 * @param MDMAx MDMAx Instance
1484 * @param Channel This parameter can be one of the following values:
1485 * @arg @ref LL_MDMA_CHANNEL_0
1486 * @arg @ref LL_MDMA_CHANNEL_1
1487 * @arg @ref LL_MDMA_CHANNEL_2
1488 * @arg @ref LL_MDMA_CHANNEL_3
1489 * @arg @ref LL_MDMA_CHANNEL_4
1490 * @arg @ref LL_MDMA_CHANNEL_5
1491 * @arg @ref LL_MDMA_CHANNEL_6
1492 * @arg @ref LL_MDMA_CHANNEL_7
1493 * @arg @ref LL_MDMA_CHANNEL_8
1494 * @arg @ref LL_MDMA_CHANNEL_9
1495 * @arg @ref LL_MDMA_CHANNEL_10
1496 * @arg @ref LL_MDMA_CHANNEL_11
1497 * @arg @ref LL_MDMA_CHANNEL_12
1498 * @arg @ref LL_MDMA_CHANNEL_13
1499 * @arg @ref LL_MDMA_CHANNEL_14
1500 * @arg @ref LL_MDMA_CHANNEL_15
1501 * @retval None
1502 */
1503 __STATIC_INLINE void LL_MDMA_DisablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1504 {
1505 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1506
1507 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE);
1508 }
1509
1510 /**
1511 * @brief Check if packing is enabled or disabled.
1512 * @rmtoll CTCR PKE LL_MDMA_IsEnabledPacking
1513 * @param MDMAx MDMAx Instance
1514 * @param Channel This parameter can be one of the following values:
1515 * @arg @ref LL_MDMA_CHANNEL_0
1516 * @arg @ref LL_MDMA_CHANNEL_1
1517 * @arg @ref LL_MDMA_CHANNEL_2
1518 * @arg @ref LL_MDMA_CHANNEL_3
1519 * @arg @ref LL_MDMA_CHANNEL_4
1520 * @arg @ref LL_MDMA_CHANNEL_5
1521 * @arg @ref LL_MDMA_CHANNEL_6
1522 * @arg @ref LL_MDMA_CHANNEL_7
1523 * @arg @ref LL_MDMA_CHANNEL_8
1524 * @arg @ref LL_MDMA_CHANNEL_9
1525 * @arg @ref LL_MDMA_CHANNEL_10
1526 * @arg @ref LL_MDMA_CHANNEL_11
1527 * @arg @ref LL_MDMA_CHANNEL_12
1528 * @arg @ref LL_MDMA_CHANNEL_13
1529 * @arg @ref LL_MDMA_CHANNEL_14
1530 * @arg @ref LL_MDMA_CHANNEL_15
1531 * @retval State of bit (1 or 0).
1532 */
1533 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledPacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1534 {
1535 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1536
1537 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE) == (MDMA_CTCR_PKE)) ? 1UL : 0UL);
1538 }
1539
1540 /**
1541 * @brief Set Buffer Transfer Length.
1542 * @rmtoll CTCR TLEN LL_MDMA_SetBufferTransferLength
1543 * @param MDMAx MDMAx Instance
1544 * @param Channel This parameter can be one of the following values:
1545 * @arg @ref LL_MDMA_CHANNEL_0
1546 * @arg @ref LL_MDMA_CHANNEL_1
1547 * @arg @ref LL_MDMA_CHANNEL_2
1548 * @arg @ref LL_MDMA_CHANNEL_3
1549 * @arg @ref LL_MDMA_CHANNEL_4
1550 * @arg @ref LL_MDMA_CHANNEL_5
1551 * @arg @ref LL_MDMA_CHANNEL_6
1552 * @arg @ref LL_MDMA_CHANNEL_7
1553 * @arg @ref LL_MDMA_CHANNEL_8
1554 * @arg @ref LL_MDMA_CHANNEL_9
1555 * @arg @ref LL_MDMA_CHANNEL_10
1556 * @arg @ref LL_MDMA_CHANNEL_11
1557 * @arg @ref LL_MDMA_CHANNEL_12
1558 * @arg @ref LL_MDMA_CHANNEL_13
1559 * @arg @ref LL_MDMA_CHANNEL_14
1560 * @arg @ref LL_MDMA_CHANNEL_15
1561 * @param Length Between 0 to 0x0000007F
1562 * @retval None
1563 */
1564 __STATIC_INLINE void LL_MDMA_SetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Length)
1565 {
1566 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1567
1568 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN,
1569 (Length << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk);
1570 }
1571
1572 /**
1573 * @brief Get Buffer Transfer Length.
1574 * @rmtoll CTCR TLEN LL_MDMA_GetBufferTransferLength
1575 * @param MDMAx MDMAx Instance
1576 * @param Channel This parameter can be one of the following values:
1577 * @arg @ref LL_MDMA_CHANNEL_0
1578 * @arg @ref LL_MDMA_CHANNEL_1
1579 * @arg @ref LL_MDMA_CHANNEL_2
1580 * @arg @ref LL_MDMA_CHANNEL_3
1581 * @arg @ref LL_MDMA_CHANNEL_4
1582 * @arg @ref LL_MDMA_CHANNEL_5
1583 * @arg @ref LL_MDMA_CHANNEL_6
1584 * @arg @ref LL_MDMA_CHANNEL_7
1585 * @arg @ref LL_MDMA_CHANNEL_8
1586 * @arg @ref LL_MDMA_CHANNEL_9
1587 * @arg @ref LL_MDMA_CHANNEL_10
1588 * @arg @ref LL_MDMA_CHANNEL_11
1589 * @arg @ref LL_MDMA_CHANNEL_12
1590 * @arg @ref LL_MDMA_CHANNEL_13
1591 * @arg @ref LL_MDMA_CHANNEL_14
1592 * @arg @ref LL_MDMA_CHANNEL_15
1593 * @retval Between 0 to 0x0000007F
1594 * @retval None
1595 */
1596 __STATIC_INLINE uint32_t LL_MDMA_GetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel)
1597 {
1598 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1599
1600 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN) >> MDMA_CTCR_TLEN_Pos);
1601 }
1602
1603 /**
1604 * @brief Set Destination burst transfer.
1605 * @rmtoll CTCR DBURST LL_MDMA_SetDestinationBurstSize
1606 * @param MDMAx MDMAx Instance
1607 * @param Channel This parameter can be one of the following values:
1608 * @arg @ref LL_MDMA_CHANNEL_0
1609 * @arg @ref LL_MDMA_CHANNEL_1
1610 * @arg @ref LL_MDMA_CHANNEL_2
1611 * @arg @ref LL_MDMA_CHANNEL_3
1612 * @arg @ref LL_MDMA_CHANNEL_4
1613 * @arg @ref LL_MDMA_CHANNEL_5
1614 * @arg @ref LL_MDMA_CHANNEL_6
1615 * @arg @ref LL_MDMA_CHANNEL_7
1616 * @arg @ref LL_MDMA_CHANNEL_8
1617 * @arg @ref LL_MDMA_CHANNEL_9
1618 * @arg @ref LL_MDMA_CHANNEL_10
1619 * @arg @ref LL_MDMA_CHANNEL_11
1620 * @arg @ref LL_MDMA_CHANNEL_12
1621 * @arg @ref LL_MDMA_CHANNEL_13
1622 * @arg @ref LL_MDMA_CHANNEL_14
1623 * @arg @ref LL_MDMA_CHANNEL_15
1624 * @param Dburst This parameter can be one of the following values:
1625 * @arg @ref LL_MDMA_DEST_BURST_SINGLE
1626 * @arg @ref LL_MDMA_DEST_BURST_2BEATS
1627 * @arg @ref LL_MDMA_DEST_BURST_4BEATS
1628 * @arg @ref LL_MDMA_DEST_BURST_8BEATS
1629 * @arg @ref LL_MDMA_DEST_BURST_16BEATS
1630 * @arg @ref LL_MDMA_DEST_BURST_32BEATS
1631 * @arg @ref LL_MDMA_DEST_BURST_64BEATS
1632 * @arg @ref LL_MDMA_DEST_BURST_128BEATS
1633 * @retval None
1634 */
1635 __STATIC_INLINE void LL_MDMA_SetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Dburst)
1636 {
1637 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1638
1639 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST, Dburst);
1640 }
1641
1642 /**
1643 * @brief Get Destination burst transfer.
1644 * @rmtoll CTCR DBURST LL_MDMA_GetDestinationBurstSize
1645 * @param MDMAx MDMAx Instance
1646 * @param Channel This parameter can be one of the following values:
1647 * @arg @ref LL_MDMA_CHANNEL_0
1648 * @arg @ref LL_MDMA_CHANNEL_1
1649 * @arg @ref LL_MDMA_CHANNEL_2
1650 * @arg @ref LL_MDMA_CHANNEL_3
1651 * @arg @ref LL_MDMA_CHANNEL_4
1652 * @arg @ref LL_MDMA_CHANNEL_5
1653 * @arg @ref LL_MDMA_CHANNEL_6
1654 * @arg @ref LL_MDMA_CHANNEL_7
1655 * @arg @ref LL_MDMA_CHANNEL_8
1656 * @arg @ref LL_MDMA_CHANNEL_9
1657 * @arg @ref LL_MDMA_CHANNEL_10
1658 * @arg @ref LL_MDMA_CHANNEL_11
1659 * @arg @ref LL_MDMA_CHANNEL_12
1660 * @arg @ref LL_MDMA_CHANNEL_13
1661 * @arg @ref LL_MDMA_CHANNEL_14
1662 * @arg @ref LL_MDMA_CHANNEL_15
1663 * @retval Returned value can be one of the following values:
1664 * @arg @ref LL_MDMA_DEST_BURST_SINGLE
1665 * @arg @ref LL_MDMA_DEST_BURST_2BEATS
1666 * @arg @ref LL_MDMA_DEST_BURST_4BEATS
1667 * @arg @ref LL_MDMA_DEST_BURST_8BEATS
1668 * @arg @ref LL_MDMA_DEST_BURST_16BEATS
1669 * @arg @ref LL_MDMA_DEST_BURST_32BEATS
1670 * @arg @ref LL_MDMA_DEST_BURST_64BEATS
1671 * @arg @ref LL_MDMA_DEST_BURST_128BEATS
1672 * @retval None
1673 */
1674 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1675 {
1676 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1677
1678 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST));
1679 }
1680
1681 /**
1682 * @brief Set Source burst transfer.
1683 * @rmtoll CTCR SBURST LL_MDMA_SetSourceBurstSize
1684 * @param MDMAx MDMAx Instance
1685 * @param Channel This parameter can be one of the following values:
1686 * @arg @ref LL_MDMA_CHANNEL_0
1687 * @arg @ref LL_MDMA_CHANNEL_1
1688 * @arg @ref LL_MDMA_CHANNEL_2
1689 * @arg @ref LL_MDMA_CHANNEL_3
1690 * @arg @ref LL_MDMA_CHANNEL_4
1691 * @arg @ref LL_MDMA_CHANNEL_5
1692 * @arg @ref LL_MDMA_CHANNEL_6
1693 * @arg @ref LL_MDMA_CHANNEL_7
1694 * @arg @ref LL_MDMA_CHANNEL_8
1695 * @arg @ref LL_MDMA_CHANNEL_9
1696 * @arg @ref LL_MDMA_CHANNEL_10
1697 * @arg @ref LL_MDMA_CHANNEL_11
1698 * @arg @ref LL_MDMA_CHANNEL_12
1699 * @arg @ref LL_MDMA_CHANNEL_13
1700 * @arg @ref LL_MDMA_CHANNEL_14
1701 * @arg @ref LL_MDMA_CHANNEL_15
1702 * @param Sburst This parameter can be one of the following values:
1703 * @arg @ref LL_MDMA_SRC_BURST_SINGLE
1704 * @arg @ref LL_MDMA_SRC_BURST_2BEATS
1705 * @arg @ref LL_MDMA_SRC_BURST_4BEATS
1706 * @arg @ref LL_MDMA_SRC_BURST_8BEATS
1707 * @arg @ref LL_MDMA_SRC_BURST_16BEATS
1708 * @arg @ref LL_MDMA_SRC_BURST_32BEATS
1709 * @arg @ref LL_MDMA_SRC_BURST_64BEATS
1710 * @arg @ref LL_MDMA_SRC_BURST_128BEATS
1711 * @retval None
1712 */
1713 __STATIC_INLINE void LL_MDMA_SetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Sburst)
1714 {
1715 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1716
1717 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST, Sburst);
1718 }
1719
1720 /**
1721 * @brief Get Source burst transfer.
1722 * @rmtoll CTCR SBURST LL_MDMA_GetSourceBurstSize
1723 * @param MDMAx MDMAx Instance
1724 * @param Channel This parameter can be one of the following values:
1725 * @arg @ref LL_MDMA_CHANNEL_0
1726 * @arg @ref LL_MDMA_CHANNEL_1
1727 * @arg @ref LL_MDMA_CHANNEL_2
1728 * @arg @ref LL_MDMA_CHANNEL_3
1729 * @arg @ref LL_MDMA_CHANNEL_4
1730 * @arg @ref LL_MDMA_CHANNEL_5
1731 * @arg @ref LL_MDMA_CHANNEL_6
1732 * @arg @ref LL_MDMA_CHANNEL_7
1733 * @arg @ref LL_MDMA_CHANNEL_8
1734 * @arg @ref LL_MDMA_CHANNEL_9
1735 * @arg @ref LL_MDMA_CHANNEL_10
1736 * @arg @ref LL_MDMA_CHANNEL_11
1737 * @arg @ref LL_MDMA_CHANNEL_12
1738 * @arg @ref LL_MDMA_CHANNEL_13
1739 * @arg @ref LL_MDMA_CHANNEL_14
1740 * @arg @ref LL_MDMA_CHANNEL_15
1741 * @retval Returned value can be one of the following values:
1742 * @arg @ref LL_MDMA_SRC_BURST_SINGLE
1743 * @arg @ref LL_MDMA_SRC_BURST_2BEATS
1744 * @arg @ref LL_MDMA_SRC_BURST_4BEATS
1745 * @arg @ref LL_MDMA_SRC_BURST_8BEATS
1746 * @arg @ref LL_MDMA_SRC_BURST_16BEATS
1747 * @arg @ref LL_MDMA_SRC_BURST_32BEATS
1748 * @arg @ref LL_MDMA_SRC_BURST_64BEATS
1749 * @arg @ref LL_MDMA_SRC_BURST_128BEATS
1750 * @retval None
1751 */
1752 __STATIC_INLINE uint32_t LL_MDMA_GetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1753 {
1754 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1755
1756 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST));
1757 }
1758
1759 /**
1760 * @brief Set Destination Increment Offset Size.
1761 * @rmtoll CTCR DINCOS LL_MDMA_SetDestinationIncSize
1762 * @param MDMAx MDMAx Instance
1763 * @param Channel This parameter can be one of the following values:
1764 * @arg @ref LL_MDMA_CHANNEL_0
1765 * @arg @ref LL_MDMA_CHANNEL_1
1766 * @arg @ref LL_MDMA_CHANNEL_2
1767 * @arg @ref LL_MDMA_CHANNEL_3
1768 * @arg @ref LL_MDMA_CHANNEL_4
1769 * @arg @ref LL_MDMA_CHANNEL_5
1770 * @arg @ref LL_MDMA_CHANNEL_6
1771 * @arg @ref LL_MDMA_CHANNEL_7
1772 * @arg @ref LL_MDMA_CHANNEL_8
1773 * @arg @ref LL_MDMA_CHANNEL_9
1774 * @arg @ref LL_MDMA_CHANNEL_10
1775 * @arg @ref LL_MDMA_CHANNEL_11
1776 * @arg @ref LL_MDMA_CHANNEL_12
1777 * @arg @ref LL_MDMA_CHANNEL_13
1778 * @arg @ref LL_MDMA_CHANNEL_14
1779 * @arg @ref LL_MDMA_CHANNEL_15
1780 * @param IncSize This parameter can be one of the following values:
1781 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE
1782 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD
1783 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD
1784 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1785 * @retval None
1786 */
1787 __STATIC_INLINE void LL_MDMA_SetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize)
1788 {
1789 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1790
1791 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS, IncSize);
1792 }
1793
1794 /**
1795 * @brief Get Destination Increment Offset Size.
1796 * @rmtoll CTCR DINCOS LL_MDMA_GetDestinationIncSize
1797 * @param MDMAx MDMAx Instance
1798 * @param Channel This parameter can be one of the following values:
1799 * @arg @ref LL_MDMA_CHANNEL_0
1800 * @arg @ref LL_MDMA_CHANNEL_1
1801 * @arg @ref LL_MDMA_CHANNEL_2
1802 * @arg @ref LL_MDMA_CHANNEL_3
1803 * @arg @ref LL_MDMA_CHANNEL_4
1804 * @arg @ref LL_MDMA_CHANNEL_5
1805 * @arg @ref LL_MDMA_CHANNEL_6
1806 * @arg @ref LL_MDMA_CHANNEL_7
1807 * @arg @ref LL_MDMA_CHANNEL_8
1808 * @arg @ref LL_MDMA_CHANNEL_9
1809 * @arg @ref LL_MDMA_CHANNEL_10
1810 * @arg @ref LL_MDMA_CHANNEL_11
1811 * @arg @ref LL_MDMA_CHANNEL_12
1812 * @arg @ref LL_MDMA_CHANNEL_13
1813 * @arg @ref LL_MDMA_CHANNEL_14
1814 * @arg @ref LL_MDMA_CHANNEL_15
1815 * @retval Returned value can be one of the following values:
1816 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE
1817 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD
1818 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD
1819 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1820 * @retval None
1821 */
1822 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1823 {
1824 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1825
1826 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS));
1827 }
1828
1829 /**
1830 * @brief Set Source Increment Offset Size.
1831 * @rmtoll CTCR SINCOS LL_MDMA_SetSourceIncSize
1832 * @param MDMAx MDMAx Instance
1833 * @param Channel This parameter can be one of the following values:
1834 * @arg @ref LL_MDMA_CHANNEL_0
1835 * @arg @ref LL_MDMA_CHANNEL_1
1836 * @arg @ref LL_MDMA_CHANNEL_2
1837 * @arg @ref LL_MDMA_CHANNEL_3
1838 * @arg @ref LL_MDMA_CHANNEL_4
1839 * @arg @ref LL_MDMA_CHANNEL_5
1840 * @arg @ref LL_MDMA_CHANNEL_6
1841 * @arg @ref LL_MDMA_CHANNEL_7
1842 * @arg @ref LL_MDMA_CHANNEL_8
1843 * @arg @ref LL_MDMA_CHANNEL_9
1844 * @arg @ref LL_MDMA_CHANNEL_10
1845 * @arg @ref LL_MDMA_CHANNEL_11
1846 * @arg @ref LL_MDMA_CHANNEL_12
1847 * @arg @ref LL_MDMA_CHANNEL_13
1848 * @arg @ref LL_MDMA_CHANNEL_14
1849 * @arg @ref LL_MDMA_CHANNEL_15
1850 * @param IncSize This parameter can be one of the following values:
1851 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE
1852 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD
1853 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD
1854 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1855 * @retval None
1856 */
1857 __STATIC_INLINE void LL_MDMA_SetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize)
1858 {
1859 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1860
1861 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS, IncSize);
1862 }
1863
1864 /**
1865 * @brief Get Source Increment Offset Size.
1866 * @rmtoll CTCR SINCOS LL_MDMA_GetSourceIncSize
1867 * @param MDMAx MDMAx Instance
1868 * @param Channel This parameter can be one of the following values:
1869 * @arg @ref LL_MDMA_CHANNEL_0
1870 * @arg @ref LL_MDMA_CHANNEL_1
1871 * @arg @ref LL_MDMA_CHANNEL_2
1872 * @arg @ref LL_MDMA_CHANNEL_3
1873 * @arg @ref LL_MDMA_CHANNEL_4
1874 * @arg @ref LL_MDMA_CHANNEL_5
1875 * @arg @ref LL_MDMA_CHANNEL_6
1876 * @arg @ref LL_MDMA_CHANNEL_7
1877 * @arg @ref LL_MDMA_CHANNEL_8
1878 * @arg @ref LL_MDMA_CHANNEL_9
1879 * @arg @ref LL_MDMA_CHANNEL_10
1880 * @arg @ref LL_MDMA_CHANNEL_11
1881 * @arg @ref LL_MDMA_CHANNEL_12
1882 * @arg @ref LL_MDMA_CHANNEL_13
1883 * @arg @ref LL_MDMA_CHANNEL_14
1884 * @arg @ref LL_MDMA_CHANNEL_15
1885 * @retval Returned value can be one of the following values:
1886 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE
1887 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD
1888 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD
1889 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1890 * @retval None
1891 */
1892 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1893 {
1894 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1895
1896 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS));
1897 }
1898
1899 /**
1900 * @brief Set Destination Data Size.
1901 * @rmtoll CTCR DSIZE LL_MDMA_SetDestinationDataSize
1902 * @param MDMAx MDMAx Instance
1903 * @param Channel This parameter can be one of the following values:
1904 * @arg @ref LL_MDMA_CHANNEL_0
1905 * @arg @ref LL_MDMA_CHANNEL_1
1906 * @arg @ref LL_MDMA_CHANNEL_2
1907 * @arg @ref LL_MDMA_CHANNEL_3
1908 * @arg @ref LL_MDMA_CHANNEL_4
1909 * @arg @ref LL_MDMA_CHANNEL_5
1910 * @arg @ref LL_MDMA_CHANNEL_6
1911 * @arg @ref LL_MDMA_CHANNEL_7
1912 * @arg @ref LL_MDMA_CHANNEL_8
1913 * @arg @ref LL_MDMA_CHANNEL_9
1914 * @arg @ref LL_MDMA_CHANNEL_10
1915 * @arg @ref LL_MDMA_CHANNEL_11
1916 * @arg @ref LL_MDMA_CHANNEL_12
1917 * @arg @ref LL_MDMA_CHANNEL_13
1918 * @arg @ref LL_MDMA_CHANNEL_14
1919 * @arg @ref LL_MDMA_CHANNEL_15
1920 * @param DestDataSize This parameter can be one of the following values:
1921 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE
1922 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD
1923 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD
1924 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1925 * @retval None
1926 */
1927 __STATIC_INLINE void LL_MDMA_SetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestDataSize)
1928 {
1929 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1930
1931 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE, DestDataSize);
1932 }
1933
1934 /**
1935 * @brief Get Destination Data Size.
1936 * @rmtoll CTCR DSIZE LL_MDMA_GetDestinationDataSize
1937 * @param MDMAx MDMAx Instance
1938 * @param Channel This parameter can be one of the following values:
1939 * @arg @ref LL_MDMA_CHANNEL_0
1940 * @arg @ref LL_MDMA_CHANNEL_1
1941 * @arg @ref LL_MDMA_CHANNEL_2
1942 * @arg @ref LL_MDMA_CHANNEL_3
1943 * @arg @ref LL_MDMA_CHANNEL_4
1944 * @arg @ref LL_MDMA_CHANNEL_5
1945 * @arg @ref LL_MDMA_CHANNEL_6
1946 * @arg @ref LL_MDMA_CHANNEL_7
1947 * @arg @ref LL_MDMA_CHANNEL_8
1948 * @arg @ref LL_MDMA_CHANNEL_9
1949 * @arg @ref LL_MDMA_CHANNEL_10
1950 * @arg @ref LL_MDMA_CHANNEL_11
1951 * @arg @ref LL_MDMA_CHANNEL_12
1952 * @arg @ref LL_MDMA_CHANNEL_13
1953 * @arg @ref LL_MDMA_CHANNEL_14
1954 * @arg @ref LL_MDMA_CHANNEL_15
1955 * @retval Returned value can be one of the following values:
1956 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE
1957 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD
1958 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD
1959 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1960 * @retval None
1961 */
1962 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1963 {
1964 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1965
1966 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE));
1967 }
1968
1969 /**
1970 * @brief Set Source Data Size.
1971 * @rmtoll CTCR SSIZE LL_MDMA_SetSourceDataSize
1972 * @param MDMAx MDMAx Instance
1973 * @param Channel This parameter can be one of the following values:
1974 * @arg @ref LL_MDMA_CHANNEL_0
1975 * @arg @ref LL_MDMA_CHANNEL_1
1976 * @arg @ref LL_MDMA_CHANNEL_2
1977 * @arg @ref LL_MDMA_CHANNEL_3
1978 * @arg @ref LL_MDMA_CHANNEL_4
1979 * @arg @ref LL_MDMA_CHANNEL_5
1980 * @arg @ref LL_MDMA_CHANNEL_6
1981 * @arg @ref LL_MDMA_CHANNEL_7
1982 * @arg @ref LL_MDMA_CHANNEL_8
1983 * @arg @ref LL_MDMA_CHANNEL_9
1984 * @arg @ref LL_MDMA_CHANNEL_10
1985 * @arg @ref LL_MDMA_CHANNEL_11
1986 * @arg @ref LL_MDMA_CHANNEL_12
1987 * @arg @ref LL_MDMA_CHANNEL_13
1988 * @arg @ref LL_MDMA_CHANNEL_14
1989 * @arg @ref LL_MDMA_CHANNEL_15
1990 * @param SrcDataSize This parameter can be one of the following values:
1991 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE
1992 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD
1993 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD
1994 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
1995 * @retval None
1996 */
1997 __STATIC_INLINE void LL_MDMA_SetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcDataSize)
1998 {
1999 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2000
2001 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE, SrcDataSize);
2002 }
2003
2004 /**
2005 * @brief Get Source Data Size.
2006 * @rmtoll CTCR SSIZE LL_MDMA_GetSourceDataSize
2007 * @param MDMAx MDMAx Instance
2008 * @param Channel This parameter can be one of the following values:
2009 * @arg @ref LL_MDMA_CHANNEL_0
2010 * @arg @ref LL_MDMA_CHANNEL_1
2011 * @arg @ref LL_MDMA_CHANNEL_2
2012 * @arg @ref LL_MDMA_CHANNEL_3
2013 * @arg @ref LL_MDMA_CHANNEL_4
2014 * @arg @ref LL_MDMA_CHANNEL_5
2015 * @arg @ref LL_MDMA_CHANNEL_6
2016 * @arg @ref LL_MDMA_CHANNEL_7
2017 * @arg @ref LL_MDMA_CHANNEL_8
2018 * @arg @ref LL_MDMA_CHANNEL_9
2019 * @arg @ref LL_MDMA_CHANNEL_10
2020 * @arg @ref LL_MDMA_CHANNEL_11
2021 * @arg @ref LL_MDMA_CHANNEL_12
2022 * @arg @ref LL_MDMA_CHANNEL_13
2023 * @arg @ref LL_MDMA_CHANNEL_14
2024 * @arg @ref LL_MDMA_CHANNEL_15
2025 * @retval Returned value can be one of the following values:
2026 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE
2027 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD
2028 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD
2029 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
2030 * @retval None
2031 */
2032 __STATIC_INLINE uint32_t LL_MDMA_GetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
2033 {
2034 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2035
2036 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE));
2037 }
2038
2039 /**
2040 * @brief Set Destination Increment Mode.
2041 * @rmtoll CTCR DINC LL_MDMA_SetDestinationIncMode
2042 * @param MDMAx MDMAx Instance
2043 * @param Channel This parameter can be one of the following values:
2044 * @arg @ref LL_MDMA_CHANNEL_0
2045 * @arg @ref LL_MDMA_CHANNEL_1
2046 * @arg @ref LL_MDMA_CHANNEL_2
2047 * @arg @ref LL_MDMA_CHANNEL_3
2048 * @arg @ref LL_MDMA_CHANNEL_4
2049 * @arg @ref LL_MDMA_CHANNEL_5
2050 * @arg @ref LL_MDMA_CHANNEL_6
2051 * @arg @ref LL_MDMA_CHANNEL_7
2052 * @arg @ref LL_MDMA_CHANNEL_8
2053 * @arg @ref LL_MDMA_CHANNEL_9
2054 * @arg @ref LL_MDMA_CHANNEL_10
2055 * @arg @ref LL_MDMA_CHANNEL_11
2056 * @arg @ref LL_MDMA_CHANNEL_12
2057 * @arg @ref LL_MDMA_CHANNEL_13
2058 * @arg @ref LL_MDMA_CHANNEL_14
2059 * @arg @ref LL_MDMA_CHANNEL_15
2060 * @param DestIncMode This parameter can be one of the following values:
2061 * @arg @ref LL_MDMA_DEST_FIXED
2062 * @arg @ref LL_MDMA_DEST_INCREMENT
2063 * @arg @ref LL_MDMA_DEST_DECREMENT
2064 * @retval None
2065 */
2066 __STATIC_INLINE void LL_MDMA_SetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestIncMode)
2067 {
2068 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2069
2070 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC, DestIncMode);
2071 }
2072
2073 /**
2074 * @brief Get Destination Increment Mode.
2075 * @rmtoll CTCR DINC LL_MDMA_GetDestinationIncMode
2076 * @param MDMAx MDMAx Instance
2077 * @param Channel This parameter can be one of the following values:
2078 * @arg @ref LL_MDMA_CHANNEL_0
2079 * @arg @ref LL_MDMA_CHANNEL_1
2080 * @arg @ref LL_MDMA_CHANNEL_2
2081 * @arg @ref LL_MDMA_CHANNEL_3
2082 * @arg @ref LL_MDMA_CHANNEL_4
2083 * @arg @ref LL_MDMA_CHANNEL_5
2084 * @arg @ref LL_MDMA_CHANNEL_6
2085 * @arg @ref LL_MDMA_CHANNEL_7
2086 * @arg @ref LL_MDMA_CHANNEL_8
2087 * @arg @ref LL_MDMA_CHANNEL_9
2088 * @arg @ref LL_MDMA_CHANNEL_10
2089 * @arg @ref LL_MDMA_CHANNEL_11
2090 * @arg @ref LL_MDMA_CHANNEL_12
2091 * @arg @ref LL_MDMA_CHANNEL_13
2092 * @arg @ref LL_MDMA_CHANNEL_14
2093 * @arg @ref LL_MDMA_CHANNEL_15
2094 * @retval Returned value can be one of the following values:
2095 * @arg @ref LL_MDMA_DEST_FIXED
2096 * @arg @ref LL_MDMA_DEST_INCREMENT
2097 * @arg @ref LL_MDMA_DEST_DECREMENT
2098 * @retval None
2099 */
2100 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
2101 {
2102 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2103
2104 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC));
2105 }
2106
2107 /**
2108 * @brief Set Source Increment Mode.
2109 * @rmtoll CTCR SINC LL_MDMA_SetSourceIncMode
2110 * @param MDMAx MDMAx Instance
2111 * @param Channel This parameter can be one of the following values:
2112 * @arg @ref LL_MDMA_CHANNEL_0
2113 * @arg @ref LL_MDMA_CHANNEL_1
2114 * @arg @ref LL_MDMA_CHANNEL_2
2115 * @arg @ref LL_MDMA_CHANNEL_3
2116 * @arg @ref LL_MDMA_CHANNEL_4
2117 * @arg @ref LL_MDMA_CHANNEL_5
2118 * @arg @ref LL_MDMA_CHANNEL_6
2119 * @arg @ref LL_MDMA_CHANNEL_7
2120 * @arg @ref LL_MDMA_CHANNEL_8
2121 * @arg @ref LL_MDMA_CHANNEL_9
2122 * @arg @ref LL_MDMA_CHANNEL_10
2123 * @arg @ref LL_MDMA_CHANNEL_11
2124 * @arg @ref LL_MDMA_CHANNEL_12
2125 * @arg @ref LL_MDMA_CHANNEL_13
2126 * @arg @ref LL_MDMA_CHANNEL_14
2127 * @arg @ref LL_MDMA_CHANNEL_15
2128 * @param SrcIncMode This parameter can be one of the following values:
2129 * @arg @ref LL_MDMA_SRC_FIXED
2130 * @arg @ref LL_MDMA_SRC_INCREMENT
2131 * @arg @ref LL_MDMA_SRC_DECREMENT
2132 * @retval None
2133 */
2134 __STATIC_INLINE void LL_MDMA_SetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcIncMode)
2135 {
2136 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2137
2138 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC, SrcIncMode);
2139 }
2140
2141 /**
2142 * @brief Get Source Increment Mode.
2143 * @rmtoll CTCR SINC LL_MDMA_GetSourceIncMode
2144 * @param MDMAx MDMAx Instance
2145 * @param Channel This parameter can be one of the following values:
2146 * @arg @ref LL_MDMA_CHANNEL_0
2147 * @arg @ref LL_MDMA_CHANNEL_1
2148 * @arg @ref LL_MDMA_CHANNEL_2
2149 * @arg @ref LL_MDMA_CHANNEL_3
2150 * @arg @ref LL_MDMA_CHANNEL_4
2151 * @arg @ref LL_MDMA_CHANNEL_5
2152 * @arg @ref LL_MDMA_CHANNEL_6
2153 * @arg @ref LL_MDMA_CHANNEL_7
2154 * @arg @ref LL_MDMA_CHANNEL_8
2155 * @arg @ref LL_MDMA_CHANNEL_9
2156 * @arg @ref LL_MDMA_CHANNEL_10
2157 * @arg @ref LL_MDMA_CHANNEL_11
2158 * @arg @ref LL_MDMA_CHANNEL_12
2159 * @arg @ref LL_MDMA_CHANNEL_13
2160 * @arg @ref LL_MDMA_CHANNEL_14
2161 * @arg @ref LL_MDMA_CHANNEL_15
2162 * @retval Returned value can be one of the following values:
2163 * @arg @ref LL_MDMA_SRC_FIXED
2164 * @arg @ref LL_MDMA_SRC_INCREMENT
2165 * @arg @ref LL_MDMA_SRC_DECREMENT
2166 * @retval None
2167 */
2168 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
2169 {
2170 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2171
2172 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC));
2173 }
2174
2175 /**
2176 * @brief Configure MDMA Block number of data and repeat Count.
2177 * @rmtoll CBNDTR BRC LL_MDMA_ConfigBlkCounters\n
2178 * @rmtoll CBNDTR BNDT LL_MDMA_ConfigBlkCounters
2179 * @param MDMAx MDMAx Instance
2180 * @param Channel This parameter can be one of the following values:
2181 * @arg @ref LL_MDMA_CHANNEL_0
2182 * @arg @ref LL_MDMA_CHANNEL_1
2183 * @arg @ref LL_MDMA_CHANNEL_2
2184 * @arg @ref LL_MDMA_CHANNEL_3
2185 * @arg @ref LL_MDMA_CHANNEL_4
2186 * @arg @ref LL_MDMA_CHANNEL_5
2187 * @arg @ref LL_MDMA_CHANNEL_6
2188 * @arg @ref LL_MDMA_CHANNEL_7
2189 * @arg @ref LL_MDMA_CHANNEL_8
2190 * @arg @ref LL_MDMA_CHANNEL_9
2191 * @arg @ref LL_MDMA_CHANNEL_10
2192 * @arg @ref LL_MDMA_CHANNEL_11
2193 * @arg @ref LL_MDMA_CHANNEL_12
2194 * @arg @ref LL_MDMA_CHANNEL_13
2195 * @arg @ref LL_MDMA_CHANNEL_14
2196 * @arg @ref LL_MDMA_CHANNEL_15
2197 * @param BlockRepeatCount Between 0 to 0x00000FFF
2198 * @param BlkDataLength Between 0 to 0x00010000
2199 * @retval None
2200 */
2201 __STATIC_INLINE void LL_MDMA_ConfigBlkCounters(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount, uint32_t BlkDataLength)
2202 {
2203 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2204
2205 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR,
2206 MDMA_CBNDTR_BRC | MDMA_CBNDTR_BNDT,
2207 ((BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk) | (BlkDataLength & MDMA_CBNDTR_BNDT_Msk));
2208 }
2209
2210 /**
2211 * @brief Set Block Number of data bytes to transfer.
2212 * @rmtoll CBNDTR BNDT LL_MDMA_SetBlkDataLength
2213 * @param MDMAx MDMAx Instance
2214 * @param Channel This parameter can be one of the following values:
2215 * @arg @ref LL_MDMA_CHANNEL_0
2216 * @arg @ref LL_MDMA_CHANNEL_1
2217 * @arg @ref LL_MDMA_CHANNEL_2
2218 * @arg @ref LL_MDMA_CHANNEL_3
2219 * @arg @ref LL_MDMA_CHANNEL_4
2220 * @arg @ref LL_MDMA_CHANNEL_5
2221 * @arg @ref LL_MDMA_CHANNEL_6
2222 * @arg @ref LL_MDMA_CHANNEL_7
2223 * @arg @ref LL_MDMA_CHANNEL_8
2224 * @arg @ref LL_MDMA_CHANNEL_9
2225 * @arg @ref LL_MDMA_CHANNEL_10
2226 * @arg @ref LL_MDMA_CHANNEL_11
2227 * @arg @ref LL_MDMA_CHANNEL_12
2228 * @arg @ref LL_MDMA_CHANNEL_13
2229 * @arg @ref LL_MDMA_CHANNEL_14
2230 * @arg @ref LL_MDMA_CHANNEL_15
2231 * @param BlkDataLength Between 0 to 0x00010000
2232 * @retval None
2233 */
2234 __STATIC_INLINE void LL_MDMA_SetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlkDataLength)
2235 {
2236 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2237
2238 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT, (BlkDataLength & MDMA_CBNDTR_BNDT_Msk));
2239 }
2240
2241 /**
2242 * @brief Get Block Number of data bytes to transfer.
2243 * @rmtoll CBNDTR BNDT LL_MDMA_GetBlkDataLength
2244 * @param MDMAx MDMAx Instance
2245 * @param Channel This parameter can be one of the following values:
2246 * @arg @ref LL_MDMA_CHANNEL_0
2247 * @arg @ref LL_MDMA_CHANNEL_1
2248 * @arg @ref LL_MDMA_CHANNEL_2
2249 * @arg @ref LL_MDMA_CHANNEL_3
2250 * @arg @ref LL_MDMA_CHANNEL_4
2251 * @arg @ref LL_MDMA_CHANNEL_5
2252 * @arg @ref LL_MDMA_CHANNEL_6
2253 * @arg @ref LL_MDMA_CHANNEL_7
2254 * @arg @ref LL_MDMA_CHANNEL_8
2255 * @arg @ref LL_MDMA_CHANNEL_9
2256 * @arg @ref LL_MDMA_CHANNEL_10
2257 * @arg @ref LL_MDMA_CHANNEL_11
2258 * @arg @ref LL_MDMA_CHANNEL_12
2259 * @arg @ref LL_MDMA_CHANNEL_13
2260 * @arg @ref LL_MDMA_CHANNEL_14
2261 * @arg @ref LL_MDMA_CHANNEL_15
2262 * @retval Between 0 to 0x00010000
2263 * @retval None
2264 */
2265 __STATIC_INLINE uint32_t LL_MDMA_GetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel)
2266 {
2267 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2268
2269 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT));
2270 }
2271
2272 /**
2273 * @brief Set Block Repeat Count.
2274 * @rmtoll CBNDTR BRC LL_MDMA_SetBlkRepeatCount
2275 * @param MDMAx MDMAx Instance
2276 * @param Channel This parameter can be one of the following values:
2277 * @arg @ref LL_MDMA_CHANNEL_0
2278 * @arg @ref LL_MDMA_CHANNEL_1
2279 * @arg @ref LL_MDMA_CHANNEL_2
2280 * @arg @ref LL_MDMA_CHANNEL_3
2281 * @arg @ref LL_MDMA_CHANNEL_4
2282 * @arg @ref LL_MDMA_CHANNEL_5
2283 * @arg @ref LL_MDMA_CHANNEL_6
2284 * @arg @ref LL_MDMA_CHANNEL_7
2285 * @arg @ref LL_MDMA_CHANNEL_8
2286 * @arg @ref LL_MDMA_CHANNEL_9
2287 * @arg @ref LL_MDMA_CHANNEL_10
2288 * @arg @ref LL_MDMA_CHANNEL_11
2289 * @arg @ref LL_MDMA_CHANNEL_12
2290 * @arg @ref LL_MDMA_CHANNEL_13
2291 * @arg @ref LL_MDMA_CHANNEL_14
2292 * @arg @ref LL_MDMA_CHANNEL_15
2293 * @param BlockRepeatCount Between 0 to 0x00000FFF
2294 * @retval None
2295 */
2296 __STATIC_INLINE void LL_MDMA_SetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount)
2297 {
2298 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2299
2300 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC,
2301 (BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk);
2302 }
2303
2304 /**
2305 * @brief Get Block Repeat Count.
2306 * @rmtoll CBNDTR BRC LL_MDMA_GetBlkRepeatCount
2307 * @param MDMAx MDMAx Instance
2308 * @param Channel This parameter can be one of the following values:
2309 * @arg @ref LL_MDMA_CHANNEL_0
2310 * @arg @ref LL_MDMA_CHANNEL_1
2311 * @arg @ref LL_MDMA_CHANNEL_2
2312 * @arg @ref LL_MDMA_CHANNEL_3
2313 * @arg @ref LL_MDMA_CHANNEL_4
2314 * @arg @ref LL_MDMA_CHANNEL_5
2315 * @arg @ref LL_MDMA_CHANNEL_6
2316 * @arg @ref LL_MDMA_CHANNEL_7
2317 * @arg @ref LL_MDMA_CHANNEL_8
2318 * @arg @ref LL_MDMA_CHANNEL_9
2319 * @arg @ref LL_MDMA_CHANNEL_10
2320 * @arg @ref LL_MDMA_CHANNEL_11
2321 * @arg @ref LL_MDMA_CHANNEL_12
2322 * @arg @ref LL_MDMA_CHANNEL_13
2323 * @arg @ref LL_MDMA_CHANNEL_14
2324 * @arg @ref LL_MDMA_CHANNEL_15
2325 * @retval Between 0 to 0x00000FFF
2326 * @retval None
2327 */
2328 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel)
2329 {
2330 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2331
2332 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC) >> MDMA_CBNDTR_BRC_Pos);
2333 }
2334
2335 /**
2336 * @brief Configure MDMA block repeat address update mode.
2337 * @rmtoll CBNDTR BRDUM LL_MDMA_ConfigBlkRepeatAddrUpdate\n
2338 * @rmtoll CBNDTR BRSUM LL_MDMA_ConfigBlkRepeatAddrUpdate
2339 * @param MDMAx MDMAx Instance
2340 * @param Channel This parameter can be one of the following values:
2341 * @arg @ref LL_MDMA_CHANNEL_0
2342 * @arg @ref LL_MDMA_CHANNEL_1
2343 * @arg @ref LL_MDMA_CHANNEL_2
2344 * @arg @ref LL_MDMA_CHANNEL_3
2345 * @arg @ref LL_MDMA_CHANNEL_4
2346 * @arg @ref LL_MDMA_CHANNEL_5
2347 * @arg @ref LL_MDMA_CHANNEL_6
2348 * @arg @ref LL_MDMA_CHANNEL_7
2349 * @arg @ref LL_MDMA_CHANNEL_8
2350 * @arg @ref LL_MDMA_CHANNEL_9
2351 * @arg @ref LL_MDMA_CHANNEL_10
2352 * @arg @ref LL_MDMA_CHANNEL_11
2353 * @arg @ref LL_MDMA_CHANNEL_12
2354 * @arg @ref LL_MDMA_CHANNEL_13
2355 * @arg @ref LL_MDMA_CHANNEL_14
2356 * @arg @ref LL_MDMA_CHANNEL_15
2357 * @param Configuration This parameter must be a combination of all the following values:
2358 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2359 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2360 * @retval None
2361 */
2362 __STATIC_INLINE void LL_MDMA_ConfigBlkRepeatAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
2363 {
2364 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2365
2366 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR,
2367 MDMA_CBNDTR_BRDUM | MDMA_CBNDTR_BRSUM,
2368 Configuration);
2369 }
2370
2371 /**
2372 * @brief Set Block Repeat Destination address Update Mode.
2373 * @rmtoll CBNDTR BRDUM LL_MDMA_SetBlkRepeatDestAddrUpdate
2374 * @param MDMAx MDMAx Instance
2375 * @param Channel This parameter can be one of the following values:
2376 * @arg @ref LL_MDMA_CHANNEL_0
2377 * @arg @ref LL_MDMA_CHANNEL_1
2378 * @arg @ref LL_MDMA_CHANNEL_2
2379 * @arg @ref LL_MDMA_CHANNEL_3
2380 * @arg @ref LL_MDMA_CHANNEL_4
2381 * @arg @ref LL_MDMA_CHANNEL_5
2382 * @arg @ref LL_MDMA_CHANNEL_6
2383 * @arg @ref LL_MDMA_CHANNEL_7
2384 * @arg @ref LL_MDMA_CHANNEL_8
2385 * @arg @ref LL_MDMA_CHANNEL_9
2386 * @arg @ref LL_MDMA_CHANNEL_10
2387 * @arg @ref LL_MDMA_CHANNEL_11
2388 * @arg @ref LL_MDMA_CHANNEL_12
2389 * @arg @ref LL_MDMA_CHANNEL_13
2390 * @arg @ref LL_MDMA_CHANNEL_14
2391 * @arg @ref LL_MDMA_CHANNEL_15
2392 * @param DestAdrUpdateMode This parameter can be one of the following values:
2393 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT
2394 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2395 * @retval None
2396 */
2397 __STATIC_INLINE void LL_MDMA_SetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateMode)
2398 {
2399 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2400
2401 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM, DestAdrUpdateMode);
2402 }
2403
2404 /**
2405 * @brief Get Block Repeat Destination address Update Mode.
2406 * @rmtoll CBNDTR BRDUM LL_MDMA_GetBlkRepeatDestAddrUpdate
2407 * @param MDMAx MDMAx Instance
2408 * @param Channel This parameter can be one of the following values:
2409 * @arg @ref LL_MDMA_CHANNEL_0
2410 * @arg @ref LL_MDMA_CHANNEL_1
2411 * @arg @ref LL_MDMA_CHANNEL_2
2412 * @arg @ref LL_MDMA_CHANNEL_3
2413 * @arg @ref LL_MDMA_CHANNEL_4
2414 * @arg @ref LL_MDMA_CHANNEL_5
2415 * @arg @ref LL_MDMA_CHANNEL_6
2416 * @arg @ref LL_MDMA_CHANNEL_7
2417 * @arg @ref LL_MDMA_CHANNEL_8
2418 * @arg @ref LL_MDMA_CHANNEL_9
2419 * @arg @ref LL_MDMA_CHANNEL_10
2420 * @arg @ref LL_MDMA_CHANNEL_11
2421 * @arg @ref LL_MDMA_CHANNEL_12
2422 * @arg @ref LL_MDMA_CHANNEL_13
2423 * @arg @ref LL_MDMA_CHANNEL_14
2424 * @arg @ref LL_MDMA_CHANNEL_15
2425 * @retval Returned value can be one of the following values:
2426 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT
2427 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2428 * @retval None
2429 */
2430 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel)
2431 {
2432 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2433
2434 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM));
2435 }
2436
2437 /**
2438 * @brief Set Block Repeat Source address Update Mode.
2439 * @rmtoll CBNDTR BRSUM LL_MDMA_SetBlkRepeatSrcAddrUpdate
2440 * @param MDMAx MDMAx Instance
2441 * @param Channel This parameter can be one of the following values:
2442 * @arg @ref LL_MDMA_CHANNEL_0
2443 * @arg @ref LL_MDMA_CHANNEL_1
2444 * @arg @ref LL_MDMA_CHANNEL_2
2445 * @arg @ref LL_MDMA_CHANNEL_3
2446 * @arg @ref LL_MDMA_CHANNEL_4
2447 * @arg @ref LL_MDMA_CHANNEL_5
2448 * @arg @ref LL_MDMA_CHANNEL_6
2449 * @arg @ref LL_MDMA_CHANNEL_7
2450 * @arg @ref LL_MDMA_CHANNEL_8
2451 * @arg @ref LL_MDMA_CHANNEL_9
2452 * @arg @ref LL_MDMA_CHANNEL_10
2453 * @arg @ref LL_MDMA_CHANNEL_11
2454 * @arg @ref LL_MDMA_CHANNEL_12
2455 * @arg @ref LL_MDMA_CHANNEL_13
2456 * @arg @ref LL_MDMA_CHANNEL_14
2457 * @arg @ref LL_MDMA_CHANNEL_15
2458 * @param SrcAdrUpdateMode This parameter can be one of the following values:
2459 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT
2460 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2461 * @retval None
2462 */
2463 __STATIC_INLINE void LL_MDMA_SetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateMode)
2464 {
2465 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2466
2467 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM, SrcAdrUpdateMode);
2468 }
2469
2470 /**
2471 * @brief Get Block Repeat Source address Update Mode.
2472 * @rmtoll CBNDTR BRSUM LL_MDMA_GetBlkRepeatSrcAddrUpdate
2473 * @param MDMAx MDMAx Instance
2474 * @param Channel This parameter can be one of the following values:
2475 * @arg @ref LL_MDMA_CHANNEL_0
2476 * @arg @ref LL_MDMA_CHANNEL_1
2477 * @arg @ref LL_MDMA_CHANNEL_2
2478 * @arg @ref LL_MDMA_CHANNEL_3
2479 * @arg @ref LL_MDMA_CHANNEL_4
2480 * @arg @ref LL_MDMA_CHANNEL_5
2481 * @arg @ref LL_MDMA_CHANNEL_6
2482 * @arg @ref LL_MDMA_CHANNEL_7
2483 * @arg @ref LL_MDMA_CHANNEL_8
2484 * @arg @ref LL_MDMA_CHANNEL_9
2485 * @arg @ref LL_MDMA_CHANNEL_10
2486 * @arg @ref LL_MDMA_CHANNEL_11
2487 * @arg @ref LL_MDMA_CHANNEL_12
2488 * @arg @ref LL_MDMA_CHANNEL_13
2489 * @arg @ref LL_MDMA_CHANNEL_14
2490 * @arg @ref LL_MDMA_CHANNEL_15
2491 * @retval Returned value can be one of the following values:
2492 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT
2493 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2494 * @retval None
2495 */
2496 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel)
2497 {
2498 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2499
2500 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM));
2501 }
2502
2503 /**
2504 * @brief Configure the Source and Destination addresses.
2505 * @note This API must not be called when the MDMA channel is enabled.
2506 * @rmtoll CSAR SAR LL_MDMA_ConfigAddresses\n
2507 * @rmtoll CDAR DAR LL_MDMA_ConfigAddresses
2508 * @param MDMAx MDMAx Instance
2509 * @param Channel This parameter can be one of the following values:
2510 * @arg @ref LL_MDMA_CHANNEL_0
2511 * @arg @ref LL_MDMA_CHANNEL_1
2512 * @arg @ref LL_MDMA_CHANNEL_2
2513 * @arg @ref LL_MDMA_CHANNEL_3
2514 * @arg @ref LL_MDMA_CHANNEL_4
2515 * @arg @ref LL_MDMA_CHANNEL_5
2516 * @arg @ref LL_MDMA_CHANNEL_6
2517 * @arg @ref LL_MDMA_CHANNEL_7
2518 * @arg @ref LL_MDMA_CHANNEL_8
2519 * @arg @ref LL_MDMA_CHANNEL_9
2520 * @arg @ref LL_MDMA_CHANNEL_10
2521 * @arg @ref LL_MDMA_CHANNEL_11
2522 * @arg @ref LL_MDMA_CHANNEL_12
2523 * @arg @ref LL_MDMA_CHANNEL_13
2524 * @arg @ref LL_MDMA_CHANNEL_14
2525 * @arg @ref LL_MDMA_CHANNEL_15
2526 * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
2527 * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
2528 * @retval None
2529 */
2530 __STATIC_INLINE void LL_MDMA_ConfigAddresses(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress)
2531 {
2532 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2533
2534 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress);
2535 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DstAddress);
2536 }
2537 /**
2538 * @brief Set transfer Source address.
2539 * @rmtoll CSAR SAR LL_MDMA_SetSourceAddress
2540 * @param MDMAx MDMAx Instance
2541 * @param Channel This parameter can be one of the following values:
2542 * @arg @ref LL_MDMA_CHANNEL_0
2543 * @arg @ref LL_MDMA_CHANNEL_1
2544 * @arg @ref LL_MDMA_CHANNEL_2
2545 * @arg @ref LL_MDMA_CHANNEL_3
2546 * @arg @ref LL_MDMA_CHANNEL_4
2547 * @arg @ref LL_MDMA_CHANNEL_5
2548 * @arg @ref LL_MDMA_CHANNEL_6
2549 * @arg @ref LL_MDMA_CHANNEL_7
2550 * @arg @ref LL_MDMA_CHANNEL_8
2551 * @arg @ref LL_MDMA_CHANNEL_9
2552 * @arg @ref LL_MDMA_CHANNEL_10
2553 * @arg @ref LL_MDMA_CHANNEL_11
2554 * @arg @ref LL_MDMA_CHANNEL_12
2555 * @arg @ref LL_MDMA_CHANNEL_13
2556 * @arg @ref LL_MDMA_CHANNEL_14
2557 * @arg @ref LL_MDMA_CHANNEL_15
2558 * @param SrcAddress Between 0 to 0xFFFFFFFF
2559 * @retval None
2560 */
2561 __STATIC_INLINE void LL_MDMA_SetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress)
2562 {
2563 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2564
2565 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress);
2566 }
2567
2568 /**
2569 * @brief Get transfer Source address.
2570 * @rmtoll CSAR SAR LL_MDMA_GetSourceAddress
2571 * @param MDMAx MDMAx Instance
2572 * @param Channel This parameter can be one of the following values:
2573 * @arg @ref LL_MDMA_CHANNEL_0
2574 * @arg @ref LL_MDMA_CHANNEL_1
2575 * @arg @ref LL_MDMA_CHANNEL_2
2576 * @arg @ref LL_MDMA_CHANNEL_3
2577 * @arg @ref LL_MDMA_CHANNEL_4
2578 * @arg @ref LL_MDMA_CHANNEL_5
2579 * @arg @ref LL_MDMA_CHANNEL_6
2580 * @arg @ref LL_MDMA_CHANNEL_7
2581 * @arg @ref LL_MDMA_CHANNEL_8
2582 * @arg @ref LL_MDMA_CHANNEL_9
2583 * @arg @ref LL_MDMA_CHANNEL_10
2584 * @arg @ref LL_MDMA_CHANNEL_11
2585 * @arg @ref LL_MDMA_CHANNEL_12
2586 * @arg @ref LL_MDMA_CHANNEL_13
2587 * @arg @ref LL_MDMA_CHANNEL_14
2588 * @arg @ref LL_MDMA_CHANNEL_15
2589 * @retval Between 0 to 0xFFFFFFFF
2590 * @retval None
2591 */
2592 __STATIC_INLINE uint32_t LL_MDMA_GetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2593 {
2594 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2595
2596 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR));
2597 }
2598
2599 /**
2600 * @brief Set transfer Destination address.
2601 * @rmtoll CDAR DAR LL_MDMA_SetDestinationAddress
2602 * @param MDMAx MDMAx Instance
2603 * @param Channel This parameter can be one of the following values:
2604 * @arg @ref LL_MDMA_CHANNEL_0
2605 * @arg @ref LL_MDMA_CHANNEL_1
2606 * @arg @ref LL_MDMA_CHANNEL_2
2607 * @arg @ref LL_MDMA_CHANNEL_3
2608 * @arg @ref LL_MDMA_CHANNEL_4
2609 * @arg @ref LL_MDMA_CHANNEL_5
2610 * @arg @ref LL_MDMA_CHANNEL_6
2611 * @arg @ref LL_MDMA_CHANNEL_7
2612 * @arg @ref LL_MDMA_CHANNEL_8
2613 * @arg @ref LL_MDMA_CHANNEL_9
2614 * @arg @ref LL_MDMA_CHANNEL_10
2615 * @arg @ref LL_MDMA_CHANNEL_11
2616 * @arg @ref LL_MDMA_CHANNEL_12
2617 * @arg @ref LL_MDMA_CHANNEL_13
2618 * @arg @ref LL_MDMA_CHANNEL_14
2619 * @arg @ref LL_MDMA_CHANNEL_15
2620 * @param DestAddress Between 0 to 0xFFFFFFFF
2621 * @retval None
2622 */
2623 __STATIC_INLINE void LL_MDMA_SetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAddress)
2624 {
2625 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2626
2627 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DestAddress);
2628 }
2629
2630 /**
2631 * @brief Get transfer Destination address.
2632 * @rmtoll CDAR DAR LL_MDMA_GetDestinationAddress
2633 * @param MDMAx MDMAx Instance
2634 * @param Channel This parameter can be one of the following values:
2635 * @arg @ref LL_MDMA_CHANNEL_0
2636 * @arg @ref LL_MDMA_CHANNEL_1
2637 * @arg @ref LL_MDMA_CHANNEL_2
2638 * @arg @ref LL_MDMA_CHANNEL_3
2639 * @arg @ref LL_MDMA_CHANNEL_4
2640 * @arg @ref LL_MDMA_CHANNEL_5
2641 * @arg @ref LL_MDMA_CHANNEL_6
2642 * @arg @ref LL_MDMA_CHANNEL_7
2643 * @arg @ref LL_MDMA_CHANNEL_8
2644 * @arg @ref LL_MDMA_CHANNEL_9
2645 * @arg @ref LL_MDMA_CHANNEL_10
2646 * @arg @ref LL_MDMA_CHANNEL_11
2647 * @arg @ref LL_MDMA_CHANNEL_12
2648 * @arg @ref LL_MDMA_CHANNEL_13
2649 * @arg @ref LL_MDMA_CHANNEL_14
2650 * @arg @ref LL_MDMA_CHANNEL_15
2651 * @retval Between 0 to 0xFFFFFFFF
2652 * @retval None
2653 */
2654 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2655 {
2656 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2657
2658 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR));
2659 }
2660
2661 /**
2662 * @brief Configure the Source and Destination Block repeat addresses Update value.
2663 * @note This API must not be called when the MDMA channel is enabled.
2664 * @rmtoll CBRUR DUV LL_MDMA_ConfigBlkRptAddrUpdateValue\n
2665 * @rmtoll CBRUR SUV LL_MDMA_ConfigBlkRptAddrUpdateValue
2666 * @param MDMAx MDMAx Instance
2667 * @param Channel This parameter can be one of the following values:
2668 * @arg @ref LL_MDMA_CHANNEL_0
2669 * @arg @ref LL_MDMA_CHANNEL_1
2670 * @arg @ref LL_MDMA_CHANNEL_2
2671 * @arg @ref LL_MDMA_CHANNEL_3
2672 * @arg @ref LL_MDMA_CHANNEL_4
2673 * @arg @ref LL_MDMA_CHANNEL_5
2674 * @arg @ref LL_MDMA_CHANNEL_6
2675 * @arg @ref LL_MDMA_CHANNEL_7
2676 * @arg @ref LL_MDMA_CHANNEL_8
2677 * @arg @ref LL_MDMA_CHANNEL_9
2678 * @arg @ref LL_MDMA_CHANNEL_10
2679 * @arg @ref LL_MDMA_CHANNEL_11
2680 * @arg @ref LL_MDMA_CHANNEL_12
2681 * @arg @ref LL_MDMA_CHANNEL_13
2682 * @arg @ref LL_MDMA_CHANNEL_14
2683 * @arg @ref LL_MDMA_CHANNEL_15
2684 * @param SrctAdrUpdateValue Min_Data = 0 and Max_Data = 0x0000FFFF
2685 * @param DestAdrUpdateValue Between Min_Data = 0 and Max_Data = 0x0000FFFF
2686 * @retval None
2687 */
2688 __STATIC_INLINE void LL_MDMA_ConfigBlkRptAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrctAdrUpdateValue, uint32_t DestAdrUpdateValue)
2689 {
2690 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2691
2692 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR,
2693 (SrctAdrUpdateValue & MDMA_CBRUR_SUV_Msk) | ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk));
2694 }
2695
2696 /**
2697 * @brief Set transfer Destination address Update Value.
2698 * @rmtoll CBRUR DUV LL_MDMA_SetBlkRptDestAddrUpdateValue
2699 * @param MDMAx MDMAx Instance
2700 * @param Channel This parameter can be one of the following values:
2701 * @arg @ref LL_MDMA_CHANNEL_0
2702 * @arg @ref LL_MDMA_CHANNEL_1
2703 * @arg @ref LL_MDMA_CHANNEL_2
2704 * @arg @ref LL_MDMA_CHANNEL_3
2705 * @arg @ref LL_MDMA_CHANNEL_4
2706 * @arg @ref LL_MDMA_CHANNEL_5
2707 * @arg @ref LL_MDMA_CHANNEL_6
2708 * @arg @ref LL_MDMA_CHANNEL_7
2709 * @arg @ref LL_MDMA_CHANNEL_8
2710 * @arg @ref LL_MDMA_CHANNEL_9
2711 * @arg @ref LL_MDMA_CHANNEL_10
2712 * @arg @ref LL_MDMA_CHANNEL_11
2713 * @arg @ref LL_MDMA_CHANNEL_12
2714 * @arg @ref LL_MDMA_CHANNEL_13
2715 * @arg @ref LL_MDMA_CHANNEL_14
2716 * @arg @ref LL_MDMA_CHANNEL_15
2717 * @param DestAdrUpdateValue Between 0 to 0x0000FFFF
2718 * @retval None
2719 */
2720 __STATIC_INLINE void LL_MDMA_SetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateValue)
2721 {
2722 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2723
2724 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV,
2725 ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk));
2726 }
2727
2728 /**
2729 * @brief Get transfer Destination address Update Value.
2730 * @rmtoll CBRUR DUV LL_MDMA_GetBlkRptDestAddrUpdateValue
2731 * @param MDMAx MDMAx Instance
2732 * @param Channel This parameter can be one of the following values:
2733 * @arg @ref LL_MDMA_CHANNEL_0
2734 * @arg @ref LL_MDMA_CHANNEL_1
2735 * @arg @ref LL_MDMA_CHANNEL_2
2736 * @arg @ref LL_MDMA_CHANNEL_3
2737 * @arg @ref LL_MDMA_CHANNEL_4
2738 * @arg @ref LL_MDMA_CHANNEL_5
2739 * @arg @ref LL_MDMA_CHANNEL_6
2740 * @arg @ref LL_MDMA_CHANNEL_7
2741 * @arg @ref LL_MDMA_CHANNEL_8
2742 * @arg @ref LL_MDMA_CHANNEL_9
2743 * @arg @ref LL_MDMA_CHANNEL_10
2744 * @arg @ref LL_MDMA_CHANNEL_11
2745 * @arg @ref LL_MDMA_CHANNEL_12
2746 * @arg @ref LL_MDMA_CHANNEL_13
2747 * @arg @ref LL_MDMA_CHANNEL_14
2748 * @arg @ref LL_MDMA_CHANNEL_15
2749 * @retval Between 0 to 0x0000FFFF
2750 * @retval None
2751 */
2752 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel)
2753 {
2754 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2755
2756 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV) >> MDMA_CBRUR_DUV_Pos);
2757 }
2758
2759 /**
2760 * @brief Set transfer Source address Update Value.
2761 * @rmtoll CBRUR SUV LL_MDMA_SetBlkRptSrcAddrUpdateValue
2762 * @param MDMAx MDMAx Instance
2763 * @param Channel This parameter can be one of the following values:
2764 * @arg @ref LL_MDMA_CHANNEL_0
2765 * @arg @ref LL_MDMA_CHANNEL_1
2766 * @arg @ref LL_MDMA_CHANNEL_2
2767 * @arg @ref LL_MDMA_CHANNEL_3
2768 * @arg @ref LL_MDMA_CHANNEL_4
2769 * @arg @ref LL_MDMA_CHANNEL_5
2770 * @arg @ref LL_MDMA_CHANNEL_6
2771 * @arg @ref LL_MDMA_CHANNEL_7
2772 * @arg @ref LL_MDMA_CHANNEL_8
2773 * @arg @ref LL_MDMA_CHANNEL_9
2774 * @arg @ref LL_MDMA_CHANNEL_10
2775 * @arg @ref LL_MDMA_CHANNEL_11
2776 * @arg @ref LL_MDMA_CHANNEL_12
2777 * @arg @ref LL_MDMA_CHANNEL_13
2778 * @arg @ref LL_MDMA_CHANNEL_14
2779 * @arg @ref LL_MDMA_CHANNEL_15
2780 * @param SrcAdrUpdateValue Between 0 to 0x0000FFFF
2781 * @retval None
2782 */
2783 __STATIC_INLINE void LL_MDMA_SetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateValue)
2784 {
2785 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2786
2787 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV, SrcAdrUpdateValue);
2788 }
2789
2790 /**
2791 * @brief Get transfer Source address Update Value.
2792 * @rmtoll CBRUR SUV LL_MDMA_GetBlkRptSrcAddrUpdateValue
2793 * @param MDMAx MDMAx Instance
2794 * @param Channel This parameter can be one of the following values:
2795 * @arg @ref LL_MDMA_CHANNEL_0
2796 * @arg @ref LL_MDMA_CHANNEL_1
2797 * @arg @ref LL_MDMA_CHANNEL_2
2798 * @arg @ref LL_MDMA_CHANNEL_3
2799 * @arg @ref LL_MDMA_CHANNEL_4
2800 * @arg @ref LL_MDMA_CHANNEL_5
2801 * @arg @ref LL_MDMA_CHANNEL_6
2802 * @arg @ref LL_MDMA_CHANNEL_7
2803 * @arg @ref LL_MDMA_CHANNEL_8
2804 * @arg @ref LL_MDMA_CHANNEL_9
2805 * @arg @ref LL_MDMA_CHANNEL_10
2806 * @arg @ref LL_MDMA_CHANNEL_11
2807 * @arg @ref LL_MDMA_CHANNEL_12
2808 * @arg @ref LL_MDMA_CHANNEL_13
2809 * @arg @ref LL_MDMA_CHANNEL_14
2810 * @arg @ref LL_MDMA_CHANNEL_15
2811 * @retval Between 0 to 0x0000FFFF
2812 * @retval None
2813 */
2814 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel)
2815 {
2816 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2817
2818 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV));
2819 }
2820
2821 /**
2822 * @brief Set transfer Link Address.
2823 * @rmtoll CLAR LAR LL_MDMA_SetLinkAddress
2824 * @param MDMAx MDMAx Instance
2825 * @param Channel This parameter can be one of the following values:
2826 * @arg @ref LL_MDMA_CHANNEL_0
2827 * @arg @ref LL_MDMA_CHANNEL_1
2828 * @arg @ref LL_MDMA_CHANNEL_2
2829 * @arg @ref LL_MDMA_CHANNEL_3
2830 * @arg @ref LL_MDMA_CHANNEL_4
2831 * @arg @ref LL_MDMA_CHANNEL_5
2832 * @arg @ref LL_MDMA_CHANNEL_6
2833 * @arg @ref LL_MDMA_CHANNEL_7
2834 * @arg @ref LL_MDMA_CHANNEL_8
2835 * @arg @ref LL_MDMA_CHANNEL_9
2836 * @arg @ref LL_MDMA_CHANNEL_10
2837 * @arg @ref LL_MDMA_CHANNEL_11
2838 * @arg @ref LL_MDMA_CHANNEL_12
2839 * @arg @ref LL_MDMA_CHANNEL_13
2840 * @arg @ref LL_MDMA_CHANNEL_14
2841 * @arg @ref LL_MDMA_CHANNEL_15
2842 * @param LinkAddress Between 0 to 0xFFFFFFFF
2843 * @retval None
2844 */
2845 __STATIC_INLINE void LL_MDMA_SetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t LinkAddress)
2846 {
2847 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2848
2849 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR, LinkAddress);
2850 }
2851
2852 /**
2853 * @brief Get transfer Link Address.
2854 * @rmtoll CLAR LAR LL_MDMA_GetLinkAddress
2855 * @param MDMAx MDMAx Instance
2856 * @param Channel This parameter can be one of the following values:
2857 * @arg @ref LL_MDMA_CHANNEL_0
2858 * @arg @ref LL_MDMA_CHANNEL_1
2859 * @arg @ref LL_MDMA_CHANNEL_2
2860 * @arg @ref LL_MDMA_CHANNEL_3
2861 * @arg @ref LL_MDMA_CHANNEL_4
2862 * @arg @ref LL_MDMA_CHANNEL_5
2863 * @arg @ref LL_MDMA_CHANNEL_6
2864 * @arg @ref LL_MDMA_CHANNEL_7
2865 * @arg @ref LL_MDMA_CHANNEL_8
2866 * @arg @ref LL_MDMA_CHANNEL_9
2867 * @arg @ref LL_MDMA_CHANNEL_10
2868 * @arg @ref LL_MDMA_CHANNEL_11
2869 * @arg @ref LL_MDMA_CHANNEL_12
2870 * @arg @ref LL_MDMA_CHANNEL_13
2871 * @arg @ref LL_MDMA_CHANNEL_14
2872 * @arg @ref LL_MDMA_CHANNEL_15
2873 * @retval Between 0 to 0xFFFFFFFF
2874 * @retval None
2875 */
2876 __STATIC_INLINE uint32_t LL_MDMA_GetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2877 {
2878 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2879
2880 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR));
2881 }
2882
2883 /**
2884 * @brief Configure MDMA source and destination bus selection.
2885 * @rmtoll CTBR DBUS LL_MDMA_ConfigBusSelection\n
2886 * @rmtoll CTBR SBUS LL_MDMA_ConfigBusSelection
2887 * @param MDMAx MDMAx Instance
2888 * @param Channel This parameter can be one of the following values:
2889 * @arg @ref LL_MDMA_CHANNEL_0
2890 * @arg @ref LL_MDMA_CHANNEL_1
2891 * @arg @ref LL_MDMA_CHANNEL_2
2892 * @arg @ref LL_MDMA_CHANNEL_3
2893 * @arg @ref LL_MDMA_CHANNEL_4
2894 * @arg @ref LL_MDMA_CHANNEL_5
2895 * @arg @ref LL_MDMA_CHANNEL_6
2896 * @arg @ref LL_MDMA_CHANNEL_7
2897 * @arg @ref LL_MDMA_CHANNEL_8
2898 * @arg @ref LL_MDMA_CHANNEL_9
2899 * @arg @ref LL_MDMA_CHANNEL_10
2900 * @arg @ref LL_MDMA_CHANNEL_11
2901 * @arg @ref LL_MDMA_CHANNEL_12
2902 * @arg @ref LL_MDMA_CHANNEL_13
2903 * @arg @ref LL_MDMA_CHANNEL_14
2904 * @arg @ref LL_MDMA_CHANNEL_15
2905 * @param Configuration This parameter must be a combination of all the following values:
2906 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI or @ref LL_MDMA_DEST_BUS_AHB_TCM
2907 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI or @ref LL_MDMA_SRC_BUS_AHB_TCM
2908 * @retval None
2909 */
2910 __STATIC_INLINE void LL_MDMA_ConfigBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
2911 {
2912 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2913
2914 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR,
2915 MDMA_CTBR_DBUS | MDMA_CTBR_SBUS,
2916 Configuration);
2917 }
2918
2919 /**
2920 * @brief Set Destination Bus Selection.
2921 * @rmtoll CTBR DBUS LL_MDMA_SetDestBusSelection
2922 * @param MDMAx MDMAx Instance
2923 * @param Channel This parameter can be one of the following values:
2924 * @arg @ref LL_MDMA_CHANNEL_0
2925 * @arg @ref LL_MDMA_CHANNEL_1
2926 * @arg @ref LL_MDMA_CHANNEL_2
2927 * @arg @ref LL_MDMA_CHANNEL_3
2928 * @arg @ref LL_MDMA_CHANNEL_4
2929 * @arg @ref LL_MDMA_CHANNEL_5
2930 * @arg @ref LL_MDMA_CHANNEL_6
2931 * @arg @ref LL_MDMA_CHANNEL_7
2932 * @arg @ref LL_MDMA_CHANNEL_8
2933 * @arg @ref LL_MDMA_CHANNEL_9
2934 * @arg @ref LL_MDMA_CHANNEL_10
2935 * @arg @ref LL_MDMA_CHANNEL_11
2936 * @arg @ref LL_MDMA_CHANNEL_12
2937 * @arg @ref LL_MDMA_CHANNEL_13
2938 * @arg @ref LL_MDMA_CHANNEL_14
2939 * @arg @ref LL_MDMA_CHANNEL_15
2940 * @param DestBus This parameter can be one of the following values:
2941 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI
2942 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM
2943 * @retval None
2944 */
2945 __STATIC_INLINE void LL_MDMA_SetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestBus)
2946 {
2947 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2948
2949 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS, DestBus);
2950 }
2951
2952 /**
2953 * @brief Get Destination Bus Selection.
2954 * @rmtoll CTBR DBUS LL_MDMA_GetDestBusSelection
2955 * @param MDMAx MDMAx Instance
2956 * @param Channel This parameter can be one of the following values:
2957 * @arg @ref LL_MDMA_CHANNEL_0
2958 * @arg @ref LL_MDMA_CHANNEL_1
2959 * @arg @ref LL_MDMA_CHANNEL_2
2960 * @arg @ref LL_MDMA_CHANNEL_3
2961 * @arg @ref LL_MDMA_CHANNEL_4
2962 * @arg @ref LL_MDMA_CHANNEL_5
2963 * @arg @ref LL_MDMA_CHANNEL_6
2964 * @arg @ref LL_MDMA_CHANNEL_7
2965 * @arg @ref LL_MDMA_CHANNEL_8
2966 * @arg @ref LL_MDMA_CHANNEL_9
2967 * @arg @ref LL_MDMA_CHANNEL_10
2968 * @arg @ref LL_MDMA_CHANNEL_11
2969 * @arg @ref LL_MDMA_CHANNEL_12
2970 * @arg @ref LL_MDMA_CHANNEL_13
2971 * @arg @ref LL_MDMA_CHANNEL_14
2972 * @arg @ref LL_MDMA_CHANNEL_15
2973 * @retval Returned value can be one of the following values:
2974 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI
2975 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM
2976 * @retval None
2977 */
2978 __STATIC_INLINE uint32_t LL_MDMA_GetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel)
2979 {
2980 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2981
2982 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS));
2983 }
2984
2985 /**
2986 * @brief Set Source Bus Selection.
2987 * @rmtoll CTBR SBUS LL_MDMA_SetSrcBusSelection
2988 * @param MDMAx MDMAx Instance
2989 * @param Channel This parameter can be one of the following values:
2990 * @arg @ref LL_MDMA_CHANNEL_0
2991 * @arg @ref LL_MDMA_CHANNEL_1
2992 * @arg @ref LL_MDMA_CHANNEL_2
2993 * @arg @ref LL_MDMA_CHANNEL_3
2994 * @arg @ref LL_MDMA_CHANNEL_4
2995 * @arg @ref LL_MDMA_CHANNEL_5
2996 * @arg @ref LL_MDMA_CHANNEL_6
2997 * @arg @ref LL_MDMA_CHANNEL_7
2998 * @arg @ref LL_MDMA_CHANNEL_8
2999 * @arg @ref LL_MDMA_CHANNEL_9
3000 * @arg @ref LL_MDMA_CHANNEL_10
3001 * @arg @ref LL_MDMA_CHANNEL_11
3002 * @arg @ref LL_MDMA_CHANNEL_12
3003 * @arg @ref LL_MDMA_CHANNEL_13
3004 * @arg @ref LL_MDMA_CHANNEL_14
3005 * @arg @ref LL_MDMA_CHANNEL_15
3006 * @param SrcBus This parameter can be one of the following values:
3007 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI
3008 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM
3009 * @retval None
3010 */
3011 __STATIC_INLINE void LL_MDMA_SetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcBus)
3012 {
3013 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3014
3015 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS, SrcBus);
3016 }
3017
3018 /**
3019 * @brief Get Source Bus Selection.
3020 * @rmtoll CTBR SBUS LL_MDMA_GetSrcBusSelection
3021 * @param MDMAx MDMAx Instance
3022 * @param Channel This parameter can be one of the following values:
3023 * @arg @ref LL_MDMA_CHANNEL_0
3024 * @arg @ref LL_MDMA_CHANNEL_1
3025 * @arg @ref LL_MDMA_CHANNEL_2
3026 * @arg @ref LL_MDMA_CHANNEL_3
3027 * @arg @ref LL_MDMA_CHANNEL_4
3028 * @arg @ref LL_MDMA_CHANNEL_5
3029 * @arg @ref LL_MDMA_CHANNEL_6
3030 * @arg @ref LL_MDMA_CHANNEL_7
3031 * @arg @ref LL_MDMA_CHANNEL_8
3032 * @arg @ref LL_MDMA_CHANNEL_9
3033 * @arg @ref LL_MDMA_CHANNEL_10
3034 * @arg @ref LL_MDMA_CHANNEL_11
3035 * @arg @ref LL_MDMA_CHANNEL_12
3036 * @arg @ref LL_MDMA_CHANNEL_13
3037 * @arg @ref LL_MDMA_CHANNEL_14
3038 * @arg @ref LL_MDMA_CHANNEL_15
3039 * @retval Returned value can be one of the following values:
3040 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI
3041 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM
3042 * @retval None
3043 */
3044 __STATIC_INLINE uint32_t LL_MDMA_GetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel)
3045 {
3046 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3047
3048 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS));
3049 }
3050
3051 /**
3052 * @brief Set Transfer hardware trigger (Request).
3053 * @rmtoll CTBR TSEL LL_MDMA_SetHWTrigger
3054 * @param MDMAx MDMAx Instance
3055 * @param Channel This parameter can be one of the following values:
3056 * @arg @ref LL_MDMA_CHANNEL_0
3057 * @arg @ref LL_MDMA_CHANNEL_1
3058 * @arg @ref LL_MDMA_CHANNEL_2
3059 * @arg @ref LL_MDMA_CHANNEL_3
3060 * @arg @ref LL_MDMA_CHANNEL_4
3061 * @arg @ref LL_MDMA_CHANNEL_5
3062 * @arg @ref LL_MDMA_CHANNEL_6
3063 * @arg @ref LL_MDMA_CHANNEL_7
3064 * @arg @ref LL_MDMA_CHANNEL_8
3065 * @arg @ref LL_MDMA_CHANNEL_9
3066 * @arg @ref LL_MDMA_CHANNEL_10
3067 * @arg @ref LL_MDMA_CHANNEL_11
3068 * @arg @ref LL_MDMA_CHANNEL_12
3069 * @arg @ref LL_MDMA_CHANNEL_13
3070 * @arg @ref LL_MDMA_CHANNEL_14
3071 * @arg @ref LL_MDMA_CHANNEL_15
3072 * @param HWRequest This parameter can be one of the following values:
3073 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC
3074 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC
3075 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC
3076 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC
3077 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC
3078 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC
3079 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC
3080 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC
3081 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC
3082 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC
3083 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC
3084 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC
3085 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC
3086 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC
3087 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC
3088 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC
3089 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*)
3090 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*)
3091 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*)
3092 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*)
3093 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*)
3094 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*)
3095 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*)
3096 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*)
3097 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*)
3098 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*)
3099 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC
3100 * @arg @ref LL_MDMA_REQ_DMA2D_TC
3101 * @arg @ref LL_MDMA_REQ_DMA2D_TW
3102 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*)
3103 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*)
3104 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA
3105 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*)
3106 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*)
3107 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*)
3108 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*)
3109 * @note (*) Availability depends on devices.
3110 * @retval None
3111 */
3112 __STATIC_INLINE void LL_MDMA_SetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t HWRequest)
3113 {
3114 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3115
3116 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL, HWRequest);
3117 }
3118
3119 /**
3120 * @brief Get Transfer hardware trigger (Request).
3121 * @rmtoll CTBR TSEL LL_MDMA_GetHWTrigger
3122 * @param MDMAx MDMAx Instance
3123 * @param Channel This parameter can be one of the following values:
3124 * @arg @ref LL_MDMA_CHANNEL_0
3125 * @arg @ref LL_MDMA_CHANNEL_1
3126 * @arg @ref LL_MDMA_CHANNEL_2
3127 * @arg @ref LL_MDMA_CHANNEL_3
3128 * @arg @ref LL_MDMA_CHANNEL_4
3129 * @arg @ref LL_MDMA_CHANNEL_5
3130 * @arg @ref LL_MDMA_CHANNEL_6
3131 * @arg @ref LL_MDMA_CHANNEL_7
3132 * @arg @ref LL_MDMA_CHANNEL_8
3133 * @arg @ref LL_MDMA_CHANNEL_9
3134 * @arg @ref LL_MDMA_CHANNEL_10
3135 * @arg @ref LL_MDMA_CHANNEL_11
3136 * @arg @ref LL_MDMA_CHANNEL_12
3137 * @arg @ref LL_MDMA_CHANNEL_13
3138 * @arg @ref LL_MDMA_CHANNEL_14
3139 * @arg @ref LL_MDMA_CHANNEL_15
3140 * @retval Returned value can be one of the following values:
3141 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC
3142 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC
3143 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC
3144 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC
3145 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC
3146 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC
3147 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC
3148 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC
3149 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC
3150 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC
3151 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC
3152 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC
3153 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC
3154 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC
3155 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC
3156 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC
3157 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*)
3158 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*)
3159 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*)
3160 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*)
3161 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*)
3162 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*)
3163 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*)
3164 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*)
3165 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*)
3166 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*)
3167 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC
3168 * @arg @ref LL_MDMA_REQ_DMA2D_TC
3169 * @arg @ref LL_MDMA_REQ_DMA2D_TW
3170 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*)
3171 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*)
3172 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA
3173 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*)
3174 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*)
3175 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*)
3176 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*)
3177 * @note (*) Availability depends on devices.
3178 * @retval None
3179 */
3180 __STATIC_INLINE uint32_t LL_MDMA_GetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel)
3181 {
3182 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3183
3184 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL));
3185 }
3186
3187 /**
3188 * @brief Set Mask Address.
3189 * @rmtoll CMAR MAR LL_MDMA_SetMaskAddress
3190 * @param MDMAx MDMAx Instance
3191 * @param Channel This parameter can be one of the following values:
3192 * @arg @ref LL_MDMA_CHANNEL_0
3193 * @arg @ref LL_MDMA_CHANNEL_1
3194 * @arg @ref LL_MDMA_CHANNEL_2
3195 * @arg @ref LL_MDMA_CHANNEL_3
3196 * @arg @ref LL_MDMA_CHANNEL_4
3197 * @arg @ref LL_MDMA_CHANNEL_5
3198 * @arg @ref LL_MDMA_CHANNEL_6
3199 * @arg @ref LL_MDMA_CHANNEL_7
3200 * @arg @ref LL_MDMA_CHANNEL_8
3201 * @arg @ref LL_MDMA_CHANNEL_9
3202 * @arg @ref LL_MDMA_CHANNEL_10
3203 * @arg @ref LL_MDMA_CHANNEL_11
3204 * @arg @ref LL_MDMA_CHANNEL_12
3205 * @arg @ref LL_MDMA_CHANNEL_13
3206 * @arg @ref LL_MDMA_CHANNEL_14
3207 * @arg @ref LL_MDMA_CHANNEL_15
3208 * @param MaskAddress Between 0 to 0xFFFFFFFF
3209 * @retval None
3210 */
3211 __STATIC_INLINE void LL_MDMA_SetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskAddress)
3212 {
3213 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3214
3215 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR, MaskAddress);
3216 }
3217
3218 /**
3219 * @brief Get Mask Address.
3220 * @rmtoll CMAR MAR LL_MDMA_GetMaskAddress
3221 * @param MDMAx MDMAx Instance
3222 * @param Channel This parameter can be one of the following values:
3223 * @arg @ref LL_MDMA_CHANNEL_0
3224 * @arg @ref LL_MDMA_CHANNEL_1
3225 * @arg @ref LL_MDMA_CHANNEL_2
3226 * @arg @ref LL_MDMA_CHANNEL_3
3227 * @arg @ref LL_MDMA_CHANNEL_4
3228 * @arg @ref LL_MDMA_CHANNEL_5
3229 * @arg @ref LL_MDMA_CHANNEL_6
3230 * @arg @ref LL_MDMA_CHANNEL_7
3231 * @arg @ref LL_MDMA_CHANNEL_8
3232 * @arg @ref LL_MDMA_CHANNEL_9
3233 * @arg @ref LL_MDMA_CHANNEL_10
3234 * @arg @ref LL_MDMA_CHANNEL_11
3235 * @arg @ref LL_MDMA_CHANNEL_12
3236 * @arg @ref LL_MDMA_CHANNEL_13
3237 * @arg @ref LL_MDMA_CHANNEL_14
3238 * @arg @ref LL_MDMA_CHANNEL_15
3239 * @retval Between 0 to 0xFFFFFFFF
3240 * @retval None
3241 */
3242 __STATIC_INLINE uint32_t LL_MDMA_GetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
3243 {
3244 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3245
3246 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR));
3247 }
3248
3249 /**
3250 * @brief Set Mask Data.
3251 * @rmtoll CMDR MDR LL_MDMA_SetMaskData
3252 * @param MDMAx MDMAx Instance
3253 * @param Channel This parameter can be one of the following values:
3254 * @arg @ref LL_MDMA_CHANNEL_0
3255 * @arg @ref LL_MDMA_CHANNEL_1
3256 * @arg @ref LL_MDMA_CHANNEL_2
3257 * @arg @ref LL_MDMA_CHANNEL_3
3258 * @arg @ref LL_MDMA_CHANNEL_4
3259 * @arg @ref LL_MDMA_CHANNEL_5
3260 * @arg @ref LL_MDMA_CHANNEL_6
3261 * @arg @ref LL_MDMA_CHANNEL_7
3262 * @arg @ref LL_MDMA_CHANNEL_8
3263 * @arg @ref LL_MDMA_CHANNEL_9
3264 * @arg @ref LL_MDMA_CHANNEL_10
3265 * @arg @ref LL_MDMA_CHANNEL_11
3266 * @arg @ref LL_MDMA_CHANNEL_12
3267 * @arg @ref LL_MDMA_CHANNEL_13
3268 * @arg @ref LL_MDMA_CHANNEL_14
3269 * @arg @ref LL_MDMA_CHANNEL_15
3270 * @param MaskData Between 0 to 0xFFFFFFFF
3271 * @retval None
3272 */
3273 __STATIC_INLINE void LL_MDMA_SetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskData)
3274 {
3275 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3276
3277 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR, MaskData);
3278 }
3279
3280 /**
3281 * @brief Get Mask Data.
3282 * @rmtoll CMDR MDR LL_MDMA_GetMaskData
3283 * @param MDMAx MDMAx Instance
3284 * @param Channel This parameter can be one of the following values:
3285 * @arg @ref LL_MDMA_CHANNEL_0
3286 * @arg @ref LL_MDMA_CHANNEL_1
3287 * @arg @ref LL_MDMA_CHANNEL_2
3288 * @arg @ref LL_MDMA_CHANNEL_3
3289 * @arg @ref LL_MDMA_CHANNEL_4
3290 * @arg @ref LL_MDMA_CHANNEL_5
3291 * @arg @ref LL_MDMA_CHANNEL_6
3292 * @arg @ref LL_MDMA_CHANNEL_7
3293 * @arg @ref LL_MDMA_CHANNEL_8
3294 * @arg @ref LL_MDMA_CHANNEL_9
3295 * @arg @ref LL_MDMA_CHANNEL_10
3296 * @arg @ref LL_MDMA_CHANNEL_11
3297 * @arg @ref LL_MDMA_CHANNEL_12
3298 * @arg @ref LL_MDMA_CHANNEL_13
3299 * @arg @ref LL_MDMA_CHANNEL_14
3300 * @arg @ref LL_MDMA_CHANNEL_15
3301 * @retval Between 0 to 0xFFFFFFFF
3302 * @retval None
3303 */
3304 __STATIC_INLINE uint32_t LL_MDMA_GetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel)
3305 {
3306 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3307
3308 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR));
3309 }
3310
3311 /**
3312 * @brief Get Transfer Error Direction.
3313 * @rmtoll CESR TED LL_MDMA_GetXferErrorDirection
3314 * @param MDMAx MDMAx Instance
3315 * @param Channel This parameter can be one of the following values:
3316 * @arg @ref LL_MDMA_CHANNEL_0
3317 * @arg @ref LL_MDMA_CHANNEL_1
3318 * @arg @ref LL_MDMA_CHANNEL_2
3319 * @arg @ref LL_MDMA_CHANNEL_3
3320 * @arg @ref LL_MDMA_CHANNEL_4
3321 * @arg @ref LL_MDMA_CHANNEL_5
3322 * @arg @ref LL_MDMA_CHANNEL_6
3323 * @arg @ref LL_MDMA_CHANNEL_7
3324 * @arg @ref LL_MDMA_CHANNEL_8
3325 * @arg @ref LL_MDMA_CHANNEL_9
3326 * @arg @ref LL_MDMA_CHANNEL_10
3327 * @arg @ref LL_MDMA_CHANNEL_11
3328 * @arg @ref LL_MDMA_CHANNEL_12
3329 * @arg @ref LL_MDMA_CHANNEL_13
3330 * @arg @ref LL_MDMA_CHANNEL_14
3331 * @arg @ref LL_MDMA_CHANNEL_15
3332 * @retval Returned value can be one of the following values:
3333 * @arg @ref LL_MDMA_READ_ERROR
3334 * @arg @ref LL_MDMA_WRITE_ERROR
3335 * @retval None
3336 */
3337 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorDirection(MDMA_TypeDef *MDMAx, uint32_t Channel)
3338 {
3339 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3340
3341 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TED));
3342 }
3343
3344 /**
3345 * @brief Get Transfer Error LSB Address.
3346 * @rmtoll CESR TEA LL_MDMA_GetXferErrorLSBAddress
3347 * @param MDMAx MDMAx Instance
3348 * @param Channel This parameter can be one of the following values:
3349 * @arg @ref LL_MDMA_CHANNEL_0
3350 * @arg @ref LL_MDMA_CHANNEL_1
3351 * @arg @ref LL_MDMA_CHANNEL_2
3352 * @arg @ref LL_MDMA_CHANNEL_3
3353 * @arg @ref LL_MDMA_CHANNEL_4
3354 * @arg @ref LL_MDMA_CHANNEL_5
3355 * @arg @ref LL_MDMA_CHANNEL_6
3356 * @arg @ref LL_MDMA_CHANNEL_7
3357 * @arg @ref LL_MDMA_CHANNEL_8
3358 * @arg @ref LL_MDMA_CHANNEL_9
3359 * @arg @ref LL_MDMA_CHANNEL_10
3360 * @arg @ref LL_MDMA_CHANNEL_11
3361 * @arg @ref LL_MDMA_CHANNEL_12
3362 * @arg @ref LL_MDMA_CHANNEL_13
3363 * @arg @ref LL_MDMA_CHANNEL_14
3364 * @arg @ref LL_MDMA_CHANNEL_15
3365 * @retval Between 0 to 0x0000007F
3366 * @retval None
3367 */
3368 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorLSBAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
3369 {
3370 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3371
3372 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEA));
3373 }
3374
3375 /**
3376 * @}
3377 */
3378
3379 /** @defgroup MDMA_LL_EF_FLAG_Management FLAG_Management
3380 * @{
3381 */
3382
3383 /**
3384 * @brief Get MDMA Channel x Global Interrupt flag.
3385 * @rmtoll GISR0 GIFx LL_MDMA_IsActiveFlag_GI
3386 * @param MDMAx MDMAx Instance
3387 * @param Channel This parameter can be one of the following values:
3388 * @arg @ref LL_MDMA_CHANNEL_0
3389 * @arg @ref LL_MDMA_CHANNEL_1
3390 * @arg @ref LL_MDMA_CHANNEL_2
3391 * @arg @ref LL_MDMA_CHANNEL_3
3392 * @arg @ref LL_MDMA_CHANNEL_4
3393 * @arg @ref LL_MDMA_CHANNEL_5
3394 * @arg @ref LL_MDMA_CHANNEL_6
3395 * @arg @ref LL_MDMA_CHANNEL_7
3396 * @arg @ref LL_MDMA_CHANNEL_8
3397 * @arg @ref LL_MDMA_CHANNEL_9
3398 * @arg @ref LL_MDMA_CHANNEL_10
3399 * @arg @ref LL_MDMA_CHANNEL_11
3400 * @arg @ref LL_MDMA_CHANNEL_12
3401 * @arg @ref LL_MDMA_CHANNEL_13
3402 * @arg @ref LL_MDMA_CHANNEL_14
3403 * @arg @ref LL_MDMA_CHANNEL_15
3404 * @retval State of bit (1 or 0).
3405 */
3406 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_GI(MDMA_TypeDef *MDMAx, uint32_t Channel)
3407 {
3408 return ((READ_BIT(MDMAx->GISR0 ,(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU)))==(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU))) ? 1UL : 0UL);
3409 }
3410
3411 /**
3412 * @brief Get MDMA Channel x Transfer Error interrupt flag.
3413 * @rmtoll CISR TEIF LL_MDMA_IsActiveFlag_TE
3414 * @param MDMAx MDMAx Instance
3415 * @param Channel This parameter can be one of the following values:
3416 * @arg @ref LL_MDMA_CHANNEL_0
3417 * @arg @ref LL_MDMA_CHANNEL_1
3418 * @arg @ref LL_MDMA_CHANNEL_2
3419 * @arg @ref LL_MDMA_CHANNEL_3
3420 * @arg @ref LL_MDMA_CHANNEL_4
3421 * @arg @ref LL_MDMA_CHANNEL_5
3422 * @arg @ref LL_MDMA_CHANNEL_6
3423 * @arg @ref LL_MDMA_CHANNEL_7
3424 * @arg @ref LL_MDMA_CHANNEL_8
3425 * @arg @ref LL_MDMA_CHANNEL_9
3426 * @arg @ref LL_MDMA_CHANNEL_10
3427 * @arg @ref LL_MDMA_CHANNEL_11
3428 * @arg @ref LL_MDMA_CHANNEL_12
3429 * @arg @ref LL_MDMA_CHANNEL_13
3430 * @arg @ref LL_MDMA_CHANNEL_14
3431 * @arg @ref LL_MDMA_CHANNEL_15
3432 * @retval State of bit (1 or 0).
3433 */
3434 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3435 {
3436 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3437
3438 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TEIF) == (MDMA_CISR_TEIF)) ? 1UL : 0UL);
3439 }
3440
3441 /**
3442 * @brief Get MDMA Channel x Channel Transfer Complete interrupt flag.
3443 * @rmtoll CISR CTCIF LL_MDMA_IsActiveFlag_CTC
3444 * @param MDMAx MDMAx Instance
3445 * @param Channel This parameter can be one of the following values:
3446 * @arg @ref LL_MDMA_CHANNEL_0
3447 * @arg @ref LL_MDMA_CHANNEL_1
3448 * @arg @ref LL_MDMA_CHANNEL_2
3449 * @arg @ref LL_MDMA_CHANNEL_3
3450 * @arg @ref LL_MDMA_CHANNEL_4
3451 * @arg @ref LL_MDMA_CHANNEL_5
3452 * @arg @ref LL_MDMA_CHANNEL_6
3453 * @arg @ref LL_MDMA_CHANNEL_7
3454 * @arg @ref LL_MDMA_CHANNEL_8
3455 * @arg @ref LL_MDMA_CHANNEL_9
3456 * @arg @ref LL_MDMA_CHANNEL_10
3457 * @arg @ref LL_MDMA_CHANNEL_11
3458 * @arg @ref LL_MDMA_CHANNEL_12
3459 * @arg @ref LL_MDMA_CHANNEL_13
3460 * @arg @ref LL_MDMA_CHANNEL_14
3461 * @arg @ref LL_MDMA_CHANNEL_15
3462 * @retval State of bit (1 or 0).
3463 */
3464 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3465 {
3466 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3467
3468 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CTCIF) == (MDMA_CISR_CTCIF)) ? 1UL : 0UL);
3469 }
3470
3471 /**
3472 * @brief Get MDMA Channel x Block Repeat Transfer complete interrupt flag.
3473 * @rmtoll CISR BRTIF LL_MDMA_IsActiveFlag_BRT
3474 * @param MDMAx MDMAx Instance
3475 * @param Channel This parameter can be one of the following values:
3476 * @arg @ref LL_MDMA_CHANNEL_0
3477 * @arg @ref LL_MDMA_CHANNEL_1
3478 * @arg @ref LL_MDMA_CHANNEL_2
3479 * @arg @ref LL_MDMA_CHANNEL_3
3480 * @arg @ref LL_MDMA_CHANNEL_4
3481 * @arg @ref LL_MDMA_CHANNEL_5
3482 * @arg @ref LL_MDMA_CHANNEL_6
3483 * @arg @ref LL_MDMA_CHANNEL_7
3484 * @arg @ref LL_MDMA_CHANNEL_8
3485 * @arg @ref LL_MDMA_CHANNEL_9
3486 * @arg @ref LL_MDMA_CHANNEL_10
3487 * @arg @ref LL_MDMA_CHANNEL_11
3488 * @arg @ref LL_MDMA_CHANNEL_12
3489 * @arg @ref LL_MDMA_CHANNEL_13
3490 * @arg @ref LL_MDMA_CHANNEL_14
3491 * @arg @ref LL_MDMA_CHANNEL_15
3492 * @retval State of bit (1 or 0).
3493 */
3494 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3495 {
3496 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3497
3498 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BRTIF) == (MDMA_CISR_BRTIF)) ? 1UL : 0UL);
3499 }
3500
3501 /**
3502 * @brief Get MDMA Channel x Block Transfer complete interrupt flag.
3503 * @rmtoll CISR BTIF LL_MDMA_IsActiveFlag_BT
3504 * @param MDMAx MDMAx Instance
3505 * @param Channel This parameter can be one of the following values:
3506 * @arg @ref LL_MDMA_CHANNEL_0
3507 * @arg @ref LL_MDMA_CHANNEL_1
3508 * @arg @ref LL_MDMA_CHANNEL_2
3509 * @arg @ref LL_MDMA_CHANNEL_3
3510 * @arg @ref LL_MDMA_CHANNEL_4
3511 * @arg @ref LL_MDMA_CHANNEL_5
3512 * @arg @ref LL_MDMA_CHANNEL_6
3513 * @arg @ref LL_MDMA_CHANNEL_7
3514 * @arg @ref LL_MDMA_CHANNEL_8
3515 * @arg @ref LL_MDMA_CHANNEL_9
3516 * @arg @ref LL_MDMA_CHANNEL_10
3517 * @arg @ref LL_MDMA_CHANNEL_11
3518 * @arg @ref LL_MDMA_CHANNEL_12
3519 * @arg @ref LL_MDMA_CHANNEL_13
3520 * @arg @ref LL_MDMA_CHANNEL_14
3521 * @arg @ref LL_MDMA_CHANNEL_15
3522 * @retval State of bit (1 or 0).
3523 */
3524 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3525 {
3526 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3527
3528 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BTIF) == (MDMA_CISR_BTIF)) ? 1UL : 0UL);
3529 }
3530
3531 /**
3532 * @brief Get MDMA Channel x buffer transfer complete interrupt flag.
3533 * @rmtoll CISR TCIF LL_MDMA_IsActiveFlag_TC
3534 * @param MDMAx MDMAx Instance
3535 * @param Channel This parameter can be one of the following values:
3536 * @arg @ref LL_MDMA_CHANNEL_0
3537 * @arg @ref LL_MDMA_CHANNEL_1
3538 * @arg @ref LL_MDMA_CHANNEL_2
3539 * @arg @ref LL_MDMA_CHANNEL_3
3540 * @arg @ref LL_MDMA_CHANNEL_4
3541 * @arg @ref LL_MDMA_CHANNEL_5
3542 * @arg @ref LL_MDMA_CHANNEL_6
3543 * @arg @ref LL_MDMA_CHANNEL_7
3544 * @arg @ref LL_MDMA_CHANNEL_8
3545 * @arg @ref LL_MDMA_CHANNEL_9
3546 * @arg @ref LL_MDMA_CHANNEL_10
3547 * @arg @ref LL_MDMA_CHANNEL_11
3548 * @arg @ref LL_MDMA_CHANNEL_12
3549 * @arg @ref LL_MDMA_CHANNEL_13
3550 * @arg @ref LL_MDMA_CHANNEL_14
3551 * @arg @ref LL_MDMA_CHANNEL_15
3552 * @retval State of bit (1 or 0).
3553 */
3554 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3555 {
3556 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3557
3558 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TCIF) == (MDMA_CISR_TCIF)) ? 1UL : 0UL);
3559 }
3560
3561 /**
3562 * @brief Get MDMA Channel x ReQuest Active flag.
3563 * @rmtoll CISR CRQA LL_MDMA_IsActiveFlag_CRQA
3564 * @param MDMAx MDMAx Instance
3565 * @param Channel This parameter can be one of the following values:
3566 * @arg @ref LL_MDMA_CHANNEL_0
3567 * @arg @ref LL_MDMA_CHANNEL_1
3568 * @arg @ref LL_MDMA_CHANNEL_2
3569 * @arg @ref LL_MDMA_CHANNEL_3
3570 * @arg @ref LL_MDMA_CHANNEL_4
3571 * @arg @ref LL_MDMA_CHANNEL_5
3572 * @arg @ref LL_MDMA_CHANNEL_6
3573 * @arg @ref LL_MDMA_CHANNEL_7
3574 * @arg @ref LL_MDMA_CHANNEL_8
3575 * @arg @ref LL_MDMA_CHANNEL_9
3576 * @arg @ref LL_MDMA_CHANNEL_10
3577 * @arg @ref LL_MDMA_CHANNEL_11
3578 * @arg @ref LL_MDMA_CHANNEL_12
3579 * @arg @ref LL_MDMA_CHANNEL_13
3580 * @arg @ref LL_MDMA_CHANNEL_14
3581 * @arg @ref LL_MDMA_CHANNEL_15
3582 * @retval State of bit (1 or 0).
3583 */
3584 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CRQA(MDMA_TypeDef *MDMAx, uint32_t Channel)
3585 {
3586 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3587
3588 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CRQA) == (MDMA_CISR_CRQA)) ? 1UL : 0UL);
3589 }
3590
3591 /**
3592 * @brief Get MDMA Channel x Block Size Error flag.
3593 * @rmtoll CESR BSE LL_MDMA_IsActiveFlag_BSE
3594 * @param MDMAx MDMAx Instance
3595 * @param Channel This parameter can be one of the following values:
3596 * @arg @ref LL_MDMA_CHANNEL_0
3597 * @arg @ref LL_MDMA_CHANNEL_1
3598 * @arg @ref LL_MDMA_CHANNEL_2
3599 * @arg @ref LL_MDMA_CHANNEL_3
3600 * @arg @ref LL_MDMA_CHANNEL_4
3601 * @arg @ref LL_MDMA_CHANNEL_5
3602 * @arg @ref LL_MDMA_CHANNEL_6
3603 * @arg @ref LL_MDMA_CHANNEL_7
3604 * @arg @ref LL_MDMA_CHANNEL_8
3605 * @arg @ref LL_MDMA_CHANNEL_9
3606 * @arg @ref LL_MDMA_CHANNEL_10
3607 * @arg @ref LL_MDMA_CHANNEL_11
3608 * @arg @ref LL_MDMA_CHANNEL_12
3609 * @arg @ref LL_MDMA_CHANNEL_13
3610 * @arg @ref LL_MDMA_CHANNEL_14
3611 * @arg @ref LL_MDMA_CHANNEL_15
3612 * @retval State of bit (1 or 0).
3613 */
3614 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BSE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3615 {
3616 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3617
3618 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_BSE) == (MDMA_CESR_BSE)) ? 1UL : 0UL);
3619 }
3620
3621 /**
3622 * @brief Get MDMA Channel x Address/Size Error flag.
3623 * @rmtoll CESR ASE LL_MDMA_IsActiveFlag_ASE
3624 * @param MDMAx MDMAx Instance
3625 * @param Channel This parameter can be one of the following values:
3626 * @arg @ref LL_MDMA_CHANNEL_0
3627 * @arg @ref LL_MDMA_CHANNEL_1
3628 * @arg @ref LL_MDMA_CHANNEL_2
3629 * @arg @ref LL_MDMA_CHANNEL_3
3630 * @arg @ref LL_MDMA_CHANNEL_4
3631 * @arg @ref LL_MDMA_CHANNEL_5
3632 * @arg @ref LL_MDMA_CHANNEL_6
3633 * @arg @ref LL_MDMA_CHANNEL_7
3634 * @arg @ref LL_MDMA_CHANNEL_8
3635 * @arg @ref LL_MDMA_CHANNEL_9
3636 * @arg @ref LL_MDMA_CHANNEL_10
3637 * @arg @ref LL_MDMA_CHANNEL_11
3638 * @arg @ref LL_MDMA_CHANNEL_12
3639 * @arg @ref LL_MDMA_CHANNEL_13
3640 * @arg @ref LL_MDMA_CHANNEL_14
3641 * @arg @ref LL_MDMA_CHANNEL_15
3642 * @retval State of bit (1 or 0).
3643 */
3644 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_ASE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3645 {
3646 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3647
3648 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_ASE) == (MDMA_CESR_ASE)) ? 1UL : 0UL);
3649 }
3650
3651 /**
3652 * @brief Get MDMA Channel x Transfer Error Mask Data flag.
3653 * @rmtoll CESR TEMD LL_MDMA_IsActiveFlag_TEMD
3654 * @param MDMAx MDMAx Instance
3655 * @param Channel This parameter can be one of the following values:
3656 * @arg @ref LL_MDMA_CHANNEL_0
3657 * @arg @ref LL_MDMA_CHANNEL_1
3658 * @arg @ref LL_MDMA_CHANNEL_2
3659 * @arg @ref LL_MDMA_CHANNEL_3
3660 * @arg @ref LL_MDMA_CHANNEL_4
3661 * @arg @ref LL_MDMA_CHANNEL_5
3662 * @arg @ref LL_MDMA_CHANNEL_6
3663 * @arg @ref LL_MDMA_CHANNEL_7
3664 * @arg @ref LL_MDMA_CHANNEL_8
3665 * @arg @ref LL_MDMA_CHANNEL_9
3666 * @arg @ref LL_MDMA_CHANNEL_10
3667 * @arg @ref LL_MDMA_CHANNEL_11
3668 * @arg @ref LL_MDMA_CHANNEL_12
3669 * @arg @ref LL_MDMA_CHANNEL_13
3670 * @arg @ref LL_MDMA_CHANNEL_14
3671 * @arg @ref LL_MDMA_CHANNEL_15
3672 * @retval State of bit (1 or 0).
3673 */
3674 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TEMD(MDMA_TypeDef *MDMAx, uint32_t Channel)
3675 {
3676 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3677
3678 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEMD) == (MDMA_CESR_TEMD)) ? 1UL : 0UL);
3679 }
3680
3681 /**
3682 * @brief Get MDMA Channel x Transfer Error Link Data flag.
3683 * @rmtoll CESR TELD LL_MDMA_IsActiveFlag_TELD
3684 * @param MDMAx MDMAx Instance
3685 * @param Channel This parameter can be one of the following values:
3686 * @arg @ref LL_MDMA_CHANNEL_0
3687 * @arg @ref LL_MDMA_CHANNEL_1
3688 * @arg @ref LL_MDMA_CHANNEL_2
3689 * @arg @ref LL_MDMA_CHANNEL_3
3690 * @arg @ref LL_MDMA_CHANNEL_4
3691 * @arg @ref LL_MDMA_CHANNEL_5
3692 * @arg @ref LL_MDMA_CHANNEL_6
3693 * @arg @ref LL_MDMA_CHANNEL_7
3694 * @arg @ref LL_MDMA_CHANNEL_8
3695 * @arg @ref LL_MDMA_CHANNEL_9
3696 * @arg @ref LL_MDMA_CHANNEL_10
3697 * @arg @ref LL_MDMA_CHANNEL_11
3698 * @arg @ref LL_MDMA_CHANNEL_12
3699 * @arg @ref LL_MDMA_CHANNEL_13
3700 * @arg @ref LL_MDMA_CHANNEL_14
3701 * @arg @ref LL_MDMA_CHANNEL_15
3702 * @retval State of bit (1 or 0).
3703 */
3704 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TELD(MDMA_TypeDef *MDMAx, uint32_t Channel)
3705 {
3706 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3707
3708 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TELD) == (MDMA_CESR_TELD)) ? 1UL : 0UL);
3709 }
3710
3711 /**
3712 * @brief Clear MDMA Channel x Transfer Error interrupt flag.
3713 * @rmtoll CIFCR CTEIF LL_MDMA_ClearFlag_TE
3714 * @param MDMAx MDMAx Instance
3715 * @param Channel This parameter can be one of the following values:
3716 * @arg @ref LL_MDMA_CHANNEL_0
3717 * @arg @ref LL_MDMA_CHANNEL_1
3718 * @arg @ref LL_MDMA_CHANNEL_2
3719 * @arg @ref LL_MDMA_CHANNEL_3
3720 * @arg @ref LL_MDMA_CHANNEL_4
3721 * @arg @ref LL_MDMA_CHANNEL_5
3722 * @arg @ref LL_MDMA_CHANNEL_6
3723 * @arg @ref LL_MDMA_CHANNEL_7
3724 * @arg @ref LL_MDMA_CHANNEL_8
3725 * @arg @ref LL_MDMA_CHANNEL_9
3726 * @arg @ref LL_MDMA_CHANNEL_10
3727 * @arg @ref LL_MDMA_CHANNEL_11
3728 * @arg @ref LL_MDMA_CHANNEL_12
3729 * @arg @ref LL_MDMA_CHANNEL_13
3730 * @arg @ref LL_MDMA_CHANNEL_14
3731 * @arg @ref LL_MDMA_CHANNEL_15
3732 * @retval None
3733 */
3734 __STATIC_INLINE void LL_MDMA_ClearFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3735 {
3736 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3737
3738 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CTEIF);
3739 }
3740
3741 /**
3742 * @brief Clear MDMA Channel x Channel Transfer Complete interrupt flag.
3743 * @rmtoll CIFCR CCTCIF LL_MDMA_ClearFlag_CTC
3744 * @param MDMAx MDMAx Instance
3745 * @param Channel This parameter can be one of the following values:
3746 * @arg @ref LL_MDMA_CHANNEL_0
3747 * @arg @ref LL_MDMA_CHANNEL_1
3748 * @arg @ref LL_MDMA_CHANNEL_2
3749 * @arg @ref LL_MDMA_CHANNEL_3
3750 * @arg @ref LL_MDMA_CHANNEL_4
3751 * @arg @ref LL_MDMA_CHANNEL_5
3752 * @arg @ref LL_MDMA_CHANNEL_6
3753 * @arg @ref LL_MDMA_CHANNEL_7
3754 * @arg @ref LL_MDMA_CHANNEL_8
3755 * @arg @ref LL_MDMA_CHANNEL_9
3756 * @arg @ref LL_MDMA_CHANNEL_10
3757 * @arg @ref LL_MDMA_CHANNEL_11
3758 * @arg @ref LL_MDMA_CHANNEL_12
3759 * @arg @ref LL_MDMA_CHANNEL_13
3760 * @arg @ref LL_MDMA_CHANNEL_14
3761 * @arg @ref LL_MDMA_CHANNEL_15
3762 * @retval None
3763 */
3764 __STATIC_INLINE void LL_MDMA_ClearFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3765 {
3766 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3767
3768 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CCTCIF);
3769 }
3770
3771 /**
3772 * @brief Clear MDMA Channel x Block Repeat Transfer complete interrupt flag.
3773 * @rmtoll CIFCR CBRTIF LL_MDMA_ClearFlag_BRT
3774 * @param MDMAx MDMAx Instance
3775 * @param Channel This parameter can be one of the following values:
3776 * @arg @ref LL_MDMA_CHANNEL_0
3777 * @arg @ref LL_MDMA_CHANNEL_1
3778 * @arg @ref LL_MDMA_CHANNEL_2
3779 * @arg @ref LL_MDMA_CHANNEL_3
3780 * @arg @ref LL_MDMA_CHANNEL_4
3781 * @arg @ref LL_MDMA_CHANNEL_5
3782 * @arg @ref LL_MDMA_CHANNEL_6
3783 * @arg @ref LL_MDMA_CHANNEL_7
3784 * @arg @ref LL_MDMA_CHANNEL_8
3785 * @arg @ref LL_MDMA_CHANNEL_9
3786 * @arg @ref LL_MDMA_CHANNEL_10
3787 * @arg @ref LL_MDMA_CHANNEL_11
3788 * @arg @ref LL_MDMA_CHANNEL_12
3789 * @arg @ref LL_MDMA_CHANNEL_13
3790 * @arg @ref LL_MDMA_CHANNEL_14
3791 * @arg @ref LL_MDMA_CHANNEL_15
3792 * @retval None
3793 */
3794 __STATIC_INLINE void LL_MDMA_ClearFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3795 {
3796 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3797
3798 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBRTIF);
3799 }
3800
3801 /**
3802 * @brief Clear MDMA Channel x Block Transfer complete interrupt flag.
3803 * @rmtoll CIFCR CBTIF LL_MDMA_ClearFlag_BT
3804 * @param MDMAx MDMAx Instance
3805 * @param Channel This parameter can be one of the following values:
3806 * @arg @ref LL_MDMA_CHANNEL_0
3807 * @arg @ref LL_MDMA_CHANNEL_1
3808 * @arg @ref LL_MDMA_CHANNEL_2
3809 * @arg @ref LL_MDMA_CHANNEL_3
3810 * @arg @ref LL_MDMA_CHANNEL_4
3811 * @arg @ref LL_MDMA_CHANNEL_5
3812 * @arg @ref LL_MDMA_CHANNEL_6
3813 * @arg @ref LL_MDMA_CHANNEL_7
3814 * @arg @ref LL_MDMA_CHANNEL_8
3815 * @arg @ref LL_MDMA_CHANNEL_9
3816 * @arg @ref LL_MDMA_CHANNEL_10
3817 * @arg @ref LL_MDMA_CHANNEL_11
3818 * @arg @ref LL_MDMA_CHANNEL_12
3819 * @arg @ref LL_MDMA_CHANNEL_13
3820 * @arg @ref LL_MDMA_CHANNEL_14
3821 * @arg @ref LL_MDMA_CHANNEL_15
3822 * @retval None
3823 */
3824 __STATIC_INLINE void LL_MDMA_ClearFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3825 {
3826 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3827
3828 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBTIF);
3829 }
3830
3831 /**
3832 * @brief Clear MDMA Channel x buffer transfer Complete Interrupt Flag.
3833 * @rmtoll CIFCR CLTCIF LL_MDMA_ClearFlag_TC
3834 * @param MDMAx MDMAx Instance
3835 * @param Channel This parameter can be one of the following values:
3836 * @arg @ref LL_MDMA_CHANNEL_0
3837 * @arg @ref LL_MDMA_CHANNEL_1
3838 * @arg @ref LL_MDMA_CHANNEL_2
3839 * @arg @ref LL_MDMA_CHANNEL_3
3840 * @arg @ref LL_MDMA_CHANNEL_4
3841 * @arg @ref LL_MDMA_CHANNEL_5
3842 * @arg @ref LL_MDMA_CHANNEL_6
3843 * @arg @ref LL_MDMA_CHANNEL_7
3844 * @arg @ref LL_MDMA_CHANNEL_8
3845 * @arg @ref LL_MDMA_CHANNEL_9
3846 * @arg @ref LL_MDMA_CHANNEL_10
3847 * @arg @ref LL_MDMA_CHANNEL_11
3848 * @arg @ref LL_MDMA_CHANNEL_12
3849 * @arg @ref LL_MDMA_CHANNEL_13
3850 * @arg @ref LL_MDMA_CHANNEL_14
3851 * @arg @ref LL_MDMA_CHANNEL_15
3852 * @retval None
3853 */
3854 __STATIC_INLINE void LL_MDMA_ClearFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3855 {
3856 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3857
3858 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CLTCIF);
3859 }
3860
3861 /**
3862 * @}
3863 */
3864
3865 /** @defgroup MDMA_LL_EF_IT_Management IT_Management
3866 * @{
3867 */
3868
3869 /**
3870 * @brief Enable MDMA Channel x Transfer Error interrupt.
3871 * @rmtoll CCR TEIE LL_MDMA_EnableIT_TE
3872 * @param MDMAx MDMAx Instance
3873 * @param Channel This parameter can be one of the following values:
3874 * @arg @ref LL_MDMA_CHANNEL_0
3875 * @arg @ref LL_MDMA_CHANNEL_1
3876 * @arg @ref LL_MDMA_CHANNEL_2
3877 * @arg @ref LL_MDMA_CHANNEL_3
3878 * @arg @ref LL_MDMA_CHANNEL_4
3879 * @arg @ref LL_MDMA_CHANNEL_5
3880 * @arg @ref LL_MDMA_CHANNEL_6
3881 * @arg @ref LL_MDMA_CHANNEL_7
3882 * @arg @ref LL_MDMA_CHANNEL_8
3883 * @arg @ref LL_MDMA_CHANNEL_9
3884 * @arg @ref LL_MDMA_CHANNEL_10
3885 * @arg @ref LL_MDMA_CHANNEL_11
3886 * @arg @ref LL_MDMA_CHANNEL_12
3887 * @arg @ref LL_MDMA_CHANNEL_13
3888 * @arg @ref LL_MDMA_CHANNEL_14
3889 * @arg @ref LL_MDMA_CHANNEL_15
3890 * @retval None
3891 */
3892 __STATIC_INLINE void LL_MDMA_EnableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3893 {
3894 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3895
3896 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE);
3897 }
3898
3899 /**
3900 * @brief Enable MDMA Channel x Channel Transfer Complete interrupt.
3901 * @rmtoll CCR CTCIE LL_MDMA_EnableIT_CTC
3902 * @param MDMAx MDMAx Instance
3903 * @param Channel This parameter can be one of the following values:
3904 * @arg @ref LL_MDMA_CHANNEL_0
3905 * @arg @ref LL_MDMA_CHANNEL_1
3906 * @arg @ref LL_MDMA_CHANNEL_2
3907 * @arg @ref LL_MDMA_CHANNEL_3
3908 * @arg @ref LL_MDMA_CHANNEL_4
3909 * @arg @ref LL_MDMA_CHANNEL_5
3910 * @arg @ref LL_MDMA_CHANNEL_6
3911 * @arg @ref LL_MDMA_CHANNEL_7
3912 * @arg @ref LL_MDMA_CHANNEL_8
3913 * @arg @ref LL_MDMA_CHANNEL_9
3914 * @arg @ref LL_MDMA_CHANNEL_10
3915 * @arg @ref LL_MDMA_CHANNEL_11
3916 * @arg @ref LL_MDMA_CHANNEL_12
3917 * @arg @ref LL_MDMA_CHANNEL_13
3918 * @arg @ref LL_MDMA_CHANNEL_14
3919 * @arg @ref LL_MDMA_CHANNEL_15
3920 * @retval None
3921 */
3922 __STATIC_INLINE void LL_MDMA_EnableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3923 {
3924 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3925
3926 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE);
3927 }
3928
3929 /**
3930 * @brief Enable MDMA Channel x Block Repeat Transfer interrupt.
3931 * @rmtoll CCR BRTIE LL_MDMA_EnableIT_BRT
3932 * @param MDMAx MDMAx Instance
3933 * @param Channel This parameter can be one of the following values:
3934 * @arg @ref LL_MDMA_CHANNEL_0
3935 * @arg @ref LL_MDMA_CHANNEL_1
3936 * @arg @ref LL_MDMA_CHANNEL_2
3937 * @arg @ref LL_MDMA_CHANNEL_3
3938 * @arg @ref LL_MDMA_CHANNEL_4
3939 * @arg @ref LL_MDMA_CHANNEL_5
3940 * @arg @ref LL_MDMA_CHANNEL_6
3941 * @arg @ref LL_MDMA_CHANNEL_7
3942 * @arg @ref LL_MDMA_CHANNEL_8
3943 * @arg @ref LL_MDMA_CHANNEL_9
3944 * @arg @ref LL_MDMA_CHANNEL_10
3945 * @arg @ref LL_MDMA_CHANNEL_11
3946 * @arg @ref LL_MDMA_CHANNEL_12
3947 * @arg @ref LL_MDMA_CHANNEL_13
3948 * @arg @ref LL_MDMA_CHANNEL_14
3949 * @arg @ref LL_MDMA_CHANNEL_15
3950 * @retval None
3951 */
3952 __STATIC_INLINE void LL_MDMA_EnableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3953 {
3954 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3955
3956 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE);
3957 }
3958
3959 /**
3960 * @brief Enable MDMA Channel x Block Transfer interrupt.
3961 * @rmtoll CCR BTIE LL_MDMA_EnableIT_BT
3962 * @param MDMAx MDMAx Instance
3963 * @param Channel This parameter can be one of the following values:
3964 * @arg @ref LL_MDMA_CHANNEL_0
3965 * @arg @ref LL_MDMA_CHANNEL_1
3966 * @arg @ref LL_MDMA_CHANNEL_2
3967 * @arg @ref LL_MDMA_CHANNEL_3
3968 * @arg @ref LL_MDMA_CHANNEL_4
3969 * @arg @ref LL_MDMA_CHANNEL_5
3970 * @arg @ref LL_MDMA_CHANNEL_6
3971 * @arg @ref LL_MDMA_CHANNEL_7
3972 * @arg @ref LL_MDMA_CHANNEL_8
3973 * @arg @ref LL_MDMA_CHANNEL_9
3974 * @arg @ref LL_MDMA_CHANNEL_10
3975 * @arg @ref LL_MDMA_CHANNEL_11
3976 * @arg @ref LL_MDMA_CHANNEL_12
3977 * @arg @ref LL_MDMA_CHANNEL_13
3978 * @arg @ref LL_MDMA_CHANNEL_14
3979 * @arg @ref LL_MDMA_CHANNEL_15
3980 * @retval None
3981 */
3982 __STATIC_INLINE void LL_MDMA_EnableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3983 {
3984 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3985
3986 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE);
3987 }
3988
3989 /**
3990 * @brief Enable MDMA Channel x buffer transfer complete interrupt.
3991 * @rmtoll CCR TCIE LL_MDMA_EnableIT_TC
3992 * @param MDMAx MDMAx Instance
3993 * @param Channel This parameter can be one of the following values:
3994 * @arg @ref LL_MDMA_CHANNEL_0
3995 * @arg @ref LL_MDMA_CHANNEL_1
3996 * @arg @ref LL_MDMA_CHANNEL_2
3997 * @arg @ref LL_MDMA_CHANNEL_3
3998 * @arg @ref LL_MDMA_CHANNEL_4
3999 * @arg @ref LL_MDMA_CHANNEL_5
4000 * @arg @ref LL_MDMA_CHANNEL_6
4001 * @arg @ref LL_MDMA_CHANNEL_7
4002 * @arg @ref LL_MDMA_CHANNEL_8
4003 * @arg @ref LL_MDMA_CHANNEL_9
4004 * @arg @ref LL_MDMA_CHANNEL_10
4005 * @arg @ref LL_MDMA_CHANNEL_11
4006 * @arg @ref LL_MDMA_CHANNEL_12
4007 * @arg @ref LL_MDMA_CHANNEL_13
4008 * @arg @ref LL_MDMA_CHANNEL_14
4009 * @arg @ref LL_MDMA_CHANNEL_15
4010 * @retval None
4011 */
4012 __STATIC_INLINE void LL_MDMA_EnableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4013 {
4014 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4015
4016 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE);
4017 }
4018
4019 /**
4020 * @brief Disable MDMA Channel x Transfer Error interrupt.
4021 * @rmtoll CCR TEIE LL_MDMA_DisableIT_TE
4022 * @param MDMAx MDMAx Instance
4023 * @param Channel This parameter can be one of the following values:
4024 * @arg @ref LL_MDMA_CHANNEL_0
4025 * @arg @ref LL_MDMA_CHANNEL_1
4026 * @arg @ref LL_MDMA_CHANNEL_2
4027 * @arg @ref LL_MDMA_CHANNEL_3
4028 * @arg @ref LL_MDMA_CHANNEL_4
4029 * @arg @ref LL_MDMA_CHANNEL_5
4030 * @arg @ref LL_MDMA_CHANNEL_6
4031 * @arg @ref LL_MDMA_CHANNEL_7
4032 * @arg @ref LL_MDMA_CHANNEL_8
4033 * @arg @ref LL_MDMA_CHANNEL_9
4034 * @arg @ref LL_MDMA_CHANNEL_10
4035 * @arg @ref LL_MDMA_CHANNEL_11
4036 * @arg @ref LL_MDMA_CHANNEL_12
4037 * @arg @ref LL_MDMA_CHANNEL_13
4038 * @arg @ref LL_MDMA_CHANNEL_14
4039 * @arg @ref LL_MDMA_CHANNEL_15
4040 * @retval None
4041 */
4042 __STATIC_INLINE void LL_MDMA_DisableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
4043 {
4044 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4045
4046 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE);
4047 }
4048
4049 /**
4050 * @brief Disable MDMA Channel x Channel Transfer Complete interrupt.
4051 * @rmtoll CCR CTCIE LL_MDMA_DisableIT_CTC
4052 * @param MDMAx MDMAx Instance
4053 * @param Channel This parameter can be one of the following values:
4054 * @arg @ref LL_MDMA_CHANNEL_0
4055 * @arg @ref LL_MDMA_CHANNEL_1
4056 * @arg @ref LL_MDMA_CHANNEL_2
4057 * @arg @ref LL_MDMA_CHANNEL_3
4058 * @arg @ref LL_MDMA_CHANNEL_4
4059 * @arg @ref LL_MDMA_CHANNEL_5
4060 * @arg @ref LL_MDMA_CHANNEL_6
4061 * @arg @ref LL_MDMA_CHANNEL_7
4062 * @arg @ref LL_MDMA_CHANNEL_8
4063 * @arg @ref LL_MDMA_CHANNEL_9
4064 * @arg @ref LL_MDMA_CHANNEL_10
4065 * @arg @ref LL_MDMA_CHANNEL_11
4066 * @arg @ref LL_MDMA_CHANNEL_12
4067 * @arg @ref LL_MDMA_CHANNEL_13
4068 * @arg @ref LL_MDMA_CHANNEL_14
4069 * @arg @ref LL_MDMA_CHANNEL_15
4070 * @retval None
4071 */
4072 __STATIC_INLINE void LL_MDMA_DisableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4073 {
4074 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4075
4076 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE);
4077 }
4078
4079 /**
4080 * @brief Disable MDMA Channel x Block Repeat Transfer interrupt.
4081 * @rmtoll CCR BRTIE LL_MDMA_DisableIT_BRT
4082 * @param MDMAx MDMAx Instance
4083 * @param Channel This parameter can be one of the following values:
4084 * @arg @ref LL_MDMA_CHANNEL_0
4085 * @arg @ref LL_MDMA_CHANNEL_1
4086 * @arg @ref LL_MDMA_CHANNEL_2
4087 * @arg @ref LL_MDMA_CHANNEL_3
4088 * @arg @ref LL_MDMA_CHANNEL_4
4089 * @arg @ref LL_MDMA_CHANNEL_5
4090 * @arg @ref LL_MDMA_CHANNEL_6
4091 * @arg @ref LL_MDMA_CHANNEL_7
4092 * @arg @ref LL_MDMA_CHANNEL_8
4093 * @arg @ref LL_MDMA_CHANNEL_9
4094 * @arg @ref LL_MDMA_CHANNEL_10
4095 * @arg @ref LL_MDMA_CHANNEL_11
4096 * @arg @ref LL_MDMA_CHANNEL_12
4097 * @arg @ref LL_MDMA_CHANNEL_13
4098 * @arg @ref LL_MDMA_CHANNEL_14
4099 * @arg @ref LL_MDMA_CHANNEL_15
4100 * @retval None
4101 */
4102 __STATIC_INLINE void LL_MDMA_DisableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4103 {
4104 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4105
4106 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE);
4107 }
4108
4109 /**
4110 * @brief Disable MDMA Channel x Block Transfer interrupt.
4111 * @rmtoll CCR BTIE LL_MDMA_DisableIT_BT
4112 * @param MDMAx MDMAx Instance
4113 * @param Channel This parameter can be one of the following values:
4114 * @arg @ref LL_MDMA_CHANNEL_0
4115 * @arg @ref LL_MDMA_CHANNEL_1
4116 * @arg @ref LL_MDMA_CHANNEL_2
4117 * @arg @ref LL_MDMA_CHANNEL_3
4118 * @arg @ref LL_MDMA_CHANNEL_4
4119 * @arg @ref LL_MDMA_CHANNEL_5
4120 * @arg @ref LL_MDMA_CHANNEL_6
4121 * @arg @ref LL_MDMA_CHANNEL_7
4122 * @arg @ref LL_MDMA_CHANNEL_8
4123 * @arg @ref LL_MDMA_CHANNEL_9
4124 * @arg @ref LL_MDMA_CHANNEL_10
4125 * @arg @ref LL_MDMA_CHANNEL_11
4126 * @arg @ref LL_MDMA_CHANNEL_12
4127 * @arg @ref LL_MDMA_CHANNEL_13
4128 * @arg @ref LL_MDMA_CHANNEL_14
4129 * @arg @ref LL_MDMA_CHANNEL_15
4130 * @retval None
4131 */
4132 __STATIC_INLINE void LL_MDMA_DisableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4133 {
4134 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4135
4136 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE);
4137 }
4138
4139 /**
4140 * @brief Disable MDMA Channel x buffer transfer complete interrupt.
4141 * @rmtoll CCR TCIE LL_MDMA_DisableIT_TC
4142 * @param MDMAx MDMAx Instance
4143 * @param Channel This parameter can be one of the following values:
4144 * @arg @ref LL_MDMA_CHANNEL_0
4145 * @arg @ref LL_MDMA_CHANNEL_1
4146 * @arg @ref LL_MDMA_CHANNEL_2
4147 * @arg @ref LL_MDMA_CHANNEL_3
4148 * @arg @ref LL_MDMA_CHANNEL_4
4149 * @arg @ref LL_MDMA_CHANNEL_5
4150 * @arg @ref LL_MDMA_CHANNEL_6
4151 * @arg @ref LL_MDMA_CHANNEL_7
4152 * @arg @ref LL_MDMA_CHANNEL_8
4153 * @arg @ref LL_MDMA_CHANNEL_9
4154 * @arg @ref LL_MDMA_CHANNEL_10
4155 * @arg @ref LL_MDMA_CHANNEL_11
4156 * @arg @ref LL_MDMA_CHANNEL_12
4157 * @arg @ref LL_MDMA_CHANNEL_13
4158 * @arg @ref LL_MDMA_CHANNEL_14
4159 * @arg @ref LL_MDMA_CHANNEL_15
4160 * @retval None
4161 */
4162 __STATIC_INLINE void LL_MDMA_DisableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4163 {
4164 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4165
4166 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE);
4167 }
4168
4169 /**
4170 * @brief Check if MDMA Channel x Transfer Error interrupt is enabled.
4171 * @rmtoll CCR TEIE LL_MDMA_IsEnabledIT_TE
4172 * @param MDMAx MDMAx Instance
4173 * @param Channel This parameter can be one of the following values:
4174 * @arg @ref LL_MDMA_CHANNEL_0
4175 * @arg @ref LL_MDMA_CHANNEL_1
4176 * @arg @ref LL_MDMA_CHANNEL_2
4177 * @arg @ref LL_MDMA_CHANNEL_3
4178 * @arg @ref LL_MDMA_CHANNEL_4
4179 * @arg @ref LL_MDMA_CHANNEL_5
4180 * @arg @ref LL_MDMA_CHANNEL_6
4181 * @arg @ref LL_MDMA_CHANNEL_7
4182 * @arg @ref LL_MDMA_CHANNEL_8
4183 * @arg @ref LL_MDMA_CHANNEL_9
4184 * @arg @ref LL_MDMA_CHANNEL_10
4185 * @arg @ref LL_MDMA_CHANNEL_11
4186 * @arg @ref LL_MDMA_CHANNEL_12
4187 * @arg @ref LL_MDMA_CHANNEL_13
4188 * @arg @ref LL_MDMA_CHANNEL_14
4189 * @arg @ref LL_MDMA_CHANNEL_15
4190 * @retval State of bit (1 or 0).
4191 */
4192 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
4193 {
4194 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4195
4196 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE) == MDMA_CCR_TEIE) ? 1UL : 0UL);
4197 }
4198
4199 /**
4200 * @brief Check if MDMA Channel x Channel Transfer Complete interrupt is enabled.
4201 * @rmtoll CCR CTCIE LL_MDMA_IsEnabledIT_CTC
4202 * @param MDMAx MDMAx Instance
4203 * @param Channel This parameter can be one of the following values:
4204 * @arg @ref LL_MDMA_CHANNEL_0
4205 * @arg @ref LL_MDMA_CHANNEL_1
4206 * @arg @ref LL_MDMA_CHANNEL_2
4207 * @arg @ref LL_MDMA_CHANNEL_3
4208 * @arg @ref LL_MDMA_CHANNEL_4
4209 * @arg @ref LL_MDMA_CHANNEL_5
4210 * @arg @ref LL_MDMA_CHANNEL_6
4211 * @arg @ref LL_MDMA_CHANNEL_7
4212 * @arg @ref LL_MDMA_CHANNEL_8
4213 * @arg @ref LL_MDMA_CHANNEL_9
4214 * @arg @ref LL_MDMA_CHANNEL_10
4215 * @arg @ref LL_MDMA_CHANNEL_11
4216 * @arg @ref LL_MDMA_CHANNEL_12
4217 * @arg @ref LL_MDMA_CHANNEL_13
4218 * @arg @ref LL_MDMA_CHANNEL_14
4219 * @arg @ref LL_MDMA_CHANNEL_15
4220 * @retval State of bit (1 or 0).
4221 */
4222 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4223 {
4224 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4225
4226 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE) == MDMA_CCR_CTCIE) ? 1UL : 0UL);
4227 }
4228
4229 /**
4230 * @brief Check if MDMA Channel x Block Repeat Transfer complete interrupt is enabled.
4231 * @rmtoll CCR BRTIE LL_MDMA_IsEnabledIT_BRT
4232 * @param MDMAx MDMAx Instance
4233 * @param Channel This parameter can be one of the following values:
4234 * @arg @ref LL_MDMA_CHANNEL_0
4235 * @arg @ref LL_MDMA_CHANNEL_1
4236 * @arg @ref LL_MDMA_CHANNEL_2
4237 * @arg @ref LL_MDMA_CHANNEL_3
4238 * @arg @ref LL_MDMA_CHANNEL_4
4239 * @arg @ref LL_MDMA_CHANNEL_5
4240 * @arg @ref LL_MDMA_CHANNEL_6
4241 * @arg @ref LL_MDMA_CHANNEL_7
4242 * @arg @ref LL_MDMA_CHANNEL_8
4243 * @arg @ref LL_MDMA_CHANNEL_9
4244 * @arg @ref LL_MDMA_CHANNEL_10
4245 * @arg @ref LL_MDMA_CHANNEL_11
4246 * @arg @ref LL_MDMA_CHANNEL_12
4247 * @arg @ref LL_MDMA_CHANNEL_13
4248 * @arg @ref LL_MDMA_CHANNEL_14
4249 * @arg @ref LL_MDMA_CHANNEL_15
4250 * @retval State of bit (1 or 0).
4251 */
4252 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4253 {
4254 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4255
4256 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE) == MDMA_CCR_BRTIE) ? 1UL : 0UL);
4257 }
4258
4259 /**
4260 * @brief Check if MDMA Channel x Block Transfer interrupt is enabled.
4261 * @rmtoll CCR BTIE LL_MDMA_IsEnabledIT_BT
4262 * @param MDMAx MDMAx Instance
4263 * @param Channel This parameter can be one of the following values:
4264 * @arg @ref LL_MDMA_CHANNEL_0
4265 * @arg @ref LL_MDMA_CHANNEL_1
4266 * @arg @ref LL_MDMA_CHANNEL_2
4267 * @arg @ref LL_MDMA_CHANNEL_3
4268 * @arg @ref LL_MDMA_CHANNEL_4
4269 * @arg @ref LL_MDMA_CHANNEL_5
4270 * @arg @ref LL_MDMA_CHANNEL_6
4271 * @arg @ref LL_MDMA_CHANNEL_7
4272 * @arg @ref LL_MDMA_CHANNEL_8
4273 * @arg @ref LL_MDMA_CHANNEL_9
4274 * @arg @ref LL_MDMA_CHANNEL_10
4275 * @arg @ref LL_MDMA_CHANNEL_11
4276 * @arg @ref LL_MDMA_CHANNEL_12
4277 * @arg @ref LL_MDMA_CHANNEL_13
4278 * @arg @ref LL_MDMA_CHANNEL_14
4279 * @arg @ref LL_MDMA_CHANNEL_15
4280 * @retval State of bit (1 or 0).
4281 */
4282 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4283 {
4284 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4285
4286 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE) == MDMA_CCR_BTIE) ? 1UL : 0UL);
4287 }
4288
4289 /**
4290 * @brief Check if MDMA Channel x buffer transfer complete interrupt is enabled.
4291 * @rmtoll CCR TCIE LL_MDMA_IsEnabledIT_TC
4292 * @param MDMAx MDMAx Instance
4293 * @param Channel This parameter can be one of the following values:
4294 * @arg @ref LL_MDMA_CHANNEL_0
4295 * @arg @ref LL_MDMA_CHANNEL_1
4296 * @arg @ref LL_MDMA_CHANNEL_2
4297 * @arg @ref LL_MDMA_CHANNEL_3
4298 * @arg @ref LL_MDMA_CHANNEL_4
4299 * @arg @ref LL_MDMA_CHANNEL_5
4300 * @arg @ref LL_MDMA_CHANNEL_6
4301 * @arg @ref LL_MDMA_CHANNEL_7
4302 * @arg @ref LL_MDMA_CHANNEL_8
4303 * @arg @ref LL_MDMA_CHANNEL_9
4304 * @arg @ref LL_MDMA_CHANNEL_10
4305 * @arg @ref LL_MDMA_CHANNEL_11
4306 * @arg @ref LL_MDMA_CHANNEL_12
4307 * @arg @ref LL_MDMA_CHANNEL_13
4308 * @arg @ref LL_MDMA_CHANNEL_14
4309 * @arg @ref LL_MDMA_CHANNEL_15
4310 * @retval State of bit (1 or 0).
4311 */
4312 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4313 {
4314 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4315
4316 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE) == MDMA_CCR_TCIE) ? 1UL : 0UL);
4317 }
4318
4319 /**
4320 * @}
4321 */
4322
4323 #if defined(USE_FULL_LL_DRIVER)
4324 /** @defgroup MDMA_LL_EF_Init Initialization and de-initialization functions
4325 * @{
4326 */
4327
4328 uint32_t LL_MDMA_Init(MDMA_TypeDef *MDMAx, uint32_t Channel, LL_MDMA_InitTypeDef *MDMA_InitStruct);
4329 uint32_t LL_MDMA_DeInit(MDMA_TypeDef *MDMAx, uint32_t Channel);
4330 void LL_MDMA_StructInit(LL_MDMA_InitTypeDef *MDMA_InitStruct);
4331 void LL_MDMA_CreateLinkNode(LL_MDMA_InitTypeDef *MDMA_InitStruct, LL_MDMA_LinkNodeTypeDef *pNode);
4332 void LL_MDMA_ConnectLinkNode(LL_MDMA_LinkNodeTypeDef *pPrevLinkNode, LL_MDMA_LinkNodeTypeDef *pNewLinkNode);
4333 void LL_MDMA_DisconnectNextLinkNode(LL_MDMA_LinkNodeTypeDef *pLinkNode);
4334
4335 /**
4336 * @}
4337 */
4338 #endif /* USE_FULL_LL_DRIVER */
4339
4340 /**
4341 * @}
4342 */
4343
4344 /**
4345 * @}
4346 */
4347
4348 #endif /* MDMA */
4349
4350 /**
4351 * @}
4352 */
4353
4354 #ifdef __cplusplus
4355 }
4356 #endif
4357
4358 #endif /* STM32H7xx_LL_MDMA_H */
4359
4360 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/