lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_utils.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_ll_utils.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of UTILS LL module.
   6   @verbatim
   7   ==============================================================================
   8                      ##### How to use this driver #####
   9   ==============================================================================
  10     [..]
  11     The LL UTILS driver contains a set of generic APIs that can be
  12     used by user:
  13       (+) Device electronic signature
  14       (+) Timing functions
  15       (+) PLL configuration functions
  16
  17   @endverbatim
  18   ******************************************************************************
  19   * @attention
  20   *
  21   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  22   * All rights reserved.</center></h2>
  23   *
  24   * This software component is licensed by ST under BSD 3-Clause license,
  25   * the "License"; You may not use this file except in compliance with the
  26   * License. You may obtain a copy of the License at:
  27   *                        opensource.org/licenses/BSD-3-Clause
  28   *
  29   ******************************************************************************
  30   */
  31
  32 /* Define to prevent recursive inclusion -------------------------------------*/
  33 #ifndef STM32H7xx_LL_UTILS_H
  34 #define STM32H7xx_LL_UTILS_H
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 /* Includes ------------------------------------------------------------------*/
  41 #include "stm32h7xx.h"
  42 #include "stm32h7xx_ll_system.h"
  43 #include "stm32h7xx_ll_bus.h"
  44
  45 /** @addtogroup STM32H7xx_LL_Driver
  46   * @{
  47   */
  48
  49 /** @defgroup UTILS_LL UTILS
  50   * @{
  51   */
  52
  53 /* Private types -------------------------------------------------------------*/
  54 /* Private variables ---------------------------------------------------------*/
  55
  56 /* Private constants ---------------------------------------------------------*/
  57 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
  58   * @{
  59   */
  60
  61 /* Max delay can be used in LL_mDelay */
  62 #define LL_MAX_DELAY                  0xFFFFFFFFU
  63
  64 /**
  65  * @brief Unique device ID register base address
  66  */
  67 #define UID_BASE_ADDRESS              UID_BASE
  68
  69 /**
  70  * @brief Flash size data register base address
  71  */
  72 #define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
  73
  74 /**
  75  * @brief Package data register base address
  76  */
  77 #define PACKAGE_BASE_ADDRESS          PACKAGE_BASE
  78
  79 /**
  80   * @}
  81   */
  82
  83 /* Private macros ------------------------------------------------------------*/
  84 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
  85   * @{
  86   */
  87 /**
  88   * @}
  89   */
  90 /* Exported types ------------------------------------------------------------*/
  91 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
  92   * @{
  93   */
  94 /**
  95   * @brief  UTILS PLL structure definition
  96   */
  97 typedef struct
  98 {
  99   uint32_t PLLM;   /*!< Division factor for PLL VCO input clock.
 100                         This parameter must be a number between Min_Data = 0 and Max_Data = 63
 101
 102                         This feature can be modified afterwards using unitary function
 103                         @ref LL_RCC_PLL1_SetM(). */
 104
 105   uint32_t PLLN;   /*!< Multiplication factor for PLL VCO output clock.
 106                         This parameter must be a number between Min_Data = 4 and Max_Data = 512
 107
 108                         This feature can be modified afterwards using unitary function
 109                         @ref LL_RCC_PLL1_SetN(). */
 110
 111   uint32_t PLLP;   /*!< Division for the main system clock.
 112                         This parameter must be a number between Min_Data = 2 and Max_Data = 128
 113                           odd division factors are not allowed
 114
 115                         This feature can be modified afterwards using unitary function
 116                         @ref LL_RCC_PLL1_SetP(). */
 117
 118   uint32_t FRACN;  /*!< Fractional part of the multiplication factor for PLL VCO.
 119                         This parameter can be a value between 0 and 8191
 120
 121                         This feature can be modified afterwards using unitary function
 122                         @ref LL_RCC_PLL1_SetFRACN(). */
 123
 124   uint32_t VCO_Input;  /*!< PLL clock Input range.
 125                         This parameter can be a value of @ref RCC_LL_EC_PLLINPUTRANGE
 126
 127                         This feature can be modified afterwards using unitary function
 128                         @ref LL_RCC_PLL1_SetVCOInputRange(). */
 129
 130   uint32_t VCO_Output;  /*!< PLL clock Output range.
 131                         This parameter can be a value of @ref RCC_LL_EC_PLLVCORANGE
 132
 133                       This feature can be modified afterwards using unitary function
 134                       @ref LL_RCC_PLL1_SetVCOOutputRange(). */
 135
 136 } LL_UTILS_PLLInitTypeDef;
 137
 138 /**
 139   * @brief  UTILS System, AHB and APB buses clock configuration structure definition
 140   */
 141 typedef struct
 142 {
 143   uint32_t SYSCLKDivider;         /*!< The System clock (SYSCLK) divider. This clock is derived from the PLL output.
 144                                      This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
 145
 146                                      This feature can be modified afterwards using unitary function
 147                                      @ref LL_RCC_SetSysPrescaler(). */
 148
 149   uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
 150                                        This parameter can be a value of @ref RCC_LL_EC_AHB_DIV
 151
 152                                        This feature can be modified afterwards using unitary function
 153                                        @ref LL_RCC_SetAHBPrescaler(). */
 154
 155   uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
 156                                        This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
 157
 158                                        This feature can be modified afterwards using unitary function
 159                                        @ref LL_RCC_SetAPB1Prescaler(). */
 160
 161   uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
 162                                        This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
 163
 164                                        This feature can be modified afterwards using unitary function
 165                                        @ref LL_RCC_SetAPB2Prescaler(). */
 166
 167   uint32_t APB3CLKDivider;        /*!< The APB2 clock (PCLK3) divider. This clock is derived from the AHB clock (HCLK).
 168                                        This parameter can be a value of @ref RCC_LL_EC_APB3_DIV
 169
 170                                        This feature can be modified afterwards using unitary function
 171                                        @ref LL_RCC_SetAPB3Prescaler(). */
 172
 173   uint32_t APB4CLKDivider;        /*!< The APB4 clock (PCLK4) divider. This clock is derived from the AHB clock (HCLK).
 174                                        This parameter can be a value of @ref RCC_LL_EC_APB4_DIV
 175
 176                                        This feature can be modified afterwards using unitary function
 177                                        @ref LL_RCC_SetAPB4Prescaler(). */
 178
 179 } LL_UTILS_ClkInitTypeDef;
 180
 181 /**
 182   * @}
 183   */
 184
 185 /* Exported constants --------------------------------------------------------*/
 186 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
 187   * @{
 188   */
 189
 190 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
 191   * @{
 192   */
 193 #define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
 194 #define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
 195 /**
 196   * @}
 197   */
 198
 199 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
 200   * @{
 201   */
 202 #if (STM32H7_DEV_ID == 0x450UL)
 203 #define LL_UTILS_PACKAGETYPE_LQFP100            LL_SYSCFG_LQFP100_PACKAGE          /*!< LQFP100 package type             */
 204 #define LL_UTILS_PACKAGETYPE_TQFP144            LL_SYSCFG_TQFP144_PACKAGE          /*!< TQFP144 package type             */
 205 #define LL_UTILS_PACKAGETYPE_TQFP176_UFBGA176   LL_SYSCFG_TQFP176_UFBGA176_PACKAGE /*!< TQFP176 or UFBGA176 package type */
 206 #define LL_UTILS_PACKAGETYPE_LQFP208_TFBGA240   LL_SYSCFG_LQFP208_TFBGA240_PACKAGE /*!< LQFP208 or TFBGA240 package type */
 207 #elif (STM32H7_DEV_ID == 0x480UL)
 208 #define LL_UTILS_PACKAGETYPE_LQFP64                  0x00000000UL                  /*!< LQFP64 package type              */
 209 #define LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100        0x00000001UL                  /*!< TFBGA100 or LQFP100 package type */
 210 #define LL_UTILS_PACKAGETYPE_LQFP100_SMPS            0x00000002UL                  /*!< LQFP100  with SMPS package type  */
 211 #define LL_UTILS_PACKAGETYPE_TFBGA100_SMPS           0x00000003UL                  /*!< TFBGA100 with SMPS package type  */
 212 #define LL_UTILS_PACKAGETYPE_WLCSP132_SMPS           0x00000004UL                  /*!< WLCSP132 package type            */
 213 #define LL_UTILS_PACKAGETYPE_LQFP144                 0x00000005UL                  /*!< LQFP144 package type             */
 214 #define LL_UTILS_PACKAGETYPE_LQFP144_SMPS            0x00000006UL                  /*!< LQFP144 with SMPS package type   */
 215 #define LL_UTILS_PACKAGETYPE_UFBGA169                0x00000007UL                  /*!< UFBGA169 package type            */
 216 #define LL_UTILS_PACKAGETYPE_UFBGA176_LQFP176        0x00000008UL                  /*!< UFBGA176 or LQFP176 package type */
 217 #define LL_UTILS_PACKAGETYPE_LQFP176_SMPS            0x00000009UL                  /*!< LQFP176 with SMPS package type   */
 218 #define LL_UTILS_PACKAGETYPE_UFBGA176_SMPS           0x0000000AUL                  /*!< UFBGA176 with SMPS package type  */
 219 #define LL_UTILS_PACKAGETYPE_TFBGA216                0x0000000CUL                  /*!< TFBGA216  package type           */
 220 #define LL_UTILS_PACKAGETYPE_TFBGA225                0x0000000EUL                  /*!< TFBGA225  package type           */
 221 #elif (STM32H7_DEV_ID == 0x483UL)
 222 #define LL_UTILS_PACKAGETYPE_VFQFPN68_INDUS         LL_SYSCFG_VFQFPN68_INDUS_PACKAGE         /*!< VFQFPN68 Industrial package type */
 223 #define LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100       LL_SYSCFG_TFBGA100_LQFP100_PACKAGE       /*!< TFBGA100 or LQFP100 Legacy package type */
 224 #define LL_UTILS_PACKAGETYPE_LQFP100_INDUS          LL_SYSCFG_LQFP100_INDUS_PACKAGE          /*!< LQFP100 Industrial package type  */
 225 #define LL_UTILS_PACKAGETYPE_TFBGA100_INDUS         LL_SYSCFG_TFBGA100_INDUS_PACKAGE         /*!< TFBGA100 Industrial package type */
 226 #define LL_UTILS_PACKAGETYPE_WLCSP115_INDUS         LL_SYSCFG_WLCSP115_INDUS_PACKAGE         /*!< WLCSP115 Industrial package type */
 227 #define LL_UTILS_PACKAGETYPE_LQFP144                LL_SYSCFG_LQFP144_PACKAGE                /*!< LQFP144 Legacy package type      */
 228 #define LL_UTILS_PACKAGETYPE_UFBGA144               LL_SYSCFG_UFBGA144_PACKAGE               /*!< UFBGA144 Legacy package type     */
 229 #define LL_UTILS_PACKAGETYPE_LQFP144_INDUS          LL_SYSCFG_LQFP144_INDUS_PACKAGE          /*!< LQFP144 Industrial package type  */
 230 #define LL_UTILS_PACKAGETYPE_UFBGA169_INDUS         LL_SYSCFG_UFBGA169_INDUS_PACKAGE         /*!< UFBGA169 Industrial package type */
 231 #define LL_UTILS_PACKAGETYPE_UFBGA176PLUS25_INDUS   LL_SYSCFG_UFBGA176PLUS25_INDUS_PACKAGE   /*!< UFBGA176+25 Industrial package type   */
 232 #define LL_UTILS_PACKAGETYPE_LQFP176_INDUS          LL_SYSCFG_LQFP176_INDUS_PACKAGE          /*!< LQFP176 Industrial package type  */
 233 #endif /* STM32H7_DEV_ID == 0x450UL */
 234 /**
 235   * @}
 236   */
 237
 238 /**
 239   * @}
 240   */
 241
 242 /* Exported macro ------------------------------------------------------------*/
 243
 244 /* Exported functions --------------------------------------------------------*/
 245 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
 246   * @{
 247   */
 248
 249 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
 250   * @{
 251   */
 252
 253 /**
 254   * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
 255   * @retval UID[31:0]
 256   */
 257 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
 258 {
 259   return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
 260 }
 261
 262 /**
 263   * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
 264   * @retval UID[63:32]
 265   */
 266 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
 267 {
 268   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
 269 }
 270
 271 /**
 272   * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
 273   * @retval UID[95:64]
 274   */
 275 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
 276 {
 277   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
 278 }
 279
 280 /**
 281   * @brief  Get Flash memory size
 282   * @note   This bitfield indicates the size of the device Flash memory expressed in
 283   *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
 284   * @retval FLASH_SIZE[15:0]: Flash memory size
 285   */
 286 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
 287 {
 288   return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
 289 }
 290
 291 /**
 292   * @brief  Get Package type
 293   * @retval Returned value can be one of the following values:
 294   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
 295   *         @arg @ref LL_UTILS_PACKAGETYPE_TQFP144
 296   *         @arg @ref LL_UTILS_PACKAGETYPE_TQFP176_UFBGA176
 297   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP208_TFBGA240
 298   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP64 (*)
 299   *         @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100  (*)
 300   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_SMPS  (*)
 301   *         @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_SMPS  (*)
 302   *         @arg @ref LL_UTILS_PACKAGETYPE_WLCSP132_SMPS  (*)
 303   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP144     (*)
 304   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_SMPS (*)
 305   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169  (*)
 306   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176_LQFP176  (*)
 307   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_SMPS    (*)
 308   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176_SMPS   (*)
 309   *         @arg @ref LL_UTILS_PACKAGETYPE_TFBGA216   (*)
 310   *         @arg @ref LL_UTILS_PACKAGETYPE_TFBGA225   (*)
 311   *         @arg @ref LL_UTILS_PACKAGETYPE_VFQFPN68_INDUS   (*)
 312   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_INDUS   (*)
 313   *         @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_INDUS   (*)
 314   *         @arg @ref LL_UTILS_PACKAGETYPE_WLCSP115_INDUS   (*)
 315   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA144   (*)
 316   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_INDUS   (*)
 317   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169_INDUS   (*)
 318   *         @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176+25_INDUS   (*)
 319   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_INDUS   (*)
 320   *
 321   *        (*) Packages available on some STM32H7 lines only.
 322   * @note   For some SM32H7 lines, enabling the SYSCFG clock is mandatory.
 323             the SYSCFG clock enabling is ensured by LL_APB4_GRP1_EnableClock
 324   */
 325 __STATIC_INLINE uint32_t LL_GetPackageType(void)
 326 {
 327 #if defined(SYSCFG_PKGR_PKG)
 328
 329   return LL_SYSCFG_GetPackage();
 330 #else
 331    return (uint16_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)));
 332
 333 #endif  /* SYSCFG_PKGR_PKG */
 334 }
 335
 336 /**
 337   * @}
 338   */
 339
 340 /** @defgroup UTILS_LL_EF_DELAY DELAY
 341   * @{
 342   */
 343
 344 /**
 345   * @brief  This function configures the Cortex-M SysTick source of the time base.
 346   * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
 347   * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
 348   *         configuration by calling this function, for a delay use rather osDelay RTOS service.
 349   * @param  Ticks Number of ticks
 350   * @retval None
 351   */
 352 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 353 {
 354   /* Configure the SysTick to have interrupt in 1ms time base */
 355   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
 356   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
 357   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 358                    SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
 359 }
 360
 361 void        LL_Init1msTick(uint32_t CPU_Frequency);
 362 void        LL_mDelay(uint32_t Delay);
 363
 364 /**
 365   * @}
 366   */
 367
 368 /** @defgroup UTILS_EF_SYSTEM SYSTEM
 369   * @{
 370   */
 371
 372 void        LL_SetSystemCoreClock(uint32_t CPU_Frequency);
 373 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 374                                          LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 375 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency,
 376                                          uint32_t HSEBypass,
 377                                          LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 378                                          LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 379 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
 380
 381 /**
 382   * @}
 383   */
 384
 385 /**
 386   * @}
 387   */
 388
 389 /**
 390   * @}
 391   */
 392
 393 /**
 394   * @}
 395   */
 396
 397 #ifdef __cplusplus
 398 }
 399 #endif
 400
 401 #endif /* STM32H7xx_LL_UTILS_H */
 402
 403 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/