2 ******************************************************************************
4 * @author MCD Application Team
6 * @date 09-November-2015
7 * @brief hardware registers
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
13 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 * You may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at:
17 * http://www.st.com/software_license_agreement_liberty_v2
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
25 ******************************************************************************
28 /* Define to prevent recursive inclusion -------------------------------------*/
29 #ifndef __USB_OTG_REGS_H__
30 #define __USB_OTG_REGS_H__
32 /* Includes ------------------------------------------------------------------*/
36 /** @addtogroup USB_OTG_DRIVER
40 /** @defgroup USB_REGS
41 * @brief This file is the
46 /** @defgroup USB_REGS_Exported_Defines
50 #define USB_OTG_HS_BASE_ADDR 0x40040000
51 #define USB_OTG_FS_BASE_ADDR 0x50000000
53 #define USB_OTG_CORE_GLOBAL_REGS_OFFSET 0x000
54 #define USB_OTG_DEV_GLOBAL_REG_OFFSET 0x800
55 #define USB_OTG_DEV_IN_EP_REG_OFFSET 0x900
56 #define USB_OTG_EP_REG_OFFSET 0x20
57 #define USB_OTG_DEV_OUT_EP_REG_OFFSET 0xB00
58 #define USB_OTG_HOST_GLOBAL_REG_OFFSET 0x400
59 #define USB_OTG_HOST_PORT_REGS_OFFSET 0x440
60 #define USB_OTG_HOST_CHAN_REGS_OFFSET 0x500
61 #define USB_OTG_CHAN_REGS_OFFSET 0x20
62 #define USB_OTG_PCGCCTL_OFFSET 0xE00
63 #define USB_OTG_DATA_FIFO_OFFSET 0x1000
64 #define USB_OTG_DATA_FIFO_SIZE 0x1000
67 #define USB_OTG_MAX_TX_FIFOS 15
69 #define USB_OTG_HS_MAX_PACKET_SIZE 512
70 #define USB_OTG_FS_MAX_PACKET_SIZE 64
71 #define USB_OTG_MAX_EP0_SIZE 64
76 /** @defgroup USB_REGS_Exported_Types
80 /** @defgroup __USB_OTG_Core_register
83 typedef struct _USB_OTG_GREGS
/* 000h */
85 __IO
uint32_t GOTGCTL
; /* USB_OTG Control and Status Register 000h*/
86 __IO
uint32_t GOTGINT
; /* USB_OTG Interrupt Register 004h*/
87 __IO
uint32_t GAHBCFG
; /* Core AHB Configuration Register 008h*/
88 __IO
uint32_t GUSBCFG
; /* Core USB Configuration Register 00Ch*/
89 __IO
uint32_t GRSTCTL
; /* Core Reset Register 010h*/
90 __IO
uint32_t GINTSTS
; /* Core Interrupt Register 014h*/
91 __IO
uint32_t GINTMSK
; /* Core Interrupt Mask Register 018h*/
92 __IO
uint32_t GRXSTSR
; /* Receive Sts Q Read Register 01Ch*/
93 __IO
uint32_t GRXSTSP
; /* Receive Sts Q Read & POP Register 020h*/
94 __IO
uint32_t GRXFSIZ
; /* Receive FIFO Size Register 024h*/
95 __IO
uint32_t DIEPTXF0_HNPTXFSIZ
; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
96 __IO
uint32_t HNPTXSTS
; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
97 uint32_t Reserved30
[2]; /* Reserved 030h*/
98 __IO
uint32_t GCCFG
; /* General Purpose IO Register 038h*/
99 __IO
uint32_t CID
; /* User ID Register 03Ch*/
100 uint32_t Reserved40
[48]; /* Reserved 040h-0FFh*/
101 __IO
uint32_t HPTXFSIZ
; /* Host Periodic Tx FIFO Size Reg 100h*/
102 __IO
uint32_t DIEPTXF
[USB_OTG_MAX_TX_FIFOS
];/* dev Periodic Transmit FIFO */
110 /** @defgroup __device_Registers
113 typedef struct _USB_OTG_DREGS
/* 800h */
115 __IO
uint32_t DCFG
; /* dev Configuration Register 800h*/
116 __IO
uint32_t DCTL
; /* dev Control Register 804h*/
117 __IO
uint32_t DSTS
; /* dev Status Register (RO) 808h*/
118 uint32_t Reserved0C
; /* Reserved 80Ch*/
119 __IO
uint32_t DIEPMSK
; /* dev IN Endpoint Mask 810h*/
120 __IO
uint32_t DOEPMSK
; /* dev OUT Endpoint Mask 814h*/
121 __IO
uint32_t DAINT
; /* dev All Endpoints Itr Reg 818h*/
122 __IO
uint32_t DAINTMSK
; /* dev All Endpoints Itr Mask 81Ch*/
123 uint32_t Reserved20
; /* Reserved 820h*/
124 uint32_t Reserved9
; /* Reserved 824h*/
125 __IO
uint32_t DVBUSDIS
; /* dev VBUS discharge Register 828h*/
126 __IO
uint32_t DVBUSPULSE
; /* dev VBUS Pulse Register 82Ch*/
127 __IO
uint32_t DTHRCTL
; /* dev thr 830h*/
128 __IO
uint32_t DIEPEMPMSK
; /* dev empty msk 834h*/
129 __IO
uint32_t DEACHINT
; /* dedicated EP interrupt 838h*/
130 __IO
uint32_t DEACHMSK
; /* dedicated EP msk 83Ch*/
131 uint32_t Reserved40
; /* dedicated EP mask 840h*/
132 __IO
uint32_t DINEP1MSK
; /* dedicated EP mask 844h*/
133 uint32_t Reserved44
[15]; /* Reserved 844-87Ch*/
134 __IO
uint32_t DOUTEP1MSK
; /* dedicated EP msk 884h*/
142 /** @defgroup __IN_Endpoint-Specific_Register
145 typedef struct _USB_OTG_INEPREGS
147 __IO
uint32_t DIEPCTL
; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
148 uint32_t Reserved04
; /* Reserved 900h + (ep_num * 20h) + 04h*/
149 __IO
uint32_t DIEPINT
; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
150 uint32_t Reserved0C
; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
151 __IO
uint32_t DIEPTSIZ
; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
152 __IO
uint32_t DIEPDMA
; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/
153 __IO
uint32_t DTXFSTS
;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
154 uint32_t Reserved18
; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
162 /** @defgroup __OUT_Endpoint-Specific_Registers
165 typedef struct _USB_OTG_OUTEPREGS
167 __IO
uint32_t DOEPCTL
; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
168 uint32_t Reserved04
; /* Reserved B00h + (ep_num * 20h) + 04h*/
169 __IO
uint32_t DOEPINT
; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
170 uint32_t Reserved0C
; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
171 __IO
uint32_t DOEPTSIZ
; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
172 __IO
uint32_t DOEPDMA
; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/
173 uint32_t Reserved18
[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
181 /** @defgroup __Host_Mode_Register_Structures
184 typedef struct _USB_OTG_HREGS
186 __IO
uint32_t HCFG
; /* Host Configuration Register 400h*/
187 __IO
uint32_t HFIR
; /* Host Frame Interval Register 404h*/
188 __IO
uint32_t HFNUM
; /* Host Frame Nbr/Frame Remaining 408h*/
189 uint32_t Reserved40C
; /* Reserved 40Ch*/
190 __IO
uint32_t HPTXSTS
; /* Host Periodic Tx FIFO/ Queue Status 410h*/
191 __IO
uint32_t HAINT
; /* Host All Channels Interrupt Register 414h*/
192 __IO
uint32_t HAINTMSK
; /* Host All Channels Interrupt Mask 418h*/
200 /** @defgroup __Host_Channel_Specific_Registers
203 typedef struct _USB_OTG_HC_REGS
205 __IO
uint32_t HCCHAR
;
206 __IO
uint32_t HCSPLT
;
208 __IO
uint32_t HCINTMSK
;
209 __IO
uint32_t HCTSIZ
;
211 uint32_t Reserved
[2];
219 /** @defgroup __otg_Core_registers
222 typedef struct USB_OTG_core_regs
/* 000h */
224 USB_OTG_GREGS
*GREGS
;
225 USB_OTG_DREGS
*DREGS
;
226 USB_OTG_HREGS
*HREGS
;
227 USB_OTG_INEPREGS
*INEP_REGS
[USB_OTG_MAX_TX_FIFOS
];
228 USB_OTG_OUTEPREGS
*OUTEP_REGS
[USB_OTG_MAX_TX_FIFOS
];
229 USB_OTG_HC_REGS
*HC_REGS
[USB_OTG_MAX_TX_FIFOS
];
230 __IO
uint32_t *HPRT0
;
231 __IO
uint32_t *DFIFO
[USB_OTG_MAX_TX_FIFOS
];
232 __IO
uint32_t *PCGCCTL
;
234 USB_OTG_CORE_REGS
, *PUSB_OTG_CORE_REGS
;
235 typedef union _USB_OTG_GOTGCTL_TypeDef
244 uint32_t Reserved2_7
:
250 uint32_t hstsethnpen
:
254 uint32_t Reserved12_15
:
264 uint32_t Reserved20_31
:
268 } USB_OTG_GOTGCTL_TypeDef
;
270 typedef union _USB_OTG_GOTGINT_TypeDef
275 uint32_t Reserved0_1
:
279 uint32_t Reserved3_7
:
281 uint32_t sesreqsucstschng
:
283 uint32_t hstnegsucstschng
:
285 uint32_t reserver10_16
:
289 uint32_t adevtoutchng
:
293 uint32_t Reserved31_20
:
297 } USB_OTG_GOTGINT_TypeDef
;
298 typedef union _USB_OTG_GAHBCFG_TypeDef
303 uint32_t glblintrmsk
:
311 uint32_t nptxfemplvl_txfemplvl
:
313 uint32_t ptxfemplvl
:
315 uint32_t Reserved9_31
:
319 } USB_OTG_GAHBCFG_TypeDef
;
320 typedef union _USB_OTG_GUSBCFG_TypeDef
327 uint32_t Reserved3_5
:
339 uint32_t Reserved14
:
341 uint32_t phylpwrclksel
:
343 uint32_t Reserved16
:
347 uint32_t ulpi_auto_res
:
349 uint32_t ulpi_clk_sus_m
:
351 uint32_t ulpi_ext_vbus_drv
:
353 uint32_t ulpi_int_vbus_ind
:
355 uint32_t term_sel_dl_pulse
:
357 uint32_t ulpi_ind_cpl
:
359 uint32_t ulpi_passthrough
:
361 uint32_t ulpi_protect_disable
:
363 uint32_t Reserved26_28
:
365 uint32_t force_host
:
369 uint32_t corrupt_tx
:
373 } USB_OTG_GUSBCFG_TypeDef
;
374 typedef union _USB_OTG_GRSTCTL_TypeDef
393 uint32_t Reserved11_29
:
401 } USB_OTG_GRSTCTL_TypeDef
;
402 typedef union _USB_OTG_GINTMSK_TypeDef
409 uint32_t modemismatch
:
417 uint32_t nptxfempty
:
421 uint32_t goutnakeff
:
423 uint32_t Reserved8_9
:
425 uint32_t erlysuspend
:
427 uint32_t usbsuspend
:
433 uint32_t isooutdrop
:
437 uint32_t Reserved16
:
439 uint32_t epmismatch
:
445 uint32_t incomplisoin
:
447 uint32_t incomplisoout
:
449 uint32_t Reserved22_23
:
457 uint32_t Reserved27
:
459 uint32_t conidstschng
:
461 uint32_t disconnect
:
463 uint32_t sessreqintr
:
469 } USB_OTG_GINTMSK_TypeDef
;
470 typedef union _USB_OTG_GINTSTS_TypeDef
477 uint32_t modemismatch
:
485 uint32_t nptxfempty
:
489 uint32_t goutnakeff
:
491 uint32_t Reserved8_9
:
493 uint32_t erlysuspend
:
495 uint32_t usbsuspend
:
501 uint32_t isooutdrop
:
505 uint32_t Reserved16_17
:
511 uint32_t incomplisoin
:
513 uint32_t incomplisoout
:
515 uint32_t Reserved22_23
:
523 uint32_t Reserved27
:
525 uint32_t conidstschng
:
527 uint32_t disconnect
:
529 uint32_t sessreqintr
:
535 } USB_OTG_GINTSTS_TypeDef
;
536 typedef union _USB_OTG_DRXSTS_TypeDef
555 } USB_OTG_DRXSTS_TypeDef
;
556 typedef union _USB_OTG_GRXSTS_TypeDef
573 } USB_OTG_GRXFSTS_TypeDef
;
574 typedef union _USB_OTG_FSIZ_TypeDef
585 } USB_OTG_FSIZ_TypeDef
;
586 typedef union _USB_OTG_HNPTXSTS_TypeDef
591 uint32_t nptxfspcavail
:
593 uint32_t nptxqspcavail
:
608 } USB_OTG_HNPTXSTS_TypeDef
;
609 typedef union _USB_OTG_DTXFSTSn_TypeDef
614 uint32_t txfspcavail
:
620 } USB_OTG_DTXFSTSn_TypeDef
;
622 typedef union _USB_OTG_GCCFG_TypeDef
627 uint32_t Reserved_in
:
631 uint32_t Reserved_17
:
633 uint32_t vbussensingA
:
635 uint32_t vbussensingB
:
639 uint32_t disablevbussensing
:
641 uint32_t Reserved_out
:
645 } USB_OTG_GCCFG_TypeDef
;
647 typedef union _USB_OTG_DCFG_TypeDef
654 uint32_t nzstsouthshk
:
662 uint32_t Reserved12_31
:
666 } USB_OTG_DCFG_TypeDef
;
667 typedef union _USB_OTG_DCTL_TypeDef
672 uint32_t rmtwkupsig
:
676 uint32_t gnpinnaksts
:
678 uint32_t goutnaksts
:
690 uint32_t poprg_done
:
696 } USB_OTG_DCTL_TypeDef
;
697 typedef union _USB_OTG_DSTS_TypeDef
708 uint32_t Reserved4_7
:
712 uint32_t Reserved22_31
:
716 } USB_OTG_DSTS_TypeDef
;
717 typedef union _USB_OTG_DIEPINTn_TypeDef
724 uint32_t epdisabled
:
730 uint32_t intktxfemp
:
734 uint32_t inepnakeff
:
738 uint32_t txfifoundrn
:
740 uint32_t Reserved14_31
:
744 } USB_OTG_DIEPINTn_TypeDef
;
745 typedef union _USB_OTG_DIEPINTn_TypeDef USB_OTG_DIEPMSK_TypeDef
;
746 typedef union _USB_OTG_DOEPINTn_TypeDef
753 uint32_t epdisabled
:
759 uint32_t Reserved04_31
:
763 } USB_OTG_DOEPINTn_TypeDef
;
764 typedef union _USB_OTG_DOEPINTn_TypeDef USB_OTG_DOEPMSK_TypeDef
;
766 typedef union _USB_OTG_DAINT_TypeDef
777 } USB_OTG_DAINT_TypeDef
;
779 typedef union _USB_OTG_DTHRCTL_TypeDef
784 uint32_t non_iso_thr_en
:
786 uint32_t iso_thr_en
:
788 uint32_t tx_thr_len
:
790 uint32_t Reserved11_15
:
794 uint32_t rx_thr_len
:
796 uint32_t Reserved26
:
800 uint32_t Reserved28_31
:
804 } USB_OTG_DTHRCTL_TypeDef
;
805 typedef union _USB_OTG_DEPCTL_TypeDef
842 } USB_OTG_DEPCTL_TypeDef
;
843 typedef union _USB_OTG_DEPXFRSIZ_TypeDef
858 } USB_OTG_DEPXFRSIZ_TypeDef
;
859 typedef union _USB_OTG_DEP0XFRSIZ_TypeDef
866 uint32_t Reserved7_18
:
870 uint32_t Reserved20_28
:
874 uint32_t Reserved31
:
878 } USB_OTG_DEP0XFRSIZ_TypeDef
;
879 typedef union _USB_OTG_HCFG_TypeDef
884 uint32_t fslspclksel
:
890 } USB_OTG_HCFG_TypeDef
;
891 typedef union _USB_OTG_HFRMINTRVL_TypeDef
902 } USB_OTG_HFRMINTRVL_TypeDef
;
904 typedef union _USB_OTG_HFNUM_TypeDef
915 } USB_OTG_HFNUM_TypeDef
;
916 typedef union _USB_OTG_HPTXSTS_TypeDef
921 uint32_t ptxfspcavail
:
923 uint32_t ptxqspcavail
:
938 } USB_OTG_HPTXSTS_TypeDef
;
939 typedef union _USB_OTG_HPRT0_TypeDef
944 uint32_t prtconnsts
:
946 uint32_t prtconndet
:
952 uint32_t prtovrcurract
:
954 uint32_t prtovrcurrchng
:
972 uint32_t Reserved19_31
:
976 } USB_OTG_HPRT0_TypeDef
;
977 typedef union _USB_OTG_HAINT_TypeDef
988 } USB_OTG_HAINT_TypeDef
;
989 typedef union _USB_OTG_HAINTMSK_TypeDef
1000 } USB_OTG_HAINTMSK_TypeDef
;
1001 typedef union _USB_OTG_HCCHAR_TypeDef
1030 } USB_OTG_HCCHAR_TypeDef
;
1031 typedef union _USB_OTG_HCSPLT_TypeDef
1050 } USB_OTG_HCSPLT_TypeDef
;
1051 typedef union _USB_OTG_HCINTn_TypeDef
1056 uint32_t xfercompl
:
1076 uint32_t datatglerr
:
1082 } USB_OTG_HCINTn_TypeDef
;
1083 typedef union _USB_OTG_HCTSIZn_TypeDef
1098 } USB_OTG_HCTSIZn_TypeDef
;
1099 typedef union _USB_OTG_HCINTMSK_TypeDef
1104 uint32_t xfercompl
:
1124 uint32_t datatglerr
:
1130 } USB_OTG_HCINTMSK_TypeDef
;
1132 typedef union _USB_OTG_PCGCCTL_TypeDef
1141 uint32_t Reserved2_3
:
1145 uint32_t Reserved5_31
:
1149 } USB_OTG_PCGCCTL_TypeDef
;
1156 /** @defgroup USB_REGS_Exported_Macros
1163 /** @defgroup USB_REGS_Exported_Variables
1170 /** @defgroup USB_REGS_Exported_FunctionsPrototype
1178 #endif /* __USB_OTG_REGS_H__ */
1188 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/