2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
23 #define TARGET_BOARD_IDENTIFIER "H743"
24 #define USBD_PRODUCT_STRING "Nucleo-H743"
26 #define USE_TARGET_CONFIG
29 #define LED1_PIN PB7 // PE1 on NUCLEO-H743ZI2 (may collide with UART8_TX)
30 //#define LED2_PIN PB14 // SDMMC2_D0
32 // Use explicit cache management as per https://github.com/betaflight/betaflight/pull/10378
33 #define USE_LEDSTRIP_CACHE_MGMT
35 // Nucleo-H743 has one button (The blue USER button).
36 // Force two buttons to look at the single button so config reset on button works
38 #define BUTTON_A_PIN PC13
39 #define BUTTON_A_PIN_INVERTED // Active high
40 #define BUTTON_B_PIN PC13
41 #define BUTTON_B_PIN_INVERTED // Active high
44 #define BEEPER_PIN PE3
45 #define BEEPER_INVERTED
50 #define UART1_RX_PIN PA10
51 #define UART1_TX_PIN PA9
54 #define UART2_RX_PIN NONE // PD6, collide with SDMMC2_CK
55 #define UART2_TX_PIN PD5
58 #define UART3_RX_PIN PD9 // ST-LINK Virtual COM Port
59 #define UART3_TX_PIN PD8 // ST-LINK Virtual COM Port
62 #define UART4_RX_PIN PC11
63 #define UART4_TX_PIN PC10
66 #define UART5_RX_PIN PD2
67 #define UART5_TX_PIN PC12
70 #define UART6_RX_PIN PC7
71 #define UART6_TX_PIN PC6
74 #define UART7_RX_PIN PE7
75 #define UART7_TX_PIN PE8
78 #define UART8_RX_PIN PE0
79 #define UART8_TX_PIN PE1
82 #define LPUART1_RX_PIN PB7 // PA10 (Shared with UART1)
83 #define LPUART1_TX_PIN PB6 // PA9 (Shared with UART1)
87 #define USE_SOFTSERIAL1
88 #define USE_SOFTSERIAL2
90 #define SERIAL_PORT_COUNT 12
94 #define USE_SPI_DEVICE_1
95 #define SPI1_SCK_PIN PB3
96 #define SPI1_MISO_PIN PB4
97 #define SPI1_MOSI_PIN PB5
99 #define USE_SPI_DEVICE_2
100 #define SPI2_SCK_PIN NONE
101 #define SPI2_MISO_PIN NONE
102 #define SPI2_MOSI_PIN NONE
104 #define USE_SPI_DEVICE_3
105 #define SPI3_SCK_PIN PC10 // PC10
106 #define SPI3_MISO_PIN PC11 // PC11
107 #define SPI3_MOSI_PIN PC12 // PC12
109 #define USE_SPI_DEVICE_4
110 #define SPI4_SCK_PIN NONE
111 #define SPI4_MISO_PIN NONE
112 #define SPI4_MOSI_PIN NONE
114 #define USE_SPI_DEVICE_5
115 #define SPI5_SCK_PIN NONE
116 #define SPI5_MISO_PIN NONE
117 #define SPI5_MOSI_PIN NONE
119 #define USE_SPI_DEVICE_6
120 #define SPI6_SCK_PIN NONE
121 #define SPI6_MISO_PIN NONE
122 #define SPI6_MOSI_PIN NONE
125 #define USE_QUADSPI_DEVICE_1
127 #define QUADSPI1_SCK_PIN NONE // PB2
129 #define QUADSPI1_BK1_IO0_PIN NONE // PD11
130 #define QUADSPI1_BK1_IO1_PIN NONE // PD12
131 #define QUADSPI1_BK1_IO2_PIN NONE // PE2
132 #define QUADSPI1_BK1_IO3_PIN NONE // PD13
133 #define QUADSPI1_BK1_CS_PIN NONE // PB10
135 #define QUADSPI1_BK2_IO0_PIN NONE // PE7
136 #define QUADSPI1_BK2_IO1_PIN NONE // PE8
137 #define QUADSPI1_BK2_IO2_PIN NONE // PE9
138 #define QUADSPI1_BK2_IO3_PIN NONE // PE10
139 #define QUADSPI1_BK2_CS_PIN NONE // NONE
141 #define QUADSPI1_MODE QUADSPI_MODE_BK1_ONLY
142 #define QUADSPI1_CS_FLAGS (QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED)
144 #if !defined(NUCLEOH743_RAMBASED)
147 #define USE_SDCARD_SDIO
148 #define SDCARD_DETECT_PIN NONE
158 // SDIO configuration for SDMMC1, 1-bit width
159 #define SDIO_DEVICE SDIODEV_2 // SDIODEV_1 (for SDMMC1) or SDIODEV_2 (for SDMMC2) (or SDIOINVALID)
160 #define SDIO_USE_4BIT false
161 #define SDIO_CK_PIN PD6 // SDMMC1: PC12 SDMMC2: PC1 or PD6
162 #define SDIO_CMD_PIN PD7 // SDMMC1: PD2 SDMMC2: PA0 or PD7
163 #define SDIO_D0_PIN PB14 // SDMMC1: PC8 SDMMC2: PB14
164 #define SDIO_D1_PIN NONE // SDMMC1: PC9 SDMMC2: PB15
165 #define SDIO_D2_PIN NONE // SDMMC1: PC10 SDMMC2: PB3
166 #define SDIO_D3_PIN NONE // SDMMC2: PC11 SDMMC2: PB4
169 #define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
173 #define USE_I2C_DEVICE_1
176 #define I2C_DEVICE (I2CDEV_1)
178 // For testing I2C4on APB4
179 //#define USE_I2C_DEVICE_4
180 //#define I2C4_SCL PF14
181 //#define I2C4_SDA PF15
182 //#define I2C_DEVICE (I2CDEV_4)
185 #define USE_MAG_HMC5883
186 #define USE_MAG_SPI_HMC5883
187 #define HMC5883_SPI_INSTANCE NULL
188 #define HMC5883_CS_PIN NONE
192 #define USE_BARO_BMP085
193 #define USE_BARO_BMP280
194 #define USE_BARO_BMP388
195 #define USE_BARO_MS5611
196 #define USE_BARO_SPI_BMP280
197 #define BMP280_SPI_INSTANCE NULL
198 #define BMP280_CS_PIN NONE
201 #define USE_MULTI_GYRO
204 #define USE_FAKE_GYRO
206 #define USE_GYRO_SPI_MPU6000
207 #define USE_ACC_SPI_MPU6000
208 #define USE_GYRO_SPI_MPU6500
209 #define USE_ACC_SPI_MPU6500
210 #define USE_GYRO_SPI_MPU9250
211 #define USE_ACC_SPI_MPU9250
212 #define USE_GYRO_SPI_ICM42605
213 #define USE_ACC_SPI_ICM42605
215 #define GYRO_1_CS_PIN PD15
216 #define GYRO_1_SPI_INSTANCE SPI1
218 // I2C acc/gyro test, may require to activate
219 // set gyro_x_bustype = I2C
220 // set gyro_x_i2cBus = <Bus ordinal of I2C_DEVICE>
221 //#define USE_GYRO_MPU6050
222 //#define USE_ACC_MPU6050
224 #define USE_FLASH_CHIP
225 #define USE_FLASH_M25P16
226 #define USE_FLASH_W25M
227 #define USE_FLASH_W25Q128FV
228 #define USE_FLASH_W25N01G
229 #define FLASH_SPI_INSTANCE NULL
230 #define FLASH_CS_PIN NONE
233 #define USE_BRUSHED_ESC_AUTODETECT // Detect if brushed motors are connected and set defaults appropriately to avoid motors spinning on boot
234 #define USE_GYRO_REGISTER_DUMP // Adds gyroregisters command to cli to dump configured register values
236 #define USE_PWM_OUTPUT
240 #define USE_RANGEFINDER
241 #define USE_RANGEFINDER_HCSR04
242 #define USE_RANGEFINDER_TF
244 #define USE_TRANSPONDER
247 #define MAX7456_SPI_INSTANCE NULL // SPI3
248 #define MAX7456_SPI_CS_PIN NONE // PC9
250 #define USE_I2C_OLED_DISPLAY
254 #define ADC1_INSTANCE ADC1
255 #define ADC2_INSTANCE ADC2
256 #define ADC3_INSTANCE ADC3
258 // DMA stream assignmnets
259 #define VBAT_ADC_PIN PB1 // ADC1
260 #define CURRENT_METER_ADC_PIN PC0 // ADC1
261 #define RSSI_ADC_PIN PF14 // ADC2
262 #define EXTERNAL1_ADC_PIN PC3 // ADC3
264 #define DEFAULT_VOLTAGE_METER_SOURCE VOLTAGE_METER_ADC
265 #define DEFAULT_CURRENT_METER_SOURCE CURRENT_METER_ADC
268 #define USE_DSHOT_DMAR
272 // Thanks to DMAMUX, H7 does not have limitations on DMA stream assignments to devices (except for collisions among them).
273 //#define UART1_TX_DMA_OPT 0
274 //#define UART2_TX_DMA_OPT 1
275 //#define UART3_TX_DMA_OPT 2
276 //#define UART4_TX_DMA_OPT 3
277 //#define UART5_TX_DMA_OPT 4
278 //#define UART6_TX_DMA_OPT 5
279 //#define UART7_TX_DMA_OPT 6
280 //#define UART8_TX_DMA_OPT 7
281 #define ADC1_DMA_OPT 8
282 #define ADC2_DMA_OPT 9
283 #define ADC3_DMA_OPT 10
285 #define DEFAULT_FEATURE (FEATURE_OSD)
287 #define TARGET_IO_PORTA 0xffff
288 #define TARGET_IO_PORTB 0xffff
289 #define TARGET_IO_PORTC 0xffff
290 #define TARGET_IO_PORTD 0xffff
291 #define TARGET_IO_PORTE 0xffff
292 #define TARGET_IO_PORTF 0xffff
293 #define TARGET_IO_PORTG 0xffff
295 #define USABLE_TIMER_CHANNEL_COUNT 14
297 #define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(8) | TIM_N(12) )