src/main/drivers/bus_spi_pinconfig.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdbool.h>
  22 #include <stdint.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_SPI
  28
  29 #include "build/debug.h"
  30
  31 #include "drivers/bus_spi.h"
  32 #include "drivers/bus_spi_impl.h"
  33 #include "drivers/dma.h"
  34 #include "drivers/exti.h"
  35 #include "drivers/io.h"
  36 #include "drivers/rcc.h"
  37
  38 #include "pg/bus_spi.h"
  39
  40 const spiHardware_t spiHardware[] = {
  41 #ifdef STM32F4
  42     {
  43         .device = SPIDEV_1,
  44         .reg = SPI1,
  45         .sckPins = {
  46             { DEFIO_TAG_E(PA5) },
  47             { DEFIO_TAG_E(PB3) },
  48         },
  49         .misoPins = {
  50             { DEFIO_TAG_E(PA6) },
  51             { DEFIO_TAG_E(PB4) },
  52         },
  53         .mosiPins = {
  54             { DEFIO_TAG_E(PA7) },
  55             { DEFIO_TAG_E(PB5) },
  56         },
  57         .af = GPIO_AF_SPI1,
  58         .rcc = RCC_APB2(SPI1),
  59     },
  60     {
  61         .device = SPIDEV_2,
  62         .reg = SPI2,
  63         .sckPins = {
  64             { DEFIO_TAG_E(PB10) },
  65             { DEFIO_TAG_E(PB13) },
  66         },
  67         .misoPins = {
  68             { DEFIO_TAG_E(PB14) },
  69             { DEFIO_TAG_E(PC2) },
  70         },
  71         .mosiPins = {
  72             { DEFIO_TAG_E(PB15) },
  73             { DEFIO_TAG_E(PC3) },
  74         },
  75         .af = GPIO_AF_SPI2,
  76         .rcc = RCC_APB1(SPI2),
  77     },
  78     {
  79         .device = SPIDEV_3,
  80         .reg = SPI3,
  81         .sckPins = {
  82             { DEFIO_TAG_E(PB3) },
  83             { DEFIO_TAG_E(PC10) },
  84         },
  85         .misoPins = {
  86             { DEFIO_TAG_E(PB4) },
  87             { DEFIO_TAG_E(PC11) },
  88         },
  89         .mosiPins = {
  90             { DEFIO_TAG_E(PB5) },
  91             { DEFIO_TAG_E(PC12) },
  92         },
  93         .af = GPIO_AF_SPI3,
  94         .rcc = RCC_APB1(SPI3),
  95     },
  96 #endif
  97 #ifdef STM32F7
  98     {
  99         .device = SPIDEV_1,
 100         .reg = SPI1,
 101         .sckPins = {
 102             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 103             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 104         },
 105         .misoPins = {
 106             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 107             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 108         },
 109         .mosiPins = {
 110             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 111             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 112         },
 113         .rcc = RCC_APB2(SPI1),
 114         .dmaIrqHandler = DMA2_ST3_HANDLER,
 115     },
 116     {
 117         .device = SPIDEV_2,
 118         .reg = SPI2,
 119         .sckPins = {
 120             { DEFIO_TAG_E(PA9), GPIO_AF5_SPI2 },
 121             { DEFIO_TAG_E(PB10), GPIO_AF5_SPI2 },
 122             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 123             { DEFIO_TAG_E(PD3), GPIO_AF5_SPI2 },
 124         },
 125         .misoPins = {
 126             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 127             { DEFIO_TAG_E(PC2), GPIO_AF5_SPI2 },
 128         },
 129         .mosiPins = {
 130             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 131             { DEFIO_TAG_E(PC1), GPIO_AF5_SPI2 },
 132             { DEFIO_TAG_E(PC3), GPIO_AF5_SPI2 },
 133         },
 134         .rcc = RCC_APB1(SPI2),
 135         .dmaIrqHandler = DMA1_ST4_HANDLER,
 136     },
 137     {
 138         .device = SPIDEV_3,
 139         .reg = SPI3,
 140         .sckPins = {
 141             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 142             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 143         },
 144         .misoPins = {
 145             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 146             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 147         },
 148         .mosiPins = {
 149             { DEFIO_TAG_E(PB2), GPIO_AF7_SPI3 },
 150             { DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
 151             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 152             { DEFIO_TAG_E(PD6), GPIO_AF5_SPI3 },
 153         },
 154         .rcc = RCC_APB1(SPI3),
 155         .dmaIrqHandler = DMA1_ST7_HANDLER,
 156     },
 157     {
 158         .device = SPIDEV_4,
 159         .reg = SPI4,
 160         .sckPins = {
 161             { DEFIO_TAG_E(PE2), GPIO_AF5_SPI4 },
 162             { DEFIO_TAG_E(PE12), GPIO_AF5_SPI4 },
 163         },
 164         .misoPins = {
 165             { DEFIO_TAG_E(PE5), GPIO_AF5_SPI4 },
 166             { DEFIO_TAG_E(PE13), GPIO_AF5_SPI4 },
 167         },
 168         .mosiPins = {
 169             { DEFIO_TAG_E(PE6), GPIO_AF5_SPI4 },
 170             { DEFIO_TAG_E(PE14), GPIO_AF5_SPI4 },
 171         },
 172         .rcc = RCC_APB2(SPI4),
 173         .dmaIrqHandler = DMA2_ST1_HANDLER,
 174     },
 175 #endif
 176 #ifdef STM32H7
 177     {
 178         .device = SPIDEV_1,
 179         .reg = SPI1,
 180         .sckPins = {
 181             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 182             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 183         },
 184         .misoPins = {
 185             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 186             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 187         },
 188         .mosiPins = {
 189             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 190             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 191             { DEFIO_TAG_E(PD7), GPIO_AF5_SPI1 },
 192         },
 193         .rcc = RCC_APB2(SPI1),
 194         //.dmaIrqHandler = DMA2_ST3_HANDLER,
 195     },
 196     {
 197         .device = SPIDEV_2,
 198         .reg = SPI2,
 199         .sckPins = {
 200             { DEFIO_TAG_E(PA9), GPIO_AF5_SPI2 },
 201             { DEFIO_TAG_E(PA12), GPIO_AF5_SPI2 },
 202             { DEFIO_TAG_E(PB10), GPIO_AF5_SPI2 },
 203             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 204             { DEFIO_TAG_E(PD3), GPIO_AF5_SPI2 },
 205         },
 206         .misoPins = {
 207             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 208             { DEFIO_TAG_E(PC2), GPIO_AF5_SPI2 },
 209         },
 210         .mosiPins = {
 211             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 212             { DEFIO_TAG_E(PC1), GPIO_AF5_SPI2 },
 213             { DEFIO_TAG_E(PC3), GPIO_AF5_SPI2 },
 214         },
 215         .rcc = RCC_APB1L(SPI2),
 216         //.dmaIrqHandler = DMA1_ST4_HANDLER,
 217     },
 218     {
 219         .device = SPIDEV_3,
 220         .reg = SPI3,
 221         .sckPins = {
 222             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 223             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 224         },
 225         .misoPins = {
 226             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 227             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 228         },
 229         .mosiPins = {
 230             { DEFIO_TAG_E(PB2), GPIO_AF7_SPI3 },
 231             { DEFIO_TAG_E(PB5), GPIO_AF7_SPI3 },
 232             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 233             { DEFIO_TAG_E(PD6), GPIO_AF5_SPI3 },
 234         },
 235         .rcc = RCC_APB1L(SPI3),
 236         //.dmaIrqHandler = DMA1_ST7_HANDLER,
 237     },
 238     {
 239         .device = SPIDEV_4,
 240         .reg = SPI4,
 241         .sckPins = {
 242             { DEFIO_TAG_E(PE2), GPIO_AF5_SPI4 },
 243             { DEFIO_TAG_E(PE12), GPIO_AF5_SPI4 },
 244         },
 245         .misoPins = {
 246             { DEFIO_TAG_E(PE5), GPIO_AF5_SPI4 },
 247             { DEFIO_TAG_E(PE13), GPIO_AF5_SPI4 },
 248         },
 249         .mosiPins = {
 250             { DEFIO_TAG_E(PE6), GPIO_AF5_SPI4 },
 251             { DEFIO_TAG_E(PE14), GPIO_AF5_SPI4 },
 252         },
 253         .rcc = RCC_APB2(SPI4),
 254         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 255     },
 256     {
 257         .device = SPIDEV_5,
 258         .reg = SPI5,
 259         .sckPins = {
 260             { DEFIO_TAG_E(PF7), GPIO_AF5_SPI5 },
 261         },
 262         .misoPins = {
 263             { DEFIO_TAG_E(PF8), GPIO_AF5_SPI5 },
 264         },
 265         .mosiPins = {
 266             { DEFIO_TAG_E(PF11), GPIO_AF5_SPI5 },
 267         },
 268         .rcc = RCC_APB2(SPI5),
 269         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 270     },
 271     {
 272         .device = SPIDEV_6,
 273         .reg = SPI6,
 274         .sckPins = {
 275             { DEFIO_TAG_E(PA5), GPIO_AF8_SPI6 },
 276             { DEFIO_TAG_E(PB3), GPIO_AF8_SPI6 },
 277         },
 278         .misoPins = {
 279             { DEFIO_TAG_E(PA6), GPIO_AF8_SPI6 },
 280             { DEFIO_TAG_E(PB4), GPIO_AF8_SPI6 },
 281         },
 282         .mosiPins = {
 283             { DEFIO_TAG_E(PA7), GPIO_AF8_SPI6 },
 284             { DEFIO_TAG_E(PB5), GPIO_AF8_SPI6 },
 285         },
 286         .rcc = RCC_APB4(SPI6),
 287         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 288     },
 289 #endif
 290 #ifdef STM32G4
 291     {
 292         .device = SPIDEV_1,
 293         .reg = SPI1,
 294         .sckPins = {
 295             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 296             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 297         },
 298         .misoPins = {
 299             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 300             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 301         },
 302         .mosiPins = {
 303             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 304             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 305         },
 306         .rcc = RCC_APB2(SPI1),
 307         //.dmaIrqHandler = DMA2_ST3_HANDLER,
 308     },
 309     {
 310         .device = SPIDEV_2,
 311         .reg = SPI2,
 312         .sckPins = {
 313             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 314         },
 315         .misoPins = {
 316             { DEFIO_TAG_E(PA10), GPIO_AF5_SPI2 },
 317             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 318         },
 319         .mosiPins = {
 320             { DEFIO_TAG_E(PA11), GPIO_AF5_SPI2 },
 321             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 322         },
 323         .rcc = RCC_APB11(SPI2),
 324         //.dmaIrqHandler = DMA1_ST4_HANDLER,
 325     },
 326     {
 327         .device = SPIDEV_3,
 328         .reg = SPI3,
 329         .sckPins = {
 330             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 331             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 332         },
 333         .misoPins = {
 334             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 335             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 336         },
 337         .mosiPins = {
 338             { DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
 339             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 340         },
 341         .rcc = RCC_APB11(SPI3),
 342         //.dmaIrqHandler = DMA1_ST7_HANDLER,
 343     },
 344 #endif
 345 };
 346
 347 void spiPinConfigure(const spiPinConfig_t *pConfig)
 348 {
 349     for (size_t hwindex = 0 ; hwindex < ARRAYLEN(spiHardware) ; hwindex++) {
 350         const spiHardware_t *hw = &spiHardware[hwindex];
 351
 352         if (!hw->reg) {
 353             continue;
 354         }
 355
 356         SPIDevice device = hw->device;
 357         spiDevice_t *pDev = &spiDevice[device];
 358
 359         for (int pindex = 0 ; pindex < MAX_SPI_PIN_SEL ; pindex++) {
 360             if (pConfig[device].ioTagSck == hw->sckPins[pindex].pin) {
 361                 pDev->sck = hw->sckPins[pindex].pin;
 362 #if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
 363                 pDev->sckAF = hw->sckPins[pindex].af;
 364 #endif
 365             }
 366             if (pConfig[device].ioTagMiso == hw->misoPins[pindex].pin) {
 367                 pDev->miso = hw->misoPins[pindex].pin;
 368 #if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
 369                 pDev->misoAF = hw->misoPins[pindex].af;
 370 #endif
 371             }
 372             if (pConfig[device].ioTagMosi == hw->mosiPins[pindex].pin) {
 373                 pDev->mosi = hw->mosiPins[pindex].pin;
 374 #if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
 375                 pDev->mosiAF = hw->mosiPins[pindex].af;
 376 #endif
 377             }
 378         }
 379
 380         if (pDev->sck && pDev->miso && pDev->mosi) {
 381             pDev->dev = hw->reg;
 382 #if !(defined(STM32F7) || defined(STM32H7) || defined(STM32G4))
 383             pDev->af = hw->af;
 384 #endif
 385             pDev->rcc = hw->rcc;
 386             pDev->leadingEdge = false; // XXX Should be part of transfer context
 387 #if defined(USE_DMA) && defined(USE_HAL_DRIVER)
 388             pDev->dmaIrqHandler = hw->dmaIrqHandler;
 389 #endif
 390         }
 391     }
 392 }
 393 #endif