src/main/drivers/dma_stm32f4xx.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdbool.h>
  22 #include <stdint.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_DMA
  28
  29 #include "drivers/nvic.h"
  30 #include "dma.h"
  31 #include "resource.h"
  32
  33 /*
  34  * DMA descriptors.
  35  */
  36 dmaChannelDescriptor_t dmaDescriptors[DMA_LAST_HANDLER] = {
  37     DEFINE_DMA_CHANNEL(DMA1, 0,  0),
  38     DEFINE_DMA_CHANNEL(DMA1, 1,  6),
  39     DEFINE_DMA_CHANNEL(DMA1, 2, 16),
  40     DEFINE_DMA_CHANNEL(DMA1, 3, 22),
  41     DEFINE_DMA_CHANNEL(DMA1, 4, 32),
  42     DEFINE_DMA_CHANNEL(DMA1, 5, 38),
  43     DEFINE_DMA_CHANNEL(DMA1, 6, 48),
  44     DEFINE_DMA_CHANNEL(DMA1, 7, 54),
  45
  46     DEFINE_DMA_CHANNEL(DMA2, 0,  0),
  47     DEFINE_DMA_CHANNEL(DMA2, 1,  6),
  48     DEFINE_DMA_CHANNEL(DMA2, 2, 16),
  49     DEFINE_DMA_CHANNEL(DMA2, 3, 22),
  50     DEFINE_DMA_CHANNEL(DMA2, 4, 32),
  51     DEFINE_DMA_CHANNEL(DMA2, 5, 38),
  52     DEFINE_DMA_CHANNEL(DMA2, 6, 48),
  53     DEFINE_DMA_CHANNEL(DMA2, 7, 54),
  54 };
  55
  56 /*
  57  * DMA IRQ Handlers
  58  */
  59 DEFINE_DMA_IRQ_HANDLER(1, 0, DMA1_ST0_HANDLER)
  60 DEFINE_DMA_IRQ_HANDLER(1, 1, DMA1_ST1_HANDLER)
  61 DEFINE_DMA_IRQ_HANDLER(1, 2, DMA1_ST2_HANDLER)
  62 DEFINE_DMA_IRQ_HANDLER(1, 3, DMA1_ST3_HANDLER)
  63 DEFINE_DMA_IRQ_HANDLER(1, 4, DMA1_ST4_HANDLER)
  64 DEFINE_DMA_IRQ_HANDLER(1, 5, DMA1_ST5_HANDLER)
  65 DEFINE_DMA_IRQ_HANDLER(1, 6, DMA1_ST6_HANDLER)
  66 DEFINE_DMA_IRQ_HANDLER(1, 7, DMA1_ST7_HANDLER)
  67 DEFINE_DMA_IRQ_HANDLER(2, 0, DMA2_ST0_HANDLER)
  68 DEFINE_DMA_IRQ_HANDLER(2, 1, DMA2_ST1_HANDLER)
  69 DEFINE_DMA_IRQ_HANDLER(2, 2, DMA2_ST2_HANDLER)
  70 DEFINE_DMA_IRQ_HANDLER(2, 3, DMA2_ST3_HANDLER)
  71 DEFINE_DMA_IRQ_HANDLER(2, 4, DMA2_ST4_HANDLER)
  72 DEFINE_DMA_IRQ_HANDLER(2, 5, DMA2_ST5_HANDLER)
  73 DEFINE_DMA_IRQ_HANDLER(2, 6, DMA2_ST6_HANDLER)
  74 DEFINE_DMA_IRQ_HANDLER(2, 7, DMA2_ST7_HANDLER)
  75
  76 #define DMA_RCC(x) ((x) == DMA1 ? RCC_AHB1Periph_DMA1 : RCC_AHB1Periph_DMA2)
  77 void dmaEnable(dmaIdentifier_e identifier)
  78 {
  79     const int index = DMA_IDENTIFIER_TO_INDEX(identifier);
  80     RCC_AHB1PeriphClockCmd(DMA_RCC(dmaDescriptors[index].dma), ENABLE);
  81 }
  82
  83 #define RETURN_TCIF_FLAG(s, n) if (s == DMA1_Stream ## n || s == DMA2_Stream ## n) return DMA_IT_TCIF ## n
  84
  85 uint32_t dmaFlag_IT_TCIF(const dmaResource_t *stream)
  86 {
  87     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 0);
  88     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 1);
  89     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 2);
  90     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 3);
  91     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 4);
  92     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 5);
  93     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 6);
  94     RETURN_TCIF_FLAG((DMA_ARCH_TYPE *)stream, 7);
  95     return 0;
  96 }
  97
  98 void dmaSetHandler(dmaIdentifier_e identifier, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam)
  99 {
 100     NVIC_InitTypeDef NVIC_InitStructure;
 101
 102     const int index = DMA_IDENTIFIER_TO_INDEX(identifier);
 103
 104     RCC_AHB1PeriphClockCmd(DMA_RCC(dmaDescriptors[index].dma), ENABLE);
 105     dmaDescriptors[index].irqHandlerCallback = callback;
 106     dmaDescriptors[index].userParam = userParam;
 107     dmaDescriptors[index].completeFlag = dmaFlag_IT_TCIF(dmaDescriptors[index].ref);
 108
 109     NVIC_InitStructure.NVIC_IRQChannel = dmaDescriptors[index].irqN;
 110     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(priority);
 111     NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(priority);
 112     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 113     NVIC_Init(&NVIC_InitStructure);
 114 }
 115 #endif