src/main/drivers/dshot_bitbang_stdperiph.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdint.h>
  22 #include <math.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_DSHOT_BITBANG
  28
  29 #include "build/atomic.h"
  30 #include "build/debug.h"
  31 #include "build/debug_pin.h"
  32
  33 #include "drivers/io.h"
  34 #include "drivers/io_impl.h"
  35 #include "drivers/dma.h"
  36 #include "drivers/dma_reqmap.h"
  37 #include "drivers/dshot.h"
  38 #include "drivers/dshot_bitbang_impl.h"
  39 #include "drivers/dshot_command.h"
  40 #include "drivers/motor.h"
  41 #include "drivers/nvic.h"
  42 #include "drivers/pwm_output.h" // XXX for pwmOutputPort_t motors[]; should go away with refactoring
  43 #include "drivers/time.h"
  44 #include "drivers/timer.h"
  45
  46 #include "pg/motor.h"
  47
  48 void bbGpioSetup(bbMotor_t *bbMotor)
  49 {
  50     bbPort_t *bbPort = bbMotor->bbPort;
  51     int pinIndex = bbMotor->pinIndex;
  52
  53     bbPort->gpioModeMask |= (GPIO_MODER_MODER0 << (pinIndex * 2));
  54     bbPort->gpioModeInput |= (GPIO_Mode_IN << (pinIndex * 2));
  55     bbPort->gpioModeOutput |= (GPIO_Mode_OUT << (pinIndex * 2));
  56
  57 #ifdef USE_DSHOT_TELEMETRY
  58     if (useDshotTelemetry) {
  59         bbPort->gpioIdleBSRR |= (1 << pinIndex);         // BS (lower half)
  60     } else
  61 #endif
  62     {
  63         bbPort->gpioIdleBSRR |= (1 << (pinIndex + 16));  // BR (higher half)
  64     }
  65
  66 #ifdef USE_DSHOT_TELEMETRY
  67     if (useDshotTelemetry) {
  68         IOWrite(bbMotor->io, 1);
  69     } else
  70 #endif
  71     {
  72         IOWrite(bbMotor->io, 0);
  73     }
  74 }
  75
  76 void bbTimerChannelInit(bbPort_t *bbPort)
  77 {
  78     const timerHardware_t *timhw = bbPort->timhw;
  79
  80     TIM_OCInitTypeDef TIM_OCStruct;
  81
  82     TIM_OCStructInit(&TIM_OCStruct);
  83     TIM_OCStruct.TIM_OCMode = TIM_OCMode_PWM1;
  84     TIM_OCStruct.TIM_OCIdleState = TIM_OCIdleState_Set;
  85     TIM_OCStruct.TIM_OutputState = TIM_OutputState_Enable;
  86     TIM_OCStruct.TIM_OCPolarity = TIM_OCPolarity_Low;
  87
  88     TIM_OCStruct.TIM_Pulse = 10; // Duty doesn't matter, but too value small would make monitor output invalid
  89
  90     TIM_Cmd(bbPort->timhw->tim, DISABLE);
  91
  92     timerOCInit(timhw->tim, timhw->channel, &TIM_OCStruct);
  93     // timerOCPreloadConfig(timhw->tim, timhw->channel, TIM_OCPreload_Enable);
  94
  95 #ifdef DEBUG_MONITOR_PACER
  96     if (timhw->tag) {
  97         IO_t io = IOGetByTag(timhw->tag);
  98         IOConfigGPIOAF(io, IOCFG_AF_PP, timhw->alternateFunction);
  99         IOInit(io, OWNER_DSHOT_BITBANG, 0);
 100         TIM_CtrlPWMOutputs(timhw->tim, ENABLE);
 101     }
 102 #endif
 103
 104     // Enable and keep it running
 105
 106     TIM_Cmd(bbPort->timhw->tim, ENABLE);
 107 }
 108
 109 #ifdef USE_DMA_REGISTER_CACHE
 110
 111 void bbLoadDMARegs(dmaResource_t *dmaResource, dmaRegCache_t *dmaRegCache)
 112 {
 113     ((DMA_Stream_TypeDef *)dmaResource)->CR = dmaRegCache->CR;
 114     ((DMA_Stream_TypeDef *)dmaResource)->FCR = dmaRegCache->FCR;
 115     ((DMA_Stream_TypeDef *)dmaResource)->NDTR = dmaRegCache->NDTR;
 116     ((DMA_Stream_TypeDef *)dmaResource)->PAR = dmaRegCache->PAR;
 117     ((DMA_Stream_TypeDef *)dmaResource)->M0AR = dmaRegCache->M0AR;
 118 }
 119
 120 static void bbSaveDMARegs(dmaResource_t *dmaResource, dmaRegCache_t *dmaRegCache)
 121 {
 122     dmaRegCache->CR = ((DMA_Stream_TypeDef *)dmaResource)->CR;
 123     dmaRegCache->FCR = ((DMA_Stream_TypeDef *)dmaResource)->FCR;
 124     dmaRegCache->NDTR = ((DMA_Stream_TypeDef *)dmaResource)->NDTR;
 125     dmaRegCache->PAR = ((DMA_Stream_TypeDef *)dmaResource)->PAR;
 126     dmaRegCache->M0AR = ((DMA_Stream_TypeDef *)dmaResource)->M0AR;
 127 }
 128 #endif
 129
 130 void bbSwitchToOutput(bbPort_t * bbPort)
 131 {
 132     dbgPinHi(1);
 133     // Output idle level before switching to output
 134     // Use BSRR register for this
 135     // Normal: Use BR (higher half)
 136     // Inverted: Use BS (lower half)
 137
 138     WRITE_REG(bbPort->gpio->BSRRL, bbPort->gpioIdleBSRR);
 139
 140     // Set GPIO to output
 141     ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
 142         MODIFY_REG(bbPort->gpio->MODER, bbPort->gpioModeMask, bbPort->gpioModeOutput);
 143     }
 144
 145     // Reinitialize port group DMA for output
 146
 147     dmaResource_t *dmaResource = bbPort->dmaResource;
 148 #ifdef USE_DMA_REGISTER_CACHE
 149     bbLoadDMARegs(dmaResource, &bbPort->dmaRegOutput);
 150 #else
 151     xDMA_DeInit(dmaResource);
 152     xDMA_Init(dmaResource, &bbPort->outputDmaInit);
 153     // Needs this, as it is DeInit'ed above...
 154     xDMA_ITConfig(dmaResource, DMA_IT_TC, ENABLE);
 155 #endif
 156
 157     // Reinitialize pacer timer for output
 158
 159     bbPort->timhw->tim->ARR = bbPort->outputARR;
 160
 161     bbPort->direction = DSHOT_BITBANG_DIRECTION_OUTPUT;
 162
 163     dbgPinLo(1);
 164 }
 165
 166 #ifdef USE_DSHOT_TELEMETRY
 167 void bbSwitchToInput(bbPort_t *bbPort)
 168 {
 169     dbgPinHi(1);
 170
 171     // Set GPIO to input
 172
 173     ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
 174         MODIFY_REG(bbPort->gpio->MODER, bbPort->gpioModeMask, bbPort->gpioModeInput);
 175     }
 176
 177     // Reinitialize port group DMA for input
 178
 179     dmaResource_t *dmaResource = bbPort->dmaResource;
 180 #ifdef USE_DMA_REGISTER_CACHE
 181     bbLoadDMARegs(dmaResource, &bbPort->dmaRegInput);
 182 #else
 183     xDMA_DeInit(dmaResource);
 184     xDMA_Init(dmaResource, &bbPort->inputDmaInit);
 185     // Needs this, as it is DeInit'ed above...
 186     xDMA_ITConfig(dmaResource, DMA_IT_TC, ENABLE);
 187 #endif
 188
 189     // Reinitialize pacer timer for input
 190
 191     bbPort->timhw->tim->CNT = 0;
 192     bbPort->timhw->tim->ARR = bbPort->inputARR;
 193
 194     bbDMA_Cmd(bbPort, ENABLE);
 195
 196     bbPort->direction = DSHOT_BITBANG_DIRECTION_INPUT;
 197
 198     dbgPinLo(1);
 199 }
 200 #endif
 201
 202 void bbDMAPreconfigure(bbPort_t *bbPort, uint8_t direction)
 203 {
 204     DMA_InitTypeDef *dmainit = (direction == DSHOT_BITBANG_DIRECTION_OUTPUT) ?  &bbPort->outputDmaInit : &bbPort->inputDmaInit;
 205
 206     DMA_StructInit(dmainit);
 207
 208     dmainit->DMA_Mode = DMA_Mode_Normal;
 209     dmainit->DMA_Channel = bbPort->dmaChannel;
 210     dmainit->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
 211     dmainit->DMA_MemoryInc = DMA_MemoryInc_Enable;
 212     dmainit->DMA_FIFOMode = DMA_FIFOMode_Enable ;
 213     dmainit->DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
 214     dmainit->DMA_MemoryBurst = DMA_MemoryBurst_Single ;
 215     dmainit->DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
 216
 217     if (direction == DSHOT_BITBANG_DIRECTION_OUTPUT) {
 218         dmainit->DMA_Priority = DMA_Priority_High;
 219         dmainit->DMA_DIR = DMA_DIR_MemoryToPeripheral;
 220         dmainit->DMA_BufferSize = bbPort->portOutputCount;
 221         dmainit->DMA_PeripheralBaseAddr = (uint32_t)&bbPort->gpio->BSRRL;
 222         dmainit->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
 223         dmainit->DMA_Memory0BaseAddr = (uint32_t)bbPort->portOutputBuffer;
 224         dmainit->DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
 225
 226 #ifdef USE_DMA_REGISTER_CACHE
 227         xDMA_Init(bbPort->dmaResource, dmainit);
 228         bbSaveDMARegs(bbPort->dmaResource, &bbPort->dmaRegOutput);
 229 #endif
 230     } else {
 231         dmainit->DMA_Priority = DMA_Priority_VeryHigh;
 232         dmainit->DMA_DIR = DMA_DIR_PeripheralToMemory;
 233         dmainit->DMA_BufferSize = bbPort->portInputCount;
 234
 235         dmainit->DMA_PeripheralBaseAddr = (uint32_t)&bbPort->gpio->IDR;
 236
 237         dmainit->DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
 238         dmainit->DMA_Memory0BaseAddr = (uint32_t)bbPort->portInputBuffer;
 239         dmainit->DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
 240
 241 #ifdef USE_DMA_REGISTER_CACHE
 242         xDMA_Init(bbPort->dmaResource, dmainit);
 243         bbSaveDMARegs(bbPort->dmaResource, &bbPort->dmaRegInput);
 244 #endif
 245     }
 246 }
 247
 248 void bbTIM_TimeBaseInit(bbPort_t *bbPort, uint16_t period)
 249 {
 250     TIM_TimeBaseInitTypeDef *init = &bbPort->timeBaseInit;
 251
 252     init->TIM_Prescaler = 0; // Feed raw timerClock
 253     init->TIM_ClockDivision = TIM_CKD_DIV1;
 254     init->TIM_CounterMode = TIM_CounterMode_Up;
 255     init->TIM_Period = period;
 256     TIM_TimeBaseInit(bbPort->timhw->tim, init);
 257     TIM_ARRPreloadConfig(bbPort->timhw->tim, ENABLE);
 258 }
 259
 260 void bbTIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
 261 {
 262     TIM_DMACmd(TIMx, TIM_DMASource, NewState);
 263 }
 264
 265 void bbDMA_ITConfig(bbPort_t *bbPort)
 266 {
 267     xDMA_ITConfig(bbPort->dmaResource, DMA_IT_TC, ENABLE);
 268 }
 269
 270 void bbDMA_Cmd(bbPort_t *bbPort, FunctionalState NewState)
 271 {
 272     xDMA_Cmd(bbPort->dmaResource, NewState);
 273 }
 274
 275 int bbDMA_Count(bbPort_t *bbPort)
 276 {
 277     return xDMA_GetCurrDataCounter(bbPort->dmaResource);
 278 }
 279
 280 #endif // USE_DSHOT_BB