2 ******************************************************************************
3 * @file startup_stm32f30x.s
4 * @author MCD Application Team
6 * @date 04-Spetember-2012
7 * @brief STM32F30x Devices vector table for RIDE7 toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Configure the clock system and the external SRAM mounted on
13 * STM3230C-EVAL board to be used as data memory (optional,
14 * to be enabled by user)
15 * - Branches to main in the C library (which eventually
17 * After Reset the Cortex-M4 processor is in Thread mode,
18 * priority is Privileged, and the Stack is set to Main.
19 ******************************************************************************
22 * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
24 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
25 * You may not use this file except in compliance with the License.
26 * You may obtain a copy of the License at:
28 * http://www.st.com/software_license_agreement_liberty_v2
30 * Unless required by applicable law or agreed to in writing, software
31 * distributed under the License is distributed on an "AS IS" BASIS,
32 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
33 * See the License for the specific language governing permissions and
34 * limitations under the License.
36 ******************************************************************************
45 .global Default_Handler
47 .global HardFault_Handler
48 .extern hard_fault_handler_c
50 /* start address for the initialization values of the .data section.
51 defined in linker script */
53 /* start address for the .data section. defined in linker script */
55 /* end address for the .data section. defined in linker script */
57 /* start address for the .bss section. defined in linker script */
59 /* end address for the .bss section. defined in linker script */
61 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
64 * @brief This is the code that gets called when the processor first
65 * starts execution following a reset event. Only the absolutely
66 * necessary set is performed, after which the application
67 * supplied main() routine is called.
72 .section .text.Reset_Handler
74 .type Reset_Handler, %function
76 ldr r0, =0x20009FFC // HJI 11/9/2012
77 ldr r1, =0xDEADBEEF // HJI 11/9/2012
78 ldr r2, [r0, #0] // HJI 11/9/2012
79 str r0, [r0, #0] // HJI 11/9/2012
80 cmp r2, r1 // HJI 11/9/2012
81 beq Reboot_Loader // HJI 11/9/2012
83 /* Copy the data segment initializers from flash to SRAM */
101 /* Zero fill the bss segment. */
111 /* Call the clock system intitialization function.*/
113 /* Call the application's entry point.*/
120 Reboot_Loader: // HJI 11/9/2012
122 // Reboot to ROM // HJI 11/9/2012
123 ldr r0, =0x1FFFD800 // HJI 4/26/2013
124 ldr sp,[r0, #0] // HJI 11/9/2012
125 ldr r0,[r0, #4] // HJI 11/9/2012
126 bx r0 // HJI 11/9/2012
128 .size Reset_Handler, .-Reset_Handler
130 .section .text.Reset_Handler
131 .weak HardFault_Handler
132 .type HardFault_Handler, %function
144 b hard_fault_handler_c
147 .size HardFault_Handler, .-HardFault_Handler
150 * @brief This is the code that gets called when the processor receives an
151 * unexpected interrupt. This simply enters an infinite loop, preserving
152 * the system state for examination by a debugger.
156 .section .text.Default_Handler,"ax",%progbits
160 .size Default_Handler, .-Default_Handler
161 /******************************************************************************
163 * The minimal vector table for a Cortex M4. Note that the proper constructs
164 * must be placed on this to ensure that it ends up at physical address
167 *******************************************************************************/
168 .section .isr_vector,"a",%progbits
169 .type g_pfnVectors, %object
170 .size g_pfnVectors, .-g_pfnVectors
176 .word HardFault_Handler
177 .word MemManage_Handler
178 .word BusFault_Handler
179 .word UsageFault_Handler
185 .word DebugMon_Handler
188 .word SysTick_Handler
189 .word WWDG_IRQHandler
191 .word TAMPER_STAMP_IRQHandler
192 .word RTC_WKUP_IRQHandler
193 .word FLASH_IRQHandler
195 .word EXTI0_IRQHandler
196 .word EXTI1_IRQHandler
197 .word EXTI2_TS_IRQHandler
198 .word EXTI3_IRQHandler
199 .word EXTI4_IRQHandler
200 .word DMA1_Channel1_IRQHandler
201 .word DMA1_Channel2_IRQHandler
202 .word DMA1_Channel3_IRQHandler
203 .word DMA1_Channel4_IRQHandler
204 .word DMA1_Channel5_IRQHandler
205 .word DMA1_Channel6_IRQHandler
206 .word DMA1_Channel7_IRQHandler
207 .word ADC1_2_IRQHandler
208 .word USB_HP_CAN1_TX_IRQHandler
209 .word USB_LP_CAN1_RX0_IRQHandler
210 .word CAN1_RX1_IRQHandler
211 .word CAN1_SCE_IRQHandler
212 .word EXTI9_5_IRQHandler
213 .word TIM1_BRK_TIM15_IRQHandler
214 .word TIM1_UP_TIM16_IRQHandler
215 .word TIM1_TRG_COM_TIM17_IRQHandler
216 .word TIM1_CC_IRQHandler
217 .word TIM2_IRQHandler
218 .word TIM3_IRQHandler
219 .word TIM4_IRQHandler
220 .word I2C1_EV_IRQHandler
221 .word I2C1_ER_IRQHandler
222 .word I2C2_EV_IRQHandler
223 .word I2C2_ER_IRQHandler
224 .word SPI1_IRQHandler
225 .word SPI2_IRQHandler
226 .word USART1_IRQHandler
227 .word USART2_IRQHandler
228 .word USART3_IRQHandler
229 .word EXTI15_10_IRQHandler
230 .word RTC_Alarm_IRQHandler
231 .word USBWakeUp_IRQHandler
232 .word TIM8_BRK_IRQHandler
233 .word TIM8_UP_IRQHandler
234 .word TIM8_TRG_COM_IRQHandler
235 .word TIM8_CC_IRQHandler
236 .word ADC3_IRQHandler
240 .word SPI3_IRQHandler
241 .word UART4_IRQHandler
242 .word UART5_IRQHandler
243 .word TIM6_DAC_IRQHandler
244 .word TIM7_IRQHandler
245 .word DMA2_Channel1_IRQHandler
246 .word DMA2_Channel2_IRQHandler
247 .word DMA2_Channel3_IRQHandler
248 .word DMA2_Channel4_IRQHandler
249 .word DMA2_Channel5_IRQHandler
250 .word ADC4_IRQHandler
253 .word COMP1_2_3_IRQHandler
254 .word COMP4_5_6_IRQHandler
255 .word COMP7_IRQHandler
263 .word USB_HP_IRQHandler
264 .word USB_LP_IRQHandler
265 .word USBWakeUp_RMP_IRQHandler
272 /*******************************************************************************
274 * Provide weak aliases for each Exception handler to the Default_Handler.
275 * As they are weak aliases, any function with the same name will override
278 *******************************************************************************/
281 .thumb_set NMI_Handler,Default_Handler
283 .weak MemManage_Handler
284 .thumb_set MemManage_Handler,Default_Handler
286 .weak BusFault_Handler
287 .thumb_set BusFault_Handler,Default_Handler
289 .weak UsageFault_Handler
290 .thumb_set UsageFault_Handler,Default_Handler
293 .thumb_set SVC_Handler,Default_Handler
295 .weak DebugMon_Handler
296 .thumb_set DebugMon_Handler,Default_Handler
299 .thumb_set PendSV_Handler,Default_Handler
301 .weak SysTick_Handler
302 .thumb_set SysTick_Handler,Default_Handler
304 .weak WWDG_IRQHandler
305 .thumb_set WWDG_IRQHandler,Default_Handler
308 .thumb_set PVD_IRQHandler,Default_Handler
310 .weak TAMPER_STAMP_IRQHandler
311 .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
313 .weak RTC_WKUP_IRQHandler
314 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
316 .weak FLASH_IRQHandler
317 .thumb_set FLASH_IRQHandler,Default_Handler
320 .thumb_set RCC_IRQHandler,Default_Handler
322 .weak EXTI0_IRQHandler
323 .thumb_set EXTI0_IRQHandler,Default_Handler
325 .weak EXTI1_IRQHandler
326 .thumb_set EXTI1_IRQHandler,Default_Handler
328 .weak EXTI2_TS_IRQHandler
329 .thumb_set EXTI2_TS_IRQHandler,Default_Handler
331 .weak EXTI3_IRQHandler
332 .thumb_set EXTI3_IRQHandler,Default_Handler
334 .weak EXTI4_IRQHandler
335 .thumb_set EXTI4_IRQHandler,Default_Handler
337 .weak DMA1_Channel1_IRQHandler
338 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
340 .weak DMA1_Channel2_IRQHandler
341 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
343 .weak DMA1_Channel3_IRQHandler
344 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
346 .weak DMA1_Channel4_IRQHandler
347 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
349 .weak DMA1_Channel5_IRQHandler
350 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
352 .weak DMA1_Channel6_IRQHandler
353 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
355 .weak DMA1_Channel7_IRQHandler
356 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
358 .weak ADC1_2_IRQHandler
359 .thumb_set ADC1_2_IRQHandler,Default_Handler
361 .weak USB_HP_CAN1_TX_IRQHandler
362 .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
364 .weak USB_LP_CAN1_RX0_IRQHandler
365 .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
367 .weak CAN1_RX1_IRQHandler
368 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
370 .weak CAN1_SCE_IRQHandler
371 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
373 .weak EXTI9_5_IRQHandler
374 .thumb_set EXTI9_5_IRQHandler,Default_Handler
376 .weak TIM1_BRK_TIM15_IRQHandler
377 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
379 .weak TIM1_UP_TIM16_IRQHandler
380 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
382 .weak TIM1_TRG_COM_TIM17_IRQHandler
383 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
385 .weak TIM1_CC_IRQHandler
386 .thumb_set TIM1_CC_IRQHandler,Default_Handler
388 .weak TIM2_IRQHandler
389 .thumb_set TIM2_IRQHandler,Default_Handler
391 .weak TIM3_IRQHandler
392 .thumb_set TIM3_IRQHandler,Default_Handler
394 .weak TIM4_IRQHandler
395 .thumb_set TIM4_IRQHandler,Default_Handler
397 .weak I2C1_EV_IRQHandler
398 .thumb_set I2C1_EV_IRQHandler,Default_Handler
400 .weak I2C1_ER_IRQHandler
401 .thumb_set I2C1_ER_IRQHandler,Default_Handler
403 .weak I2C2_EV_IRQHandler
404 .thumb_set I2C2_EV_IRQHandler,Default_Handler
406 .weak I2C2_ER_IRQHandler
407 .thumb_set I2C2_ER_IRQHandler,Default_Handler
409 .weak SPI1_IRQHandler
410 .thumb_set SPI1_IRQHandler,Default_Handler
412 .weak SPI2_IRQHandler
413 .thumb_set SPI2_IRQHandler,Default_Handler
415 .weak USART1_IRQHandler
416 .thumb_set USART1_IRQHandler,Default_Handler
418 .weak USART2_IRQHandler
419 .thumb_set USART2_IRQHandler,Default_Handler
421 .weak USART3_IRQHandler
422 .thumb_set USART3_IRQHandler,Default_Handler
424 .weak EXTI15_10_IRQHandler
425 .thumb_set EXTI15_10_IRQHandler,Default_Handler
427 .weak RTC_Alarm_IRQHandler
428 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
430 .weak USBWakeUp_IRQHandler
431 .thumb_set USBWakeUp_IRQHandler,Default_Handler
433 .weak TIM8_BRK_IRQHandler
434 .thumb_set TIM8_BRK_IRQHandler,Default_Handler
436 .weak TIM8_UP_IRQHandler
437 .thumb_set TIM8_UP_IRQHandler,Default_Handler
439 .weak TIM8_TRG_COM_IRQHandler
440 .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
442 .weak TIM8_CC_IRQHandler
443 .thumb_set TIM8_CC_IRQHandler,Default_Handler
445 .weak ADC3_IRQHandler
446 .thumb_set ADC3_IRQHandler,Default_Handler
448 .weak SPI3_IRQHandler
449 .thumb_set SPI3_IRQHandler,Default_Handler
451 .weak UART4_IRQHandler
452 .thumb_set UART4_IRQHandler,Default_Handler
454 .weak UART5_IRQHandler
455 .thumb_set UART5_IRQHandler,Default_Handler
457 .weak TIM6_DAC_IRQHandler
458 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
460 .weak TIM7_IRQHandler
461 .thumb_set TIM7_IRQHandler,Default_Handler
463 .weak DMA2_Channel1_IRQHandler
464 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
466 .weak DMA2_Channel2_IRQHandler
467 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
469 .weak DMA2_Channel3_IRQHandler
470 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
472 .weak DMA2_Channel4_IRQHandler
473 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
475 .weak DMA2_Channel5_IRQHandler
476 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
478 .weak ADC4_IRQHandler
479 .thumb_set ADC4_IRQHandler,Default_Handler
481 .weak COMP1_2_3_IRQHandler
482 .thumb_set COMP1_2_3_IRQHandler,Default_Handler
484 .weak COMP4_5_6_IRQHandler
485 .thumb_set COMP4_5_6_IRQHandler,Default_Handler
487 .weak COMP7_IRQHandler
488 .thumb_set COMP7_IRQHandler,Default_Handler
490 .weak USB_HP_IRQHandler
491 .thumb_set USB_HP_IRQHandler,Default_Handler
493 .weak USB_LP_IRQHandler
494 .thumb_set USB_LP_IRQHandler,Default_Handler
496 .weak USBWakeUp_RMP_IRQHandler
497 .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
500 .thumb_set FPU_IRQHandler,Default_Handler
501 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/