src/platform/STM32/system_stm32h7xx.c

   1 /*
   2  * This file is part of Cleanflight.
   3  *
   4  * Cleanflight is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * Cleanflight is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with Cleanflight.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <string.h>
  19 #include <stdbool.h>
  20 #include <stdint.h>
  21 #include <stdlib.h>
  22
  23 #include "platform.h"
  24
  25 #include "drivers/accgyro/accgyro_mpu.h"
  26 #include "drivers/exti.h"
  27 #include "drivers/nvic.h"
  28 #include "drivers/persistent.h"
  29 #include "drivers/system.h"
  30
  31 void SystemClock_Config(void);
  32
  33 LOCAL_UNUSED_FUNCTION static void configureMasterClockOutputs(void)
  34 {
  35     // Initialize pins for MCO1 and MCO2 for clock testing/verification
  36
  37     GPIO_InitTypeDef GPIO_InitStruct;
  38
  39     GPIO_InitStruct.Pin = GPIO_PIN_8;
  40     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  41     GPIO_InitStruct.Pull = GPIO_NOPULL;
  42     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  43     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  44
  45     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  46
  47     GPIO_InitStruct.Pin = GPIO_PIN_9;
  48     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  49     GPIO_InitStruct.Pull = GPIO_NOPULL;
  50     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  51     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  52
  53     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  54 }
  55
  56 bool isMPUSoftReset(void)
  57 {
  58     if (cachedRccCsrValue & RCC_RSR_SFTRSTF)
  59         return true;
  60     else
  61         return false;
  62 }
  63
  64 #if defined(USE_FLASH_MEMORY_MAPPED)
  65
  66 /*
  67  * Memory mapped targets use a bootloader which enables memory mapped mode before running the firmware directly from external flash.
  68  * Code running from external flash, i.e. most of the firmware, must not disable peripherals or reconfigure pins used by the CPU to access the flash chip.
  69  * Refer to reference manuals and linker scripts for addresses of memory mapped regions.
  70  * STM32H830 - RM0468 "Table 6. Memory map and default device memory area attributes"
  71  *
  72  * If the config is also stored on the same flash chip that code is running from then VERY special care must be taken when detecting the flash chip
  73  * and when writing an updated config back to the flash.
  74  */
  75
  76 static bool memoryMappedModeEnabledOnBoot = false;
  77
  78 bool isMemoryMappedModeEnabledOnBoot(void)
  79 {
  80     return memoryMappedModeEnabledOnBoot;
  81 }
  82
  83 void memoryMappedModeInit(void)
  84 {
  85 #if defined(STM32H730xx) || defined(STM32H723xx)
  86     // Smaller MCU packages have ONE OCTOSPI interface which supports memory mapped mode.
  87     memoryMappedModeEnabledOnBoot = READ_BIT(OCTOSPI1->CR, OCTOSPI_CR_FMODE) == OCTOSPI_CR_FMODE;
  88 #else
  89 #error No Memory Mapped implementation on current MCU.
  90 #endif
  91 }
  92 #else
  93 bool isMemoryMappedModeEnabledOnBoot(void)
  94 {
  95     return false;
  96 }
  97 #endif
  98
  99 void systemInit(void)
 100 {
 101     // Configure NVIC preempt/priority groups
 102     HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUPING);
 103
 104     // cache RCC->RSR value to use it in isMPUSoftReset() and others
 105     cachedRccCsrValue = RCC->RSR;
 106
 107     /* Accounts for OP Bootloader, set the Vector Table base address as specified in .ld file */
 108     //extern void *isr_vector_table_base;
 109     //NVIC_SetVectorTable((uint32_t)&isr_vector_table_base, 0x0);
 110     //__HAL_RCC_USB_OTG_FS_CLK_DISABLE;
 111
 112     //RCC_ClearFlag();
 113
 114 #if defined(STM32H743xx) || defined(STM32H750xx)
 115     __HAL_RCC_D2SRAM1_CLK_ENABLE();
 116     __HAL_RCC_D2SRAM2_CLK_ENABLE();
 117     __HAL_RCC_D2SRAM3_CLK_ENABLE();
 118 #elif defined(STM32H7A3xx) || defined(STM32H7A3xxQ)
 119     __HAL_RCC_AHBSRAM1_CLK_ENABLE();
 120     __HAL_RCC_AHBSRAM2_CLK_ENABLE();
 121 #elif defined(STM32H723xx) || defined(STM32H725xx) || defined(STM32H730xx)
 122     __HAL_RCC_D2SRAM1_CLK_ENABLE();
 123     __HAL_RCC_D2SRAM2_CLK_ENABLE();
 124 #else
 125 #error Unknown MCU
 126 #endif
 127
 128 #ifdef USE_MCO_OUTPUTS
 129     configureMasterClockOutputs();
 130 #endif
 131
 132     // Init cycle counter
 133     cycleCounterInit();
 134
 135     // SysTick is updated whenever HAL_RCC_ClockConfig is called.
 136 }
 137
 138 void systemReset(void)
 139 {
 140     SCB_DisableDCache();
 141     SCB_DisableICache();
 142
 143     __disable_irq();
 144     NVIC_SystemReset();
 145 }
 146
 147 void systemResetWithoutDisablingCaches(void)
 148 {
 149     __disable_irq();
 150     NVIC_SystemReset();
 151 }
 152
 153 void systemResetToBootloader(bootloaderRequestType_e requestType)
 154 {
 155     switch (requestType) {
 156 #if defined(USE_FLASH_BOOT_LOADER)
 157     case BOOTLOADER_REQUEST_FLASH:
 158         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_BOOTLOADER_REQUEST_FLASH);
 159
 160         break;
 161 #endif
 162     case BOOTLOADER_REQUEST_ROM:
 163     default:
 164         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_BOOTLOADER_REQUEST_ROM);
 165
 166         break;
 167     }
 168
 169     __disable_irq();
 170     NVIC_SystemReset();
 171 }
 172
 173 #if defined(STM32H743xx) || defined(STM32H750xx) || defined(STM32H723xx) || defined(STM32H725xx) || defined(STM32H730xx)
 174 #define SYSMEMBOOT_VECTOR_TABLE ((uint32_t *)0x1ff09800)
 175 #elif defined(STM32H7A3xx) || defined(STM32H7A3xxQ)
 176 #define SYSMEMBOOT_VECTOR_TABLE ((uint32_t *)0x1ff0a000)
 177 #else
 178 #error Unknown MCU
 179 #endif
 180
 181 typedef void *(*bootJumpPtr)(void);
 182
 183 static void systemJumpToBootloader(void)
 184 {
 185     __SYSCFG_CLK_ENABLE();
 186
 187     uint32_t bootStack =  SYSMEMBOOT_VECTOR_TABLE[0];
 188
 189     bootJumpPtr SysMemBootJump = (bootJumpPtr)SYSMEMBOOT_VECTOR_TABLE[1];
 190
 191     __set_MSP(bootStack); //Set the main stack pointer to its default values
 192
 193     SysMemBootJump();
 194
 195     while (1);
 196 }
 197
 198 void systemProcessResetReason(void)
 199 {
 200     uint32_t bootloaderRequest = persistentObjectRead(PERSISTENT_OBJECT_RESET_REASON);
 201
 202     switch (bootloaderRequest) {
 203 #if defined(USE_FLASH_BOOT_LOADER)
 204     case RESET_BOOTLOADER_REQUEST_FLASH:
 205 #endif
 206     case RESET_BOOTLOADER_REQUEST_ROM:
 207         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_BOOTLOADER_POST);
 208         systemJumpToBootloader();
 209
 210         break;
 211
 212     case RESET_FORCED:
 213         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_NONE);
 214         break;
 215
 216     case RESET_BOOTLOADER_POST:
 217         // Boot loader activity magically prevents SysTick from interrupting.
 218         // Issue a soft reset to prevent the condition.
 219         persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_FORCED);
 220         systemResetWithoutDisablingCaches(); // observed that disabling dcache after cold boot with BOOT pin high causes segfault.
 221
 222         break;
 223
 224     case RESET_MSC_REQUEST:
 225     case RESET_NONE:
 226     default:
 227         break;
 228
 229     }
 230 }