Merge pull request #11494 from haslinghuis/dshot_gpio
[betaflight.git] / lib / main / STM32F3 / Drivers / STM32F30x_StdPeriph_Driver / src / stm32f30x_can.c
blob978d604ee8d72d85e12ec71f03a2568de08ada7a
1 /**
2 ******************************************************************************
3 * @file stm32f30x_can.c
4 * @author MCD Application Team
5 * @version V1.1.1
6 * @date 04-April-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Controller area network (CAN) peripheral:
9 * + Initialization and Configuration
10 * + CAN Frames Transmission
11 * + CAN Frames Reception
12 * + Operation modes switch
13 * + Error management
14 * + Interrupts and flags
16 @verbatim
18 ===============================================================================
19 ##### How to use this driver #####
20 ===============================================================================
21 [..]
22 (#) Enable the CAN controller interface clock using
23 RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
24 (#) CAN pins configuration:
25 (++) Enable the clock for the CAN GPIOs using the following function:
26 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE);
27 (++) Connect the involved CAN pins to AF9 using the following function
28 GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_CANx);
29 (++) Configure these CAN pins in alternate function mode by calling
30 the function GPIO_Init();
31 (#) Initialise and configure the CAN using CAN_Init() and
32 CAN_FilterInit() functions.
33 (#) Transmit the desired CAN frame using CAN_Transmit() function.
34 (#) Check the transmission of a CAN frame using CAN_TransmitStatus() function.
35 (#) Cancel the transmission of a CAN frame using CAN_CancelTransmit() function.
36 (#) Receive a CAN frame using CAN_Recieve() function.
37 (#) Release the receive FIFOs using CAN_FIFORelease() function.
38 (#) Return the number of pending received frames using CAN_MessagePending() function.
39 (#) To control CAN events you can use one of the following two methods:
40 (++) Check on CAN flags using the CAN_GetFlagStatus() function.
41 (++) Use CAN interrupts through the function CAN_ITConfig() at initialization
42 phase and CAN_GetITStatus() function into interrupt routines to check
43 if the event has occurred or not.
44 After checking on a flag you should clear it using CAN_ClearFlag()
45 function. And after checking on an interrupt event you should clear it
46 using CAN_ClearITPendingBit() function.
48 @endverbatim
50 ******************************************************************************
51 * @attention
53 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
55 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
56 * You may not use this file except in compliance with the License.
57 * You may obtain a copy of the License at:
59 * http://www.st.com/software_license_agreement_liberty_v2
61 * Unless required by applicable law or agreed to in writing, software
62 * distributed under the License is distributed on an "AS IS" BASIS,
63 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
64 * See the License for the specific language governing permissions and
65 * limitations under the License.
67 ******************************************************************************
70 /* Includes ------------------------------------------------------------------*/
71 #include "stm32f30x_can.h"
72 #include "stm32f30x_rcc.h"
74 /** @addtogroup STM32F30x_StdPeriph_Driver
75 * @{
78 /** @defgroup CAN
79 * @brief CAN driver modules
80 * @{
81 */
82 /* Private typedef -----------------------------------------------------------*/
83 /* Private define ------------------------------------------------------------*/
85 /* CAN Master Control Register bits */
86 #define MCR_DBF ((uint32_t)0x00010000) /* software master reset */
88 /* CAN Mailbox Transmit Request */
89 #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */
91 /* CAN Filter Master Register bits */
92 #define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */
94 /* Time out for INAK bit */
95 #define INAK_TIMEOUT ((uint32_t)0x00FFFFFF)
96 /* Time out for SLAK bit */
97 #define SLAK_TIMEOUT ((uint32_t)0x00FFFFFF)
99 /* Flags in TSR register */
100 #define CAN_FLAGS_TSR ((uint32_t)0x08000000)
101 /* Flags in RF1R register */
102 #define CAN_FLAGS_RF1R ((uint32_t)0x04000000)
103 /* Flags in RF0R register */
104 #define CAN_FLAGS_RF0R ((uint32_t)0x02000000)
105 /* Flags in MSR register */
106 #define CAN_FLAGS_MSR ((uint32_t)0x01000000)
107 /* Flags in ESR register */
108 #define CAN_FLAGS_ESR ((uint32_t)0x00F00000)
110 /* Mailboxes definition */
111 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
112 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
113 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
115 #define CAN_MODE_MASK ((uint32_t) 0x00000003)
117 /* Private macro -------------------------------------------------------------*/
118 /* Private variables ---------------------------------------------------------*/
119 /* Private function prototypes -----------------------------------------------*/
120 /* Private functions ---------------------------------------------------------*/
121 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
123 /** @defgroup CAN_Private_Functions
124 * @{
127 /** @defgroup CAN_Group1 Initialization and Configuration functions
128 * @brief Initialization and Configuration functions
130 @verbatim
131 ===============================================================================
132 ##### Initialization and Configuration functions #####
133 ===============================================================================
134 [..] This section provides functions allowing to:
135 (+) Initialize the CAN peripherals : Prescaler, operating mode, the maximum
136 number of time quanta to perform resynchronization, the number of time
137 quanta in Bit Segment 1 and 2 and many other modes.
138 (+) Configure the CAN reception filter.
139 (+) Select the start bank filter for slave CAN.
140 (+) Enable or disable the Debug Freeze mode for CAN.
141 (+) Enable or disable the CAN Time Trigger Operation communication mode.
143 @endverbatim
144 * @{
148 * @brief Deinitializes the CAN peripheral registers to their default reset values.
149 * @param CANx: where x can be 1 to select the CAN1 peripheral.
150 * @retval None.
152 void CAN_DeInit(CAN_TypeDef* CANx)
154 /* Check the parameters */
155 assert_param(IS_CAN_ALL_PERIPH(CANx));
157 /* Enable CAN1 reset state */
158 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
159 /* Release CAN1 from reset state */
160 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
164 * @brief Initializes the CAN peripheral according to the specified
165 * parameters in the CAN_InitStruct.
166 * @param CANx: where x can be 1 to select the CAN1 peripheral.
167 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that contains
168 * the configuration information for the CAN peripheral.
169 * @retval Constant indicates initialization succeed which will be
170 * CAN_InitStatus_Failed or CAN_InitStatus_Success.
172 uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
174 uint8_t InitStatus = CAN_InitStatus_Failed;
175 __IO uint32_t wait_ack = 0x00000000;
176 /* Check the parameters */
177 assert_param(IS_CAN_ALL_PERIPH(CANx));
178 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
179 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
180 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
181 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
182 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
183 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
184 assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
185 assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
186 assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
187 assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
188 assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
190 /* Exit from sleep mode */
191 CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
193 /* Request initialisation */
194 CANx->MCR |= CAN_MCR_INRQ ;
196 /* Wait the acknowledge */
197 while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
199 wait_ack++;
202 /* Check acknowledge */
203 if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
205 InitStatus = CAN_InitStatus_Failed;
207 else
209 /* Set the time triggered communication mode */
210 if (CAN_InitStruct->CAN_TTCM == ENABLE)
212 CANx->MCR |= CAN_MCR_TTCM;
214 else
216 CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
219 /* Set the automatic bus-off management */
220 if (CAN_InitStruct->CAN_ABOM == ENABLE)
222 CANx->MCR |= CAN_MCR_ABOM;
224 else
226 CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
229 /* Set the automatic wake-up mode */
230 if (CAN_InitStruct->CAN_AWUM == ENABLE)
232 CANx->MCR |= CAN_MCR_AWUM;
234 else
236 CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
239 /* Set the no automatic retransmission */
240 if (CAN_InitStruct->CAN_NART == ENABLE)
242 CANx->MCR |= CAN_MCR_NART;
244 else
246 CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
249 /* Set the receive FIFO locked mode */
250 if (CAN_InitStruct->CAN_RFLM == ENABLE)
252 CANx->MCR |= CAN_MCR_RFLM;
254 else
256 CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
259 /* Set the transmit FIFO priority */
260 if (CAN_InitStruct->CAN_TXFP == ENABLE)
262 CANx->MCR |= CAN_MCR_TXFP;
264 else
266 CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
269 /* Set the bit timing register */
270 CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
271 ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
272 ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
273 ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
274 ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
276 /* Request leave initialisation */
277 CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
279 /* Wait the acknowledge */
280 wait_ack = 0;
282 while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
284 wait_ack++;
287 /* ...and check acknowledged */
288 if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
290 InitStatus = CAN_InitStatus_Failed;
292 else
294 InitStatus = CAN_InitStatus_Success ;
298 /* At this step, return the status of initialization */
299 return InitStatus;
303 * @brief Configures the CAN reception filter according to the specified
304 * parameters in the CAN_FilterInitStruct.
305 * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef structure that
306 * contains the configuration information.
307 * @retval None
309 void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
311 uint32_t filter_number_bit_pos = 0;
312 /* Check the parameters */
313 assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
314 assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
315 assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
316 assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
317 assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
319 filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
321 /* Initialisation mode for the filter */
322 CAN1->FMR |= FMR_FINIT;
324 /* Filter Deactivation */
325 CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
327 /* Filter Scale */
328 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
330 /* 16-bit scale for the filter */
331 CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
333 /* First 16-bit identifier and First 16-bit mask */
334 /* Or First 16-bit identifier and Second 16-bit identifier */
335 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
336 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
337 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
339 /* Second 16-bit identifier and Second 16-bit mask */
340 /* Or Third 16-bit identifier and Fourth 16-bit identifier */
341 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
342 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
343 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
346 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
348 /* 32-bit scale for the filter */
349 CAN1->FS1R |= filter_number_bit_pos;
350 /* 32-bit identifier or First 32-bit identifier */
351 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
352 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
353 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
354 /* 32-bit mask or Second 32-bit identifier */
355 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
356 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
357 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
360 /* Filter Mode */
361 if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
363 /*Id/Mask mode for the filter*/
364 CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
366 else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
368 /*Identifier list mode for the filter*/
369 CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
372 /* Filter FIFO assignment */
373 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
375 /* FIFO 0 assignation for the filter */
376 CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
379 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
381 /* FIFO 1 assignation for the filter */
382 CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
385 /* Filter activation */
386 if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
388 CAN1->FA1R |= filter_number_bit_pos;
391 /* Leave the initialisation mode for the filter */
392 CAN1->FMR &= ~FMR_FINIT;
396 * @brief Fills each CAN_InitStruct member with its default value.
397 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which ill be initialized.
398 * @retval None
400 void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
402 /* Reset CAN init structure parameters values */
404 /* Initialize the time triggered communication mode */
405 CAN_InitStruct->CAN_TTCM = DISABLE;
407 /* Initialize the automatic bus-off management */
408 CAN_InitStruct->CAN_ABOM = DISABLE;
410 /* Initialize the automatic wake-up mode */
411 CAN_InitStruct->CAN_AWUM = DISABLE;
413 /* Initialize the no automatic retransmission */
414 CAN_InitStruct->CAN_NART = DISABLE;
416 /* Initialize the receive FIFO locked mode */
417 CAN_InitStruct->CAN_RFLM = DISABLE;
419 /* Initialize the transmit FIFO priority */
420 CAN_InitStruct->CAN_TXFP = DISABLE;
422 /* Initialize the CAN_Mode member */
423 CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
425 /* Initialize the CAN_SJW member */
426 CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
428 /* Initialize the CAN_BS1 member */
429 CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
431 /* Initialize the CAN_BS2 member */
432 CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
434 /* Initialize the CAN_Prescaler member */
435 CAN_InitStruct->CAN_Prescaler = 1;
439 * @brief Select the start bank filter for slave CAN.
440 * @param CAN_BankNumber: Select the start slave bank filter from 1..27.
441 * @retval None
443 void CAN_SlaveStartBank(uint8_t CAN_BankNumber)
445 /* Check the parameters */
446 assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
448 /* Enter Initialisation mode for the filter */
449 CAN1->FMR |= FMR_FINIT;
451 /* Select the start slave bank */
452 CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
453 CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
455 /* Leave Initialisation mode for the filter */
456 CAN1->FMR &= ~FMR_FINIT;
460 * @brief Enables or disables the DBG Freeze for CAN.
461 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
462 * @param NewState: new state of the CAN peripheral.
463 * This parameter can be: ENABLE (CAN reception/transmission is frozen
464 * during debug. Reception FIFOs can still be accessed/controlled normally)
465 * or DISABLE (CAN is working during debug).
466 * @retval None
468 void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
470 /* Check the parameters */
471 assert_param(IS_CAN_ALL_PERIPH(CANx));
472 assert_param(IS_FUNCTIONAL_STATE(NewState));
474 if (NewState != DISABLE)
476 /* Enable Debug Freeze */
477 CANx->MCR |= MCR_DBF;
479 else
481 /* Disable Debug Freeze */
482 CANx->MCR &= ~MCR_DBF;
487 * @brief Enables or disables the CAN Time TriggerOperation communication mode.
488 * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be
489 * sent over the CAN bus.
490 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
491 * @param NewState: Mode new state. This parameter can be: ENABLE or DISABLE.
492 * When enabled, Time stamp (TIME[15:0]) value is sent in the last two
493 * data bytes of the 8-byte message: TIME[7:0] in data byte 6 and TIME[15:8]
494 * in data byte 7.
495 * @retval None
497 void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState)
499 /* Check the parameters */
500 assert_param(IS_CAN_ALL_PERIPH(CANx));
501 assert_param(IS_FUNCTIONAL_STATE(NewState));
502 if (NewState != DISABLE)
504 /* Enable the TTCM mode */
505 CANx->MCR |= CAN_MCR_TTCM;
507 /* Set TGT bits */
508 CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT);
509 CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT);
510 CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT);
512 else
514 /* Disable the TTCM mode */
515 CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM);
517 /* Reset TGT bits */
518 CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT);
519 CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT);
520 CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT);
524 * @}
528 /** @defgroup CAN_Group2 CAN Frames Transmission functions
529 * @brief CAN Frames Transmission functions
531 @verbatim
532 ===============================================================================
533 ##### CAN Frames Transmission functions #####
534 ===============================================================================
535 [..] This section provides functions allowing to
536 (+) Initiate and transmit a CAN frame message (if there is an empty mailbox).
537 (+) Check the transmission status of a CAN Frame.
538 (+) Cancel a transmit request.
540 @endverbatim
541 * @{
545 * @brief Initiates and transmits a CAN frame message.
546 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
547 * @param TxMessage: pointer to a structure which contains CAN Id, CAN DLC and CAN data.
548 * @retval The number of the mailbox that is used for transmission or
549 * CAN_TxStatus_NoMailBox if there is no empty mailbox.
551 uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
553 uint8_t transmit_mailbox = 0;
554 /* Check the parameters */
555 assert_param(IS_CAN_ALL_PERIPH(CANx));
556 assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
557 assert_param(IS_CAN_RTR(TxMessage->RTR));
558 assert_param(IS_CAN_DLC(TxMessage->DLC));
560 /* Select one empty transmit mailbox */
561 if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
563 transmit_mailbox = 0;
565 else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
567 transmit_mailbox = 1;
569 else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
571 transmit_mailbox = 2;
573 else
575 transmit_mailbox = CAN_TxStatus_NoMailBox;
578 if (transmit_mailbox != CAN_TxStatus_NoMailBox)
580 /* Set up the Id */
581 CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
582 if (TxMessage->IDE == CAN_Id_Standard)
584 assert_param(IS_CAN_STDID(TxMessage->StdId));
585 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \
586 TxMessage->RTR);
588 else
590 assert_param(IS_CAN_EXTID(TxMessage->ExtId));
591 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \
592 TxMessage->IDE | \
593 TxMessage->RTR);
596 /* Set up the DLC */
597 TxMessage->DLC &= (uint8_t)0x0000000F;
598 CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
599 CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
601 /* Set up the data field */
602 CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) |
603 ((uint32_t)TxMessage->Data[2] << 16) |
604 ((uint32_t)TxMessage->Data[1] << 8) |
605 ((uint32_t)TxMessage->Data[0]));
606 CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) |
607 ((uint32_t)TxMessage->Data[6] << 16) |
608 ((uint32_t)TxMessage->Data[5] << 8) |
609 ((uint32_t)TxMessage->Data[4]));
610 /* Request transmission */
611 CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
613 return transmit_mailbox;
617 * @brief Checks the transmission status of a CAN Frame.
618 * @param CANx: where x can be 1 to select the CAN1 peripheral.
619 * @param TransmitMailbox: the number of the mailbox that is used for transmission.
620 * @retval CAN_TxStatus_Ok if the CAN driver transmits the message,
621 * CAN_TxStatus_Failed in an other case.
623 uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
625 uint32_t state = 0;
627 /* Check the parameters */
628 assert_param(IS_CAN_ALL_PERIPH(CANx));
629 assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
631 switch (TransmitMailbox)
633 case (CAN_TXMAILBOX_0):
634 state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0);
635 break;
636 case (CAN_TXMAILBOX_1):
637 state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1);
638 break;
639 case (CAN_TXMAILBOX_2):
640 state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2);
641 break;
642 default:
643 state = CAN_TxStatus_Failed;
644 break;
646 switch (state)
648 /* transmit pending */
649 case (0x0): state = CAN_TxStatus_Pending;
650 break;
651 /* transmit failed */
652 case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed;
653 break;
654 case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed;
655 break;
656 case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed;
657 break;
658 /* transmit succeeded */
659 case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok;
660 break;
661 case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok;
662 break;
663 case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok;
664 break;
665 default: state = CAN_TxStatus_Failed;
666 break;
668 return (uint8_t) state;
672 * @brief Cancels a transmit request.
673 * @param CANx: where x can be 1 to select the CAN1 peripheral.
674 * @param Mailbox: Mailbox number.
675 * @retval None
677 void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
679 /* Check the parameters */
680 assert_param(IS_CAN_ALL_PERIPH(CANx));
681 assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
682 /* abort transmission */
683 switch (Mailbox)
685 case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0;
686 break;
687 case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1;
688 break;
689 case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2;
690 break;
691 default:
692 break;
696 * @}
700 /** @defgroup CAN_Group3 CAN Frames Reception functions
701 * @brief CAN Frames Reception functions
703 @verbatim
704 ===============================================================================
705 ##### CAN Frames Reception functions #####
706 ===============================================================================
707 [..] This section provides functions allowing to
708 (+) Receive a correct CAN frame.
709 (+) Release a specified receive FIFO (2 FIFOs are available).
710 (+) Return the number of the pending received CAN frames.
712 @endverbatim
713 * @{
717 * @brief Receives a correct CAN frame.
718 * @param CANx: where x can be 1 to select the CAN1 peripheral.
719 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
720 * @param RxMessage: pointer to a structure receive frame which contains CAN Id,
721 * CAN DLC, CAN data and FMI number.
722 * @retval None
724 void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
726 /* Check the parameters */
727 assert_param(IS_CAN_ALL_PERIPH(CANx));
728 assert_param(IS_CAN_FIFO(FIFONumber));
729 /* Get the Id */
730 RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
731 if (RxMessage->IDE == CAN_Id_Standard)
733 RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
735 else
737 RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
740 RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
741 /* Get the DLC */
742 RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
743 /* Get the FMI */
744 RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
745 /* Get the data field */
746 RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
747 RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
748 RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
749 RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
750 RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
751 RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
752 RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
753 RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
754 /* Release the FIFO */
755 /* Release FIFO0 */
756 if (FIFONumber == CAN_FIFO0)
758 CANx->RF0R |= CAN_RF0R_RFOM0;
760 /* Release FIFO1 */
761 else /* FIFONumber == CAN_FIFO1 */
763 CANx->RF1R |= CAN_RF1R_RFOM1;
768 * @brief Releases the specified receive FIFO.
769 * @param CANx: where x can be 1 to select the CAN1 peripheral.
770 * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
771 * @retval None
773 void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
775 /* Check the parameters */
776 assert_param(IS_CAN_ALL_PERIPH(CANx));
777 assert_param(IS_CAN_FIFO(FIFONumber));
778 /* Release FIFO0 */
779 if (FIFONumber == CAN_FIFO0)
781 CANx->RF0R |= CAN_RF0R_RFOM0;
783 /* Release FIFO1 */
784 else /* FIFONumber == CAN_FIFO1 */
786 CANx->RF1R |= CAN_RF1R_RFOM1;
791 * @brief Returns the number of pending received messages.
792 * @param CANx: where x can be 1 to select the CAN1 peripheral.
793 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
794 * @retval NbMessage : which is the number of pending message.
796 uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
798 uint8_t message_pending=0;
799 /* Check the parameters */
800 assert_param(IS_CAN_ALL_PERIPH(CANx));
801 assert_param(IS_CAN_FIFO(FIFONumber));
802 if (FIFONumber == CAN_FIFO0)
804 message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
806 else if (FIFONumber == CAN_FIFO1)
808 message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
810 else
812 message_pending = 0;
814 return message_pending;
817 * @}
821 /** @defgroup CAN_Group4 CAN Operation modes functions
822 * @brief CAN Operation modes functions
824 @verbatim
825 ===============================================================================
826 ##### CAN Operation modes functions #####
827 ===============================================================================
828 [..] This section provides functions allowing to select the CAN Operation modes:
829 (+) sleep mode.
830 (+) normal mode.
831 (+) initialization mode.
833 @endverbatim
834 * @{
839 * @brief Selects the CAN Operation mode.
840 * @param CAN_OperatingMode: CAN Operating Mode.
841 * This parameter can be one of @ref CAN_OperatingMode_TypeDef enumeration.
842 * @retval status of the requested mode which can be:
843 * - CAN_ModeStatus_Failed: CAN failed entering the specific mode
844 * - CAN_ModeStatus_Success: CAN Succeed entering the specific mode
846 uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
848 uint8_t status = CAN_ModeStatus_Failed;
850 /* Timeout for INAK or also for SLAK bits*/
851 uint32_t timeout = INAK_TIMEOUT;
853 /* Check the parameters */
854 assert_param(IS_CAN_ALL_PERIPH(CANx));
855 assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
857 if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
859 /* Request initialisation */
860 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
862 /* Wait the acknowledge */
863 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
865 timeout--;
867 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
869 status = CAN_ModeStatus_Failed;
871 else
873 status = CAN_ModeStatus_Success;
876 else if (CAN_OperatingMode == CAN_OperatingMode_Normal)
878 /* Request leave initialisation and sleep mode and enter Normal mode */
879 CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
881 /* Wait the acknowledge */
882 while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
884 timeout--;
886 if ((CANx->MSR & CAN_MODE_MASK) != 0)
888 status = CAN_ModeStatus_Failed;
890 else
892 status = CAN_ModeStatus_Success;
895 else if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
897 /* Request Sleep mode */
898 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
900 /* Wait the acknowledge */
901 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
903 timeout--;
905 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
907 status = CAN_ModeStatus_Failed;
909 else
911 status = CAN_ModeStatus_Success;
914 else
916 status = CAN_ModeStatus_Failed;
919 return (uint8_t) status;
923 * @brief Enters the Sleep (low power) mode.
924 * @param CANx: where x can be 1 to select the CAN1 peripheral.
925 * @retval CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed otherwise.
927 uint8_t CAN_Sleep(CAN_TypeDef* CANx)
929 uint8_t sleepstatus = CAN_Sleep_Failed;
931 /* Check the parameters */
932 assert_param(IS_CAN_ALL_PERIPH(CANx));
934 /* Request Sleep mode */
935 CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
937 /* Sleep mode status */
938 if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
940 /* Sleep mode not entered */
941 sleepstatus = CAN_Sleep_Ok;
943 /* return sleep mode status */
944 return (uint8_t)sleepstatus;
948 * @brief Wakes up the CAN peripheral from sleep mode .
949 * @param CANx: where x can be 1 to select the CAN1 peripheral.
950 * @retval CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed otherwise.
952 uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
954 uint32_t wait_slak = SLAK_TIMEOUT;
955 uint8_t wakeupstatus = CAN_WakeUp_Failed;
957 /* Check the parameters */
958 assert_param(IS_CAN_ALL_PERIPH(CANx));
960 /* Wake up request */
961 CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
963 /* Sleep mode status */
964 while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
966 wait_slak--;
968 if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
970 /* wake up done : Sleep mode exited */
971 wakeupstatus = CAN_WakeUp_Ok;
973 /* return wakeup status */
974 return (uint8_t)wakeupstatus;
977 * @}
981 /** @defgroup CAN_Group5 CAN Bus Error management functions
982 * @brief CAN Bus Error management functions
984 @verbatim
985 ===============================================================================
986 ##### CAN Bus Error management functions #####
987 ===============================================================================
988 [..] This section provides functions allowing to
989 (+) Return the CANx's last error code (LEC).
990 (+) Return the CANx Receive Error Counter (REC).
991 (+) Return the LSB of the 9-bit CANx Transmit Error Counter(TEC).
992 [..]
993 (@) If TEC is greater than 255, The CAN is in bus-off state.
994 (@) If REC or TEC are greater than 96, an Error warning flag occurs.
995 (@) If REC or TEC are greater than 127, an Error Passive Flag occurs.
997 @endverbatim
998 * @{
1002 * @brief Returns the CANx's last error code (LEC).
1003 * @param CANx: where x can be 1 to select the CAN1 peripheral.
1004 * @retval Error code:
1005 * - CAN_ERRORCODE_NoErr: No Error
1006 * - CAN_ERRORCODE_StuffErr: Stuff Error
1007 * - CAN_ERRORCODE_FormErr: Form Error
1008 * - CAN_ERRORCODE_ACKErr : Acknowledgment Error
1009 * - CAN_ERRORCODE_BitRecessiveErr: Bit Recessive Error
1010 * - CAN_ERRORCODE_BitDominantErr: Bit Dominant Error
1011 * - CAN_ERRORCODE_CRCErr: CRC Error
1012 * - CAN_ERRORCODE_SoftwareSetErr: Software Set Error
1014 uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
1016 uint8_t errorcode=0;
1018 /* Check the parameters */
1019 assert_param(IS_CAN_ALL_PERIPH(CANx));
1021 /* Get the error code*/
1022 errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
1024 /* Return the error code*/
1025 return errorcode;
1029 * @brief Returns the CANx Receive Error Counter (REC).
1030 * @note In case of an error during reception, this counter is incremented
1031 * by 1 or by 8 depending on the error condition as defined by the CAN
1032 * standard. After every successful reception, the counter is
1033 * decremented by 1 or reset to 120 if its value was higher than 128.
1034 * When the counter value exceeds 127, the CAN controller enters the
1035 * error passive state.
1036 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1037 * @retval CAN Receive Error Counter.
1039 uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
1041 uint8_t counter=0;
1043 /* Check the parameters */
1044 assert_param(IS_CAN_ALL_PERIPH(CANx));
1046 /* Get the Receive Error Counter*/
1047 counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
1049 /* Return the Receive Error Counter*/
1050 return counter;
1055 * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
1056 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1057 * @retval LSB of the 9-bit CAN Transmit Error Counter.
1059 uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
1061 uint8_t counter=0;
1063 /* Check the parameters */
1064 assert_param(IS_CAN_ALL_PERIPH(CANx));
1066 /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
1067 counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
1069 /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
1070 return counter;
1073 * @}
1076 /** @defgroup CAN_Group6 Interrupts and flags management functions
1077 * @brief Interrupts and flags management functions
1079 @verbatim
1080 ===============================================================================
1081 ##### Interrupts and flags management functions #####
1082 ===============================================================================
1083 [..] This section provides functions allowing to configure the CAN Interrupts
1084 and to get the status and clear flags and Interrupts pending bits.
1085 [..] The CAN provides 14 Interrupts sources and 15 Flags:
1087 *** Flags ***
1088 =============
1089 [..] The 15 flags can be divided on 4 groups:
1090 (+) Transmit Flags:
1091 (++) CAN_FLAG_RQCP0.
1092 (++) CAN_FLAG_RQCP1.
1093 (++) CAN_FLAG_RQCP2: Request completed MailBoxes 0, 1 and 2 Flags
1094 Set when when the last request (transmit or abort) has
1095 been performed.
1096 (+) Receive Flags:
1097 (++) CAN_FLAG_FMP0.
1098 (++) CAN_FLAG_FMP1: FIFO 0 and 1 Message Pending Flags;
1099 Set to signal that messages are pending in the receive FIFO.
1100 These Flags are cleared only by hardware.
1101 (++) CAN_FLAG_FF0.
1102 (++) CAN_FLAG_FF1: FIFO 0 and 1 Full Flags;
1103 Set when three messages are stored in the selected FIFO.
1104 (++) CAN_FLAG_FOV0.
1105 (++) CAN_FLAG_FOV1: FIFO 0 and 1 Overrun Flags;
1106 Set when a new message has been received and passed the filter
1107 while the FIFO was full.
1108 (+) Operating Mode Flags:
1109 (++) CAN_FLAG_WKU: Wake up Flag;
1110 Set to signal that a SOF bit has been detected while the CAN
1111 hardware was in Sleep mode.
1112 (++) CAN_FLAG_SLAK: Sleep acknowledge Flag;
1113 Set to signal that the CAN has entered Sleep Mode.
1114 (+) Error Flags:
1115 (++) CAN_FLAG_EWG: Error Warning Flag;
1116 Set when the warning limit has been reached (Receive Error Counter
1117 or Transmit Error Counter greater than 96).
1118 This Flag is cleared only by hardware.
1119 (++) CAN_FLAG_EPV: Error Passive Flag;
1120 Set when the Error Passive limit has been reached (Receive Error
1121 Counter or Transmit Error Counter greater than 127).
1122 This Flag is cleared only by hardware.
1123 (++) CAN_FLAG_BOF: Bus-Off Flag;
1124 Set when CAN enters the bus-off state. The bus-off state is
1125 entered on TEC overflow, greater than 255.
1126 This Flag is cleared only by hardware.
1127 (++) CAN_FLAG_LEC: Last error code Flag;
1128 Set If a message has been transferred (reception or transmission)
1129 with error, and the error code is hold.
1131 *** Interrupts ***
1132 ==================
1133 [..] The 14 interrupts can be divided on 4 groups:
1134 (+) Transmit interrupt:
1135 (++) CAN_IT_TME: Transmit mailbox empty Interrupt;
1136 If enabled, this interrupt source is pending when no transmit
1137 request are pending for Tx mailboxes.
1138 (+) Receive Interrupts:
1139 (++) CAN_IT_FMP0.
1140 (++) CAN_IT_FMP1: FIFO 0 and FIFO1 message pending Interrupts;
1141 If enabled, these interrupt sources are pending when messages
1142 are pending in the receive FIFO.
1143 The corresponding interrupt pending bits are cleared only by hardware.
1144 (++) CAN_IT_FF0.
1145 (++) CAN_IT_FF1: FIFO 0 and FIFO1 full Interrupts;
1146 If enabled, these interrupt sources are pending when three messages
1147 are stored in the selected FIFO.
1148 (++) CAN_IT_FOV0.
1149 (++) CAN_IT_FOV1: FIFO 0 and FIFO1 overrun Interrupts;
1150 If enabled, these interrupt sources are pending when a new message
1151 has been received and passed the filter while the FIFO was full.
1152 (+) Operating Mode Interrupts:
1153 (++) CAN_IT_WKU: Wake-up Interrupt;
1154 If enabled, this interrupt source is pending when a SOF bit has
1155 been detected while the CAN hardware was in Sleep mode.
1156 (++) CAN_IT_SLK: Sleep acknowledge Interrupt:
1157 If enabled, this interrupt source is pending when the CAN has
1158 entered Sleep Mode.
1159 (+) Error Interrupts:
1160 (++) CAN_IT_EWG: Error warning Interrupt;
1161 If enabled, this interrupt source is pending when the warning limit
1162 has been reached (Receive Error Counter or Transmit Error Counter=96).
1163 (++) CAN_IT_EPV: Error passive Interrupt;
1164 If enabled, this interrupt source is pending when the Error Passive
1165 limit has been reached (Receive Error Counter or Transmit Error Counter>127).
1166 (++) CAN_IT_BOF: Bus-off Interrupt;
1167 If enabled, this interrupt source is pending when CAN enters
1168 the bus-off state. The bus-off state is entered on TEC overflow,
1169 greater than 255.
1170 This Flag is cleared only by hardware.
1171 (++) CAN_IT_LEC: Last error code Interrupt;
1172 If enabled, this interrupt source is pending when a message has
1173 been transferred (reception or transmission) with error and the
1174 error code is hold.
1175 (++) CAN_IT_ERR: Error Interrupt;
1176 If enabled, this interrupt source is pending when an error condition
1177 is pending.
1178 [..] Managing the CAN controller events:
1179 The user should identify which mode will be used in his application to manage
1180 the CAN controller events: Polling mode or Interrupt mode.
1181 (+) In the Polling Mode it is advised to use the following functions:
1182 (++) CAN_GetFlagStatus() : to check if flags events occur.
1183 (++) CAN_ClearFlag() : to clear the flags events.
1184 (+) In the Interrupt Mode it is advised to use the following functions:
1185 (++) CAN_ITConfig() : to enable or disable the interrupt source.
1186 (++) CAN_GetITStatus() : to check if Interrupt occurs.
1187 (++) CAN_ClearITPendingBit() : to clear the Interrupt pending Bit
1188 (corresponding Flag).
1189 This function has no impact on CAN_IT_FMP0 and CAN_IT_FMP1 Interrupts
1190 pending bits since there are cleared only by hardware.
1192 @endverbatim
1193 * @{
1196 * @brief Enables or disables the specified CANx interrupts.
1197 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1198 * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
1199 * This parameter can be:
1200 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1201 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
1202 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1203 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1204 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
1205 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1206 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1207 * @arg CAN_IT_WKU: Wake-up Interrupt
1208 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1209 * @arg CAN_IT_EWG: Error warning Interrupt
1210 * @arg CAN_IT_EPV: Error passive Interrupt
1211 * @arg CAN_IT_BOF: Bus-off Interrupt
1212 * @arg CAN_IT_LEC: Last error code Interrupt
1213 * @arg CAN_IT_ERR: Error Interrupt
1214 * @param NewState: new state of the CAN interrupts.
1215 * This parameter can be: ENABLE or DISABLE.
1216 * @retval None
1218 void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
1220 /* Check the parameters */
1221 assert_param(IS_CAN_ALL_PERIPH(CANx));
1222 assert_param(IS_CAN_IT(CAN_IT));
1223 assert_param(IS_FUNCTIONAL_STATE(NewState));
1225 if (NewState != DISABLE)
1227 /* Enable the selected CANx interrupt */
1228 CANx->IER |= CAN_IT;
1230 else
1232 /* Disable the selected CANx interrupt */
1233 CANx->IER &= ~CAN_IT;
1237 * @brief Checks whether the specified CAN flag is set or not.
1238 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1239 * @param CAN_FLAG: specifies the flag to check.
1240 * This parameter can be one of the following values:
1241 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
1242 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
1243 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
1244 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
1245 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
1246 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
1247 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
1248 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
1249 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
1250 * @arg CAN_FLAG_WKU: Wake up Flag
1251 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
1252 * @arg CAN_FLAG_EWG: Error Warning Flag
1253 * @arg CAN_FLAG_EPV: Error Passive Flag
1254 * @arg CAN_FLAG_BOF: Bus-Off Flag
1255 * @arg CAN_FLAG_LEC: Last error code Flag
1256 * @retval The new state of CAN_FLAG (SET or RESET).
1258 FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
1260 FlagStatus bitstatus = RESET;
1262 /* Check the parameters */
1263 assert_param(IS_CAN_ALL_PERIPH(CANx));
1264 assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
1267 if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
1269 /* Check the status of the specified CAN flag */
1270 if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1272 /* CAN_FLAG is set */
1273 bitstatus = SET;
1275 else
1277 /* CAN_FLAG is reset */
1278 bitstatus = RESET;
1281 else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
1283 /* Check the status of the specified CAN flag */
1284 if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1286 /* CAN_FLAG is set */
1287 bitstatus = SET;
1289 else
1291 /* CAN_FLAG is reset */
1292 bitstatus = RESET;
1295 else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
1297 /* Check the status of the specified CAN flag */
1298 if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1300 /* CAN_FLAG is set */
1301 bitstatus = SET;
1303 else
1305 /* CAN_FLAG is reset */
1306 bitstatus = RESET;
1309 else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
1311 /* Check the status of the specified CAN flag */
1312 if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1314 /* CAN_FLAG is set */
1315 bitstatus = SET;
1317 else
1319 /* CAN_FLAG is reset */
1320 bitstatus = RESET;
1323 else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
1325 /* Check the status of the specified CAN flag */
1326 if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1328 /* CAN_FLAG is set */
1329 bitstatus = SET;
1331 else
1333 /* CAN_FLAG is reset */
1334 bitstatus = RESET;
1337 /* Return the CAN_FLAG status */
1338 return bitstatus;
1342 * @brief Clears the CAN's pending flags.
1343 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1344 * @param CAN_FLAG: specifies the flag to clear.
1345 * This parameter can be one of the following values:
1346 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
1347 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
1348 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
1349 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
1350 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
1351 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
1352 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
1353 * @arg CAN_FLAG_WKU: Wake up Flag
1354 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
1355 * @arg CAN_FLAG_LEC: Last error code Flag
1356 * @retval None
1358 void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
1360 uint32_t flagtmp=0;
1361 /* Check the parameters */
1362 assert_param(IS_CAN_ALL_PERIPH(CANx));
1363 assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
1365 if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
1367 /* Clear the selected CAN flags */
1368 CANx->ESR = (uint32_t)RESET;
1370 else /* MSR or TSR or RF0R or RF1R */
1372 flagtmp = CAN_FLAG & 0x000FFFFF;
1374 if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
1376 /* Receive Flags */
1377 CANx->RF0R = (uint32_t)(flagtmp);
1379 else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
1381 /* Receive Flags */
1382 CANx->RF1R = (uint32_t)(flagtmp);
1384 else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
1386 /* Transmit Flags */
1387 CANx->TSR = (uint32_t)(flagtmp);
1389 else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
1391 /* Operating mode Flags */
1392 CANx->MSR = (uint32_t)(flagtmp);
1398 * @brief Checks whether the specified CANx interrupt has occurred or not.
1399 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1400 * @param CAN_IT: specifies the CAN interrupt source to check.
1401 * This parameter can be one of the following values:
1402 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1403 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
1404 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1405 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1406 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
1407 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1408 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1409 * @arg CAN_IT_WKU: Wake-up Interrupt
1410 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1411 * @arg CAN_IT_EWG: Error warning Interrupt
1412 * @arg CAN_IT_EPV: Error passive Interrupt
1413 * @arg CAN_IT_BOF: Bus-off Interrupt
1414 * @arg CAN_IT_LEC: Last error code Interrupt
1415 * @arg CAN_IT_ERR: Error Interrupt
1416 * @retval The current state of CAN_IT (SET or RESET).
1418 ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
1420 ITStatus itstatus = RESET;
1421 /* Check the parameters */
1422 assert_param(IS_CAN_ALL_PERIPH(CANx));
1423 assert_param(IS_CAN_IT(CAN_IT));
1425 /* check the interrupt enable bit */
1426 if((CANx->IER & CAN_IT) != RESET)
1428 /* in case the Interrupt is enabled, .... */
1429 switch (CAN_IT)
1431 case CAN_IT_TME:
1432 /* Check CAN_TSR_RQCPx bits */
1433 itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);
1434 break;
1435 case CAN_IT_FMP0:
1436 /* Check CAN_RF0R_FMP0 bit */
1437 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);
1438 break;
1439 case CAN_IT_FF0:
1440 /* Check CAN_RF0R_FULL0 bit */
1441 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);
1442 break;
1443 case CAN_IT_FOV0:
1444 /* Check CAN_RF0R_FOVR0 bit */
1445 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);
1446 break;
1447 case CAN_IT_FMP1:
1448 /* Check CAN_RF1R_FMP1 bit */
1449 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);
1450 break;
1451 case CAN_IT_FF1:
1452 /* Check CAN_RF1R_FULL1 bit */
1453 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);
1454 break;
1455 case CAN_IT_FOV1:
1456 /* Check CAN_RF1R_FOVR1 bit */
1457 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);
1458 break;
1459 case CAN_IT_WKU:
1460 /* Check CAN_MSR_WKUI bit */
1461 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);
1462 break;
1463 case CAN_IT_SLK:
1464 /* Check CAN_MSR_SLAKI bit */
1465 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);
1466 break;
1467 case CAN_IT_EWG:
1468 /* Check CAN_ESR_EWGF bit */
1469 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);
1470 break;
1471 case CAN_IT_EPV:
1472 /* Check CAN_ESR_EPVF bit */
1473 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);
1474 break;
1475 case CAN_IT_BOF:
1476 /* Check CAN_ESR_BOFF bit */
1477 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);
1478 break;
1479 case CAN_IT_LEC:
1480 /* Check CAN_ESR_LEC bit */
1481 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);
1482 break;
1483 case CAN_IT_ERR:
1484 /* Check CAN_MSR_ERRI bit */
1485 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI);
1486 break;
1487 default:
1488 /* in case of error, return RESET */
1489 itstatus = RESET;
1490 break;
1493 else
1495 /* in case the Interrupt is not enabled, return RESET */
1496 itstatus = RESET;
1499 /* Return the CAN_IT status */
1500 return itstatus;
1504 * @brief Clears the CANx's interrupt pending bits.
1505 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1506 * @param CAN_IT: specifies the interrupt pending bit to clear.
1507 * This parameter can be one of the following values:
1508 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1509 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1510 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1511 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1512 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1513 * @arg CAN_IT_WKU: Wake-up Interrupt
1514 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1515 * @arg CAN_IT_EWG: Error warning Interrupt
1516 * @arg CAN_IT_EPV: Error passive Interrupt
1517 * @arg CAN_IT_BOF: Bus-off Interrupt
1518 * @arg CAN_IT_LEC: Last error code Interrupt
1519 * @arg CAN_IT_ERR: Error Interrupt
1520 * @retval None
1522 void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
1524 /* Check the parameters */
1525 assert_param(IS_CAN_ALL_PERIPH(CANx));
1526 assert_param(IS_CAN_CLEAR_IT(CAN_IT));
1528 switch (CAN_IT)
1530 case CAN_IT_TME:
1531 /* Clear CAN_TSR_RQCPx (rc_w1)*/
1532 CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;
1533 break;
1534 case CAN_IT_FF0:
1535 /* Clear CAN_RF0R_FULL0 (rc_w1)*/
1536 CANx->RF0R = CAN_RF0R_FULL0;
1537 break;
1538 case CAN_IT_FOV0:
1539 /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
1540 CANx->RF0R = CAN_RF0R_FOVR0;
1541 break;
1542 case CAN_IT_FF1:
1543 /* Clear CAN_RF1R_FULL1 (rc_w1)*/
1544 CANx->RF1R = CAN_RF1R_FULL1;
1545 break;
1546 case CAN_IT_FOV1:
1547 /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
1548 CANx->RF1R = CAN_RF1R_FOVR1;
1549 break;
1550 case CAN_IT_WKU:
1551 /* Clear CAN_MSR_WKUI (rc_w1)*/
1552 CANx->MSR = CAN_MSR_WKUI;
1553 break;
1554 case CAN_IT_SLK:
1555 /* Clear CAN_MSR_SLAKI (rc_w1)*/
1556 CANx->MSR = CAN_MSR_SLAKI;
1557 break;
1558 case CAN_IT_EWG:
1559 /* Clear CAN_MSR_ERRI (rc_w1) */
1560 CANx->MSR = CAN_MSR_ERRI;
1561 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1562 break;
1563 case CAN_IT_EPV:
1564 /* Clear CAN_MSR_ERRI (rc_w1) */
1565 CANx->MSR = CAN_MSR_ERRI;
1566 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1567 break;
1568 case CAN_IT_BOF:
1569 /* Clear CAN_MSR_ERRI (rc_w1) */
1570 CANx->MSR = CAN_MSR_ERRI;
1571 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1572 break;
1573 case CAN_IT_LEC:
1574 /* Clear LEC bits */
1575 CANx->ESR = RESET;
1576 /* Clear CAN_MSR_ERRI (rc_w1) */
1577 CANx->MSR = CAN_MSR_ERRI;
1578 break;
1579 case CAN_IT_ERR:
1580 /*Clear LEC bits */
1581 CANx->ESR = RESET;
1582 /* Clear CAN_MSR_ERRI (rc_w1) */
1583 CANx->MSR = CAN_MSR_ERRI;
1584 /* @note BOFF, EPVF and EWGF Flags are cleared by hardware depending on the CAN Bus status*/
1585 break;
1586 default:
1587 break;
1591 * @}
1595 * @brief Checks whether the CAN interrupt has occurred or not.
1596 * @param CAN_Reg: specifies the CAN interrupt register to check.
1597 * @param It_Bit: specifies the interrupt source bit to check.
1598 * @retval The new state of the CAN Interrupt (SET or RESET).
1600 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
1602 ITStatus pendingbitstatus = RESET;
1604 if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
1606 /* CAN_IT is set */
1607 pendingbitstatus = SET;
1609 else
1611 /* CAN_IT is reset */
1612 pendingbitstatus = RESET;
1614 return pendingbitstatus;
1618 * @}
1622 * @}
1626 * @}
1629 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/