lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_hal_exti.c
   4   * @author  MCD Application Team
   5   * @brief   EXTI HAL module driver.
   6   *          This file provides firmware functions to manage the following
   7   *          functionalities of the General Purpose Input/Output (EXTI) peripheral:
   8   *           + Initialization and de-initialization functions
   9   *           + IO operation functions
  10   *
  11   @verbatim
  12   ==============================================================================
  13                     ##### EXTI Peripheral features #####
  14   ==============================================================================
  15   [..]
  16     (+) Each Exti line can be configured within this driver.
  17
  18     (+) Exti line can be configured in 3 different modes
  19         (++) Interrupt (CORE1 or CORE2 in case of dual core line )
  20         (++) Event (CORE1 or CORE2 in case of dual core line )
  21         (++) a combination of the previous
  22
  23     (+) Configurable Exti lines can be configured with 3 different triggers
  24         (++) Rising
  25         (++) Falling
  26         (++) Both of them
  27
  28     (+) When set in interrupt mode, configurable Exti lines have two diffenrents
  29         interrupt pending registers which allow to distinguish which transition
  30         occurs:
  31         (++) Rising edge pending interrupt
  32         (++) Falling
  33
  34     (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
  35         be selected throught multiplexer.
  36
  37     (+) PendClearSource used to set the D3 Smart Run Domain autoamtic pend clear soure.
  38         It is applicable for line with wkaeup target is Any (CPU1 , CPU2 and D3 smart run domain).
  39         Value can be one of the following:
  40         (++)  EXTI_D3_PENDCLR_SRC_NONE : no pend clear source is selcted :
  41               In this case corresponding bit of D2PMRx register is set to 0
  42                 (+++) On a configurable Line : the D3 domain wakeup signal is
  43                       automatically cleared after after the Delay + Rising Edge detect
  44                 (+++) On a direct Line : the D3 domain wakeup signal is
  45                       cleared after the direct event input signal is cleared
  46
  47         (++)  EXTI_D3_PENDCLR_SRC_DMACH6 : no pend clear source is selcted :
  48               In this case corresponding bit of D2PMRx register is set to 1
  49               and corresponding bits(2) of D3PCRxL/H is set to b00 :
  50                 DMA ch6 event selected as D3 domain pendclear source
  51
  52         (++)  EXTI_D3_PENDCLR_SRC_DMACH7 : no pend clear source is selcted :
  53               In this case corresponding bit of D2PMRx register is set to 1
  54               and corresponding bits(2) of D3PCRxL/H is set to b01 :
  55                 DMA ch7 event selected as D3 domain pendclear source
  56
  57         (++)  EXTI_D3_PENDCLR_SRC_LPTIM4 : no pend clear source is selcted :
  58               In this case corresponding bit of D2PMRx register is set to 1
  59               and corresponding bits(2) of D3PCRxL/H is set to b10 :
  60                 LPTIM4 out selected as D3 domain pendclear source
  61
  62         (++)  EXTI_D3_PENDCLR_SRC_LPTIM5 : no pend clear source is selcted :
  63               In this case corresponding bit of D2PMRx register is set to 1
  64               and corresponding bits(2) of D3PCRxL/H is set to b11 :
  65                 LPTIM5 out selected as D3 domain pendclear source
  66
  67
  68                      ##### How to use this driver #####
  69   ==============================================================================
  70   [..]
  71
  72     (#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
  73         (++) Choose the interrupt line number by setting "Line" member from
  74              EXTI_ConfigTypeDef structure.
  75         (++) Configure the interrupt and/or event mode using "Mode" member from
  76              EXTI_ConfigTypeDef structure.
  77         (++) For configurable lines, configure rising and/or falling trigger
  78              "Trigger" member from EXTI_ConfigTypeDef structure.
  79         (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
  80              member from GPIO_InitTypeDef structure.
  81         (++) For Exti lines with wkaeup target is Any (CPU1 , CPU2 and D3 smart run domain),
  82              choose gpio D3 PendClearSource using PendClearSource
  83              member from EXTI_PendClear_Source structure.
  84
  85     (#) Get current Exti configuration of a dedicated line using
  86         HAL_EXTI_GetConfigLine().
  87         (++) Provide exiting handle as parameter.
  88         (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
  89
  90     (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
  91         (++) Provide exiting handle as parameter.
  92
  93     (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
  94         (++) Provide exiting handle as first parameter.
  95         (++) Provide which callback will be registered using one value from
  96              EXTI_CallbackIDTypeDef.
  97         (++) Provide callback function pointer.
  98
  99     (#) Get interrupt pending bit using HAL_EXTI_GetPending().
 100
 101     (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
 102
 103     (#) Generate software interrupt using HAL_EXTI_GenerateSWI().
 104
 105   @endverbatim
 106   ******************************************************************************
 107   * @attention
 108   *
 109   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
 110   * All rights reserved.</center></h2>
 111   *
 112   * This software component is licensed by ST under BSD 3-Clause license,
 113   * the "License"; You may not use this file except in compliance with the
 114   * License. You may obtain a copy of the License at:
 115   *                        opensource.org/licenses/BSD-3-Clause
 116   *
 117   ******************************************************************************
 118   */
 119
 120 /* Includes ------------------------------------------------------------------*/
 121 #include "stm32h7xx_hal.h"
 122
 123 /** @addtogroup STM32H7xx_HAL_Driver
 124   * @{
 125   */
 126
 127 /** @addtogroup EXTI
 128   * @{
 129   */
 130
 131 #ifdef HAL_EXTI_MODULE_ENABLED
 132
 133 /* Private typedef -----------------------------------------------------------*/
 134 /* Private defines ------------------------------------------------------------*/
 135 /** @defgroup EXTI_Private_Constants EXTI Private Constants
 136   * @{
 137   */
 138 #define EXTI_MODE_OFFSET                    0x04U   /* 0x10: offset between CPU IMR/EMR registers */
 139 #define EXTI_CONFIG_OFFSET                  0x08U   /* 0x20: offset between CPU Rising/Falling configuration registers */
 140 /**
 141   * @}
 142   */
 143
 144 /* Private macros ------------------------------------------------------------*/
 145 /* Private variables ---------------------------------------------------------*/
 146 /* Private function prototypes -----------------------------------------------*/
 147 /* Exported functions --------------------------------------------------------*/
 148
 149 /** @addtogroup EXTI_Exported_Functions
 150   * @{
 151   */
 152
 153 /** @addtogroup EXTI_Exported_Functions_Group1
 154  *  @brief    Configuration functions
 155  *
 156 @verbatim
 157  ===============================================================================
 158               ##### Configuration functions #####
 159  ===============================================================================
 160
 161 @endverbatim
 162   * @{
 163   */
 164
 165 /**
 166   * @brief  Set configuration of a dedicated Exti line.
 167   * @param  hexti Exti handle.
 168   * @param  pExtiConfig Pointer on EXTI configuration to be set.
 169   * @retval HAL Status.
 170   */
 171 HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
 172 {
 173   __IO uint32_t *regaddr;
 174   uint32_t regval;
 175   uint32_t linepos;
 176   uint32_t maskline;
 177   uint32_t offset;
 178   uint32_t pcrlinepos;
 179
 180   /* Check null pointer */
 181   if ((hexti == NULL) || (pExtiConfig == NULL))
 182   {
 183     return HAL_ERROR;
 184   }
 185
 186   /* Check the parameters */
 187   assert_param(IS_EXTI_LINE(pExtiConfig->Line));
 188   assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
 189
 190   /* Assign line number to handle */
 191   hexti->Line = pExtiConfig->Line;
 192
 193   /* compute line register offset and line mask */
 194   offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 195   linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
 196   maskline = (1UL << linepos);
 197
 198   /* Configure triggers for configurable lines */
 199   if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00U)
 200   {
 201     assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
 202
 203     /* Configure rising trigger */
 204     regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
 205     regval = *regaddr;
 206
 207     /* Mask or set line */
 208     if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00U)
 209     {
 210       regval |= maskline;
 211     }
 212     else
 213     {
 214       regval &= ~maskline;
 215     }
 216
 217     /* Store rising trigger mode */
 218     *regaddr = regval;
 219
 220     /* Configure falling trigger */
 221     regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
 222     regval = *regaddr;
 223
 224     /* Mask or set line */
 225     if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00U)
 226     {
 227       regval |= maskline;
 228     }
 229     else
 230     {
 231       regval &= ~maskline;
 232     }
 233
 234     /* Store falling trigger mode */
 235     *regaddr = regval;
 236
 237     /* Configure gpio port selection in case of gpio exti line */
 238     if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
 239     {
 240       assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
 241       assert_param(IS_EXTI_GPIO_PIN(linepos));
 242
 243       regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
 244       regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03U)));
 245       regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03U)));
 246       SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL] = regval;
 247     }
 248   }
 249
 250   /* Configure interrupt mode : read current mode */
 251   regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
 252   regval = *regaddr;
 253
 254   /* Mask or set line */
 255   if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00U)
 256   {
 257     regval |= maskline;
 258   }
 259   else
 260   {
 261     regval &= ~maskline;
 262   }
 263
 264   /* Store interrupt mode */
 265   *regaddr = regval;
 266
 267   /* The event mode cannot be configured if the line does not support it */
 268   assert_param(((pExtiConfig->Line & EXTI_EVENT) == EXTI_EVENT) || ((pExtiConfig->Mode & EXTI_MODE_EVENT) != EXTI_MODE_EVENT));
 269
 270   /* Configure event mode : read current mode */
 271   regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
 272   regval = *regaddr;
 273
 274   /* Mask or set line */
 275   if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00U)
 276   {
 277     regval |= maskline;
 278   }
 279   else
 280   {
 281     regval &= ~maskline;
 282   }
 283
 284   /* Store event mode */
 285   *regaddr = regval;
 286
 287 #if defined (DUAL_CORE)
 288   /* Configure interrupt mode for Core2 : read current mode */
 289   regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
 290   regval = *regaddr;
 291
 292   /* Mask or set line */
 293   if ((pExtiConfig->Mode & EXTI_MODE_CORE2_INTERRUPT) != 0x00U)
 294   {
 295     regval |= maskline;
 296   }
 297   else
 298   {
 299     regval &= ~maskline;
 300   }
 301
 302   /* Store interrupt mode */
 303   *regaddr = regval;
 304
 305   /* The event mode cannot be configured if the line does not support it */
 306   assert_param(((pExtiConfig->Line & EXTI_EVENT) == EXTI_EVENT) || ((pExtiConfig->Mode & EXTI_MODE_CORE2_EVENT) != EXTI_MODE_CORE2_EVENT));
 307
 308   /* Configure event mode : read current mode */
 309   regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
 310   regval = *regaddr;
 311
 312   /* Mask or set line */
 313   if ((pExtiConfig->Mode & EXTI_MODE_CORE2_EVENT) != 0x00U)
 314   {
 315     regval |= maskline;
 316   }
 317   else
 318   {
 319     regval &= ~maskline;
 320   }
 321
 322   /* Store event mode */
 323   *regaddr = regval;
 324 #endif /* DUAL_CORE */
 325
 326   /* Configure the D3 PendClear source in case of Wakeup target is Any */
 327   if ((pExtiConfig->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
 328   {
 329     assert_param(IS_EXTI_D3_PENDCLR_SRC(pExtiConfig->PendClearSource));
 330
 331     /*Calc the PMR register address for the given line */
 332     regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
 333     regval = *regaddr;
 334
 335     if(pExtiConfig->PendClearSource == EXTI_D3_PENDCLR_SRC_NONE)
 336     {
 337       /* Clear D3PMRx register for the given line */
 338       regval &= ~maskline;
 339       /* Store D3PMRx register value */
 340       *regaddr = regval;
 341     }
 342     else
 343     {
 344       /* Set D3PMRx register to 1 for the given line */
 345       regval |= maskline;
 346       /* Store D3PMRx register value */
 347       *regaddr = regval;
 348
 349       if(linepos < 16UL)
 350       {
 351         regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
 352         pcrlinepos = 1UL << linepos;
 353       }
 354       else
 355       {
 356         regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
 357         pcrlinepos = 1UL << (linepos - 16UL);
 358       }
 359
 360       regval = (*regaddr & (~(pcrlinepos * pcrlinepos * 3UL))) | (pcrlinepos * pcrlinepos * (pExtiConfig->PendClearSource - 1UL));
 361       *regaddr = regval;
 362     }
 363   }
 364
 365   return HAL_OK;
 366 }
 367
 368
 369 /**
 370   * @brief  Get configuration of a dedicated Exti line.
 371   * @param  hexti Exti handle.
 372   * @param  pExtiConfig Pointer on structure to store Exti configuration.
 373   * @retval HAL Status.
 374   */
 375 HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
 376 {
 377   __IO uint32_t *regaddr;
 378   uint32_t regval;
 379   uint32_t linepos;
 380   uint32_t maskline;
 381   uint32_t offset;
 382   uint32_t pcrlinepos;
 383
 384   /* Check null pointer */
 385   if ((hexti == NULL) || (pExtiConfig == NULL))
 386   {
 387     return HAL_ERROR;
 388   }
 389
 390   /* Check the parameter */
 391   assert_param(IS_EXTI_LINE(hexti->Line));
 392
 393   /* Store handle line number to configuration structure */
 394   pExtiConfig->Line = hexti->Line;
 395
 396   /* compute line register offset and line mask */
 397   offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 398   linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
 399   maskline = (1UL << linepos);
 400
 401   /* 1] Get core mode : interrupt */
 402   regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
 403   regval = *regaddr;
 404
 405   pExtiConfig->Mode = EXTI_MODE_NONE;
 406
 407   /* Check if selected line is enable */
 408   if ((regval & maskline) != 0x00U)
 409   {
 410     pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
 411   }
 412
 413   /* Get event mode */
 414   regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
 415   regval = *regaddr;
 416
 417   /* Check if selected line is enable */
 418   if ((regval & maskline) != 0x00U)
 419   {
 420     pExtiConfig->Mode |= EXTI_MODE_EVENT;
 421   }
 422 #if defined (DUAL_CORE)
 423   regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
 424   regval = *regaddr;
 425
 426   /* Check if selected line is enable */
 427   if ((regval & maskline) != 0x00U)
 428   {
 429     pExtiConfig->Mode = EXTI_MODE_CORE2_INTERRUPT;
 430   }
 431
 432   /* Get event mode */
 433   regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
 434   regval = *regaddr;
 435
 436   /* Check if selected line is enable */
 437   if ((regval & maskline) != 0x00U)
 438   {
 439     pExtiConfig->Mode |= EXTI_MODE_CORE2_EVENT;
 440   }
 441 #endif /*DUAL_CORE*/
 442
 443   /* 2] Get trigger for configurable lines : rising */
 444   if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00U)
 445   {
 446     regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
 447     regval = *regaddr;
 448
 449     /* Check if configuration of selected line is enable */
 450     if ((regval & maskline) != 0x00U)
 451     {
 452       pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
 453     }
 454     else
 455     {
 456       pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
 457     }
 458
 459     /* Get falling configuration */
 460     regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
 461     regval = *regaddr;
 462
 463     /* Check if configuration of selected line is enable */
 464     if ((regval & maskline) != 0x00U)
 465     {
 466       pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
 467     }
 468
 469     /* Get Gpio port selection for gpio lines */
 470     if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
 471     {
 472       assert_param(IS_EXTI_GPIO_PIN(linepos));
 473
 474       regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
 475       pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3UL - (linepos & 0x03UL)))) >> 24U);
 476     }
 477     else
 478     {
 479       pExtiConfig->GPIOSel = 0x00U;
 480     }
 481   }
 482   else
 483   {
 484     pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
 485     pExtiConfig->GPIOSel = 0x00U;
 486   }
 487
 488   /* 3] Get D3 Pend Clear source */
 489   if ((pExtiConfig->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
 490   {
 491     regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
 492     if(((*regaddr) & linepos) == 0UL)
 493     {
 494       /* if PMR unset, then no pend clear source is used */
 495       pExtiConfig->PendClearSource = EXTI_D3_PENDCLR_SRC_NONE;
 496     }
 497     else
 498     {
 499       /* if wakeup target is any and PMR set, the read pend clear source from  D3PCRxL/H */
 500       if(linepos < 16UL)
 501       {
 502         regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
 503         pcrlinepos = 1UL << linepos;
 504       }
 505       else
 506       {
 507         regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
 508         pcrlinepos = 1UL << (linepos - 16UL);
 509       }
 510
 511       pExtiConfig->PendClearSource = 1UL + ((*regaddr & (pcrlinepos * pcrlinepos * 3UL)) / (pcrlinepos * pcrlinepos));
 512     }
 513   }
 514   else
 515   {
 516     /* if line wakeup target is not any, then no pend clear source is used  */
 517     pExtiConfig->PendClearSource = EXTI_D3_PENDCLR_SRC_NONE;
 518   }
 519
 520   return HAL_OK;
 521 }
 522
 523
 524 /**
 525   * @brief  Clear whole configuration of a dedicated Exti line.
 526   * @param  hexti Exti handle.
 527   * @retval HAL Status.
 528   */
 529 HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
 530 {
 531   __IO uint32_t *regaddr;
 532   uint32_t regval;
 533   uint32_t linepos;
 534   uint32_t maskline;
 535   uint32_t offset;
 536   uint32_t pcrlinepos;
 537
 538   /* Check null pointer */
 539   if (hexti == NULL)
 540   {
 541     return HAL_ERROR;
 542   }
 543
 544   /* Check the parameter */
 545   assert_param(IS_EXTI_LINE(hexti->Line));
 546
 547   /* compute line register offset and line mask */
 548   offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 549   linepos = (hexti->Line & EXTI_PIN_MASK);
 550   maskline = (1UL << linepos);
 551
 552   /* 1] Clear interrupt mode */
 553   regaddr = (__IO uint32_t *)(&EXTI->IMR1 + (EXTI_MODE_OFFSET * offset));
 554   regval = (*regaddr & ~maskline);
 555   *regaddr = regval;
 556
 557   /* 2] Clear event mode */
 558   regaddr = (__IO uint32_t *)(&EXTI->EMR1 + (EXTI_MODE_OFFSET * offset));
 559   regval = (*regaddr & ~maskline);
 560   *regaddr = regval;
 561
 562 #if defined (DUAL_CORE)
 563     /* 1] Clear CM4 interrupt mode */
 564   regaddr = (__IO uint32_t *)(&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
 565   regval = (*regaddr & ~maskline);
 566   *regaddr = regval;
 567
 568   /* 2] Clear CM4 event mode */
 569   regaddr = (__IO uint32_t *)(&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
 570   regval = (*regaddr & ~maskline);
 571   *regaddr = regval;
 572 #endif /* DUAL_CORE */
 573
 574   /* 3] Clear triggers in case of configurable lines */
 575   if ((hexti->Line & EXTI_CONFIG) != 0x00U)
 576   {
 577     regaddr = (__IO uint32_t *)(&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
 578     regval = (*regaddr & ~maskline);
 579     *regaddr = regval;
 580
 581     regaddr = (__IO uint32_t *)(&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
 582     regval = (*regaddr & ~maskline);
 583     *regaddr = regval;
 584
 585     /* Get Gpio port selection for gpio lines */
 586     if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
 587     {
 588       assert_param(IS_EXTI_GPIO_PIN(linepos));
 589
 590       regval = SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL];
 591       regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03UL)));
 592       SYSCFG->EXTICR[(linepos >> 2U) & 0x03UL] = regval;
 593     }
 594   }
 595
 596   /* 4] Clear D3 Config lines */
 597   if ((hexti->Line & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)
 598   {
 599     regaddr = (__IO uint32_t *)(&EXTI->D3PMR1 + (EXTI_CONFIG_OFFSET * offset));
 600     *regaddr = (*regaddr & ~maskline);
 601
 602     if(linepos < 16UL)
 603     {
 604       regaddr = (__IO uint32_t *)(&EXTI->D3PCR1L + (EXTI_CONFIG_OFFSET * offset));
 605       pcrlinepos = 1UL << linepos;
 606     }
 607     else
 608     {
 609       regaddr = (__IO uint32_t *)(&EXTI->D3PCR1H + (EXTI_CONFIG_OFFSET * offset));
 610       pcrlinepos = 1UL << (linepos - 16UL);
 611     }
 612
 613     /*Clear D3 PendClear source */
 614     *regaddr &= (~(pcrlinepos * pcrlinepos * 3UL));
 615   }
 616
 617   return HAL_OK;
 618 }
 619
 620
 621 /**
 622   * @brief  Register callback for a dedicated Exti line.
 623   * @param  hexti Exti handle.
 624   * @param  CallbackID User callback identifier.
 625   *         This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
 626   * @param  pPendingCbfn function pointer to be stored as callback.
 627   * @retval HAL Status.
 628   */
 629 HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
 630 {
 631   HAL_StatusTypeDef status = HAL_OK;
 632
 633   /* Check null pointer */
 634   if (hexti == NULL)
 635   {
 636     return HAL_ERROR;
 637   }
 638
 639   switch (CallbackID)
 640   {
 641     case  HAL_EXTI_COMMON_CB_ID:
 642       hexti->PendingCallback = pPendingCbfn;
 643       break;
 644
 645     default:
 646       status = HAL_ERROR;
 647       break;
 648   }
 649
 650   return status;
 651 }
 652
 653
 654 /**
 655   * @brief  Store line number as handle private field.
 656   * @param  hexti Exti handle.
 657   * @param  ExtiLine Exti line number.
 658   *         This parameter can be from 0 to @ref EXTI_LINE_NB.
 659   * @retval HAL Status.
 660   */
 661 HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
 662 {
 663   /* Check the parameters */
 664   assert_param(IS_EXTI_LINE(ExtiLine));
 665
 666   /* Check null pointer */
 667   if (hexti == NULL)
 668   {
 669     return HAL_ERROR;
 670   }
 671   else
 672   {
 673     /* Store line number as handle private field */
 674     hexti->Line = ExtiLine;
 675
 676     return HAL_OK;
 677   }
 678 }
 679
 680
 681 /**
 682   * @}
 683   */
 684
 685 /** @addtogroup EXTI_Exported_Functions_Group2
 686  *  @brief EXTI IO functions.
 687  *
 688 @verbatim
 689  ===============================================================================
 690                        ##### IO operation functions #####
 691  ===============================================================================
 692
 693 @endverbatim
 694   * @{
 695   */
 696
 697 /**
 698   * @brief  Handle EXTI interrupt request.
 699   * @param  hexti Exti handle.
 700   * @retval none.
 701   */
 702 void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
 703 {
 704   __IO uint32_t *regaddr;
 705   uint32_t regval;
 706   uint32_t maskline;
 707   uint32_t offset;
 708
 709   /* Compute line register offset and line mask */
 710   offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 711   maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
 712
 713 #if defined(DUAL_CORE)
 714   if (HAL_GetCurrentCPUID() == CM7_CPUID)
 715   {
 716     /* Get pending register address */
 717     regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 718   }
 719   else /* Cortex-M4*/
 720   {
 721     /* Get pending register address */
 722     regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
 723   }
 724 #else
 725   regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 726 #endif /* DUAL_CORE */
 727
 728   /* Get pending bit  */
 729   regval = (*regaddr & maskline);
 730
 731   if (regval != 0x00U)
 732   {
 733     /* Clear pending bit */
 734     *regaddr = maskline;
 735
 736     /* Call callback */
 737     if (hexti->PendingCallback != NULL)
 738     {
 739       hexti->PendingCallback();
 740     }
 741   }
 742 }
 743
 744
 745 /**
 746   * @brief  Get interrupt pending bit of a dedicated line.
 747   * @param  hexti Exti handle.
 748   * @param  Edge Specify which pending edge as to be checked.
 749   *         This parameter can be one of the following values:
 750   *           @arg @ref EXTI_TRIGGER_RISING_FALLING
 751   *         This parameter is kept for compatibility with other series.
 752   * @retval 1 if interrupt is pending else 0.
 753   */
 754 uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
 755 {
 756   __IO uint32_t *regaddr;
 757   uint32_t regval;
 758   uint32_t linepos;
 759   uint32_t maskline;
 760   uint32_t offset;
 761
 762   /* Check parameters */
 763   assert_param(IS_EXTI_LINE(hexti->Line));
 764   assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
 765   assert_param(IS_EXTI_PENDING_EDGE(Edge));
 766
 767   /* compute line register offset and line mask */
 768   offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 769   linepos = (hexti->Line & EXTI_PIN_MASK);
 770   maskline = (1UL << linepos);
 771
 772 #if defined(DUAL_CORE)
 773   if (HAL_GetCurrentCPUID() == CM7_CPUID)
 774   {
 775     /* Get pending register address */
 776     regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 777   }
 778   else /* Cortex-M4 */
 779   {
 780     /* Get pending register address */
 781     regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
 782   }
 783 #else
 784   regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 785 #endif /* DUAL_CORE */
 786
 787   /* return 1 if bit is set else 0 */
 788   regval = ((*regaddr & maskline) >> linepos);
 789   return regval;
 790 }
 791
 792
 793 /**
 794   * @brief  Clear interrupt pending bit of a dedicated line.
 795   * @param  hexti Exti handle.
 796   * @param  Edge Specify which pending edge as to be clear.
 797   *         This parameter can be one of the following values:
 798   *           @arg @ref EXTI_TRIGGER_RISING_FALLING
 799   *         This parameter is kept for compatibility with other series.
 800   * @retval None.
 801   */
 802 void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
 803 {
 804   __IO uint32_t *regaddr;
 805   uint32_t maskline;
 806   uint32_t offset;
 807
 808   /* Check parameters */
 809   assert_param(IS_EXTI_LINE(hexti->Line));
 810   assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
 811   assert_param(IS_EXTI_PENDING_EDGE(Edge));
 812
 813   /* compute line register offset and line mask */
 814   offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 815   maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
 816
 817 #if defined(DUAL_CORE)
 818   if (HAL_GetCurrentCPUID() == CM7_CPUID)
 819   {
 820     /* Get pending register address */
 821     regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 822   }
 823   else /* Cortex-M4 */
 824   {
 825     /* Get pending register address */
 826     regaddr = (__IO uint32_t *)(&EXTI->C2PR1 + (EXTI_MODE_OFFSET * offset));
 827   }
 828 #else
 829   regaddr = (__IO uint32_t *)(&EXTI->PR1 + (EXTI_MODE_OFFSET * offset));
 830 #endif /* DUAL_CORE */
 831
 832   /* Clear Pending bit */
 833   *regaddr =  maskline;
 834 }
 835
 836 /**
 837   * @brief  Generate a software interrupt for a dedicated line.
 838   * @param  hexti Exti handle.
 839   * @retval None.
 840   */
 841 void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
 842 {
 843   __IO uint32_t *regaddr;
 844   uint32_t maskline;
 845   uint32_t offset;
 846
 847   /* Check parameters */
 848   assert_param(IS_EXTI_LINE(hexti->Line));
 849   assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
 850
 851   /* compute line register offset and line mask */
 852   offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
 853   maskline = (1UL << (hexti->Line & EXTI_PIN_MASK));
 854
 855   regaddr = (__IO uint32_t *)(&EXTI->SWIER1 + (EXTI_CONFIG_OFFSET * offset));
 856   *regaddr = maskline;
 857 }
 858
 859
 860 /**
 861   * @}
 862   */
 863
 864 /**
 865   * @}
 866   */
 867
 868 #endif /* HAL_EXTI_MODULE_ENABLED */
 869 /**
 870   * @}
 871   */
 872
 873 /**
 874   * @}
 875   */
 876
 877 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/