src/main/drivers/rx/rx_cc2500.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 /*
  22 * CC2500 SPI drivers
  23 */
  24 #include <stdbool.h>
  25 #include <stdint.h>
  26 #include <stdlib.h>
  27
  28 #include "platform.h"
  29
  30 #ifdef USE_RX_CC2500
  31
  32 #include "build/build_config.h"
  33
  34 #include "pg/rx.h"
  35 #include "pg/rx_spi.h"
  36
  37 #include "drivers/io.h"
  38 #include "drivers/rx/rx_spi.h"
  39 #include "drivers/system.h"
  40 #include "drivers/time.h"
  41
  42 #include "rx_cc2500.h"
  43
  44 #define NOP 0xFF
  45
  46 void cc2500ReadFifo(uint8_t *dpbuffer, uint8_t len)
  47 {
  48     rxSpiReadCommandMulti(CC2500_3F_RXFIFO | CC2500_READ_BURST, NOP, dpbuffer, len);
  49 }
  50
  51 void cc2500WriteCommand(uint8_t command, uint8_t data)
  52 {
  53     // Burst writes require an interbyte gap, see fig. 7, pg. 22 in https://www.ti.com/lit/ds/symlink/cc2500.pdf
  54     // As such gaps can't be inserted if DMA is being used, inhibit DMA on this bus for the duration of this call
  55     rxSpiDmaEnable(false);
  56     rxSpiWriteCommand(command, data);
  57     rxSpiDmaEnable(true);
  58 }
  59
  60 void cc2500WriteCommandMulti(uint8_t command, const uint8_t *data, uint8_t length)
  61 {
  62     // Burst writes require an interbyte gap, see fig. 7, pg. 22 in https://www.ti.com/lit/ds/symlink/cc2500.pdf
  63     // As such gaps can't be inserted if DMA is being used, inhibit DMA on this bus for the duration of this call
  64     rxSpiDmaEnable(false);
  65     rxSpiWriteCommandMulti(command, data, length);
  66     rxSpiDmaEnable(true);
  67 }
  68
  69 void cc2500WriteFifo(uint8_t *dpbuffer, uint8_t len)
  70 {
  71     cc2500Strobe(CC2500_SFTX); // 0x3B SFTX
  72     cc2500WriteCommandMulti(CC2500_3F_TXFIFO | CC2500_WRITE_BURST,
  73                                  dpbuffer, len);
  74     cc2500Strobe(CC2500_STX); // 0x35
  75 }
  76
  77 void cc2500ReadRegisterMulti(uint8_t address, uint8_t *data, uint8_t length)
  78 {
  79     rxSpiReadCommandMulti(address, NOP, data, length);
  80 }
  81
  82 void cc2500WriteRegisterMulti(uint8_t address, uint8_t *data,
  83                                   uint8_t length)
  84 {
  85     cc2500WriteCommandMulti(address, data, length);
  86 }
  87
  88 uint8_t cc2500ReadReg(uint8_t reg)
  89 {
  90     return rxSpiReadCommand(reg | 0x80, NOP);
  91 }
  92
  93 void cc2500Strobe(uint8_t address) { rxSpiWriteByte(address); }
  94
  95 void cc2500WriteReg(uint8_t address, uint8_t data)
  96 {
  97     cc2500WriteCommand(address, data);
  98 }
  99
 100 void cc2500SetPower(uint8_t power)
 101 {
 102     const uint8_t patable[8] = {
 103         0xC5, // -12dbm
 104         0x97, // -10dbm
 105         0x6E, // -8dbm
 106         0x7F, // -6dbm
 107         0xA9, // -4dbm
 108         0xBB, // -2dbm
 109         0xFE, // 0dbm
 110         0xFF  // 1.5dbm
 111     };
 112     if (power > 7)
 113         power = 7;
 114     cc2500WriteReg(CC2500_3E_PATABLE, patable[power]);
 115 }
 116
 117 uint8_t cc2500Reset(void)
 118 {
 119     cc2500Strobe(CC2500_SRES);
 120     delayMicroseconds(1000); // 1000us
 121     // CC2500_SetTxRxMode(TXRX_OFF);
 122     // RX_EN_off;//off tx
 123     // TX_EN_off;//off rx
 124     return cc2500ReadReg(CC2500_0E_FREQ1) == 0xC4; // check if reset
 125 }
 126 #endif