2 ******************************************************************************
3 * @file stm32f3xx_hal_i2s.h
4 * @author MCD Application Team
5 * @brief Header file of I2S HAL module.
6 ******************************************************************************
9 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 ******************************************************************************
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F3xx_HAL_I2S_H
38 #define __STM32F3xx_HAL_I2S_H
44 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
45 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
46 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
47 defined(STM32F373xC) || defined(STM32F378xx)
49 /* Includes ------------------------------------------------------------------*/
50 #include "stm32f3xx_hal_def.h"
52 /** @addtogroup STM32F3xx_HAL_Driver
60 /* Exported types ------------------------------------------------------------*/
61 /** @defgroup I2S_Exported_Types I2S Exported Types
66 * @brief I2S Init structure definition
70 uint32_t Mode
; /*!< Specifies the I2S operating mode.
71 This parameter can be a value of @ref I2S_Mode */
73 uint32_t Standard
; /*!< Specifies the standard used for the I2S communication.
74 This parameter can be a value of @ref I2S_Standard */
76 uint32_t DataFormat
; /*!< Specifies the data format for the I2S communication.
77 This parameter can be a value of @ref I2S_Data_Format */
79 uint32_t MCLKOutput
; /*!< Specifies whether the I2S MCLK output is enabled or not.
80 This parameter can be a value of @ref I2S_MCLK_Output */
82 uint32_t AudioFreq
; /*!< Specifies the frequency selected for the I2S communication.
83 This parameter can be a value of @ref I2S_Audio_Frequency */
85 uint32_t CPOL
; /*!< Specifies the idle state of the I2S clock.
86 This parameter can be a value of @ref I2S_Clock_Polarity */
88 uint32_t ClockSource
; /*!< Specifies the I2S Clock Source.
89 This parameter can be a value of @ref I2S_Clock_Source */
91 uint32_t FullDuplexMode
; /*!< Specifies the I2S FullDuplex mode.
92 This parameter can be a value of @ref I2S_FullDuplex_Mode */
97 * @brief HAL State structures definition
101 HAL_I2S_STATE_RESET
= 0x00U
, /*!< I2S not yet initialized or disabled */
102 HAL_I2S_STATE_READY
= 0x01U
, /*!< I2S initialized and ready for use */
103 HAL_I2S_STATE_BUSY
= 0x02U
, /*!< I2S internal process is ongoing */
104 HAL_I2S_STATE_BUSY_TX
= 0x03U
, /*!< Data Transmission process is ongoing */
105 HAL_I2S_STATE_BUSY_RX
= 0x04U
, /*!< Data Reception process is ongoing */
106 HAL_I2S_STATE_BUSY_TX_RX
= 0x05U
, /*!< Data Transmission and Reception process is ongoing */
107 HAL_I2S_STATE_TIMEOUT
= 0x06U
, /*!< I2S timeout state */
108 HAL_I2S_STATE_ERROR
= 0x07 /*!< I2S error state */
109 }HAL_I2S_StateTypeDef
;
112 * @brief I2S handle Structure definition
116 SPI_TypeDef
*Instance
; /*!< I2S registers base address */
118 I2S_InitTypeDef Init
; /*!< I2S communication parameters */
120 uint16_t *pTxBuffPtr
; /*!< Pointer to I2S Tx transfer buffer */
122 __IO
uint16_t TxXferSize
; /*!< I2S Tx transfer size */
124 __IO
uint16_t TxXferCount
; /*!< I2S Tx transfer Counter */
126 uint16_t *pRxBuffPtr
; /*!< Pointer to I2S Rx transfer buffer */
128 __IO
uint16_t RxXferSize
; /*!< I2S Rx transfer size */
130 __IO
uint16_t RxXferCount
; /*!< I2S Rx transfer counter
131 (This field is initialized at the
132 same value as transfer size at the
133 beginning of the transfer and
134 decremented when a sample is received.
135 NbSamplesReceived = RxBufferSize-RxBufferCount) */
137 DMA_HandleTypeDef
*hdmatx
; /*!< I2S Tx DMA handle parameters */
139 DMA_HandleTypeDef
*hdmarx
; /*!< I2S Rx DMA handle parameters */
141 __IO HAL_LockTypeDef Lock
; /*!< I2S locking object */
143 __IO HAL_I2S_StateTypeDef State
; /*!< I2S communication state */
145 __IO
uint32_t ErrorCode
; /*!< I2S Error code
146 This parameter can be a value of @ref I2S_Error */
153 /* Exported constants --------------------------------------------------------*/
154 /** @defgroup I2S_Exported_Constants I2S Exported Constants
157 /** @defgroup I2S_Error I2S Error
160 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
161 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
162 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
163 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
164 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
165 #define HAL_I2S_ERROR_UNKNOW (0x00000010U) /*!< Unknow Error error */
170 /** @defgroup I2S_Clock_Source I2S Clock Source
173 #define I2S_CLOCK_EXTERNAL (0x00000001U)
174 #define I2S_CLOCK_SYSCLK (0x00000002U)
176 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
177 ((CLOCK) == I2S_CLOCK_SYSCLK))
182 /** @defgroup I2S_Mode I2S Mode
185 #define I2S_MODE_SLAVE_TX (0x00000000U)
186 #define I2S_MODE_SLAVE_RX (0x00000100U)
187 #define I2S_MODE_MASTER_TX (0x00000200U)
188 #define I2S_MODE_MASTER_RX (0x00000300U)
190 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
191 ((MODE) == I2S_MODE_SLAVE_RX) || \
192 ((MODE) == I2S_MODE_MASTER_TX)|| \
193 ((MODE) == I2S_MODE_MASTER_RX))
198 /** @defgroup I2S_Standard I2S Standard
201 #define I2S_STANDARD_PHILIPS (0x00000000U)
202 #define I2S_STANDARD_MSB (0x00000010U)
203 #define I2S_STANDARD_LSB (0x00000020U)
204 #define I2S_STANDARD_PCM_SHORT (0x00000030U)
205 #define I2S_STANDARD_PCM_LONG (0x000000B0U)
207 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
208 ((STANDARD) == I2S_STANDARD_MSB) || \
209 ((STANDARD) == I2S_STANDARD_LSB) || \
210 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
211 ((STANDARD) == I2S_STANDARD_PCM_LONG))
216 /** @defgroup I2S_Data_Format I2S Data Format
219 #define I2S_DATAFORMAT_16B (0x00000000U)
220 #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
221 #define I2S_DATAFORMAT_24B (0x00000003U)
222 #define I2S_DATAFORMAT_32B (0x00000005U)
224 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
225 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
226 ((FORMAT) == I2S_DATAFORMAT_24B) || \
227 ((FORMAT) == I2S_DATAFORMAT_32B))
232 /** @defgroup I2S_MCLK_Output I2S MCLK Output
235 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
236 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
238 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
239 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
244 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
247 #define I2S_AUDIOFREQ_192K (192000U)
248 #define I2S_AUDIOFREQ_96K (96000U)
249 #define I2S_AUDIOFREQ_48K (48000U)
250 #define I2S_AUDIOFREQ_44K (44100U)
251 #define I2S_AUDIOFREQ_32K (32000U)
252 #define I2S_AUDIOFREQ_22K (22050U)
253 #define I2S_AUDIOFREQ_16K (16000U)
254 #define I2S_AUDIOFREQ_11K (11025U)
255 #define I2S_AUDIOFREQ_8K (8000U)
256 #define I2S_AUDIOFREQ_DEFAULT (2U)
258 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
259 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
260 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
265 /** @defgroup I2S_FullDuplex_Mode I2S Full Duplex Mode
268 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
269 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
271 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
272 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
277 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
280 #define I2S_CPOL_LOW (0x00000000U)
281 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
283 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
284 ((CPOL) == I2S_CPOL_HIGH))
289 /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
292 #define I2S_IT_TXE SPI_CR2_TXEIE
293 #define I2S_IT_RXNE SPI_CR2_RXNEIE
294 #define I2S_IT_ERR SPI_CR2_ERRIE
299 /** @defgroup I2S_Flag_definition I2S Flag definition
302 #define I2S_FLAG_TXE SPI_SR_TXE
303 #define I2S_FLAG_RXNE SPI_SR_RXNE
305 #define I2S_FLAG_UDR SPI_SR_UDR
306 #define I2S_FLAG_OVR SPI_SR_OVR
307 #define I2S_FLAG_FRE SPI_SR_FRE
309 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
310 #define I2S_FLAG_BSY SPI_SR_BSY
319 /* Exported macros -----------------------------------------------------------*/
320 /** @defgroup I2S_Exported_Macros I2S Exported Macros
324 /** @brief Reset I2S handle state
325 * @param __HANDLE__ I2S handle.
328 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
330 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
331 * @param __HANDLE__ specifies the I2S Handle.
334 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
335 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint16_t)(~SPI_I2SCFGR_I2SE))
337 /** @brief Enable or disable the specified I2S interrupts.
338 * @param __HANDLE__ specifies the I2S Handle.
339 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
340 * This parameter can be one of the following values:
341 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
342 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
343 * @arg I2S_IT_ERR: Error interrupt enable
346 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
347 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__)))
349 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
350 * @param __HANDLE__ specifies the I2S Handle.
351 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
352 * @param __INTERRUPT__ specifies the I2S interrupt source to check.
353 * This parameter can be one of the following values:
354 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
355 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
356 * @arg I2S_IT_ERR: Error interrupt enable
357 * @retval The new state of __IT__ (TRUE or FALSE).
359 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
361 /** @brief Checks whether the specified I2S flag is set or not.
362 * @param __HANDLE__ specifies the I2S Handle.
363 * @param __FLAG__ specifies the flag to check.
364 * This parameter can be one of the following values:
365 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
366 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
367 * @arg I2S_FLAG_UDR: Underrun flag
368 * @arg I2S_FLAG_OVR: Overrun flag
369 * @arg I2S_FLAG_FRE: Frame error flag
370 * @arg I2S_FLAG_CHSIDE: Channel Side flag
371 * @arg I2S_FLAG_BSY: Busy flag
372 * @retval The new state of __FLAG__ (TRUE or FALSE).
374 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
376 /** @brief Clears the I2S OVR pending flag.
377 * @param __HANDLE__ specifies the I2S Handle.
380 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
381 __IO uint32_t tmpreg; \
382 tmpreg = (__HANDLE__)->Instance->DR; \
383 tmpreg = (__HANDLE__)->Instance->SR; \
386 /** @brief Clears the I2S UDR pending flag.
387 * @param __HANDLE__ specifies the I2S Handle.
390 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
391 __IO uint32_t tmpreg;\
392 tmpreg = ((__HANDLE__)->Instance->SR);\
399 /* Include I2S HAL Extended module */
400 #include "stm32f3xx_hal_i2s_ex.h"
402 /* Exported functions --------------------------------------------------------*/
403 /** @addtogroup I2S_Exported_Functions
407 /** @addtogroup I2S_Exported_Functions_Group1
411 /* Initialization and de-initialization functions *****************************/
412 HAL_StatusTypeDef
HAL_I2S_Init(I2S_HandleTypeDef
*hi2s
);
413 HAL_StatusTypeDef
HAL_I2S_DeInit (I2S_HandleTypeDef
*hi2s
);
414 void HAL_I2S_MspInit(I2S_HandleTypeDef
*hi2s
);
415 void HAL_I2S_MspDeInit(I2S_HandleTypeDef
*hi2s
);
420 /** @addtogroup I2S_Exported_Functions_Group2
423 /* I/O operation functions ***************************************************/
424 /* Blocking mode: Polling */
425 HAL_StatusTypeDef
HAL_I2S_Transmit(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
, uint32_t Timeout
);
426 HAL_StatusTypeDef
HAL_I2S_Receive(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
, uint32_t Timeout
);
428 /* Non-Blocking mode: Interrupt */
429 HAL_StatusTypeDef
HAL_I2S_Transmit_IT(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
);
430 HAL_StatusTypeDef
HAL_I2S_Receive_IT(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
);
431 void HAL_I2S_IRQHandler(I2S_HandleTypeDef
*hi2s
);
433 /* Non-Blocking mode: DMA */
434 HAL_StatusTypeDef
HAL_I2S_Transmit_DMA(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
);
435 HAL_StatusTypeDef
HAL_I2S_Receive_DMA(I2S_HandleTypeDef
*hi2s
, uint16_t *pData
, uint16_t Size
);
437 HAL_StatusTypeDef
HAL_I2S_DMAPause(I2S_HandleTypeDef
*hi2s
);
438 HAL_StatusTypeDef
HAL_I2S_DMAResume(I2S_HandleTypeDef
*hi2s
);
439 HAL_StatusTypeDef
HAL_I2S_DMAStop(I2S_HandleTypeDef
*hi2s
);
441 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
442 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef
*hi2s
);
443 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef
*hi2s
);
444 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef
*hi2s
);
445 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef
*hi2s
);
446 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef
*hi2s
);
451 /** @addtogroup I2S_Exported_Functions_Group3
454 /* Peripheral Control and State functions ************************************/
455 HAL_I2S_StateTypeDef
HAL_I2S_GetState(I2S_HandleTypeDef
*hi2s
);
456 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef
*hi2s
);
474 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
475 /* STM32F302xC || STM32F303xC || STM32F358xx || */
476 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
477 /* STM32F373xC || STM32F378xx */
484 #endif /* __STM32F3xx_HAL_I2S_H */
486 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/