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Updated and Validated
[betaflight.git] / lib / main / STM32F7 / Drivers / STM32F7xx_HAL_Driver / Inc / stm32f7xx_hal_mmc.h
blob0850b6a96fcee4b9c82a88fbb62daf65f4c943d4
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_mmc.h
4 * @author MCD Application Team
5 * @brief Header file of MMC HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F7xx_HAL_MMC_H
22 #define __STM32F7xx_HAL_MMC_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f7xx_ll_sdmmc.h"
30
31 /** @addtogroup STM32F7xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup MMC
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup MMC_Exported_Types MMC Exported Types
41 * @{
42 */
43
44 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
45 * @{
46 */
47 typedef enum
48 {
49 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
50 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
51 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
52 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
53 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
54 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
55 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */
56 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
57 }HAL_MMC_StateTypeDef;
58 /**
59 * @}
60 */
61
62 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
63 * @{
64 */
65 typedef enum
66 {
67 HAL_MMC_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
68 HAL_MMC_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
69 HAL_MMC_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
70 HAL_MMC_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
71 HAL_MMC_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
72 HAL_MMC_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
73 HAL_MMC_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
74 HAL_MMC_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
75 HAL_MMC_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card response Error */
76 }HAL_MMC_CardStateTypeDef;
77 /**
78 * @}
79 */
80
81 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
82 * @{
83 */
84 #define MMC_InitTypeDef SDMMC_InitTypeDef
85 #define MMC_TypeDef SDMMC_TypeDef
86
87 /**
88 * @brief MMC Card Information Structure definition
89 */
90 typedef struct
91 {
92 uint32_t CardType; /*!< Specifies the card Type */
93
94 uint32_t Class; /*!< Specifies the class of the card class */
95
96 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
97
98 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
99
100 uint32_t BlockSize; /*!< Specifies one block size in bytes */
101
102 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
103
104 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
105
106 }HAL_MMC_CardInfoTypeDef;
107
108 /**
109 * @brief MMC handle Structure definition
110 */
111 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
112 typedef struct __MMC_HandleTypeDef
113 #else
114 typedef struct
115 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
116 {
117 MMC_TypeDef *Instance; /*!< MMC registers base address */
118
119 MMC_InitTypeDef Init; /*!< MMC required parameters */
120
121 HAL_LockTypeDef Lock; /*!< MMC locking object */
122
123 uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
124
125 uint32_t TxXferSize; /*!< MMC Tx Transfer size */
126
127 uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
128
129 uint32_t RxXferSize; /*!< MMC Rx Transfer size */
130
131 __IO uint32_t Context; /*!< MMC transfer context */
132
133 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
134
135 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
136
137 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */
138
139 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */
140
141 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
142
143 uint32_t CSD[4]; /*!< MMC card specific data table */
144
145 uint32_t CID[4]; /*!< MMC card identification number table */
146
147 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
148 void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
149 void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
150 void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc);
151 void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc);
152
153 void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc);
154 void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc);
155 #endif
156 }MMC_HandleTypeDef;
157
158 /**
159 * @}
160 */
161
162 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
163 * @{
164 */
165 typedef struct
166 {
167 __IO uint8_t CSDStruct; /*!< CSD structure */
168 __IO uint8_t SysSpecVersion; /*!< System specification version */
169 __IO uint8_t Reserved1; /*!< Reserved */
170 __IO uint8_t TAAC; /*!< Data read access time 1 */
171 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
172 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
173 __IO uint16_t CardComdClasses; /*!< Card command classes */
174 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
175 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
176 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
177 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
178 __IO uint8_t DSRImpl; /*!< DSR implemented */
179 __IO uint8_t Reserved2; /*!< Reserved */
180 __IO uint32_t DeviceSize; /*!< Device Size */
181 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
182 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
183 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
184 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
185 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
186 __IO uint8_t EraseGrSize; /*!< Erase group size */
187 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
188 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
189 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
190 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
191 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
192 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
193 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
194 __IO uint8_t Reserved3; /*!< Reserved */
195 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
196 __IO uint8_t FileFormatGrouop; /*!< File format group */
197 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
198 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
199 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
200 __IO uint8_t FileFormat; /*!< File format */
201 __IO uint8_t ECC; /*!< ECC code */
202 __IO uint8_t CSD_CRC; /*!< CSD CRC */
203 __IO uint8_t Reserved4; /*!< Always 1 */
204
205 }HAL_MMC_CardCSDTypeDef;
206 /**
207 * @}
208 */
209
210 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
211 * @{
212 */
213 typedef struct
214 {
215 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
216 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
217 __IO uint32_t ProdName1; /*!< Product Name part1 */
218 __IO uint8_t ProdName2; /*!< Product Name part2 */
219 __IO uint8_t ProdRev; /*!< Product Revision */
220 __IO uint32_t ProdSN; /*!< Product Serial Number */
221 __IO uint8_t Reserved1; /*!< Reserved1 */
222 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
223 __IO uint8_t CID_CRC; /*!< CID CRC */
224 __IO uint8_t Reserved2; /*!< Always 1 */
225
226 }HAL_MMC_CardCIDTypeDef;
227 /**
228 * @}
229 */
230 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
231 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
232 * @{
233 */
234 typedef enum
235 {
236 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */
237 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */
238 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */
239 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */
240
241 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */
242 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */
243 }HAL_MMC_CallbackIDTypeDef;
244 /**
245 * @}
246 */
247
248 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
249 * @{
250 */
251 typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc);
252 /**
253 * @}
254 */
255 #endif
256 /**
257 * @}
258 */
259
260 /* Exported constants --------------------------------------------------------*/
261 /** @defgroup MMC_Exported_Constants Exported Constants
262 * @{
263 */
264
265 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
266 #define CAPACITY ((uint32_t)0x80000000U) /*!< 2 G bytes constant */
267
268 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
269 * @{
270 */
271 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
272 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
273 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
274 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
275 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
276 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
277 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
278 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
279 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
280 number of transferred bytes does not match the block length */
281 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
282 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
283 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
284 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
285 command or if there was an attempt to access a locked card */
286 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
287 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
288 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
289 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
290 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
291 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
292 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
293 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
294 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
295 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
296 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
297 of erase sequence command was received */
298 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
299 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
300 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
301 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
302 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
303 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
304 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
305 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
306 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
307 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
308 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
309 #endif
310 /**
311 * @}
312 */
313
314 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
315 * @{
316 */
317 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
318 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
319 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
320 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
321 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
322 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
323 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
324
325 /**
326 * @}
327 */
328
329 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
330 * @{
331 */
332 /**
333 * @brief
334 */
335 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */
336 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */
337 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */
338 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */
339 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
340 /**
341 * @}
342 */
343
344 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
345 * @{
346 */
347 #define MMC_HIGH_VOLTAGE_CARD ((uint32_t)0x00000000U)
348 #define MMC_DUAL_VOLTAGE_CARD ((uint32_t)0x00000001U)
349 /**
350 * @}
351 */
352
353 /**
354 * @}
355 */
356
357 /* Exported macro ------------------------------------------------------------*/
358 /** @defgroup MMC_Exported_macros MMC Exported Macros
359 * @brief macros to handle interrupts and specific clock configurations
360 * @{
361 */
362 /** @brief Reset MMC handle state.
363 * @param __HANDLE__ : MMC handle.
364 * @retval None
365 */
366 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
367 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \
368 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \
369 (__HANDLE__)->MspInitCallback = NULL; \
370 (__HANDLE__)->MspDeInitCallback = NULL; \
371 } while(0)
372 #else
373 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
374 #endif
375
376 /**
377 * @brief Enable the MMC device.
378 * @retval None
379 */
380 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance)
381
382 /**
383 * @brief Disable the MMC device.
384 * @retval None
385 */
386 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance)
387
388 /**
389 * @brief Enable the SDMMC DMA transfer.
390 * @retval None
391 */
392 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance)
393
394 /**
395 * @brief Disable the SDMMC DMA transfer.
396 * @retval None
397 */
398 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance)
399
400 /**
401 * @brief Enable the MMC device interrupt.
402 * @param __HANDLE__ MMC Handle
403 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
404 * This parameter can be one or a combination of the following values:
405 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
406 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
407 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
408 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
409 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
410 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
411 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
412 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
413 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
414 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
415 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
416 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
417 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
418 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
419 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
420 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
421 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
422 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
423 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
424 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
425 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
426 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
427 * @retval None
428 */
429 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
430
431 /**
432 * @brief Disable the MMC device interrupt.
433 * @param __HANDLE__ MMC Handle
434 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
435 * This parameter can be one or a combination of the following values:
436 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
437 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
438 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
439 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
440 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
441 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
442 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
443 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
444 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
445 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
446 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
447 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
448 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
449 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
450 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
451 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
452 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
453 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
454 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
455 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
456 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
457 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
458 * @retval None
459 */
460 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
461
462 /**
463 * @brief Check whether the specified MMC flag is set or not.
464 * @param __HANDLE__ MMC Handle
465 * @param __FLAG__ specifies the flag to check.
466 * This parameter can be one of the following values:
467 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
468 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
469 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
470 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
471 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
472 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
473 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
474 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
475 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
476 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
477 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress
478 * @arg SDMMC_FLAG_TXACT: Data transmit in progress
479 * @arg SDMMC_FLAG_RXACT: Data receive in progress
480 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
481 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
482 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
483 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
484 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
485 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
486 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO
487 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO
488 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
489 * @retval The new state of MMC FLAG (SET or RESET).
490 */
491 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
492
493 /**
494 * @brief Clear the MMC's pending flags.
495 * @param __HANDLE__ MMC Handle
496 * @param __FLAG__ specifies the flag to clear.
497 * This parameter can be one or a combination of the following values:
498 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
499 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
500 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
501 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
502 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
503 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
504 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
505 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
506 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
507 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
508 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
509 * @retval None
510 */
511 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
512
513 /**
514 * @brief Check whether the specified MMC interrupt has occurred or not.
515 * @param __HANDLE__ MMC Handle
516 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
517 * This parameter can be one of the following values:
518 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
519 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
520 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
521 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
522 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
523 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
524 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
525 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
526 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
527 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
528 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
529 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
530 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
531 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
532 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
533 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
534 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
535 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
536 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
537 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
538 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
539 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
540 * @retval The new state of SD IT (SET or RESET).
541 */
542 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
543
544 /**
545 * @brief Clear the MMC's interrupt pending bits.
546 * @param __HANDLE__ MMC Handle
547 * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
548 * This parameter can be one or a combination of the following values:
549 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
550 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
551 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
552 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
553 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
554 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
555 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
556 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
557 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
558 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
559 * @retval None
560 */
561 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
562
563 /**
564 * @}
565 */
566
567 /* Exported functions --------------------------------------------------------*/
568 /** @defgroup MMC_Exported_Functions MMC Exported Functions
569 * @{
570 */
571
572 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
573 * @{
574 */
575 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
576 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
577 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
578 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
579 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
580 /**
581 * @}
582 */
583
584 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
585 * @{
586 */
587 /* Blocking mode: Polling */
588 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
589 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
590 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
591 /* Non-Blocking mode: IT */
592 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
593 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
594 /* Non-Blocking mode: DMA */
595 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
596 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
597
598 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
599
600 /* Callback in non blocking modes (DMA) */
601 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
602 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
603 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
604 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
605
606 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
607 /* MMC callback registering/unregistering */
608 HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback);
609 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
610 #endif
611 /**
612 * @}
613 */
614
615 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
616 * @{
617 */
618 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
619 /**
620 * @}
621 */
622
623 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
624 * @{
625 */
626 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
627 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
628 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
629 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
630 /**
631 * @}
632 */
633
634 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
635 * @{
636 */
637 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
638 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
639 /**
640 * @}
641 */
642
643 /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
644 * @{
645 */
646 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
647 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
648 /**
649 * @}
650 */
651
652 /* Private types -------------------------------------------------------------*/
653 /** @defgroup MMC_Private_Types MMC Private Types
654 * @{
655 */
656
657 /**
658 * @}
659 */
660
661 /* Private defines -----------------------------------------------------------*/
662 /** @defgroup MMC_Private_Defines MMC Private Defines
663 * @{
664 */
665
666 /**
667 * @}
668 */
669
670 /* Private variables ---------------------------------------------------------*/
671 /** @defgroup MMC_Private_Variables MMC Private Variables
672 * @{
673 */
674
675 /**
676 * @}
677 */
678
679 /* Private constants ---------------------------------------------------------*/
680 /** @defgroup MMC_Private_Constants MMC Private Constants
681 * @{
682 */
683
684 /**
685 * @}
686 */
687
688 /* Private macros ------------------------------------------------------------*/
689 /** @defgroup MMC_Private_Macros MMC Private Macros
690 * @{
691 */
692
693 /**
694 * @}
695 */
696
697 /* Private functions prototypes ----------------------------------------------*/
698 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
699 * @{
700 */
701
702 /**
703 * @}
704 */
705
706 /* Private functions ---------------------------------------------------------*/
707 /** @defgroup MMC_Private_Functions MMC Private Functions
708 * @{
709 */
710
711 /**
712 * @}
713 */
714
715
716 /**
717 * @}
718 */
719
720 /**
721 * @}
722 */
723
724 /**
725 * @}
726 */
727
728
729 #ifdef __cplusplus
730 }
731 #endif
732
733
734 #endif /* __STM32F7xx_HAL_MMC_H */
735
736 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/