lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of PWR HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef __STM32F7xx_HAL_PWR_H
  22 #define __STM32F7xx_HAL_PWR_H
  23
  24 #ifdef __cplusplus
  25  extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32f7xx_hal_def.h"
  30
  31 /** @addtogroup STM32F7xx_HAL_Driver
  32   * @{
  33   */
  34
  35 /** @addtogroup PWR
  36   * @{
  37   */
  38
  39 /* Exported types ------------------------------------------------------------*/
  40
  41 /** @defgroup PWR_Exported_Types PWR Exported Types
  42   * @{
  43   */
  44
  45 /**
  46   * @brief  PWR PVD configuration structure definition
  47   */
  48 typedef struct
  49 {
  50   uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
  51                             This parameter can be a value of @ref PWR_PVD_detection_level */
  52
  53   uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
  54                            This parameter can be a value of @ref PWR_PVD_Mode */
  55 }PWR_PVDTypeDef;
  56
  57 /**
  58   * @}
  59   */
  60
  61 /* Exported constants --------------------------------------------------------*/
  62 /** @defgroup PWR_Exported_Constants PWR Exported Constants
  63   * @{
  64   */
  65
  66 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  67   * @{
  68   */
  69 #define PWR_PVDLEVEL_0                  PWR_CR1_PLS_LEV0
  70 #define PWR_PVDLEVEL_1                  PWR_CR1_PLS_LEV1
  71 #define PWR_PVDLEVEL_2                  PWR_CR1_PLS_LEV2
  72 #define PWR_PVDLEVEL_3                  PWR_CR1_PLS_LEV3
  73 #define PWR_PVDLEVEL_4                  PWR_CR1_PLS_LEV4
  74 #define PWR_PVDLEVEL_5                  PWR_CR1_PLS_LEV5
  75 #define PWR_PVDLEVEL_6                  PWR_CR1_PLS_LEV6
  76 #define PWR_PVDLEVEL_7                  PWR_CR1_PLS_LEV7/* External input analog voltage
  77                                                           (Compare internally to VREFINT) */
  78
  79 /**
  80   * @}
  81   */
  82
  83 /** @defgroup PWR_PVD_Mode PWR PVD Mode
  84   * @{
  85   */
  86 #define PWR_PVD_MODE_NORMAL                 ((uint32_t)0x00000000U)   /*!< basic mode is used */
  87 #define PWR_PVD_MODE_IT_RISING              ((uint32_t)0x00010001U)   /*!< External Interrupt Mode with Rising edge trigger detection */
  88 #define PWR_PVD_MODE_IT_FALLING             ((uint32_t)0x00010002U)   /*!< External Interrupt Mode with Falling edge trigger detection */
  89 #define PWR_PVD_MODE_IT_RISING_FALLING      ((uint32_t)0x00010003U)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  90 #define PWR_PVD_MODE_EVENT_RISING           ((uint32_t)0x00020001U)   /*!< Event Mode with Rising edge trigger detection */
  91 #define PWR_PVD_MODE_EVENT_FALLING          ((uint32_t)0x00020002U)   /*!< Event Mode with Falling edge trigger detection */
  92 #define PWR_PVD_MODE_EVENT_RISING_FALLING   ((uint32_t)0x00020003U)   /*!< Event Mode with Rising/Falling edge trigger detection */
  93 /**
  94   * @}
  95   */
  96
  97 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
  98   * @{
  99   */
 100 #define PWR_MAINREGULATOR_ON                        ((uint32_t)0x00000000U)
 101 #define PWR_LOWPOWERREGULATOR_ON                    PWR_CR1_LPDS
 102 /**
 103   * @}
 104   */
 105
 106 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
 107   * @{
 108   */
 109 #define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01U)
 110 #define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02U)
 111 /**
 112   * @}
 113   */
 114
 115 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
 116   * @{
 117   */
 118 #define PWR_STOPENTRY_WFI               ((uint8_t)0x01U)
 119 #define PWR_STOPENTRY_WFE               ((uint8_t)0x02U)
 120 /**
 121   * @}
 122   */
 123
 124 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
 125   * @{
 126   */
 127 #define PWR_REGULATOR_VOLTAGE_SCALE1         PWR_CR1_VOS
 128 #define PWR_REGULATOR_VOLTAGE_SCALE2         PWR_CR1_VOS_1
 129 #define PWR_REGULATOR_VOLTAGE_SCALE3         PWR_CR1_VOS_0
 130 /**
 131   * @}
 132   */
 133
 134 /** @defgroup PWR_Flag PWR Flag
 135   * @{
 136   */
 137 #define PWR_FLAG_WU                     PWR_CSR1_WUIF
 138 #define PWR_FLAG_SB                     PWR_CSR1_SBF
 139 #define PWR_FLAG_PVDO                   PWR_CSR1_PVDO
 140 #define PWR_FLAG_BRR                    PWR_CSR1_BRR
 141 #define PWR_FLAG_VOSRDY                 PWR_CSR1_VOSRDY
 142 /**
 143   * @}
 144   */
 145
 146 /**
 147   * @}
 148   */
 149
 150 /* Exported macro ------------------------------------------------------------*/
 151 /** @defgroup PWR_Exported_Macro PWR Exported Macro
 152   * @{
 153   */
 154
 155 /** @brief  macros configure the main internal regulator output voltage.
 156   * @param  __REGULATOR__ specifies the regulator output voltage to achieve
 157   *         a tradeoff between performance and power consumption when the device does
 158   *         not operate at the maximum frequency (refer to the datasheets for more details).
 159   *          This parameter can be one of the following values:
 160   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
 161   *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
 162   *            @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
 163   * @retval None
 164   */
 165 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do {                                                     \
 166                                                             __IO uint32_t tmpreg;                               \
 167                                                             MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \
 168                                                             /* Delay after an RCC peripheral clock enabling */  \
 169                                                             tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS);           \
 170                                                             UNUSED(tmpreg);                                     \
 171                                                                                         } while(0)
 172
 173 /** @brief  Check PWR flag is set or not.
 174   * @param  __FLAG__ specifies the flag to check.
 175   *           This parameter can be one of the following values:
 176   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 177   *                  was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B),
 178   *                  RTC Tamper event, RTC TimeStamp event or RTC Wakeup)).
 179   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 180   *                  resumed from StandBy mode.
 181   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 182   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
 183   *                  For this reason, this bit is equal to 0 after Standby or reset
 184   *                  until the PVDE bit is set.
 185   *            @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
 186   *                  when the device wakes up from Standby mode or by a system reset
 187   *                  or power reset.
 188   *            @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
 189   *                 scaling output selection is ready.
 190   * @retval The new state of __FLAG__ (TRUE or FALSE).
 191   */
 192 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__))
 193
 194 /** @brief  Clear the PWR's pending flags.
 195   * @param  __FLAG__ specifies the flag to clear.
 196   *          This parameter can be one of the following values:
 197   *            @arg PWR_FLAG_SB: StandBy flag
 198   */
 199 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |=  (__FLAG__) << 2)
 200
 201 /**
 202   * @brief Enable the PVD Exti Line 16.
 203   * @retval None.
 204   */
 205 #define __HAL_PWR_PVD_EXTI_ENABLE_IT()   (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
 206
 207 /**
 208   * @brief Disable the PVD EXTI Line 16.
 209   * @retval None.
 210   */
 211 #define __HAL_PWR_PVD_EXTI_DISABLE_IT()  (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
 212
 213 /**
 214   * @brief Enable event on PVD Exti Line 16.
 215   * @retval None.
 216   */
 217 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
 218
 219 /**
 220   * @brief Disable event on PVD Exti Line 16.
 221   * @retval None.
 222   */
 223 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
 224
 225 /**
 226   * @brief Enable the PVD Extended Interrupt Rising Trigger.
 227   * @retval None.
 228   */
 229 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 230
 231 /**
 232   * @brief Disable the PVD Extended Interrupt Rising Trigger.
 233   * @retval None.
 234   */
 235 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 236
 237 /**
 238   * @brief Enable the PVD Extended Interrupt Falling Trigger.
 239   * @retval None.
 240   */
 241 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()   SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 242
 243
 244 /**
 245   * @brief Disable the PVD Extended Interrupt Falling Trigger.
 246   * @retval None.
 247   */
 248 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 249
 250
 251 /**
 252   * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
 253   * @retval None.
 254   */
 255 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
 256
 257 /**
 258   * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
 259   * @retval None.
 260   */
 261 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
 262
 263 /**
 264   * @brief checks whether the specified PVD Exti interrupt flag is set or not.
 265   * @retval EXTI PVD Line Status.
 266   */
 267 #define __HAL_PWR_PVD_EXTI_GET_FLAG()  (EXTI->PR & (PWR_EXTI_LINE_PVD))
 268
 269 /**
 270   * @brief Clear the PVD Exti flag.
 271   * @retval None.
 272   */
 273 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()  (EXTI->PR = (PWR_EXTI_LINE_PVD))
 274
 275 /**
 276   * @brief  Generates a Software interrupt on PVD EXTI line.
 277   * @retval None
 278   */
 279 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
 280
 281 /**
 282   * @}
 283   */
 284
 285 /* Include PWR HAL Extension module */
 286 #include "stm32f7xx_hal_pwr_ex.h"
 287
 288 /* Exported functions --------------------------------------------------------*/
 289 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
 290   * @{
 291   */
 292
 293 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
 294   * @{
 295   */
 296 /* Initialization and de-initialization functions *****************************/
 297 void HAL_PWR_DeInit(void);
 298 void HAL_PWR_EnableBkUpAccess(void);
 299 void HAL_PWR_DisableBkUpAccess(void);
 300 /**
 301   * @}
 302   */
 303
 304 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
 305   * @{
 306   */
 307 /* Peripheral Control functions  **********************************************/
 308 /* PVD configuration */
 309 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
 310 void HAL_PWR_EnablePVD(void);
 311 void HAL_PWR_DisablePVD(void);
 312
 313 /* WakeUp pins configuration */
 314 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
 315 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 316
 317 /* Low Power modes entry */
 318 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 319 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 320 void HAL_PWR_EnterSTANDBYMode(void);
 321
 322 /* Power PVD IRQ Handler */
 323 void HAL_PWR_PVD_IRQHandler(void);
 324 void HAL_PWR_PVDCallback(void);
 325
 326 /* Cortex System Control functions  *******************************************/
 327 void HAL_PWR_EnableSleepOnExit(void);
 328 void HAL_PWR_DisableSleepOnExit(void);
 329 void HAL_PWR_EnableSEVOnPend(void);
 330 void HAL_PWR_DisableSEVOnPend(void);
 331 /**
 332   * @}
 333   */
 334
 335 /**
 336   * @}
 337   */
 338
 339 /* Private types -------------------------------------------------------------*/
 340 /* Private variables ---------------------------------------------------------*/
 341 /* Private constants ---------------------------------------------------------*/
 342 /** @defgroup PWR_Private_Constants PWR Private Constants
 343   * @{
 344   */
 345
 346 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
 347   * @{
 348   */
 349 #define PWR_EXTI_LINE_PVD  ((uint32_t)EXTI_IMR_IM16)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
 350 /**
 351   * @}
 352   */
 353
 354 /**
 355   * @}
 356   */
 357 /* Private macros ------------------------------------------------------------*/
 358 /** @defgroup PWR_Private_Macros PWR Private Macros
 359   * @{
 360   */
 361
 362 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
 363   * @{
 364   */
 365 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
 366                                  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
 367                                  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
 368                                  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
 369 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
 370                               ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
 371                               ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
 372                               ((MODE) == PWR_PVD_MODE_NORMAL))
 373 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 374                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 375 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 376 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
 377 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
 378                                            ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
 379                                            ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
 380
 381 /**
 382   * @}
 383   */
 384
 385 /**
 386   * @}
 387   */
 388
 389 /**
 390   * @}
 391   */
 392
 393 /**
 394   * @}
 395   */
 396
 397 #ifdef __cplusplus
 398 }
 399 #endif
 400
 401
 402 #endif /* __STM32F7xx_HAL_PWR_H */
 403
 404 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/