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[betaflight.git] / lib / main / STM32F7 / Drivers / STM32F7xx_HAL_Driver / Inc / stm32f7xx_ll_utils.h
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1 /**
2 ******************************************************************************
3 * @file stm32f7xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 @verbatim
7 ==============================================================================
8 ##### How to use this driver #####
9 ==============================================================================
10 [..]
11 The LL UTILS driver contains a set of generic APIs that can be
12 used by user:
13 (+) Device electronic signature
14 (+) Timing functions
15 (+) PLL configuration functions
17 @endverbatim
18 ******************************************************************************
19 * @attention
21 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
22 * All rights reserved.</center></h2>
24 * This software component is licensed by ST under BSD 3-Clause license,
25 * the "License"; You may not use this file except in compliance with the
26 * License. You may obtain a copy of the License at:
27 * opensource.org/licenses/BSD-3-Clause
29 ******************************************************************************
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef __STM32F7xx_LL_UTILS_H
34 #define __STM32F7xx_LL_UTILS_H
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32f7xx.h"
43 /** @addtogroup STM32F7xx_LL_Driver
44 * @{
47 /** @defgroup UTILS_LL UTILS
48 * @{
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
62 /**
63 * @brief Unique device ID register base address
65 #define UID_BASE_ADDRESS UID_BASE
67 /**
68 * @brief Flash size data register base address
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
72 /**
73 * @brief Package data register base address
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
77 /**
78 * @}
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
83 * @{
85 /**
86 * @}
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
90 * @{
92 /**
93 * @brief UTILS PLL structure definition
95 typedef struct
97 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
98 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
103 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 50 and Max_Data = 432
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
109 uint32_t PLLP; /*!< Division for the main system clock.
110 This parameter can be a value of @ref RCC_LL_EC_PLLP_DIV
112 This feature can be modified afterwards using unitary function
113 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
114 } LL_UTILS_PLLInitTypeDef;
117 * @brief UTILS System, AHB and APB buses clock configuration structure definition
119 typedef struct
121 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
122 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
124 This feature can be modified afterwards using unitary function
125 @ref LL_RCC_SetAHBPrescaler(). */
127 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
128 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
130 This feature can be modified afterwards using unitary function
131 @ref LL_RCC_SetAPB1Prescaler(). */
133 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
134 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
136 This feature can be modified afterwards using unitary function
137 @ref LL_RCC_SetAPB2Prescaler(). */
139 } LL_UTILS_ClkInitTypeDef;
142 * @}
145 /* Exported constants --------------------------------------------------------*/
146 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
147 * @{
150 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
151 * @{
153 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
154 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
156 * @}
159 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
160 * @{
162 #define LL_UTILS_PACKAGETYPE_LQFP100 0x00000100U /*!< LQFP100 package type */
163 #define LL_UTILS_PACKAGETYPE_LQFP144_WLCSP143 0x00000200U /*!< LQFP144 or WLCSP143 package type */
164 #define LL_UTILS_PACKAGETYPE_WLCSP180_LQFP176_UFBGA176 0x00000300U /*!< WLCSP180, LQFP176 or UFBGA176 package type */
165 #define LL_UTILS_PACKAGETYPE_LQFP176_LQFP208_TFBGA216 0x00000400U /*!< LQFP176, LQFP208 or TFBGA216 package type */
166 #define LL_UTILS_PACKAGETYPE_TFBGA216_LQFP176_LQFP208 0x00000500U /*!< LQFP176, LQFP208 or TFBGA216 package type */
167 #define LL_UTILS_PACKAGETYPE_LQFP176_TFBGA216_LQFP208 0x00000600U /*!< LQFP176, LQFP208 or TFBGA216 package type */
168 #define LL_UTILS_PACKAGETYPE_LQFP208_LQFP176_TFBGA216 0x00000700U /*!< LQFP176, LQFP208 or TFBGA216 package type */
170 * @}
174 * @}
177 /* Exported macro ------------------------------------------------------------*/
179 /* Exported functions --------------------------------------------------------*/
180 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
181 * @{
184 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
185 * @{
189 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
190 * @retval UID[31:0]
192 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
194 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
198 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
199 * @retval UID[63:32]
201 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
203 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
207 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
208 * @retval UID[95:64]
210 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
212 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
216 * @brief Get Flash memory size
217 * @note This bitfield indicates the size of the device Flash memory expressed in
218 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
219 * @retval FLASH_SIZE[15:0]: Flash memory size
221 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
223 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU);
227 * @brief Get Package type
228 * @retval Returned value can be one of the following values:
229 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
230 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_WLCSP143 (*)
231 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP180_LQFP176_UFBGA176 (*)
232 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_LQFP208_TFBGA216 (*)
234 * (*) value not defined in all devices.
236 __STATIC_INLINE uint32_t LL_GetPackageType(void)
238 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x0700U);
242 * @}
245 /** @defgroup UTILS_LL_EF_DELAY DELAY
246 * @{
250 * @brief This function configures the Cortex-M SysTick source of the time base.
251 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
252 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
253 * configuration by calling this function, for a delay use rather osDelay RTOS service.
254 * @param Ticks Number of ticks
255 * @retval None
257 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
259 /* Configure the SysTick to have interrupt in 1ms time base */
260 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
261 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
262 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
263 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
266 void LL_Init1msTick(uint32_t HCLKFrequency);
267 void LL_mDelay(uint32_t Delay);
270 * @}
273 /** @defgroup UTILS_EF_SYSTEM SYSTEM
274 * @{
277 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
278 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
279 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
280 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
281 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
284 * @}
288 * @}
292 * @}
296 * @}
299 #ifdef __cplusplus
301 #endif
303 #endif /* __STM32F7xx_LL_UTILS_H */
305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/