lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_wwdg.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_ll_wwdg.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of WWDG LL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32F7xx_LL_WWDG_H
  22 #define STM32F7xx_LL_WWDG_H
  23
  24 #ifdef __cplusplus
  25 extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32f7xx.h"
  30
  31 /** @addtogroup STM32F7xx_LL_Driver
  32   * @{
  33   */
  34
  35 #if defined (WWDG)
  36
  37 /** @defgroup WWDG_LL WWDG
  38   * @{
  39   */
  40
  41 /* Private types -------------------------------------------------------------*/
  42 /* Private variables ---------------------------------------------------------*/
  43 /* Private constants ---------------------------------------------------------*/
  44 /* Private macros ------------------------------------------------------------*/
  45 /* Exported types ------------------------------------------------------------*/
  46 /* Exported constants --------------------------------------------------------*/
  47 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
  48   * @{
  49   */
  50
  51 /** @defgroup WWDG_LL_EC_IT IT Defines
  52   * @brief    IT defines which can be used with LL_WWDG_ReadReg and  LL_WWDG_WriteReg functions
  53   * @{
  54   */
  55 #define LL_WWDG_CFR_EWI                     WWDG_CFR_EWI
  56 /**
  57   * @}
  58   */
  59
  60 /** @defgroup WWDG_LL_EC_PRESCALER  PRESCALER
  61 * @{
  62 */
  63 #define LL_WWDG_PRESCALER_1                 0x00000000u                                               /*!< WWDG counter clock = (PCLK1/4096)/1 */
  64 #define LL_WWDG_PRESCALER_2                 WWDG_CFR_WDGTB_0                                          /*!< WWDG counter clock = (PCLK1/4096)/2 */
  65 #define LL_WWDG_PRESCALER_4                 WWDG_CFR_WDGTB_1                                          /*!< WWDG counter clock = (PCLK1/4096)/4 */
  66 #define LL_WWDG_PRESCALER_8                 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1)                     /*!< WWDG counter clock = (PCLK1/4096)/8 */
  67 /**
  68   * @}
  69   */
  70
  71 /**
  72   * @}
  73   */
  74
  75 /* Exported macro ------------------------------------------------------------*/
  76 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
  77   * @{
  78   */
  79 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
  80   * @{
  81   */
  82 /**
  83   * @brief  Write a value in WWDG register
  84   * @param  __INSTANCE__ WWDG Instance
  85   * @param  __REG__ Register to be written
  86   * @param  __VALUE__ Value to be written in the register
  87   * @retval None
  88   */
  89 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  90
  91 /**
  92   * @brief  Read a value in WWDG register
  93   * @param  __INSTANCE__ WWDG Instance
  94   * @param  __REG__ Register to be read
  95   * @retval Register value
  96   */
  97 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  98 /**
  99   * @}
 100   */
 101
 102 /**
 103   * @}
 104   */
 105
 106 /* Exported functions --------------------------------------------------------*/
 107 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
 108   * @{
 109   */
 110
 111 /** @defgroup WWDG_LL_EF_Configuration Configuration
 112   * @{
 113   */
 114 /**
 115   * @brief  Enable Window Watchdog. The watchdog is always disabled after a reset.
 116   * @note   It is enabled by setting the WDGA bit in the WWDG_CR register,
 117   *         then it cannot be disabled again except by a reset.
 118   *         This bit is set by software and only cleared by hardware after a reset.
 119   *         When WDGA = 1, the watchdog can generate a reset.
 120   * @rmtoll CR           WDGA          LL_WWDG_Enable
 121   * @param  WWDGx WWDG Instance
 122   * @retval None
 123   */
 124 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
 125 {
 126   SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
 127 }
 128
 129 /**
 130   * @brief  Checks if Window Watchdog is enabled
 131   * @rmtoll CR           WDGA          LL_WWDG_IsEnabled
 132   * @param  WWDGx WWDG Instance
 133   * @retval State of bit (1 or 0).
 134   */
 135 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
 136 {
 137   return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL);
 138 }
 139
 140 /**
 141   * @brief  Set the Watchdog counter value to provided value (7-bits T[6:0])
 142   * @note   When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
 143   *         This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
 144   *         A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
 145   *         Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
 146   * @rmtoll CR           T             LL_WWDG_SetCounter
 147   * @param  WWDGx WWDG Instance
 148   * @param  Counter 0..0x7F (7 bit counter value)
 149   * @retval None
 150   */
 151 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
 152 {
 153   MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
 154 }
 155
 156 /**
 157   * @brief  Return current Watchdog Counter Value (7 bits counter value)
 158   * @rmtoll CR           T             LL_WWDG_GetCounter
 159   * @param  WWDGx WWDG Instance
 160   * @retval 7 bit Watchdog Counter value
 161   */
 162 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
 163 {
 164   return (READ_BIT(WWDGx->CR, WWDG_CR_T));
 165 }
 166
 167 /**
 168   * @brief  Set the time base of the prescaler (WDGTB).
 169   * @note   Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
 170   *         is decremented every (4096 x 2expWDGTB) PCLK cycles
 171   * @rmtoll CFR          WDGTB         LL_WWDG_SetPrescaler
 172   * @param  WWDGx WWDG Instance
 173   * @param  Prescaler This parameter can be one of the following values:
 174   *         @arg @ref LL_WWDG_PRESCALER_1
 175   *         @arg @ref LL_WWDG_PRESCALER_2
 176   *         @arg @ref LL_WWDG_PRESCALER_4
 177   *         @arg @ref LL_WWDG_PRESCALER_8
 178 * @retval None
 179   */
 180 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
 181 {
 182   MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
 183 }
 184
 185 /**
 186   * @brief  Return current Watchdog Prescaler Value
 187   * @rmtoll CFR          WDGTB         LL_WWDG_GetPrescaler
 188   * @param  WWDGx WWDG Instance
 189   * @retval Returned value can be one of the following values:
 190   *         @arg @ref LL_WWDG_PRESCALER_1
 191   *         @arg @ref LL_WWDG_PRESCALER_2
 192   *         @arg @ref LL_WWDG_PRESCALER_4
 193   *         @arg @ref LL_WWDG_PRESCALER_8
 194   */
 195 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
 196 {
 197   return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
 198 }
 199
 200 /**
 201   * @brief  Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
 202   * @note   This window value defines when write in the WWDG_CR register
 203   *         to program Watchdog counter is allowed.
 204   *         Watchdog counter value update must occur only when the counter value
 205   *         is lower than the Watchdog window register value.
 206   *         Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
 207   *         (in the control register) is refreshed before the downcounter has reached
 208   *         the watchdog window register value.
 209   *         Physically is possible to set the Window lower then 0x40 but it is not recommended.
 210   *         To generate an immediate reset, it is possible to set the Counter lower than 0x40.
 211   * @rmtoll CFR          W             LL_WWDG_SetWindow
 212   * @param  WWDGx WWDG Instance
 213   * @param  Window 0x00..0x7F (7 bit Window value)
 214   * @retval None
 215   */
 216 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
 217 {
 218   MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
 219 }
 220
 221 /**
 222   * @brief  Return current Watchdog Window Value (7 bits value)
 223   * @rmtoll CFR          W             LL_WWDG_GetWindow
 224   * @param  WWDGx WWDG Instance
 225   * @retval 7 bit Watchdog Window value
 226   */
 227 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
 228 {
 229   return (READ_BIT(WWDGx->CFR, WWDG_CFR_W));
 230 }
 231
 232 /**
 233   * @}
 234   */
 235
 236 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
 237   * @{
 238   */
 239 /**
 240   * @brief  Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
 241   * @note   This bit is set by hardware when the counter has reached the value 0x40.
 242   *         It must be cleared by software by writing 0.
 243   *         A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
 244   * @rmtoll SR           EWIF          LL_WWDG_IsActiveFlag_EWKUP
 245   * @param  WWDGx WWDG Instance
 246   * @retval State of bit (1 or 0).
 247   */
 248 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
 249 {
 250   return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL);
 251 }
 252
 253 /**
 254   * @brief  Clear WWDG Early Wakeup Interrupt Flag (EWIF)
 255   * @rmtoll SR           EWIF          LL_WWDG_ClearFlag_EWKUP
 256   * @param  WWDGx WWDG Instance
 257   * @retval None
 258   */
 259 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
 260 {
 261   WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
 262 }
 263
 264 /**
 265   * @}
 266   */
 267
 268 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
 269   * @{
 270   */
 271 /**
 272   * @brief  Enable the Early Wakeup Interrupt.
 273   * @note   When set, an interrupt occurs whenever the counter reaches value 0x40.
 274   *         This interrupt is only cleared by hardware after a reset
 275   * @rmtoll CFR          EWI           LL_WWDG_EnableIT_EWKUP
 276   * @param  WWDGx WWDG Instance
 277   * @retval None
 278   */
 279 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
 280 {
 281   SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
 282 }
 283
 284 /**
 285   * @brief  Check if Early Wakeup Interrupt is enabled
 286   * @rmtoll CFR          EWI           LL_WWDG_IsEnabledIT_EWKUP
 287   * @param  WWDGx WWDG Instance
 288   * @retval State of bit (1 or 0).
 289   */
 290 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
 291 {
 292   return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL);
 293 }
 294
 295 /**
 296   * @}
 297   */
 298
 299 /**
 300   * @}
 301   */
 302
 303 /**
 304   * @}
 305   */
 306
 307 #endif /* WWDG */
 308
 309 /**
 310   * @}
 311   */
 312
 313 #ifdef __cplusplus
 314 }
 315 #endif
 316
 317 #endif /* __STM32F7xx_LL_WWDG_H */
 318
 319 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/