lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sram.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_hal_sram.c
   4   * @author  MCD Application Team
   5   * @brief   SRAM HAL module driver.
   6   *          This file provides a generic firmware to drive SRAM memories
   7   *          mounted as external device.
   8   *
   9   @verbatim
  10   ==============================================================================
  11                           ##### How to use this driver #####
  12   ==============================================================================
  13   [..]
  14     This driver is a generic layered driver which contains a set of APIs used to
  15     control SRAM memories. It uses the FMC layer functions to interface
  16     with SRAM devices.
  17     The following sequence should be followed to configure the FMC to interface
  18     with SRAM/PSRAM memories:
  19
  20    (#) Declare a SRAM_HandleTypeDef handle structure, for example:
  21           SRAM_HandleTypeDef  hsram; and:
  22
  23        (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
  24             values of the structure member.
  25
  26        (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
  27             base register instance for NOR or SRAM device
  28
  29        (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
  30             base register instance for NOR or SRAM extended mode
  31
  32    (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
  33        mode timings; for example:
  34           FMC_NORSRAM_TimingTypeDef  Timing and FMC_NORSRAM_TimingTypeDef  ExTiming;
  35       and fill its fields with the allowed values of the structure member.
  36
  37    (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
  38        performs the following sequence:
  39
  40        (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
  41        (##) Control register configuration using the FMC NORSRAM interface function
  42             FMC_NORSRAM_Init()
  43        (##) Timing register configuration using the FMC NORSRAM interface function
  44             FMC_NORSRAM_Timing_Init()
  45        (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
  46             FMC_NORSRAM_Extended_Timing_Init()
  47        (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
  48
  49    (#) At this stage you can perform read/write accesses from/to the memory connected
  50        to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
  51        following APIs:
  52        (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
  53        (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
  54
  55    (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
  56        HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
  57
  58    (#) You can continuously monitor the SRAM device HAL state by calling the function
  59        HAL_SRAM_GetState()
  60
  61        *** Callback registration ***
  62     =============================================
  63     [..]
  64       The compilation define  USE_HAL_SRAM_REGISTER_CALLBACKS when set to 1
  65       allows the user to configure dynamically the driver callbacks.
  66
  67       Use Functions @ref HAL_SRAM_RegisterCallback() to register a user callback,
  68       it allows to register following callbacks:
  69         (+) MspInitCallback    : SRAM MspInit.
  70         (+) MspDeInitCallback  : SRAM MspDeInit.
  71       This function takes as parameters the HAL peripheral handle, the Callback ID
  72       and a pointer to the user callback function.
  73
  74       Use function @ref HAL_SRAM_UnRegisterCallback() to reset a callback to the default
  75       weak (surcharged) function. It allows to reset following callbacks:
  76         (+) MspInitCallback    : SRAM MspInit.
  77         (+) MspDeInitCallback  : SRAM MspDeInit.
  78       This function) takes as parameters the HAL peripheral handle and the Callback ID.
  79
  80       By default, after the @ref HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
  81       all callbacks are reset to the corresponding legacy weak (surcharged) functions.
  82       Exception done for MspInit and MspDeInit callbacks that are respectively
  83       reset to the legacy weak (surcharged) functions in the @ref HAL_SRAM_Init
  84       and @ref  HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
  85       If not, MspInit or MspDeInit are not null, the @ref HAL_SRAM_Init and @ref HAL_SRAM_DeInit
  86       keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
  87
  88       Callbacks can be registered/unregistered in READY state only.
  89       Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
  90       in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
  91       during the Init/DeInit.
  92       In that case first register the MspInit/MspDeInit user callbacks
  93       using @ref HAL_SRAM_RegisterCallback before calling @ref HAL_SRAM_DeInit
  94       or @ref HAL_SRAM_Init function.
  95
  96       When The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS is set to 0 or
  97       not defined, the callback registering feature is not available
  98       and weak (surcharged) callbacks are used.
  99
 100   @endverbatim
 101   ******************************************************************************
 102   * @attention
 103   *
 104   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
 105   * All rights reserved.</center></h2>
 106   *
 107   * This software component is licensed by ST under BSD 3-Clause license,
 108   * the "License"; You may not use this file except in compliance with the
 109   * License. You may obtain a copy of the License at:
 110   *                        opensource.org/licenses/BSD-3-Clause
 111   *
 112   ******************************************************************************
 113   */
 114
 115 /* Includes ------------------------------------------------------------------*/
 116 #include "stm32f7xx_hal.h"
 117
 118 /** @addtogroup STM32F7xx_HAL_Driver
 119   * @{
 120   */
 121
 122 /** @defgroup SRAM SRAM
 123   * @brief SRAM driver modules
 124   * @{
 125   */
 126 #ifdef HAL_SRAM_MODULE_ENABLED
 127 /* Private typedef -----------------------------------------------------------*/
 128 /* Private define ------------------------------------------------------------*/
 129 /* Private macro -------------------------------------------------------------*/
 130 /* Private variables ---------------------------------------------------------*/
 131 /* Private function prototypes -----------------------------------------------*/
 132 /* Exported functions --------------------------------------------------------*/
 133
 134 /** @defgroup SRAM_Exported_Functions SRAM Exported Functions
 135   * @{
 136   */
 137
 138 /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
 139   * @brief    Initialization and Configuration functions.
 140   *
 141   @verbatim
 142   ==============================================================================
 143            ##### SRAM Initialization and de_initialization functions #####
 144   ==============================================================================
 145     [..]  This section provides functions allowing to initialize/de-initialize
 146           the SRAM memory
 147
 148 @endverbatim
 149   * @{
 150   */
 151
 152 /**
 153   * @brief  Performs the SRAM device initialization sequence
 154   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 155   *                the configuration information for SRAM module.
 156   * @param  Timing Pointer to SRAM control timing structure
 157   * @param  ExtTiming Pointer to SRAM extended mode timing structure
 158   * @retval HAL status
 159   */
 160 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
 161 {
 162   /* Check the SRAM handle parameter */
 163   if(hsram == NULL)
 164   {
 165      return HAL_ERROR;
 166   }
 167
 168   if(hsram->State == HAL_SRAM_STATE_RESET)
 169   {
 170     /* Allocate lock resource and initialize it */
 171     hsram->Lock = HAL_UNLOCKED;
 172
 173 #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
 174     if(hsram->MspInitCallback == NULL)
 175     {
 176       hsram->MspInitCallback = HAL_SRAM_MspInit;
 177     }
 178     hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
 179     hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
 180
 181     /* Init the low level hardware */
 182     hsram->MspInitCallback(hsram);
 183 #else
 184     /* Initialize the low level hardware (MSP) */
 185     HAL_SRAM_MspInit(hsram);
 186 #endif
 187   }
 188
 189   /* Initialize SRAM control Interface */
 190   FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
 191
 192   /* Initialize SRAM timing Interface */
 193   FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
 194
 195   /* Initialize SRAM extended mode timing Interface */
 196   FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,  hsram->Init.ExtendedMode);
 197
 198   /* Enable the NORSRAM device */
 199   __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
 200
 201   return HAL_OK;
 202 }
 203
 204 /**
 205   * @brief  Performs the SRAM device De-initialization sequence.
 206   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 207   *                the configuration information for SRAM module.
 208   * @retval HAL status
 209   */
 210 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
 211 {
 212 #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
 213   if(hsram->MspDeInitCallback == NULL)
 214   {
 215     hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
 216   }
 217
 218   /* DeInit the low level hardware */
 219   hsram->MspDeInitCallback(hsram);
 220 #else
 221   /* De-Initialize the low level hardware (MSP) */
 222   HAL_SRAM_MspDeInit(hsram);
 223 #endif
 224
 225   /* Configure the SRAM registers with their reset values */
 226   FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
 227
 228   hsram->State = HAL_SRAM_STATE_RESET;
 229
 230   /* Release Lock */
 231   __HAL_UNLOCK(hsram);
 232
 233   return HAL_OK;
 234 }
 235
 236 /**
 237   * @brief  SRAM MSP Init.
 238   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 239   *                the configuration information for SRAM module.
 240   * @retval None
 241   */
 242 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
 243 {
 244   /* Prevent unused argument(s) compilation warning */
 245   UNUSED(hsram);
 246
 247   /* NOTE : This function Should not be modified, when the callback is needed,
 248             the HAL_SRAM_MspInit could be implemented in the user file
 249    */
 250 }
 251
 252 /**
 253   * @brief  SRAM MSP DeInit.
 254   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 255   *                the configuration information for SRAM module.
 256   * @retval None
 257   */
 258 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
 259 {
 260   /* Prevent unused argument(s) compilation warning */
 261   UNUSED(hsram);
 262
 263   /* NOTE : This function Should not be modified, when the callback is needed,
 264             the HAL_SRAM_MspDeInit could be implemented in the user file
 265    */
 266 }
 267
 268 /**
 269   * @brief  DMA transfer complete callback.
 270   * @param  hdma pointer to a SRAM_HandleTypeDef structure that contains
 271   *                the configuration information for SRAM module.
 272   * @retval None
 273   */
 274 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
 275 {
 276   /* Prevent unused argument(s) compilation warning */
 277   UNUSED(hdma);
 278
 279   /* NOTE : This function Should not be modified, when the callback is needed,
 280             the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
 281    */
 282 }
 283
 284 /**
 285   * @brief  DMA transfer complete error callback.
 286   * @param  hdma pointer to a SRAM_HandleTypeDef structure that contains
 287   *                the configuration information for SRAM module.
 288   * @retval None
 289   */
 290 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
 291 {
 292   /* Prevent unused argument(s) compilation warning */
 293   UNUSED(hdma);
 294
 295   /* NOTE : This function Should not be modified, when the callback is needed,
 296             the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
 297    */
 298 }
 299
 300 /**
 301   * @}
 302   */
 303
 304 /** @defgroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
 305   * @brief    Input Output and memory control functions
 306   *
 307   @verbatim
 308   ==============================================================================
 309                   ##### SRAM Input and Output functions #####
 310   ==============================================================================
 311   [..]
 312     This section provides functions allowing to use and control the SRAM memory
 313
 314 @endverbatim
 315   * @{
 316   */
 317
 318 /**
 319   * @brief  Reads 8-bit buffer from SRAM memory.
 320   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 321   *                the configuration information for SRAM module.
 322   * @param  pAddress Pointer to read start address
 323   * @param  pDstBuffer Pointer to destination buffer
 324   * @param  BufferSize Size of the buffer to read from memory
 325   * @retval HAL status
 326   */
 327 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
 328 {
 329   __IO uint8_t * psramaddress = (uint8_t *)pAddress;
 330
 331   /* Process Locked */
 332   __HAL_LOCK(hsram);
 333
 334   /* Update the SRAM controller state */
 335   hsram->State = HAL_SRAM_STATE_BUSY;
 336
 337   /* Read data from memory */
 338   for(; BufferSize != 0; BufferSize--)
 339   {
 340     *pDstBuffer = *(__IO uint8_t *)psramaddress;
 341     pDstBuffer++;
 342     psramaddress++;
 343   }
 344
 345   /* Update the SRAM controller state */
 346   hsram->State = HAL_SRAM_STATE_READY;
 347
 348   /* Process unlocked */
 349   __HAL_UNLOCK(hsram);
 350
 351   return HAL_OK;
 352 }
 353
 354 /**
 355   * @brief  Writes 8-bit buffer to SRAM memory.
 356   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 357   *                the configuration information for SRAM module.
 358   * @param  pAddress Pointer to write start address
 359   * @param  pSrcBuffer Pointer to source buffer to write
 360   * @param  BufferSize Size of the buffer to write to memory
 361   * @retval HAL status
 362   */
 363 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
 364 {
 365   __IO uint8_t * psramaddress = (uint8_t *)pAddress;
 366
 367   /* Check the SRAM controller state */
 368   if(hsram->State == HAL_SRAM_STATE_PROTECTED)
 369   {
 370     return  HAL_ERROR;
 371   }
 372
 373   /* Process Locked */
 374   __HAL_LOCK(hsram);
 375
 376   /* Update the SRAM controller state */
 377   hsram->State = HAL_SRAM_STATE_BUSY;
 378
 379   /* Write data to memory */
 380   for(; BufferSize != 0; BufferSize--)
 381   {
 382     *(__IO uint8_t *)psramaddress = *pSrcBuffer;
 383     pSrcBuffer++;
 384     psramaddress++;
 385   }
 386
 387   /* Update the SRAM controller state */
 388   hsram->State = HAL_SRAM_STATE_READY;
 389
 390   /* Process unlocked */
 391   __HAL_UNLOCK(hsram);
 392
 393   return HAL_OK;
 394 }
 395
 396 /**
 397   * @brief  Reads 16-bit buffer from SRAM memory.
 398   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 399   *                the configuration information for SRAM module.
 400   * @param  pAddress Pointer to read start address
 401   * @param  pDstBuffer Pointer to destination buffer
 402   * @param  BufferSize Size of the buffer to read from memory
 403   * @retval HAL status
 404   */
 405 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
 406 {
 407   __IO uint16_t * psramaddress = (uint16_t *)pAddress;
 408
 409   /* Process Locked */
 410   __HAL_LOCK(hsram);
 411
 412   /* Update the SRAM controller state */
 413   hsram->State = HAL_SRAM_STATE_BUSY;
 414
 415   /* Read data from memory */
 416   for(; BufferSize != 0; BufferSize--)
 417   {
 418     *pDstBuffer = *(__IO uint16_t *)psramaddress;
 419     pDstBuffer++;
 420     psramaddress++;
 421   }
 422
 423   /* Update the SRAM controller state */
 424   hsram->State = HAL_SRAM_STATE_READY;
 425
 426   /* Process unlocked */
 427   __HAL_UNLOCK(hsram);
 428
 429   return HAL_OK;
 430 }
 431
 432 /**
 433   * @brief  Writes 16-bit buffer to SRAM memory.
 434   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 435   *                the configuration information for SRAM module.
 436   * @param  pAddress Pointer to write start address
 437   * @param  pSrcBuffer Pointer to source buffer to write
 438   * @param  BufferSize Size of the buffer to write to memory
 439   * @retval HAL status
 440   */
 441 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
 442 {
 443   __IO uint16_t * psramaddress = (uint16_t *)pAddress;
 444
 445   /* Check the SRAM controller state */
 446   if(hsram->State == HAL_SRAM_STATE_PROTECTED)
 447   {
 448     return  HAL_ERROR;
 449   }
 450
 451   /* Process Locked */
 452   __HAL_LOCK(hsram);
 453
 454   /* Update the SRAM controller state */
 455   hsram->State = HAL_SRAM_STATE_BUSY;
 456
 457   /* Write data to memory */
 458   for(; BufferSize != 0; BufferSize--)
 459   {
 460     *(__IO uint16_t *)psramaddress = *pSrcBuffer;
 461     pSrcBuffer++;
 462     psramaddress++;
 463   }
 464
 465   /* Update the SRAM controller state */
 466   hsram->State = HAL_SRAM_STATE_READY;
 467
 468   /* Process unlocked */
 469   __HAL_UNLOCK(hsram);
 470
 471   return HAL_OK;
 472 }
 473
 474 /**
 475   * @brief  Reads 32-bit buffer from SRAM memory.
 476   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 477   *                the configuration information for SRAM module.
 478   * @param  pAddress Pointer to read start address
 479   * @param  pDstBuffer Pointer to destination buffer
 480   * @param  BufferSize Size of the buffer to read from memory
 481   * @retval HAL status
 482   */
 483 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
 484 {
 485   /* Process Locked */
 486   __HAL_LOCK(hsram);
 487
 488   /* Update the SRAM controller state */
 489   hsram->State = HAL_SRAM_STATE_BUSY;
 490
 491   /* Read data from memory */
 492   for(; BufferSize != 0; BufferSize--)
 493   {
 494     *pDstBuffer = *(__IO uint32_t *)pAddress;
 495     pDstBuffer++;
 496     pAddress++;
 497   }
 498
 499   /* Update the SRAM controller state */
 500   hsram->State = HAL_SRAM_STATE_READY;
 501
 502   /* Process unlocked */
 503   __HAL_UNLOCK(hsram);
 504
 505   return HAL_OK;
 506 }
 507
 508 /**
 509   * @brief  Writes 32-bit buffer to SRAM memory.
 510   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 511   *                the configuration information for SRAM module.
 512   * @param  pAddress Pointer to write start address
 513   * @param  pSrcBuffer Pointer to source buffer to write
 514   * @param  BufferSize Size of the buffer to write to memory
 515   * @retval HAL status
 516   */
 517 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
 518 {
 519   /* Check the SRAM controller state */
 520   if(hsram->State == HAL_SRAM_STATE_PROTECTED)
 521   {
 522     return  HAL_ERROR;
 523   }
 524
 525   /* Process Locked */
 526   __HAL_LOCK(hsram);
 527
 528   /* Update the SRAM controller state */
 529   hsram->State = HAL_SRAM_STATE_BUSY;
 530
 531   /* Write data to memory */
 532   for(; BufferSize != 0; BufferSize--)
 533   {
 534     *(__IO uint32_t *)pAddress = *pSrcBuffer;
 535     pSrcBuffer++;
 536     pAddress++;
 537   }
 538
 539   /* Update the SRAM controller state */
 540   hsram->State = HAL_SRAM_STATE_READY;
 541
 542   /* Process unlocked */
 543   __HAL_UNLOCK(hsram);
 544
 545   return HAL_OK;
 546 }
 547
 548 /**
 549   * @brief  Reads a Words data from the SRAM memory using DMA transfer.
 550   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 551   *                the configuration information for SRAM module.
 552   * @param  pAddress Pointer to read start address
 553   * @param  pDstBuffer Pointer to destination buffer
 554   * @param  BufferSize Size of the buffer to read from memory
 555   * @retval HAL status
 556   */
 557 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
 558 {
 559   /* Process Locked */
 560   __HAL_LOCK(hsram);
 561
 562   /* Update the SRAM controller state */
 563   hsram->State = HAL_SRAM_STATE_BUSY;
 564
 565   /* Configure DMA user callbacks */
 566   hsram->hdma->XferCpltCallback  = HAL_SRAM_DMA_XferCpltCallback;
 567   hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
 568
 569   /* Enable the DMA Stream */
 570   HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
 571
 572   /* Update the SRAM controller state */
 573   hsram->State = HAL_SRAM_STATE_READY;
 574
 575   /* Process unlocked */
 576   __HAL_UNLOCK(hsram);
 577
 578   return HAL_OK;
 579 }
 580
 581 /**
 582   * @brief  Writes a Words data buffer to SRAM memory using DMA transfer.
 583   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 584   *                the configuration information for SRAM module.
 585   * @param  pAddress Pointer to write start address
 586   * @param  pSrcBuffer Pointer to source buffer to write
 587   * @param  BufferSize Size of the buffer to write to memory
 588   * @retval HAL status
 589   */
 590 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
 591 {
 592   /* Check the SRAM controller state */
 593   if(hsram->State == HAL_SRAM_STATE_PROTECTED)
 594   {
 595     return  HAL_ERROR;
 596   }
 597
 598   /* Process Locked */
 599   __HAL_LOCK(hsram);
 600
 601   /* Update the SRAM controller state */
 602   hsram->State = HAL_SRAM_STATE_BUSY;
 603
 604   /* Configure DMA user callbacks */
 605   hsram->hdma->XferCpltCallback  = HAL_SRAM_DMA_XferCpltCallback;
 606   hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
 607
 608   /* Enable the DMA Stream */
 609   HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
 610
 611   /* Update the SRAM controller state */
 612   hsram->State = HAL_SRAM_STATE_READY;
 613
 614   /* Process unlocked */
 615   __HAL_UNLOCK(hsram);
 616
 617   return HAL_OK;
 618 }
 619
 620 #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
 621 /**
 622   * @brief  Register a User SRAM Callback
 623   *         To be used instead of the weak (surcharged) predefined callback
 624   * @param hsram : SRAM handle
 625   * @param CallbackId : ID of the callback to be registered
 626   *        This parameter can be one of the following values:
 627   *          @arg @ref HAL_SRAM_MSP_INIT_CB_ID       SRAM MspInit callback ID
 628   *          @arg @ref HAL_SRAM_MSP_DEINIT_CB_ID     SRAM MspDeInit callback ID
 629   * @param pCallback : pointer to the Callback function
 630   * @retval status
 631   */
 632 HAL_StatusTypeDef HAL_SRAM_RegisterCallback (SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_CallbackTypeDef pCallback)
 633 {
 634   HAL_StatusTypeDef status = HAL_OK;
 635   HAL_SRAM_StateTypeDef state;
 636
 637   if(pCallback == NULL)
 638   {
 639     return HAL_ERROR;
 640   }
 641
 642   /* Process locked */
 643   __HAL_LOCK(hsram);
 644
 645   state = hsram->State;
 646   if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_RESET) || (state == HAL_SRAM_STATE_PROTECTED))
 647   {
 648     switch (CallbackId)
 649     {
 650     case HAL_SRAM_MSP_INIT_CB_ID :
 651       hsram->MspInitCallback = pCallback;
 652       break;
 653     case HAL_SRAM_MSP_DEINIT_CB_ID :
 654       hsram->MspDeInitCallback = pCallback;
 655       break;
 656     default :
 657       /* update return status */
 658       status =  HAL_ERROR;
 659       break;
 660     }
 661   }
 662   else
 663   {
 664     /* update return status */
 665     status =  HAL_ERROR;
 666   }
 667
 668   /* Release Lock */
 669   __HAL_UNLOCK(hsram);
 670   return status;
 671 }
 672
 673 /**
 674   * @brief  Unregister a User SRAM Callback
 675   *         SRAM Callback is redirected to the weak (surcharged) predefined callback
 676   * @param hsram : SRAM handle
 677   * @param CallbackId : ID of the callback to be unregistered
 678   *        This parameter can be one of the following values:
 679   *          @arg @ref HAL_SRAM_MSP_INIT_CB_ID       SRAM MspInit callback ID
 680   *          @arg @ref HAL_SRAM_MSP_DEINIT_CB_ID     SRAM MspDeInit callback ID
 681   *          @arg @ref HAL_SRAM_DMA_XFER_CPLT_CB_ID  SRAM DMA Xfer Complete callback ID
 682   *          @arg @ref HAL_SRAM_DMA_XFER_ERR_CB_ID   SRAM DMA Xfer Error callback ID
 683   * @retval status
 684   */
 685 HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback (SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId)
 686 {
 687   HAL_StatusTypeDef status = HAL_OK;
 688   HAL_SRAM_StateTypeDef state;
 689
 690   /* Process locked */
 691   __HAL_LOCK(hsram);
 692
 693   state = hsram->State;
 694   if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_PROTECTED))
 695   {
 696     switch (CallbackId)
 697     {
 698     case HAL_SRAM_MSP_INIT_CB_ID :
 699       hsram->MspInitCallback = HAL_SRAM_MspInit;
 700       break;
 701     case HAL_SRAM_MSP_DEINIT_CB_ID :
 702       hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
 703       break;
 704     case HAL_SRAM_DMA_XFER_CPLT_CB_ID :
 705       hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
 706       break;
 707     case HAL_SRAM_DMA_XFER_ERR_CB_ID :
 708       hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
 709       break;
 710     default :
 711       /* update return status */
 712       status =  HAL_ERROR;
 713       break;
 714     }
 715   }
 716   else if(state == HAL_SRAM_STATE_RESET)
 717   {
 718     switch (CallbackId)
 719     {
 720     case HAL_SRAM_MSP_INIT_CB_ID :
 721       hsram->MspInitCallback = HAL_SRAM_MspInit;
 722       break;
 723     case HAL_SRAM_MSP_DEINIT_CB_ID :
 724       hsram->MspDeInitCallback = HAL_SRAM_MspDeInit;
 725       break;
 726     default :
 727       /* update return status */
 728       status =  HAL_ERROR;
 729       break;
 730     }
 731   }
 732   else
 733   {
 734     /* update return status */
 735     status =  HAL_ERROR;
 736   }
 737
 738   /* Release Lock */
 739   __HAL_UNLOCK(hsram);
 740   return status;
 741 }
 742
 743 /**
 744   * @brief  Register a User SRAM Callback for DMA transfers
 745   *         To be used instead of the weak (surcharged) predefined callback
 746   * @param hsram : SRAM handle
 747   * @param CallbackId : ID of the callback to be registered
 748   *        This parameter can be one of the following values:
 749   *          @arg @ref HAL_SRAM_DMA_XFER_CPLT_CB_ID  SRAM DMA Xfer Complete callback ID
 750   *          @arg @ref HAL_SRAM_DMA_XFER_ERR_CB_ID   SRAM DMA Xfer Error callback ID
 751   * @param pCallback : pointer to the Callback function
 752   * @retval status
 753   */
 754 HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_DmaCallbackTypeDef pCallback)
 755 {
 756   HAL_StatusTypeDef status = HAL_OK;
 757   HAL_SRAM_StateTypeDef state;
 758
 759   if(pCallback == NULL)
 760   {
 761     return HAL_ERROR;
 762   }
 763
 764   /* Process locked */
 765   __HAL_LOCK(hsram);
 766
 767   state = hsram->State;
 768   if((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_PROTECTED))
 769   {
 770     switch (CallbackId)
 771     {
 772     case HAL_SRAM_DMA_XFER_CPLT_CB_ID :
 773       hsram->DmaXferCpltCallback = pCallback;
 774       break;
 775     case HAL_SRAM_DMA_XFER_ERR_CB_ID :
 776       hsram->DmaXferErrorCallback = pCallback;
 777       break;
 778     default :
 779       /* update return status */
 780       status =  HAL_ERROR;
 781       break;
 782     }
 783   }
 784   else
 785   {
 786     /* update return status */
 787     status =  HAL_ERROR;
 788   }
 789
 790   /* Release Lock */
 791   __HAL_UNLOCK(hsram);
 792   return status;
 793 }
 794 #endif
 795 /**
 796   * @}
 797   */
 798
 799 /** @defgroup SRAM_Exported_Functions_Group3 Control functions
 800  *  @brief   Control functions
 801  *
 802 @verbatim
 803   ==============================================================================
 804                         ##### SRAM Control functions #####
 805   ==============================================================================
 806   [..]
 807     This subsection provides a set of functions allowing to control dynamically
 808     the SRAM interface.
 809
 810 @endverbatim
 811   * @{
 812   */
 813
 814 /**
 815   * @brief  Enables dynamically SRAM write operation.
 816   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 817   *                the configuration information for SRAM module.
 818   * @retval HAL status
 819   */
 820 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
 821 {
 822   /* Process Locked */
 823   __HAL_LOCK(hsram);
 824
 825   /* Enable write operation */
 826   FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
 827
 828   /* Update the SRAM controller state */
 829   hsram->State = HAL_SRAM_STATE_READY;
 830
 831   /* Process unlocked */
 832   __HAL_UNLOCK(hsram);
 833
 834   return HAL_OK;
 835 }
 836
 837 /**
 838   * @brief  Disables dynamically SRAM write operation.
 839   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 840   *                the configuration information for SRAM module.
 841   * @retval HAL status
 842   */
 843 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
 844 {
 845   /* Process Locked */
 846   __HAL_LOCK(hsram);
 847
 848   /* Update the SRAM controller state */
 849   hsram->State = HAL_SRAM_STATE_BUSY;
 850
 851   /* Disable write operation */
 852   FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
 853
 854   /* Update the SRAM controller state */
 855   hsram->State = HAL_SRAM_STATE_PROTECTED;
 856
 857   /* Process unlocked */
 858   __HAL_UNLOCK(hsram);
 859
 860   return HAL_OK;
 861 }
 862
 863 /**
 864   * @}
 865   */
 866
 867 /** @defgroup SRAM_Exported_Functions_Group4 Peripheral State functions
 868  *  @brief   Peripheral State functions
 869  *
 870 @verbatim
 871   ==============================================================================
 872                       ##### SRAM State functions #####
 873   ==============================================================================
 874   [..]
 875     This subsection permits to get in run-time the status of the SRAM controller
 876     and the data flow.
 877
 878 @endverbatim
 879   * @{
 880   */
 881
 882 /**
 883   * @brief  Returns the SRAM controller state
 884   * @param  hsram pointer to a SRAM_HandleTypeDef structure that contains
 885   *                the configuration information for SRAM module.
 886   * @retval HAL state
 887   */
 888 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
 889 {
 890   return hsram->State;
 891 }
 892
 893 /**
 894   * @}
 895   */
 896
 897 /**
 898   * @}
 899   */
 900 #endif /* HAL_SRAM_MODULE_ENABLED */
 901 /**
 902   * @}
 903   */
 904
 905 /**
 906   * @}
 907   */
 908
 909 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/