lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @brief   USART LL module driver.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19 #if defined(USE_FULL_LL_DRIVER)
  20
  21 /* Includes ------------------------------------------------------------------*/
  22 #include "stm32f7xx_ll_usart.h"
  23 #include "stm32f7xx_ll_rcc.h"
  24 #include "stm32f7xx_ll_bus.h"
  25 #ifdef  USE_FULL_ASSERT
  26 #include "stm32_assert.h"
  27 #else
  28 #define assert_param(expr) ((void)0U)
  29 #endif
  30
  31 /** @addtogroup STM32F7xx_LL_Driver
  32   * @{
  33   */
  34
  35 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
  36
  37 /** @addtogroup USART_LL
  38   * @{
  39   */
  40
  41 /* Private types -------------------------------------------------------------*/
  42 /* Private variables ---------------------------------------------------------*/
  43 /* Private constants ---------------------------------------------------------*/
  44 /** @addtogroup USART_LL_Private_Constants
  45   * @{
  46   */
  47
  48 /**
  49   * @}
  50   */
  51
  52 /* Private macros ------------------------------------------------------------*/
  53 /** @addtogroup USART_LL_Private_Macros
  54   * @{
  55   */
  56
  57 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  58  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  59 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 27000000U)
  60
  61 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  62 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
  63
  64 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
  65 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
  66
  67 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  68                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  69                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  70                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  71
  72 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  73                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  74                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  75
  76 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  77                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  78                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  79
  80 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  81                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  82
  83 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  84                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  85
  86 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  87                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
  88
  89 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
  90                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
  91
  92 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
  93                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
  94
  95 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
  96                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
  97                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
  98                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
  99
 100 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 101                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 102                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 103                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 104
 105 /**
 106   * @}
 107   */
 108
 109 /* Private function prototypes -----------------------------------------------*/
 110
 111 /* Exported functions --------------------------------------------------------*/
 112 /** @addtogroup USART_LL_Exported_Functions
 113   * @{
 114   */
 115
 116 /** @addtogroup USART_LL_EF_Init
 117   * @{
 118   */
 119
 120 /**
 121   * @brief  De-initialize USART registers (Registers restored to their default values).
 122   * @param  USARTx USART Instance
 123   * @retval An ErrorStatus enumeration value:
 124   *          - SUCCESS: USART registers are de-initialized
 125   *          - ERROR: USART registers are not de-initialized
 126   */
 127 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 128 {
 129   ErrorStatus status = SUCCESS;
 130
 131   /* Check the parameters */
 132   assert_param(IS_UART_INSTANCE(USARTx));
 133
 134   if (USARTx == USART1)
 135   {
 136     /* Force reset of USART clock */
 137     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 138
 139     /* Release reset of USART clock */
 140     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 141   }
 142   else if (USARTx == USART2)
 143   {
 144     /* Force reset of USART clock */
 145     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 146
 147     /* Release reset of USART clock */
 148     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 149   }
 150   else if (USARTx == USART3)
 151   {
 152     /* Force reset of USART clock */
 153     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 154
 155     /* Release reset of USART clock */
 156     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 157   }
 158   else if (USARTx == UART4)
 159   {
 160     /* Force reset of UART clock */
 161     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 162
 163     /* Release reset of UART clock */
 164     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 165   }
 166   else if (USARTx == UART5)
 167   {
 168     /* Force reset of UART clock */
 169     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 170
 171     /* Release reset of UART clock */
 172     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 173   }
 174   else if (USARTx == USART6)
 175   {
 176     /* Force reset of USART clock */
 177     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
 178
 179     /* Release reset of USART clock */
 180     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
 181   }
 182   else if (USARTx == UART7)
 183   {
 184     /* Force reset of UART clock */
 185     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
 186
 187     /* Release reset of UART clock */
 188     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
 189   }
 190   else if (USARTx == UART8)
 191   {
 192     /* Force reset of UART clock */
 193     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
 194
 195     /* Release reset of UART clock */
 196     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
 197   }
 198   else
 199   {
 200     status = ERROR;
 201   }
 202
 203   return (status);
 204 }
 205
 206 /**
 207   * @brief  Initialize USART registers according to the specified
 208   *         parameters in USART_InitStruct.
 209   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 210   *         USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 211   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 212   * @param  USARTx USART Instance
 213   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
 214   *         that contains the configuration information for the specified USART peripheral.
 215   * @retval An ErrorStatus enumeration value:
 216   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 217   *          - ERROR: Problem occurred during USART Registers initialization
 218   */
 219 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 220 {
 221   ErrorStatus status = ERROR;
 222   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 223
 224   /* Check the parameters */
 225   assert_param(IS_UART_INSTANCE(USARTx));
 226   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 227   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 228   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 229   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 230   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 231   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 232   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 233
 234   /* USART needs to be in disabled state, in order to be able to configure some bits in
 235      CRx registers */
 236   if (LL_USART_IsEnabled(USARTx) == 0U)
 237   {
 238     /*---------------------------- USART CR1 Configuration ---------------------
 239      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 240      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 241      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 242      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 243      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 244      */
 245     MODIFY_REG(USARTx->CR1,
 246                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 247                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 248                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 249                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 250
 251     /*---------------------------- USART CR2 Configuration ---------------------
 252      * Configure USARTx CR2 (Stop bits) with parameters:
 253      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 254      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 255      */
 256     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 257
 258     /*---------------------------- USART CR3 Configuration ---------------------
 259      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 260      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 261      */
 262     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 263
 264     /*---------------------------- USART BRR Configuration ---------------------
 265      * Retrieve Clock frequency used for USART Peripheral
 266      */
 267     if (USARTx == USART1)
 268     {
 269       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
 270     }
 271     else if (USARTx == USART2)
 272     {
 273       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
 274     }
 275     else if (USARTx == USART3)
 276     {
 277       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
 278     }
 279     else if (USARTx == UART4)
 280     {
 281       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
 282     }
 283     else if (USARTx == UART5)
 284     {
 285       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
 286     }
 287     else if (USARTx == USART6)
 288     {
 289       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
 290     }
 291     else if (USARTx == UART7)
 292     {
 293       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
 294     }
 295     else if (USARTx == UART8)
 296     {
 297       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
 298     }
 299     else
 300     {
 301       /* Nothing to do, as error code is already assigned to ERROR value */
 302     }
 303
 304     /* Configure the USART Baud Rate :
 305        - valid baud rate value (different from 0) is required
 306        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 307     */
 308     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 309         && (USART_InitStruct->BaudRate != 0U))
 310     {
 311       status = SUCCESS;
 312       LL_USART_SetBaudRate(USARTx,
 313                            periphclk,
 314                            USART_InitStruct->OverSampling,
 315                            USART_InitStruct->BaudRate);
 316
 317       /* Check BRR is greater than or equal to 16d */
 318       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
 319
 320       /* Check BRR is lower than or equal to 0xFFFF */
 321       assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
 322     }
 323   }
 324   /* Endif (=> USART not in Disabled state => return ERROR) */
 325
 326   return (status);
 327 }
 328
 329 /**
 330   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 331   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
 332   *                         whose fields will be set to default values.
 333   * @retval None
 334   */
 335
 336 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 337 {
 338   /* Set USART_InitStruct fields to default values */
 339   USART_InitStruct->BaudRate            = 9600U;
 340   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 341   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 342   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 343   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 344   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 345   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 346 }
 347
 348 /**
 349   * @brief  Initialize USART Clock related settings according to the
 350   *         specified parameters in the USART_ClockInitStruct.
 351   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 352   *         USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 353   * @param  USARTx USART Instance
 354   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 355   *         that contains the Clock configuration information for the specified USART peripheral.
 356   * @retval An ErrorStatus enumeration value:
 357   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 358   *          - ERROR: Problem occurred during USART Registers initialization
 359   */
 360 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 361 {
 362   ErrorStatus status = SUCCESS;
 363
 364   /* Check USART Instance and Clock signal output parameters */
 365   assert_param(IS_UART_INSTANCE(USARTx));
 366   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 367
 368   /* USART needs to be in disabled state, in order to be able to configure some bits in
 369      CRx registers */
 370   if (LL_USART_IsEnabled(USARTx) == 0U)
 371   {
 372     /*---------------------------- USART CR2 Configuration -----------------------*/
 373     /* If Clock signal has to be output */
 374     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 375     {
 376       /* Deactivate Clock signal delivery :
 377        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 378        */
 379       LL_USART_DisableSCLKOutput(USARTx);
 380     }
 381     else
 382     {
 383       /* Ensure USART instance is USART capable */
 384       assert_param(IS_USART_INSTANCE(USARTx));
 385
 386       /* Check clock related parameters */
 387       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 388       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 389       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 390
 391       /*---------------------------- USART CR2 Configuration -----------------------
 392        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 393        * - Enable Clock Output:         USART_CR2_CLKEN set
 394        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 395        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 396        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 397        */
 398       MODIFY_REG(USARTx->CR2,
 399                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 400                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 401                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 402     }
 403   }
 404   /* Else (USART not in Disabled state => return ERROR */
 405   else
 406   {
 407     status = ERROR;
 408   }
 409
 410   return (status);
 411 }
 412
 413 /**
 414   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 415   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 416   *                              whose fields will be set to default values.
 417   * @retval None
 418   */
 419 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 420 {
 421   /* Set LL_USART_ClockInitStruct fields with default values */
 422   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 423   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 424   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 425   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 426 }
 427
 428 /**
 429   * @}
 430   */
 431
 432 /**
 433   * @}
 434   */
 435
 436 /**
 437   * @}
 438   */
 439
 440 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
 441
 442 /**
 443   * @}
 444   */
 445
 446 #endif /* USE_FULL_LL_DRIVER */
 447
 448 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 449